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authorMichał Barnaś <mb@semihalf.com>2022-08-10 17:48:40 +0200
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-02-14 19:06:34 +0000
commit9263f14536b8ad64682362070d4f5fd7c1c8c7c6 (patch)
treedaff36a9727fe7385678ea7df09376367ac0aa2e
parent8b79c53a600731ea68129896bb3d93c0d248da32 (diff)
downloadchrome-ec-9263f14536b8ad64682362070d4f5fd7c1c8c7c6.tar.gz
zephyr: remove shi node and add references to shi0
This commit removes the references to internal shi node in device tree and changes them to shi0 from the Zephyr device trees. Changes also the compatible string from internal to upstream one by removing the 'cros' prefix and removes the binding files. BRANCH=main BUG=b:265763662 TEST=run the host commands test on affected boards LOW_COVERAGE_REASON=No tests are available for EC on-chip peripherals. Change-Id: Iefdba23680d7734013de128f1b8878bac2c96cfa Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4180585 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Michał Barnaś <barnas@google.com> Tested-by: Michał Barnaś <barnas@google.com>
-rw-r--r--docs/zephyr/zephyr_ap_ec_comm.md7
-rw-r--r--zephyr/drivers/cros_flash/cros_flash_it8xxx2.c2
-rw-r--r--zephyr/drivers/cros_shi/Kconfig4
-rw-r--r--zephyr/drivers/cros_shi/cros_shi_it8xxx2.c2
-rw-r--r--zephyr/drivers/cros_shi/cros_shi_npcx.c4
-rw-r--r--zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml19
-rw-r--r--zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml35
-rw-r--r--zephyr/include/cros/ite/it8xxx2.dtsi12
-rw-r--r--zephyr/include/cros/nuvoton/npcx.dtsi18
-rw-r--r--zephyr/program/corsola/ite_shi.dtsi3
-rw-r--r--zephyr/program/corsola/npcx_host_interface.dtsi2
-rw-r--r--zephyr/program/geralt/shi.dtsi3
-rw-r--r--zephyr/program/herobrine/common.dtsi2
-rw-r--r--zephyr/program/it8xxx2_evb/shi.dts3
-rw-r--r--zephyr/program/nissa/shi.dtsi3
-rw-r--r--zephyr/program/trogdor/lazor/host_interface_npcx.dts2
-rw-r--r--zephyr/shim/chip/npcx/shi.c2
17 files changed, 25 insertions, 98 deletions
diff --git a/docs/zephyr/zephyr_ap_ec_comm.md b/docs/zephyr/zephyr_ap_ec_comm.md
index dca948fbe9..711b2449ec 100644
--- a/docs/zephyr/zephyr_ap_ec_comm.md
+++ b/docs/zephyr/zephyr_ap_ec_comm.md
@@ -110,20 +110,19 @@ selected host interface and SoC family. Each SoC driver has specific
compatibility string which is used to get node with configuration from the
device tree.
For example, the nuvoton npcx chip uses compatibility string
-`nuvoton,npcx-cros-shi`.
+`nuvoton,npcx-shi`.
The node's required properties are defined in yaml files: [SHI bindings]
```
/ {
- shi: shi@4000f000 {
- compatible = "nuvoton,npcx-cros-shi";
+ shi0: shi@4000f000 {
+ compatible = "nuvoton,npcx-shi";
reg = <0x4000f000 0x120>;
interrupts = <18 1>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>;
pinctrl-0 = <&altc_shi_sl>;
shi-cs-wui =<&wui_io53>;
- label = "SHI";
};
}
```
diff --git a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c
index 2d34a21523..ee687c8f61 100644
--- a/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c
+++ b/zephyr/drivers/cros_flash/cros_flash_it8xxx2.c
@@ -209,7 +209,7 @@ static int cros_flash_it8xxx2_erase(const struct device *dev, int offset,
*/
if (IS_ENABLED(HAS_TASK_HOSTCMD) &&
IS_ENABLED(CONFIG_HOST_COMMAND_STATUS)) {
- irq_enable(DT_IRQN(DT_NODELABEL(shi)));
+ irq_enable(DT_IRQN(DT_NODELABEL(shi0)));
}
/* Always use sector erase command */
for (; size > 0; size -= CONFIG_FLASH_ERASE_SIZE) {
diff --git a/zephyr/drivers/cros_shi/Kconfig b/zephyr/drivers/cros_shi/Kconfig
index 3b93ad48ee..8f9475ea6d 100644
--- a/zephyr/drivers/cros_shi/Kconfig
+++ b/zephyr/drivers/cros_shi/Kconfig
@@ -7,7 +7,7 @@ if PLATFORM_EC_HOST_INTERFACE_SHI
config CROS_SHI_NPCX
bool
default y
- depends on DT_HAS_NUVOTON_NPCX_CROS_SHI_ENABLED
+ depends on DT_HAS_NUVOTON_NPCX_SHI_ENABLED
help
This option enables Serial Host Interface driver for the NPCX family
of processors. This is used for host-command communication on the
@@ -41,7 +41,7 @@ endif # CROS_SHI_NPCX
config CROS_SHI_IT8XXX2
bool
default y
- depends on DT_HAS_ITE_IT8XXX2_CROS_SHI_ENABLED
+ depends on DT_HAS_ITE_IT8XXX2_SHI_ENABLED
help
This option enables spi host interface driver which is required to
communicate with the EC when the CPU is the ARM processor.
diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
index 92c279037a..75d94f49d1 100644
--- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
+++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
@@ -3,7 +3,7 @@
* found in the LICENSE file.
*/
-#define DT_DRV_COMPAT ite_it8xxx2_cros_shi
+#define DT_DRV_COMPAT ite_it8xxx2_shi
#include "chipset.h"
#include "console.h"
diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c
index 8bddb7b85d..48513244b6 100644
--- a/zephyr/drivers/cros_shi/cros_shi_npcx.c
+++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c
@@ -3,7 +3,7 @@
* found in the LICENSE file.
*/
-#define DT_DRV_COMPAT nuvoton_npcx_cros_shi
+#define DT_DRV_COMPAT nuvoton_npcx_shi
#include "host_command.h"
#include "soc_miwu.h"
@@ -33,7 +33,7 @@
LOG_MODULE_REGISTER(cros_shi, LOG_LEVEL_DBG);
-#define SHI_NODE DT_NODELABEL(shi)
+#define SHI_NODE DT_NODELABEL(shi0)
#define SHI_VER_CTRL_PH DT_PHANDLE_BY_IDX(SHI_NODE, ver_ctrl, 0)
#define SHI_VER_CTRL_ALT_FILED(f) DT_PHA_BY_IDX(SHI_VER_CTRL_PH, alts, 0, f)
diff --git a/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml
deleted file mode 100644
index 6ac4c501f9..0000000000
--- a/zephyr/dts/bindings/cros_shi/ite,it8xxx2-cros-shi.yaml
+++ /dev/null
@@ -1,19 +0,0 @@
-# Copyright 2021 The ChromiumOS Authors
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-description: ITE, IT8XXX2 Serial Host Interface (SHI) node
-
-compatible: "ite,it8xxx2-cros-shi"
-
-include: [base.yaml, pinctrl-device.yaml]
-
-properties:
- reg:
- required: true
-
- pinctrl-0:
- required: true
-
- pinctrl-names:
- required: true
diff --git a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml
deleted file mode 100644
index af7f98f9bb..0000000000
--- a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml
+++ /dev/null
@@ -1,35 +0,0 @@
-# Copyright 2021 Google LLC
-# SPDX-License-Identifier: Apache-2.0
-
-description: Nuvoton, NPCX Serial Host Interface (SHI) node
-
-compatible: "nuvoton,npcx-cros-shi"
-
-include: [base.yaml, pinctrl-device.yaml]
-
-properties:
- reg:
- description: mmio register space
- required: true
-
- clocks:
- required: true
- description: configurations of device source clock controller
-
- pinctrl-0:
- required: true
-
- pinctrl-1:
- required: false
-
- pinctrl-names:
- required: true
-
- shi-cs-wui:
- type: phandle
- required: true
- description: |
- Mapping table between Wake-Up Input (WUI) and SHI_CS signal.
-
- For example the WUI mapping on NPCX7 would be
- shi-cs-wui = <&wui_io53>;
diff --git a/zephyr/include/cros/ite/it8xxx2.dtsi b/zephyr/include/cros/ite/it8xxx2.dtsi
index 05c81b6896..983bf46663 100644
--- a/zephyr/include/cros/ite/it8xxx2.dtsi
+++ b/zephyr/include/cros/ite/it8xxx2.dtsi
@@ -49,18 +49,6 @@
};
soc {
- /* TODO(b/265198571): Migrate Zephyr EC builds to upstream SHI
- * drivers.
- */
- /delete-node/ shi@f03a00;
- shi: shi@f03a00 {
- compatible = "ite,it8xxx2-cros-shi";
- reg = <0x00f03a00 0x30>;
- interrupts = <171 0>;
- interrupt-parent = <&intc>;
- status = "disabled";
- };
-
fiu0: cros-flash@80000000 {
compatible = "ite,it8xxx2-cros-flash";
reg = <0x80000000 0x100000>;
diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi
index b529299b6a..46f719b03e 100644
--- a/zephyr/include/cros/nuvoton/npcx.dtsi
+++ b/zephyr/include/cros/nuvoton/npcx.dtsi
@@ -86,20 +86,6 @@
reg = <0x400b7000 0x2000>;
mtc-alarm = <&wui_mtc>;
};
-
- /* TODO(b/265198571): Migrate Zephyr EC builds to upstream SHI
- * drivers.
- */
- /delete-node/ shi@4000f000;
- shi: shi@4000f000 {
- compatible = "nuvoton,npcx-cros-shi";
- reg = <0x4000f000 0x120>;
- interrupts = <18 1>;
- clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>;
- shi-cs-wui =<&wui_io53>;
- label = "SHI";
- status = "disabled";
- };
};
power-states {
@@ -130,3 +116,7 @@
&mdc {
status = "okay";
};
+
+&shi0 {
+ shi-cs-wui =<&wui_io53>;
+};
diff --git a/zephyr/program/corsola/ite_shi.dtsi b/zephyr/program/corsola/ite_shi.dtsi
index 12c0c6ca5b..cf531f7418 100644
--- a/zephyr/program/corsola/ite_shi.dtsi
+++ b/zephyr/program/corsola/ite_shi.dtsi
@@ -5,9 +5,10 @@
#include <ite/it8xxx2-pinctrl-map.dtsi>
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default
&shi_clk_gpm4_default &shi_cs_gpm5_default>;
pinctrl-names = "default";
+ cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */
};
diff --git a/zephyr/program/corsola/npcx_host_interface.dtsi b/zephyr/program/corsola/npcx_host_interface.dtsi
index 14efa3c6b2..b691893854 100644
--- a/zephyr/program/corsola/npcx_host_interface.dtsi
+++ b/zephyr/program/corsola/npcx_host_interface.dtsi
@@ -4,7 +4,7 @@
*/
/* host interface */
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_gp46_47_53_55>;
pinctrl-1 = <&shi_gpio_gp46_47_53_55>;
diff --git a/zephyr/program/geralt/shi.dtsi b/zephyr/program/geralt/shi.dtsi
index 12c0c6ca5b..cf531f7418 100644
--- a/zephyr/program/geralt/shi.dtsi
+++ b/zephyr/program/geralt/shi.dtsi
@@ -5,9 +5,10 @@
#include <ite/it8xxx2-pinctrl-map.dtsi>
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default
&shi_clk_gpm4_default &shi_cs_gpm5_default>;
pinctrl-names = "default";
+ cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */
};
diff --git a/zephyr/program/herobrine/common.dtsi b/zephyr/program/herobrine/common.dtsi
index d4e92830bb..0fbde24a54 100644
--- a/zephyr/program/herobrine/common.dtsi
+++ b/zephyr/program/herobrine/common.dtsi
@@ -36,7 +36,7 @@
};
};
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_gp46_47_53_55>;
pinctrl-1 = <&shi_gpio_gp46_47_53_55>;
diff --git a/zephyr/program/it8xxx2_evb/shi.dts b/zephyr/program/it8xxx2_evb/shi.dts
index 12c0c6ca5b..cf531f7418 100644
--- a/zephyr/program/it8xxx2_evb/shi.dts
+++ b/zephyr/program/it8xxx2_evb/shi.dts
@@ -5,9 +5,10 @@
#include <ite/it8xxx2-pinctrl-map.dtsi>
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default
&shi_clk_gpm4_default &shi_cs_gpm5_default>;
pinctrl-names = "default";
+ cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */
};
diff --git a/zephyr/program/nissa/shi.dtsi b/zephyr/program/nissa/shi.dtsi
index 12c0c6ca5b..cf531f7418 100644
--- a/zephyr/program/nissa/shi.dtsi
+++ b/zephyr/program/nissa/shi.dtsi
@@ -5,9 +5,10 @@
#include <ite/it8xxx2-pinctrl-map.dtsi>
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_mosi_gpm0_default &shi_miso_gpm1_default
&shi_clk_gpm4_default &shi_cs_gpm5_default>;
pinctrl-names = "default";
+ cs-gpios = <&gpiom 5 0>; /* unused but needed by dt binding */
};
diff --git a/zephyr/program/trogdor/lazor/host_interface_npcx.dts b/zephyr/program/trogdor/lazor/host_interface_npcx.dts
index 14efa3c6b2..b691893854 100644
--- a/zephyr/program/trogdor/lazor/host_interface_npcx.dts
+++ b/zephyr/program/trogdor/lazor/host_interface_npcx.dts
@@ -4,7 +4,7 @@
*/
/* host interface */
-&shi {
+&shi0 {
status = "okay";
pinctrl-0 = <&shi_gp46_47_53_55>;
pinctrl-1 = <&shi_gpio_gp46_47_53_55>;
diff --git a/zephyr/shim/chip/npcx/shi.c b/zephyr/shim/chip/npcx/shi.c
index 0cecc2c56e..4e0535b91f 100644
--- a/zephyr/shim/chip/npcx/shi.c
+++ b/zephyr/shim/chip/npcx/shi.c
@@ -21,7 +21,7 @@
LOG_MODULE_REGISTER(shim_cros_shi, LOG_LEVEL_DBG);
-#define SHI_NODE DT_NODELABEL(shi)
+#define SHI_NODE DT_NODELABEL(shi0)
static void shi_enable(void)
{