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| author | Gwendal Grignou <gwendal@chromium.org> | 2019-10-03 13:31:01 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-10-04 02:20:38 +0000 |
| commit | d58e50539f3dcf01b9bd262bd3adc2afe122af54 (patch) | |
| tree | c219040de82681338b0e575cf6376b05706eb9c0 | |
| parent | ebfeffcfe7fba37414a1dd81444f4f9ad64889a3 (diff) | |
| download | chrome-ec-d58e50539f3dcf01b9bd262bd3adc2afe122af54.tar.gz | |
hana: lower the maximum allowed ODR to 100Hz
Some tests are failing on Hana at the highest ODR.
This is likely due to Hana not having a dedicated GPIO path
for MKBP events, instead relying on the ACPI path which is known
to have lower latency guarantees than we expect.
Lowering the ODR allows the tests to pass more reliably.
They were passing before CL:1536488, when ODR was reported at 100Hz to
ARC++.
BUG=b:142026126
BRANCH=elm
TEST=[TBD]: Compile, loaded on Hana, pass on R79:
CTS_P.9.0_r9.x86.CtsSensorTestCases
Change-Id: I31d74c5e4316fdddcbdaf693731c5a5ba0b13881
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1839195
Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org>
Commit-Queue: Kazuhiro Inaba <kinaba@chromium.org>
Tested-by: Kazuhiro Inaba <kinaba@chromium.org>
| -rw-r--r-- | board/elm/board.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/board/elm/board.h b/board/elm/board.h index acc3984444..456e43d5a9 100644 --- a/board/elm/board.h +++ b/board/elm/board.h @@ -22,6 +22,9 @@ #define CONFIG_ACCEL_FIFO 512 #define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3) +/* Lower maximal ODR to 100Hz */ +#define CONFIG_EC_MAX_SENSOR_FREQ_MILLIHZ 100000 + /* * Sensor internal FIFO is enabled for BMI160, but not for BMA255. */ |