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| author | David Huang <david.huang@quanta.corp-partner.google.com> | 2020-05-26 09:03:05 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-05-28 08:03:18 +0000 |
| commit | b76ba207deec004dd2fa3a8a1cb140cd3b216e5b (patch) | |
| tree | 301ed738fec67993867ff8c23d68f3662ed4060f | |
| parent | 4af3bd8c46d79ad6da1a33c9ab5debe45667169c (diff) | |
| download | chrome-ec-b76ba207deec004dd2fa3a8a1cb140cd3b216e5b.tar.gz | |
syv682x: replace 1 << digits, with BIT(digits)
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
BUG=none
BRANCH=octopus
TEST=make buildall -j pass.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I203f1a8d11e815828ab7769e674e51bc262beca3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2215645
Commit-Queue: Marco Chen <marcochen@chromium.org>
Tested-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Marco Chen <marcochen@chromium.org>
| -rw-r--r-- | driver/ppc/syv682x.c | 6 | ||||
| -rw-r--r-- | driver/ppc/syv682x.h | 28 |
2 files changed, 17 insertions, 17 deletions
diff --git a/driver/ppc/syv682x.c b/driver/ppc/syv682x.c index e953b5b33f..d438597751 100644 --- a/driver/ppc/syv682x.c +++ b/driver/ppc/syv682x.c @@ -18,10 +18,10 @@ #include "usb_pd.h" #include "util.h" -#define SYV682X_FLAGS_SOURCE_ENABLED (1 << 0) +#define SYV682X_FLAGS_SOURCE_ENABLED BIT(0) /* 0 -> CC1, 1 -> CC2 */ -#define SYV682X_FLAGS_CC_POLARITY (1 << 1) -#define SYV682X_FLAGS_VBUS_PRESENT (1 << 2) +#define SYV682X_FLAGS_CC_POLARITY BIT(1) +#define SYV682X_FLAGS_VBUS_PRESENT BIT(2) #define SYV682X_FLAGS_OCP BIT(3) #define SYV682X_FLAGS_OVP BIT(4) #define SYV682X_FLAGS_TSD BIT(5) diff --git a/driver/ppc/syv682x.h b/driver/ppc/syv682x.h index 94e44df787..4adfc8b3f1 100644 --- a/driver/ppc/syv682x.h +++ b/driver/ppc/syv682x.h @@ -28,14 +28,14 @@ #define SYV682X_STATUS_OVP BIT(4) #define SYV682X_STATUS_FRS BIT(3) #define SYV682X_STATUS_TSD BIT(2) -#define SYV682X_STATUS_VSAFE_5V (1 << 1) -#define SYV682X_STATUS_VSAFE_0V (1 << 0) +#define SYV682X_STATUS_VSAFE_5V BIT(1) +#define SYV682X_STATUS_VSAFE_0V BIT(0) #define SYV682X_STATUS_INT_MASK 0xfc /* Control Register 1 */ -#define SYV682X_CONTROL_1_CH_SEL (1 << 1) -#define SYV682X_CONTROL_1_HV_DR (1 << 2) -#define SYV682X_CONTROL_1_PWR_ENB (1 << 7) +#define SYV682X_CONTROL_1_CH_SEL BIT(1) +#define SYV682X_CONTROL_1_HV_DR BIT(2) +#define SYV682X_CONTROL_1_PWR_ENB BIT(7) #define SYV682X_5V_ILIM_MASK 0x18 #define SYV682X_5V_ILIM_BIT_SHIFT 3 @@ -70,8 +70,8 @@ #define SYV682X_DSG_RON_400_OHM 1 #define SYV682X_DSG_RON_800_OHM 2 #define SYV682X_DSG_RON_1600_OHM 3 -#define SYV682X_CONTROL_2_SDSG (1 << 1) -#define SYV682X_CONTROL_2_FDSG (1 << 0) +#define SYV682X_CONTROL_2_SDSG BIT(1) +#define SYV682X_CONTROL_2_FDSG BIT(0) /* Control Register 3 */ #define SYV682X_BUSY BIT(7) @@ -88,13 +88,13 @@ #define SYV682X_OVP_23_7 7 /* Control Register 4 */ -#define SYV682X_CONTROL_4_CC1_BPS (1 << 7) -#define SYV682X_CONTROL_4_CC2_BPS (1 << 6) -#define SYV682X_CONTROL_4_VCONN1 (1 << 5) -#define SYV682X_CONTROL_4_VCONN2 (1 << 4) -#define SYV682X_CONTROL_4_VBAT_OVP (1 << 3) -#define SYV682X_CONTROL_4_VCONN_OCP (1 << 2) -#define SYV682X_CONTROL_4_CC_FRS (1 << 1) +#define SYV682X_CONTROL_4_CC1_BPS BIT(7) +#define SYV682X_CONTROL_4_CC2_BPS BIT(6) +#define SYV682X_CONTROL_4_VCONN1 BIT(5) +#define SYV682X_CONTROL_4_VCONN2 BIT(4) +#define SYV682X_CONTROL_4_VBAT_OVP BIT(3) +#define SYV682X_CONTROL_4_VCONN_OCP BIT(2) +#define SYV682X_CONTROL_4_CC_FRS BIT(1) #define SYV682X_CONTROL_4_INT_MASK 0x0c struct ppc_drv; |