diff options
| author | Scott Collyer <scollyer@google.com> | 2021-11-23 15:04:49 -0800 |
|---|---|---|
| committer | Scott Collyer <scollyer@google.com> | 2021-11-23 15:04:49 -0800 |
| commit | 817cf2223b0b33c91ca6e369b644cbc4d6c361e3 (patch) | |
| tree | f698bbab73d87af25f9fdc2d49f50a0c25111a79 | |
| parent | 6da8436a8ce04a7f88f80049a10638e1b8f6439d (diff) | |
| parent | 0349a5b6d95308141754523708a2d11d8bacce4c (diff) | |
| download | chrome-ec-817cf2223b0b33c91ca6e369b644cbc4d6c361e3.tar.gz | |
Merge remote-tracking branch 'cros/main' into firmware-gwc-fsi
Change-Id: Id9b5b5cb1db7428cd9f12452d73842d8c1f2705a
1007 files changed, 28518 insertions, 16530 deletions
diff --git a/.gitignore b/.gitignore index 61e6782a6e..3512b146f2 100644 --- a/.gitignore +++ b/.gitignore @@ -23,3 +23,7 @@ cscope.* __pycache__ *.egg-info .hypothesis/ + +# Clangd language server +.cache/clangd/index/* +compile_commands.json diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 277526ba5f..bd77d308cd 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -24,7 +24,7 @@ cache: - .cache/pip - venv/ - modules/ - - zephyr/main + - zephyr/ # The directory structure is: @@ -34,11 +34,9 @@ cache: before_script: - export MODULES_DIR="$CI_PROJECT_DIR/modules" - mkdir -p "${MODULES_DIR}" - - export ZEPHYR_ROOT="$CI_PROJECT_DIR/zephyr/main" - - mkdir -p "${ZEPHYR_ROOT}" - - test -d "${ZEPHYR_ROOT}/v2.6" || git clone --depth 1 -b chromeos-v2.6 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_ROOT}/v2.6" - - test -d "${ZEPHYR_ROOT}/v2.7" || git clone --depth 1 -b chromeos-v2.7 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_ROOT}/v2.7" - - test -d "${ZEPHYR_ROOT}/v2.8" || git clone --depth 1 -b chromeos-v2.8 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_ROOT}/v2.8" + - export ZEPHYR_BASE="${CI_PROJECT_DIR}/zephyr/main" + - mkdir -p "${ZEPHYR_BASE}" + - test -d "${ZEPHYR_BASE}/.git" || git clone --depth 1 -b chromeos-v2.7 https://chromium.googlesource.com/chromiumos/third_party/zephyr "${ZEPHYR_BASE}" - test -d "${MODULES_DIR}/cmsis" || git clone --depth 1 -b chromeos-main https://chromium.googlesource.com/chromiumos/third_party/zephyr/cmsis "${MODULES_DIR}/cmsis" - test -d "${MODULES_DIR}/hal_stm32" || git clone --depth 1 -b chromeos-main https://chromium.googlesource.com/chromiumos/third_party/zephyr/hal_stm32 "${MODULES_DIR}/hal_stm32" - test -d "${MODULES_DIR}/nanopb" || git clone --depth 1 -b main https://chromium.googlesource.com/chromiumos/third_party/zephyr/nanopb "${MODULES_DIR}/nanopb" @@ -46,8 +44,8 @@ before_script: - ln -s "$(pwd)" "${MODULES_DIR}/ec" - python3 -V # Print out python version for debugging - python3 -m pip install zephyr/zmake --user + - python3 -m pip install pyyaml - export BUILD_DIR=build - - export ZEPHYR_DIR=/zephyr - export PATH="$PATH:$HOME/.local/bin" - export PYTHONIOENCODING=utf-8 - export EC_DIR=/builds/zephyr-ec/ec @@ -61,22 +59,21 @@ seed_cache: - .cache/pip - venv/ - modules/ - - zephyr/main + - zephyr/ policy: push script: - - ls "${MODULES_DIR}" "${ZEPHYR_ROOT}" + - ls "${MODULES_DIR}" "${ZEPHYR_BASE}" # Users of this template must set: -# $PROJECT to the project to build in zephyr/projects. E.g. "lazor") -# $PROJECT_SUBDIR if it is in a subdirectory. E.g. "trogdor/" +# $PROJECT to the project to build. E.g., "lazor" .build_template: &build_template stage: build needs: ["seed_cache"] script: - - zmake --zephyr-root "${ZEPHYR_ROOT}" + - zmake --zephyr-base "${ZEPHYR_BASE}" --modules-dir "${MODULES_DIR}" -l DEBUG configure -b -B "${BUILD_DIR}/${PROJECT}" -t ${TOOLCHAIN:-zephyr} - zephyr/projects/${PROJECT_SUBDIR}${PROJECT} + "${PROJECT}" - for b in "${BUILD_DIR}/${PROJECT}"/build-* ; do bdir=$(basename ${b}) ; ninja -C ${b} ram_report >"${BUILD_DIR}/${PROJECT}/output/${bdir}_ram_report.txt" ; @@ -91,15 +88,13 @@ seed_cache: expire_in: 1 week # Users of this template must set: -# $PROJECT to the project to build in zephyr/projects. E.g. "lazor") -# $PROJECT_SUBDIR if it is in a subdirectory. E.g. "trogdor/" +# $PROJECT to the project to build. E.g., "lazor" .coverage_template: &coverage_template stage: test needs: ["merged_coverage", "zephyr_coverage"] script: - - PROJECT_NAME=$(echo ${PROJECT_SUBDIR}${PROJECT} | tr '/' '_') - - grep "SF:" "build/zcoverage/projects_${PROJECT_NAME}.info" | sort -u | sed -e 's|^SF:||' | xargs lcov -o build/no_zephyr_${PROJECT_NAME}.info -e build/merged_no_zephyr.info - - /usr/bin/genhtml -q -o build/no_zephyr_${PROJECT_NAME}_rpt -t "${PROJECT} coverage w/o zephyr" -p ${EC_DIR} -s build/no_zephyr_${PROJECT_NAME}.info + - grep "SF:" "build/zcoverage/${PROJECT}.info" | sort -u | sed -e 's|^SF:||' | xargs lcov -o build/no_zephyr_${PROJECT}.info -e build/merged_no_zephyr.info + - /usr/bin/genhtml -q -o build/no_zephyr_${PROJECT}_rpt -t "${PROJECT} coverage w/o zephyr" -p ${EC_DIR} -s build/no_zephyr_${PROJECT}.info artifacts: paths: - build/*.info @@ -110,25 +105,26 @@ seed_cache: delbin: variables: PROJECT: "delbin" - PROJECT_SUBDIR: "volteer/" <<: *build_template hayato: variables: PROJECT: "hayato" - PROJECT_SUBDIR: "asurada/" <<: *build_template +hayato_coverage: + variables: + PROJECT: "hayato" + <<: *coverage_template + herobrine_npcx9: variables: PROJECT: "herobrine_npcx9" - PROJECT_SUBDIR: "herobrine/" <<: *build_template herobrine_npcx9_coverage: variables: PROJECT: "herobrine_npcx9" - PROJECT_SUBDIR: "herobrine/" <<: *coverage_template it8xxx2_evb: @@ -136,15 +132,9 @@ it8xxx2_evb: PROJECT: "it8xxx2_evb" <<: *build_template -kohaku: - variables: - PROJECT: "kohaku" - <<: *build_template - lazor: variables: PROJECT: "lazor" - PROJECT_SUBDIR: "trogdor/" <<: *build_template native_posix: @@ -156,7 +146,6 @@ native_posix: volteer: variables: PROJECT: "volteer" - PROJECT_SUBDIR: "volteer/" <<: *build_template ec_coverage: @@ -178,7 +167,7 @@ zephyr_coverage: stage: test needs: ["seed_cache"] script: - - zmake --zephyr-root "${ZEPHYR_ROOT}" + - zmake --zephyr-base "${ZEPHYR_BASE}" --modules-dir "${MODULES_DIR}" -l DEBUG coverage "${BUILD_DIR}/zcoverage" artifacts: @@ -193,7 +182,7 @@ merged_coverage: needs: ["ec_coverage", "zephyr_coverage"] script: - lcov -o build/merged.info -a build/coverage/lcov.info -a build/zcoverage/lcov.info - - lcov -o build/merged_no_zephyr.info -r build/merged.info "${ZEPHYR_ROOT}/*" "${MODULES_DIR}/*" '/usr/include/x86_64-linux-gnu/*' + - lcov -o build/merged_no_zephyr.info -r build/merged.info "${ZEPHYR_BASE}/*" "${MODULES_DIR}/*" "zephyr/drivers/*" '/usr/include/x86_64-linux-gnu/*' artifacts: paths: - build/*.info @@ -205,6 +194,6 @@ testall: stage: test needs: ["seed_cache"] script: - - zmake --zephyr-root "${ZEPHYR_ROOT}" + - zmake --zephyr-base "${ZEPHYR_BASE}" --modules-dir "${MODULES_DIR}" -l DEBUG testall diff --git a/Makefile.rules b/Makefile.rules index 42afb26e6f..bf621f0191 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -87,7 +87,10 @@ cmd_bin_to_hex = $(OBJCOPY) -I binary -O ihex \ --change-addresses $(_program_memory_base) $^ $@ cmd_smap = $(NM) $< | sort > $@ cmd_elf = $(CC) $(objs) $(libsharedobjs_elf-y) $(LDFLAGS) \ - -o $@ -Wl,-T,$< -Wl,-Map,$(patsubst %.elf,%.map,$@) -flto-partition=one + -o $@ -Wl,-T,$< -Wl,-Map,$(patsubst %.elf,%.map,$@) +ifeq ($(cc-name),gcc) +cmd_elf+= -flto-partition=one +endif cmd_fuzz_exe = $(CXX) $^ $(HOST_TEST_LDFLAGS) $(LDFLAGS_EXTRA) -o $@ cmd_run_fuzz = build/host/$*/$*.exe -seed=1 -runs=1 $(silent) \ $(silent_err) || (echo "Test $* failed!" && false) @@ -667,14 +670,14 @@ $(npcx-monitor-fw-bin):$(npcx-monitor-fw).c npx-monitor-dir $(Q)$(OBJCOPY) -O binary $(out)/$(npcx-monitor-fw).elf $@ $(out)/$(npcx-monitor-hdr)_ro.o:$(npcx-monitor-hdr).c npx-monitor-dir - $(Q)$(CC) $(CFLAGS) -DSECTION_IS_RO=$(EMPTY) -MMD -c $< -MT $@ -o $@ + $(Q)$(CC) $(CFLAGS) -DSECTION_IS_RO=$(EMPTY) -MMD -fno-lto -c $< -MT $@ -o $@ $(npcx-monitor-hdr-ro-bin):$(out)/$(npcx-monitor-hdr)_ro.o $(if $(V),,@echo ' EXTBIN ' $(subst $(out)/,,$@) ; ) $(Q)$(OBJCOPY) -O binary $< $@ $(out)/$(npcx-monitor-hdr)_rw.o:$(npcx-monitor-hdr).c npx-monitor-dir - $(Q)$(CC) $(CFLAGS) -MMD -c $< -MT $@ -o $@ + $(Q)$(CC) $(CFLAGS) -MMD -fno-lto -c $< -MT $@ -o $@ $(npcx-monitor-hdr-rw-bin):$(out)/$(npcx-monitor-hdr)_rw.o $(if $(V),,@echo ' EXTBIN ' $(subst $(out)/,,$@) ; ) diff --git a/Makefile.toolchain b/Makefile.toolchain index ecfaeb6dd6..a56193201a 100644 --- a/Makefile.toolchain +++ b/Makefile.toolchain @@ -26,10 +26,18 @@ endif # Extract cc-name cc-name:=$(shell $(CC) -v 2>&1 | grep -q "clang version" && echo clang || echo gcc) +# Assume we want to use same compiler for both C and C++ +ifeq ($(cc-name),gcc) +cxx-name:=g++ +else +cxx-name:=clang++ +CROSS_COMPILE_arm:=arm-none-eabi- +endif + # Try not to assume too much about optional tools and prefixes CCACHE:=$(shell which ccache 2>/dev/null) ifeq ($(origin HOST_CROSS_COMPILE),undefined) -HOST_CROSS_COMPILE:=$(if $(shell which x86_64-pc-linux-gnu-gcc 2>/dev/null),x86_64-pc-linux-gnu-,) +HOST_CROSS_COMPILE:=$(if $(shell which x86_64-pc-linux-gnu-$(cc-name) 2>/dev/null),x86_64-pc-linux-gnu-,) endif AR=$(CROSS_COMPILE)ar @@ -42,8 +50,8 @@ OBJCOPY=$(CROSS_COMPILE)objcopy OBJDUMP=$(CROSS_COMPILE)objdump ADDR2LINE=$(CROSS_COMPILE)addr2line PKG_CONFIG?=pkg-config -BUILDCC?=$(CCACHE) gcc -HOSTCC?=$(CCACHE) $(HOST_CROSS_COMPILE)gcc +BUILDCC?=$(CCACHE) $(cc-name) +HOSTCC?=$(CCACHE) $(HOST_CROSS_COMPILE)$(cc-name) HOSTCXX?=$(CCACHE) $(HOST_CROSS_COMPILE)clang++ HOST_PKG_CONFIG?=$(HOST_CROSS_COMPILE)pkg-config PROTOC?=protoc @@ -51,15 +59,24 @@ GCOV=$(CROSS_COMPILE)gcov HOSTGCOV=$(CURDIR)/util/llvm-gcov.sh C_WARN = -Wstrict-prototypes -Wdeclaration-after-statement -Wno-pointer-sign -COMMON_WARN = -Wall -Wundef -Werror -Werror-implicit-function-declaration \ +COMMON_WARN = -Wall -Wundef -Werror-implicit-function-declaration \ -Wno-trigraphs -Wno-format-security -Wno-address-of-packed-member \ -fno-common -fno-strict-aliasing -fno-strict-overflow + +ifndef ALLOW_WARNINGS +COMMON_WARN+=-Werror ifeq ($(cc-name),clang) COMMON_WARN+=-Werror=uninitialized endif ifeq ($(cc-name),gcc) COMMON_WARN+=-Werror=maybe-uninitialized endif +endif + +ifeq ($(cc-name),clang) +# TODO(b/172020503): Re-enabling this warning requires a large CL. +C_WARN+= -Wno-ignored-attributes +endif UBSAN_FLAGS=-fsanitize=array-bounds,vla-bound \ -fno-sanitize=vptr \ diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index 4b9d8f386a..e402ba7516 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -41,7 +41,7 @@ #define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Host communication */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_HOSTCMD_ESPI_RESET_SLP_SX_VW_ON_ESPI_RST @@ -88,7 +88,6 @@ /* Buttons */ #define CONFIG_DEDICATED_RECOVERY_BUTTON -#define CONFIG_DEDICATED_RECOVERY_BUTTON_2 #define CONFIG_EMULATED_SYSRQ #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_IGNORE_LID @@ -152,11 +151,9 @@ #define CONFIG_USB_PD_VBUS_DETECT_TCPC #define CONFIG_USBC_PPC -/* Note - SN5S330 support automatically adds - * CONFIG_USBC_PPC_POLARITY - * CONFIG_USBC_PPC_SBU - * CONFIG_USBC_PPC_VCONN - */ +#define CONFIG_USBC_PPC_POLARITY +#define CONFIG_USBC_PPC_SBU +#define CONFIG_USBC_PPC_VCONN #define CONFIG_USBC_PPC_DEDICATED_INT #define CONFIG_USBC_SS_MUX diff --git a/baseboard/brya/baseboard.h b/baseboard/brya/baseboard.h index dbee995546..129fb5836e 100644 --- a/baseboard/brya/baseboard.h +++ b/baseboard/brya/baseboard.h @@ -45,7 +45,7 @@ #define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Host communication */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 /* @@ -144,16 +144,6 @@ #define CONFIG_PWM -/* Prochot assertion/deassertion ratios*/ -#define PROCHOT_ADAPTER_WATT_RATIO 97 -#define PROCHOT_ASSERTION_BATTERY_RATIO 95 -#define PROCHOT_DEASSERTION_BATTERY_RATIO 85 -#define PROCHOT_ASSERTION_PD_RATIO 105 -#define PROCHOT_DEASSERTION_PD_BATTERY_RATIO 95 -#define PROCHOT_ASSERTION_ADAPTER_RATIO 105 -#define PROCHOT_DEASSERTION_ADAPTER_RATIO 90 -#define PROCHOT_DEASSERTION_ADAPTER_BATT_RATIO 90 - /* Enable I2C Support */ #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER @@ -229,28 +219,29 @@ /* Device version of product. */ #define CONFIG_USB_BCD_DEV 0x0000 +/* + * These stack sizes were determined using "make analyzestack" for brya + * and include about 15% headroom. Sizes are rounded to multiples of 64 + * bytes. Task stack sizes not listed here use more generic values (see + * ec.tasklist). + */ +#define BASEBOARD_CHARGER_TASK_STACK_SIZE 1088 +#define BASEBOARD_CHG_RAMP_TASK_STACK_SIZE 1088 +#define BASEBOARD_CHIPSET_TASK_STACK_SIZE 1152 +#define BASEBOARD_PD_INT_TASK_STACK_SIZE 800 +#define BASEBOARD_PD_TASK_STACK_SIZE 1216 +#define BASEBOARD_POWERBTN_TASK_STACK_SIZE 1088 + #ifndef __ASSEMBLER__ #include <stdbool.h> #include <stdint.h> +#include "cbi.h" #include "common.h" #include "baseboard_usbc_config.h" #include "extpower.h" -/** - * Configure run-time data structures and operation based on CBI data. This - * typically includes customization for changes in the BOARD_VERSION and - * FW_CONFIG fields in CBI. This routine is called from the baseboard after - * the CBI data has been initialized. - */ -__override_proto void board_cbi_init(void); - -/** - * Initialize the FW_CONFIG from CBI data. If the CBI data is not valid, set the - * FW_CONFIG to the board specific defaults. - */ -__override_proto void board_init_fw_config(void); /* * Check battery disconnect state. @@ -259,11 +250,6 @@ __override_proto void board_init_fw_config(void); */ __override_proto bool board_battery_is_initialized(void); -/* - * Return the board revision number. - */ -uint8_t get_board_id(void); - #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/brya/cbi.h b/baseboard/brya/cbi.h new file mode 100644 index 0000000000..10ecfd87e7 --- /dev/null +++ b/baseboard/brya/cbi.h @@ -0,0 +1,32 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* brya family-specific CBI functions, shared with Zephyr */ + +#ifndef __CROS_EC_BASEBOARD_CBI_H +#define __CROS_EC_BASEBOARD_CBI_H + +#include "common.h" + +/* + * Return the board revision number. + */ +uint8_t get_board_id(void); + +/** + * Configure run-time data structures and operation based on CBI data. This + * typically includes customization for changes in the BOARD_VERSION and + * FW_CONFIG fields in CBI. This routine is called from the baseboard after + * the CBI data has been initialized. + */ +__override_proto void board_cbi_init(void); + +/** + * Initialize the FW_CONFIG from CBI data. If the CBI data is not valid, set the + * FW_CONFIG to the board specific defaults. + */ +__override_proto void board_init_fw_config(void); + +#endif /* __CROS_EC_BASEBOARD_CBI_H */ diff --git a/baseboard/brya/prochot.c b/baseboard/brya/prochot.c index 39512cf5c6..31f8958b2e 100644 --- a/baseboard/brya/prochot.c +++ b/baseboard/brya/prochot.c @@ -8,7 +8,7 @@ #include "charge_manager.h" #include "charger.h" #include "console.h" -#include "driver/charger/bq25710.h" +#include "driver/charger/bq257x0_regs.h" #include "hooks.h" #include "i2c.h" #include "math_util.h" @@ -31,7 +31,7 @@ struct batt_para batt_params; static int cal_sys_watt(void) { - int adapter_voltage_mv; + int adapter_voltage_v; int IDPM; int Vacpacn; int V_iadpt; @@ -42,11 +42,11 @@ static int cal_sys_watt(void) /* the ratio selectable through IADPT_GAIN bit. */ V_iadpt = Vacpacn * 1000 / 40; - IDPM = V_iadpt / CONFIG_CHARGER_SENSE_RESISTOR_AC; + IDPM = V_iadpt / CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC; - adapter_voltage_mv = charge_manager_get_charger_voltage(); + adapter_voltage_v = charge_manager_get_charger_voltage() / 1000; - W_adpt = IDPM * adapter_voltage_mv / PROCHOT_ADAPTER_WATT_RATIO * 100; + W_adpt = IDPM * adapter_voltage_v / PROCHOT_ADAPTER_WATT_RATIO * 100; return W_adpt; } @@ -110,14 +110,16 @@ static int set_register_charge_option(void) rv = i2c_read16(I2C_PORT_CHARGER, BQ25710_SMBUS_ADDR1_FLAGS, BQ25710_REG_CHARGE_OPTION_0, ®); if (rv == EC_SUCCESS) { - reg |= BQ25710_CHARGE_OPTION_0_IADP_GAIN; + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, IADP_GAIN, 1, reg); /* if AC only, disable IDPM, * because it will cause charger keep asserting PROCHOT */ if (!battery_hw_present()) - reg &= ~BQ25710_CHARGE_OPTION_0_EN_IDPM; + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, EN_IDPM, 0, + reg); else - reg |= BQ25710_CHARGE_OPTION_0_EN_IDPM; + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, EN_IDPM, 1, + reg); } else { CPRINTS("Failed to read bq25720"); return rv; @@ -142,11 +144,10 @@ static void assert_prochot(void) /* Calculate actual system W */ adpt_mw = cal_sys_watt(); - /* Read battery info - * if any flag is set, skip this cycle and hope + /* If any battery flag is set and no AC, skip this cycle and hope * the next cycle succeeds */ - if (get_batt_parameter()) + if (get_batt_parameter() && !extpower_is_present()) return; /* When battery is discharging, the battery current will be negative */ @@ -197,7 +198,8 @@ static void assert_prochot(void) if (total_W > ADT_RATING_W * PROCHOT_ASSERTION_PD_RATIO / 100) gpio_set_level(GPIO_EC_PROCHOT_ODL, 0); - else if (total_W <= ADT_RATING_W) + else if (total_W <= ADT_RATING_W * + PROCHOT_DEASSERTION_PD_RATIO / 100) gpio_set_level(GPIO_EC_PROCHOT_ODL, 1); } else { /* AC + battery */ diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c index e50d4114c9..9cd2ccbef5 100644 --- a/baseboard/cherry/baseboard.c +++ b/baseboard/cherry/baseboard.c @@ -230,6 +230,7 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); static void board_chipset_resume(void) { gpio_set_level(GPIO_EC_BL_EN_OD, 1); + gpio_set_level(GPIO_DP_DEMUX_EN, 1); } DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); @@ -237,6 +238,7 @@ DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); static void board_chipset_suspend(void) { gpio_set_level(GPIO_EC_BL_EN_OD, 0); + gpio_set_level(GPIO_DP_DEMUX_EN, 0); } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); @@ -293,7 +295,7 @@ static int board_ps8802_mux_set(const struct usb_mux *me, PS8802_REG_PAGE2, PS8802_REG2_USB_SSEQ_LEVEL, PS8802_USBEQ_LEVEL_UP_MASK, - PS8802_USBEQ_LEVEL_UP_19DB)); + PS8802_USBEQ_LEVEL_UP_12DB)); } /* DP specific config */ @@ -303,7 +305,7 @@ static int board_ps8802_mux_set(const struct usb_mux *me, PS8802_REG_PAGE2, PS8802_REG2_DPEQ_LEVEL, PS8802_DPEQ_LEVEL_UP_MASK, - PS8802_DPEQ_LEVEL_UP_19DB)); + PS8802_DPEQ_LEVEL_UP_12DB)); } return EC_SUCCESS; @@ -414,7 +416,8 @@ __override int board_rt1718s_init(int port) RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL3, RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1, - RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2)); + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1)); /* Set FRS signal detect time to 46.875us */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL1, RT1718S_FRS_CTRL1_FRSWAPRX_MASK, diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h index 2a4705e541..6f5a98b786 100644 --- a/baseboard/cherry/baseboard.h +++ b/baseboard/cherry/baseboard.h @@ -208,6 +208,11 @@ EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | \ EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) +/* And the MKBP events */ +#define CONFIG_MKBP_EVENT_WAKEUP_MASK \ + (BIT(EC_MKBP_EVENT_KEY_MATRIX) | \ + BIT(EC_MKBP_EVENT_HOST_EVENT)) + #ifndef __ASSEMBLER__ #include "gpio_signal.h" diff --git a/baseboard/corsola/baseboard.c b/baseboard/corsola/baseboard.c index fb3294e554..4d8fea6c7c 100644 --- a/baseboard/corsola/baseboard.c +++ b/baseboard/corsola/baseboard.c @@ -15,9 +15,8 @@ #include "chipset.h" #include "common.h" #include "console.h" -#include "driver/accelgyro_bmi_common.h" #include "driver/accel_lis2dw12.h" -#include "driver/als_tcs3400.h" +#include "driver/accelgyro_icm426xx.h" #include "driver/bc12/mt6360.h" #include "driver/charger/isl923x.h" #include "driver/ppc/syv682x.h" @@ -81,20 +80,3 @@ int board_allow_i2c_passthru(int port) { return (port == I2C_PORT_VIRTUAL_BATTERY); } - -const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) -{ - const static struct cc_para_t - cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - { - .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, - .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, - }, - }; - - return &cc_parameter[port]; -} diff --git a/baseboard/corsola/hibernate.c b/baseboard/corsola/hibernate.c index 4ff149069d..c3752358bf 100644 --- a/baseboard/corsola/hibernate.c +++ b/baseboard/corsola/hibernate.c @@ -11,16 +11,10 @@ /* Corsola board specific hibernate implementation */ __override void board_hibernate_late(void) { - /* - * Turn off PP5000_A. Required for devices without Z-state. - * Don't care for devices with Z-state. - */ - gpio_set_level(GPIO_EN_PP5000_A, 0); - if (IS_ENABLED(CONFIG_CHARGER_ISL9238C)) isl9238c_hibernate(CHARGER_SOLO); - gpio_set_level(GPIO_EN_SLP_Z, 1); + gpio_set_level(GPIO_EN_ULP, 1); /* should not reach here */ __builtin_unreachable(); diff --git a/baseboard/corsola/usb_pd_policy.c b/baseboard/corsola/usb_pd_policy.c index 4dca40e52c..d0c576a398 100644 --- a/baseboard/corsola/usb_pd_policy.c +++ b/baseboard/corsola/usb_pd_policy.c @@ -23,7 +23,7 @@ int svdm_get_hpd_gpio(int port) { /* HPD is low active, inverse the result */ - return !gpio_get_level(GPIO_EC_DPBRDG_HPD_ODL); + return !gpio_get_level(GPIO_EC_AP_DP_HPD_ODL); } void svdm_set_hpd_gpio(int port, int en) @@ -32,7 +32,7 @@ void svdm_set_hpd_gpio(int port, int en) * HPD is low active, inverse the en * TODO: C0&C1 shares the same HPD, implement FCFS policy. */ - gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !en); + gpio_set_level(GPIO_EC_AP_DP_HPD_ODL, !en); } /** diff --git a/baseboard/corsola/usbc_config.c b/baseboard/corsola/usbc_config.c index cdf7b2ae6a..30859fdc0d 100644 --- a/baseboard/corsola/usbc_config.c +++ b/baseboard/corsola/usbc_config.c @@ -53,7 +53,7 @@ const struct charger_config_t chg_chips[] = { static void baseboard_init(void) { - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C0_PPC_BC12_INT_ODL); gpio_enable_interrupt(GPIO_AP_XHCI_INIT_DONE); } DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1); @@ -102,7 +102,6 @@ DECLARE_HOOK(HOOK_INIT, sub_board_init, HOOK_PRIO_INIT_I2C - 1); /* Detect subboard */ static void board_tcpc_init(void) { - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ gpio_enable_interrupt(GPIO_X_EC_GPIO2); @@ -119,7 +118,7 @@ struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_port = I2C_PORT_PPC0, .i2c_addr_flags = SYV682X_ADDR0_FLAGS, .drv = &syv682x_drv, - .frs_en = GPIO_USB_C0_FRS_EN, + .frs_en = GPIO_USB_C0_PPC_FRSINFO, }, { .i2c_port = I2C_PORT_PPC1, @@ -152,16 +151,13 @@ struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { void bc12_interrupt(enum gpio_signal signal) { - if (signal == GPIO_USB_C0_BC12_INT_ODL) - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); - else - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); } static void board_sub_bc12_init(void) { if (board_get_sub_board() == SUB_BOARD_TYPEC) - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); + gpio_enable_interrupt(GPIO_USB_C1_BC12_CHARGER_INT_ODL); else /* If this is not a Type-C subboard, disable the task. */ task_disable_task(TASK_ID_USB_CHG_P1); @@ -169,13 +165,6 @@ static void board_sub_bc12_init(void) /* Must be done after I2C and subboard */ DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_INIT_I2C + 1); -void ppc_interrupt(enum gpio_signal signal) -{ - if (signal == GPIO_USB_C0_PPC_INT_ODL) - /* C0: PPC interrupt */ - syv682x_interrupt(0); -} - __override uint8_t board_get_usb_pd_port_count(void) { if (board_get_sub_board() == SUB_BOARD_TYPEC) @@ -382,7 +371,7 @@ static void ps185_hdmi_hpd_deferred(void) debounced_hpd = new_hpd; - gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !debounced_hpd); + gpio_set_level(GPIO_EC_AP_DP_HPD_ODL, !debounced_hpd); CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); } DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); @@ -411,7 +400,7 @@ void x_ec_interrupt(enum gpio_signal signal) int ppc_get_alert_status(int port) { if (port == 0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; + return gpio_get_level(GPIO_USB_C0_PPC_BC12_INT_ODL) == 0; if (port == 1 && board_get_sub_board() == SUB_BOARD_TYPEC) return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; diff --git a/baseboard/dedede/baseboard.c b/baseboard/dedede/baseboard.c index fce41ca001..54c7a6a24a 100644 --- a/baseboard/dedede/baseboard.c +++ b/baseboard/dedede/baseboard.c @@ -185,10 +185,10 @@ __override int power_signal_get_level(enum gpio_signal signal) if (signal == GPIO_PG_EC_ALL_SYS_PWRGD) return intel_x86_get_pg_ec_all_sys_pwrgd(); - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) - return espi_vw_get_wire(signal); + return espi_vw_get_wire((enum espi_vw_signal)signal); } return gpio_get_level(signal); diff --git a/baseboard/dedede/baseboard.h b/baseboard/dedede/baseboard.h index 6e3dffdb80..529e011f32 100644 --- a/baseboard/dedede/baseboard.h +++ b/baseboard/dedede/baseboard.h @@ -13,6 +13,8 @@ * The sensor stack is generating a lot of activity. */ #define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_LPC))) +#undef CONFIG_HOSTCMD_DEBUG_MODE +#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF /* * Variant EC defines. Pick one: @@ -119,7 +121,7 @@ /* EC Modules */ #define CONFIG_ADC #define CONFIG_CRC8 -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_EVENTS #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER diff --git a/baseboard/dedede/variant_ec_npcx796fc.c b/baseboard/dedede/variant_ec_npcx796fc.c index 3a198ff0c0..c34de929a7 100644 --- a/baseboard/dedede/variant_ec_npcx796fc.c +++ b/baseboard/dedede/variant_ec_npcx796fc.c @@ -101,10 +101,11 @@ static void disable_adc_irqs_deferred(void) DECLARE_DEFERRED(disable_adc_irqs_deferred); /* - * The ADC interrupts are only needed for booting up. The assumption is that - * the PP3300_A rail will not go down during runtime. Therefore, we'll disable - * the ADC interrupts shortly after booting up and also after shutting down. + * The assumption is that the PP3300_A rail will not go down during runtime. + * Therefore, we'll disable the ADC interrupts shortly after booting up + * and also after shutting down. */ +static void enable_adc_irqs(void); static void disable_adc_irqs(void) { int delay = 200 * MSEC; @@ -114,8 +115,10 @@ static void disable_adc_irqs(void) * to G3. Therefore, we'll postpone disabling the ADC IRQs until after * this occurs. */ - if (chipset_in_or_transitioning_to_state(CHIPSET_STATE_ANY_OFF)) + if (chipset_in_or_transitioning_to_state(CHIPSET_STATE_ANY_OFF)) { delay = 15 * SECOND; + enable_adc_irqs(); + } hook_call_deferred(&disable_adc_irqs_deferred_data, delay); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, disable_adc_irqs, HOOK_PRIO_DEFAULT); @@ -138,7 +141,7 @@ DECLARE_HOOK(HOOK_CHIPSET_RESUME, disable_adc_irqs, HOOK_PRIO_DEFAULT); */ static void enable_adc_irqs(void) { - if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) { + if (chipset_in_or_transitioning_to_state(CHIPSET_STATE_ANY_OFF)) { CPRINTS("%s", __func__); hook_call_deferred(&disable_adc_irqs_deferred_data, -1); npcx_set_adc_repetitive(adc_channels[ADC_VSNS_PP3300_A].input_ch, diff --git a/baseboard/goroh/baseboard.c b/baseboard/goroh/baseboard.c index 933fdc0eff..047ba652a8 100644 --- a/baseboard/goroh/baseboard.c +++ b/baseboard/goroh/baseboard.c @@ -6,6 +6,8 @@ /* Goroh baseboard-specific configuration */ #include "adc.h" +#include "adc_chip.h" +#include "baseboard_usbc_config.h" #include "button.h" #include "charge_manager.h" #include "charger.h" @@ -18,27 +20,20 @@ #include "driver/accelgyro_bmi_common.h" #include "driver/accel_lis2dw12.h" #include "driver/als_tcs3400.h" -#include "driver/bc12/mt6360.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/charger/isl923x.h" #include "driver/charger/isl923x.h" #include "driver/ppc/syv682x.h" #include "driver/tcpm/it83xx_pd.h" #include "driver/temp_sensor/thermistor.h" -#include "driver/usb_mux/it5205.h" -#include "driver/usb_mux/ps8743.h" #include "extpower.h" #include "gpio.h" #include "hooks.h" #include "i2c.h" -#include "i2c.h" #include "keyboard_scan.h" #include "lid_switch.h" #include "motion_sense.h" #include "power_button.h" #include "power.h" #include "power.h" -#include "regulator.h" #include "spi.h" #include "switch.h" #include "tablet_mode.h" @@ -46,26 +41,19 @@ #include "temp_sensor.h" #include "timer.h" #include "uart.h" -#include "usb_charge.h" #include "usbc_ppc.h" #include "usb_mux.h" #include "usb_pd.h" #include "usb_pd_tcpm.h" -static void bc12_interrupt(enum gpio_signal signal); -static void ppc_interrupt(enum gpio_signal signal); -static void x_ec_interrupt(enum gpio_signal signal); - #include "gpio_list.h" #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) -static enum board_sub_board board_get_sub_board(void); - /* Wake-up pins for hibernate */ enum gpio_signal hibernate_wake_pins[] = { - GPIO_AC_PRESENT, + GPIO_ACOK_OD, GPIO_LID_OPEN, GPIO_POWER_BUTTON_L, }; @@ -79,155 +67,13 @@ const struct charger_config_t chg_chips[] = { }, }; -__override void board_hibernate_late(void) -{ - /* - * Turn off PP5000_A. Required for devices without Z-state. - * Don't care for devices with Z-state. - */ - gpio_set_level(GPIO_EN_PP5000_A, 0); - - /* - * GPIO_EN_SLP_Z not implemented in rev0/1, - * fallback to usual hibernate process. - */ - if (IS_ENABLED(BOARD_GOROH) && board_get_version() <= 1) - return; - - isl9238c_hibernate(CHARGER_SOLO); - - gpio_set_level(GPIO_EN_SLP_Z, 1); - - /* should not reach here */ - __builtin_unreachable(); -} - -/* Detect subboard */ -static void board_tcpc_init(void) -{ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ - gpio_enable_interrupt(GPIO_X_EC_GPIO2); - - /* If this is not a Type-C subboard, disable the task. */ - if (board_get_sub_board() != SUB_BOARD_TYPEC) - task_disable_task(TASK_ID_PD_C1); -} -/* Must be done after I2C and subboard */ -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); - -/* PPC */ -struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .i2c_port = I2C_PORT_PPC0, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - .frs_en = GPIO_USB_C0_FRS_EN, - }, - { - .i2c_port = I2C_PORT_PPC1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - .frs_en = GPIO_USB_C1_FRS_EN, - }, -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/* BC12 */ -const struct mt6360_config_t mt6360_config = { - .i2c_port = 0, - .i2c_addr_flags = MT6360_PMU_I2C_ADDR_FLAGS, +/* BC12 skeleton to make build happy. */ +struct bc12_config bc12_ports[CHARGE_PORT_COUNT] = { }; -const struct pi3usb9201_config_t - pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { - /* [0]: unused */ - [1] = { - .i2c_port = 4, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - } +const int usb_port_enable[USB_PORT_COUNT] = { }; -struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { .drv = &mt6360_drv }, - { .drv = &pi3usb9201_drv }, -}; - -static void bc12_interrupt(enum gpio_signal signal) -{ - if (signal == GPIO_USB_C0_BC12_INT_ODL) - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); - else - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); -} - -static void board_sub_bc12_init(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); - else - /* If this is not a Type-C subboard, disable the task. */ - task_disable_task(TASK_ID_USB_CHG_P1); -} -/* Must be done after I2C and subboard */ -DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_INIT_I2C + 1); - -static void ppc_interrupt(enum gpio_signal signal) -{ - if (signal == GPIO_USB_C0_PPC_INT_ODL) - /* C0: PPC interrupt */ - syv682x_interrupt(0); -} - -/* Sub-board */ - -static enum board_sub_board board_get_sub_board(void) -{ - static enum board_sub_board sub = SUB_BOARD_NONE; - - if (sub != SUB_BOARD_NONE) - return sub; - - /* HDMI board has external pull high. */ - if (gpio_get_level(GPIO_EC_X_GPIO3)) { - sub = SUB_BOARD_HDMI; - /* Only has 1 PPC with HDMI subboard */ - ppc_cnt = 1; - /* EC_X_GPIO1 */ - gpio_set_flags(GPIO_EN_HDMI_PWR, GPIO_OUT_HIGH); - /* X_EC_GPIO2 */ - gpio_set_flags(GPIO_PS185_EC_DP_HPD, GPIO_INT_BOTH); - /* EC_X_GPIO3 */ - gpio_set_flags(GPIO_PS185_PWRDN_ODL, GPIO_ODR_HIGH); - } else { - sub = SUB_BOARD_TYPEC; - /* EC_X_GPIO1 */ - gpio_set_flags(GPIO_USB_C1_FRS_EN, GPIO_OUT_LOW); - /* X_EC_GPIO2 */ - gpio_set_flags(GPIO_USB_C1_PPC_INT_ODL, - GPIO_INT_BOTH | GPIO_PULL_UP); - /* EC_X_GPIO3 */ - gpio_set_flags(GPIO_USB_C1_DP_IN_HPD, GPIO_OUT_LOW); - } - - CPRINTS("Detect %s SUB", sub == SUB_BOARD_HDMI ? "HDMI" : "TYPEC"); - return sub; -} - -static void sub_board_init(void) -{ - board_get_sub_board(); -} -DECLARE_HOOK(HOOK_INIT, sub_board_init, HOOK_PRIO_INIT_I2C - 1); - -__override uint8_t board_get_usb_pd_port_count(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - return CONFIG_USB_PD_PORT_MAX_COUNT; - else - return CONFIG_USB_PD_PORT_MAX_COUNT - 1; -} - /* Called on AP S3 -> S0 transition */ static void board_chipset_resume(void) { @@ -242,81 +88,8 @@ static void board_chipset_suspend(void) } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); -/* USB-A */ -const int usb_port_enable[] = { - GPIO_EN_PP5000_USB_A0_VBUS, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); - /* USB Mux */ -void board_usb_mux_init(void) -{ - if (board_get_sub_board() == SUB_BOARD_TYPEC) - ps8743_tune_usb_eq(&usb_muxes[1], - PS8743_USB_EQ_TX_12_8_DB, - PS8743_USB_EQ_RX_12_8_DB); -} -DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); - -static int board_ps8743_mux_set(const struct usb_mux *me, - mux_state_t mux_state) -{ - int rv = EC_SUCCESS; - int reg = 0; - - rv = ps8743_read(me, PS8743_REG_MODE, ®); - if (rv) - return rv; - - /* Disable FLIP pin, enable I2C control. */ - reg |= PS8743_MODE_FLIP_REG_CONTROL; - /* Disable CE_USB pin, enable I2C control. */ - reg |= PS8743_MODE_USB_REG_CONTROL; - /* Disable CE_DP pin, enable I2C control. */ - reg |= PS8743_MODE_DP_REG_CONTROL; - - /* - * DP specific config - * - * Enable/Disable IN_HPD on the DB. - */ - gpio_set_level(GPIO_USB_C1_DP_IN_HPD, - mux_state & USB_PD_MUX_DP_ENABLED); - - return ps8743_write(me, PS8743_REG_MODE, reg); -} - -const struct usb_mux usbc0_virtual_mux = { - .usb_port = 0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -const struct usb_mux usbc1_virtual_mux = { - .usb_port = 1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .usb_port = 0, - .i2c_port = I2C_PORT_USB_MUX0, - .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, - .driver = &it5205_usb_mux_driver, - .next_mux = &usbc0_virtual_mux, - }, - { - .usb_port = 1, - .i2c_port = I2C_PORT_USB_MUX1, - .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, - .driver = &ps8743_usb_mux_driver, - .next_mux = &usbc1_virtual_mux, - .board_set = &board_ps8743_mux_set, - }, -}; - /* * I2C channels (A, B, and C) are using the same timing registers (00h~07h) * at default. @@ -354,24 +127,6 @@ void board_overcurrent_event(int port, int is_overcurrented) /* TODO: check correct operation for GOROH */ } -/* TCPC */ -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it8xxx2_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, - { - .bus_type = EC_BUS_TYPE_EMBEDDED, - /* TCPC is embedded within EC so no i2c config needed */ - .drv = &it8xxx2_tcpm_drv, - /* Alert is active-low, push-pull */ - .flags = 0, - }, -}; - const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) { const static struct cc_para_t @@ -389,23 +144,6 @@ const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) return &cc_parameter[port]; } -uint16_t tcpc_get_alert_status(void) -{ - /* - * C0 & C1: TCPC is embedded in the EC and processes interrupts in the - * chip code (it83xx/intc.c) - */ - return 0; -} - -void board_reset_pd_mcu(void) -{ - /* - * C0 & C1: TCPC is embedded in the EC and processes interrupts in the - * chip code (it83xx/intc.c) - */ -} - void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, int charge_mv) { @@ -425,8 +163,7 @@ void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) int board_set_active_charge_port(int port) { int i; - int is_valid_port = port == 0 || (port == 1 && board_get_sub_board() == - SUB_BOARD_TYPEC); + int is_valid_port = ((port == 0) || (port == 1)); if (!is_valid_port && port != CHARGE_PORT_NONE) return EC_ERROR_INVAL; @@ -476,97 +213,47 @@ int board_set_active_charge_port(int port) return EC_SUCCESS; } -/** - * Handle PS185 HPD changing state. - */ -int debounced_hpd; - -static void ps185_hdmi_hpd_deferred(void) -{ - const int new_hpd = gpio_get_level(GPIO_PS185_EC_DP_HPD); - - /* HPD status not changed, probably a glitch, just return. */ - if (debounced_hpd == new_hpd) - return; - - debounced_hpd = new_hpd; - - gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !debounced_hpd); - CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); -} -DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); - -#define PS185_HPD_DEBOUCE 250 - -static void hdmi_hpd_interrupt(enum gpio_signal signal) -{ - hook_call_deferred(&ps185_hdmi_hpd_deferred_data, PS185_HPD_DEBOUCE); -} - -/* HDMI/TYPE-C function shared subboard interrupt */ -static void x_ec_interrupt(enum gpio_signal signal) -{ - int sub = board_get_sub_board(); - - if (sub == SUB_BOARD_TYPEC) - /* C1: PPC interrupt */ - syv682x_interrupt(1); - else if (sub == SUB_BOARD_HDMI) - hdmi_hpd_interrupt(signal); - else - CPRINTS("Undetected subboard interrupt."); -} - int ppc_get_alert_status(int port) { if (port == 0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - if (port == 1 && board_get_sub_board() == SUB_BOARD_TYPEC) - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + return gpio_get_level(GPIO_USB_C0_FAULT_ODL) == 0; + if (port == 1) + return gpio_get_level(GPIO_USB_C1_FAULT_ODL) == 0; return 0; } -/* SD Card */ -int board_regulator_get_info(uint32_t index, char *name, - uint16_t *num_voltages, uint16_t *voltages_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_info(id, name, num_voltages, - voltages_mv); -} - -int board_regulator_enable(uint32_t index, uint8_t enable) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_enable(id, enable); -} -int board_regulator_is_enabled(uint32_t index, uint8_t *enabled) +/* Lid */ +#ifndef TEST_BUILD +/* This callback disables keyboard when convertibles are fully open */ +void lid_angle_peripheral_enable(int enable) { - enum mt6360_regulator_id id = index; + int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON); - return mt6360_regulator_is_enabled(id, enabled); -} - -int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, - uint32_t max_mv) -{ - enum mt6360_regulator_id id = index; - - return mt6360_regulator_set_voltage(id, min_mv, max_mv); + if (enable) { + keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE); + } else { + /* + * Ensure that the chipset is off before disabling the keyboard. + * When the chipset is on, the EC keeps the keyboard enabled and + * the AP decides whether to ignore input devices or not. + */ + if (!chipset_in_s0) + keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE); + } } +#endif -int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv) +/* Called on AP S5 -> S3 transition */ +static void board_chipset_startup(void) { - enum mt6360_regulator_id id = index; - - return mt6360_regulator_get_voltage(id, voltage_mv); + gpio_set_level(GPIO_EN_USB_C1_MUX_PWR, 1); } +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); -static void baseboard_init(void) +/* Called on AP S3 -> S5 transition */ +static void board_chipset_shutdown(void) { - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + gpio_set_level(GPIO_EN_USB_C1_MUX_PWR, 0); } -DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1); +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); diff --git a/baseboard/goroh/baseboard.h b/baseboard/goroh/baseboard.h index 55fa0ffab7..e4d854537b 100644 --- a/baseboard/goroh/baseboard.h +++ b/baseboard/goroh/baseboard.h @@ -22,39 +22,37 @@ * allow the second reset to be treated as a power-on. */ #define CONFIG_BOARD_RESET_AFTER_POWER_ON -#define CONFIG_CHIPSET_MT8192 +#define CONFIG_CHIPSET_FALCONLITE #define CONFIG_EXTPOWER_GPIO #define CONFIG_HIBERNATE_WAKE_PINS_DYNAMIC +/* EC defines */ +#define CONFIG_CBI_EEPROM + /* Chipset */ #define CONFIG_CMD_AP_RESET_LOG -#define CONFIG_CMD_POWERINDEBUG +#define CONFIG_HOSTCMD_AP_RESET #define CONFIG_HOST_COMMAND_STATUS #define CONFIG_LOW_POWER_IDLE #define CONFIG_LOW_POWER_S0 #define CONFIG_POWER_BUTTON #define CONFIG_POWER_COMMON +#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE #define CONFIG_PWM #define CONFIG_VBOOT_HASH #define CONFIG_VOLUME_BUTTONS #define CONFIG_WP_ACTIVE_HIGH /* Battery */ +#define CONFIG_BATTERY_CRITICAL_SHUTDOWN_CUT_OFF #define CONFIG_BATTERY_CUT_OFF #define CONFIG_BATTERY_FUEL_GAUGE #define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_ODL #define CONFIG_BATTERY_SMART -/* BC12 */ -#define CONFIG_BC12_DETECT_MT6360 -#define CONFIG_BC12_DETECT_PI3USB9201 -#undef CONFIG_BC12_SINGLE_DRIVER -#define CONFIG_USB_CHARGER - /* Charger */ #define ADC_AMON_BMON ADC_CHARGER_AMON_R /* ADC name remap */ #define ADC_PSYS ADC_CHARGER_PMON /* ADC name remap */ -#define ADC_VBUS ADC_VBUS_C0 /* ADC name remap */ #define CONFIG_CHARGE_MANAGER #define CONFIG_CHARGER #define CONFIG_CHARGE_RAMP_HW @@ -64,29 +62,30 @@ #define CONFIG_CHARGER_MAINTAIN_VBAT #define CONFIG_CHARGER_OTG #define CONFIG_CHARGER_PSYS -#define CONFIG_CHARGER_PSYS_READ #define CONFIG_CHARGER_SENSE_RESISTOR 10 /* BOARD_RS2 */ #define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* BOARD_RS1 */ -#define CONFIG_CMD_CHARGER_ADC_AMON_BMON /* Keyboard */ #define CONFIG_CMD_KEYBOARD #define CONFIG_KEYBOARD_COL2_INVERTED #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_USE_GPIO +#define CONFIG_KEYBOARD_BACKLIGHT +#define CONFIG_PWM_KBLIGHT +#define GPIO_EN_KEYBOARD_BACKLIGHT GPIO_EN_PPVAR_KB_BL_X /* I2C */ #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER #define CONFIG_I2C_PASSTHRU_RESTRICTED #define CONFIG_I2C_VIRTUAL_BATTERY +#define I2C_ADDR_EEPROM_FLAGS 0x50 +#define I2C_PORT_EEPROM IT83XX_I2C_CH_A #define I2C_PORT_CHARGER IT83XX_I2C_CH_A #define I2C_PORT_BATTERY IT83XX_I2C_CH_A #define I2C_PORT_ACCEL IT83XX_I2C_CH_B -#define I2C_PORT_PPC0 IT83XX_I2C_CH_C -#define I2C_PORT_PPC1 IT83XX_I2C_CH_E -#define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C -#define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E +#define I2C_PORT_USB_C0 IT83XX_I2C_CH_C +#define I2C_PORT_USB_C1 IT83XX_I2C_CH_E #define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY #define CONFIG_SMBUS_PEC @@ -102,14 +101,12 @@ #define CONFIG_USBC_PPC_DEDICATED_INT #define CONFIG_USBC_PPC_POLARITY #define CONFIG_USBC_PPC_SYV682C -#define CONFIG_USBC_PPC_SYV682X_SMART_DISCHARGE #define CONFIG_USBC_PPC_VCONN #define CONFIG_USBC_SS_MUX #define CONFIG_USBC_VCONN #define CONFIG_USBC_VCONN_SWAP #define CONFIG_USB_DRP_ACC_TRYSRC -#define CONFIG_USB_MUX_IT5205 /* C0 */ -#define CONFIG_USB_MUX_PS8743 /* C1 */ +#define CONFIG_USBC_RETIMER_PS8818 /* C1 */ #define CONFIG_USB_PD_ALT_MODE #define CONFIG_USB_PD_ALT_MODE_DFP #define CONFIG_USB_PD_DECODE_SOP @@ -123,13 +120,13 @@ #define CONFIG_USB_PD_LOGGING #define CONFIG_USB_PD_PORT_MAX_COUNT 2 #define CONFIG_USB_PD_REV30 +#define CONFIG_USB_PD_VBUS_MEASURE_CHARGER #define CONFIG_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_TCPM_ITE_ON_CHIP #define CONFIG_USB_PD_TCPM_TCPCI #define CONFIG_USB_PD_TCPMV2 #define CONFIG_USB_PD_TRY_SRC #define CONFIG_USB_PD_VBUS_DETECT_PPC -#define CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT #define CONFIG_USB_PID 0x5566 /* TODO: update PID */ #define CONFIG_USB_POWER_DELIVERY @@ -158,6 +155,10 @@ #define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) #define CONFIG_ACCEL_INTERRUPTS #endif +#define CONFIG_LID_SWITCH + +/* Fan */ +#define CONFIG_FANS 1 /* SPI / Host Command */ #define CONFIG_SPI @@ -168,9 +169,6 @@ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_USE_GPIO -/* Voltage regulator control */ -#define CONFIG_HOSTCMD_REGULATOR - /* Define the host events which are allowed to wakeup AP in S3. */ #define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \ @@ -180,25 +178,15 @@ EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) /* GPIO name remapping */ -#define GPIO_EN_HDMI_PWR GPIO_EC_X_GPIO1 -#define GPIO_USB_C1_FRS_EN GPIO_EC_X_GPIO1 -#define GPIO_USB_C1_PPC_INT_ODL GPIO_X_EC_GPIO2 -#define GPIO_PS185_EC_DP_HPD GPIO_X_EC_GPIO2 -#define GPIO_USB_C1_DP_IN_HPD GPIO_EC_X_GPIO3 -#define GPIO_PS185_PWRDN_ODL GPIO_EC_X_GPIO3 +#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL +#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL +#define GPIO_AC_PRESENT GPIO_ACOK_OD #ifndef __ASSEMBLER__ #include "gpio_signal.h" #include "registers.h" -#include "power/mt8192.h" - -enum board_sub_board { - SUB_BOARD_NONE = -1, - SUB_BOARD_TYPEC, - SUB_BOARD_HDMI, - SUB_BOARD_COUNT, -}; +#include "power/falconlite.h" int board_get_version(void); void board_reset_pd_mcu(void); diff --git a/baseboard/goroh/baseboard_usbc_config.h b/baseboard/goroh/baseboard_usbc_config.h new file mode 100644 index 0000000000..b5e76644ee --- /dev/null +++ b/baseboard/goroh/baseboard_usbc_config.h @@ -0,0 +1,15 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* goroh family-specific USB-C configuration */ + +#ifndef __CROS_EC_BASEBOARD_USBC_CONFIG_H +#define __CROS_EC_BASEBOARD_USBC_CONFIG_H + +#include "gpio_signal.h" + +/* Common definition for the USB PD interrupt handlers. */ +void ppc_interrupt(enum gpio_signal signal); +#endif /* __CROS_EC_BASEBOARD_USBC_CONFIG_H */ diff --git a/baseboard/goroh/board_id.c b/baseboard/goroh/board_id.c index a8bee6d412..e90da11f57 100644 --- a/baseboard/goroh/board_id.c +++ b/baseboard/goroh/board_id.c @@ -91,7 +91,7 @@ static int version = -1; /* b/163963220: Cache ADC value before board_hibernate_late() reads it */ static void board_version_init(void) { - version = adc_value_to_numeric_id(ADC_BOARD_ID_0); + version = adc_value_to_numeric_id(ADC_BOARD_ID); if (version < 0) { ccprints("WARN:BOARD_ID_0"); ccprints("Assuming board id = 0"); diff --git a/baseboard/goroh/build.mk b/baseboard/goroh/build.mk index 58e9934bc0..4488c4b395 100644 --- a/baseboard/goroh/build.mk +++ b/baseboard/goroh/build.mk @@ -6,5 +6,7 @@ # Baseboard specific files build # -baseboard-y=baseboard.o board_id.o +baseboard-y+=baseboard.o +baseboard-y+=board_id.o +baseboard-y+=usbc_config.o baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/baseboard/goroh/usb_pd_policy.c b/baseboard/goroh/usb_pd_policy.c index 72213d311c..b5456c6af0 100644 --- a/baseboard/goroh/usb_pd_policy.c +++ b/baseboard/goroh/usb_pd_policy.c @@ -17,137 +17,22 @@ #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -int svdm_get_hpd_gpio(int port) -{ - /* HPD is low active, inverse the result */ - return !gpio_get_level(GPIO_EC_DPBRDG_HPD_ODL); -} - void svdm_set_hpd_gpio(int port, int en) { - /* - * HPD is low active, inverse the en - * TODO: C0&C1 shares the same HPD, implement FCFS policy. - */ - gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !en); -} - -/** - * Is the port fine to be muxed its DisplayPort lines? - * - * Only one port can be muxed to DisplayPort at a time. - * - * @param port Port number of TCPC. - * @return 1 is fine; 0 is bad as other port is already muxed; - */ -static int is_dp_muxable(int port) -{ - int i; - - for (i = 0; i < board_get_usb_pd_port_count(); i++) { - if (i != port) { - if (usb_mux_get(i) & USB_PD_MUX_DP_ENABLED) - return 0; - } + if (port == 0) { + gpio_set_level(GPIO_USB_C0_HPD_3V3, en); + } else if (port == 1) { + gpio_set_level(GPIO_USB_C1_HPD_3V3, en); + gpio_set_level(GPIO_USB_C1_HPD_IN, en); } - - return 1; } -__override int svdm_dp_attention(int port, uint32_t *payload) -{ - int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); - int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - int cur_lvl = svdm_get_hpd_gpio(port); -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - mux_state_t mux_state; - - dp_status[port] = payload[1]; - - if (!is_dp_muxable(port)) { - /* TODO(waihong): Info user? */ - CPRINTS("p%d: The other port is already muxed.", port); - return 0; /* nak */ - } - - if (lvl) - gpio_set_level_verbose(CC_USBPD, GPIO_DP_AUX_PATH_SEL, port); - - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && - (irq || lvl)) - /* - * Wake up the AP. IRQ or level high indicates a DP sink is now - * present. - */ - if (IS_ENABLED(CONFIG_MKBP_EVENT)) - pd_notify_dp_alt_mode_entry(port); - - /* Its initial DP status message prior to config */ - if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { - if (lvl) - dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; - return 1; - } - -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - if (irq && !lvl) { - /* - * IRQ can only be generated when the level is high, because - * the IRQ is signaled by a short low pulse from the high level. - */ - CPRINTF("ERR:HPD:IRQ&LOW\n"); - return 0; /* nak */ - } - - if (irq && cur_lvl) { - uint64_t now = get_time().val; - /* wait for the minimum spacing between IRQ_HPD if needed */ - if (now < svdm_hpd_deadline[port]) - usleep(svdm_hpd_deadline[port] - now); - - /* generate IRQ_HPD pulse */ - svdm_set_hpd_gpio(port, 0); - /* - * b/171172053#comment14: since the HPD_DSTREAM_DEBOUNCE_IRQ is - * very short (500us), we can use udelay instead of usleep for - * more stable pulse period. - */ - udelay(HPD_DSTREAM_DEBOUNCE_IRQ); - svdm_set_hpd_gpio(port, 1); - } else { - svdm_set_hpd_gpio(port, lvl); - } - - /* set the minimum time delay (2ms) for the next HPD IRQ */ - svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - - mux_state = (lvl ? USB_PD_MUX_HPD_LVL : USB_PD_MUX_HPD_LVL_DEASSERTED) | - (irq ? USB_PD_MUX_HPD_IRQ : USB_PD_MUX_HPD_IRQ_DEASSERTED); - usb_mux_hpd_update(port, mux_state); - -#ifdef USB_PD_PORT_TCPC_MST - if (port == USB_PD_PORT_TCPC_MST) - baseboard_mst_enable_control(port, lvl); -#endif - - /* ack */ - return 1; -} - -__override void svdm_exit_dp_mode(int port) +int svdm_get_hpd_gpio(int port) { -#ifdef CONFIG_USB_PD_DP_HPD_GPIO - svdm_set_hpd_gpio(port, 0); -#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ - usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); - -#ifdef USB_PD_PORT_TCPC_MST - if (port == USB_PD_PORT_TCPC_MST) - baseboard_mst_enable_control(port, 0); -#endif + if (port == 0) + return gpio_get_level(GPIO_USB_C0_HPD_3V3); + else + return gpio_get_level(GPIO_USB_C1_HPD_3V3); } int pd_snk_is_vbus_provided(int port) diff --git a/baseboard/goroh/usbc_config.c b/baseboard/goroh/usbc_config.c new file mode 100644 index 0000000000..5a49d2ee2d --- /dev/null +++ b/baseboard/goroh/usbc_config.c @@ -0,0 +1,154 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Goroh family-specific USB-C configuration */ +#include <stdint.h> +#include <stdbool.h> + +#include "common.h" +#include "compile_time_macros.h" +#include "config.h" +#include "console.h" +#include "hooks.h" +#include "driver/tcpm/it8xxx2_pd_public.h" +#include "driver/ppc/syv682x_public.h" +#include "driver/retimer/ps8818.h" +#include "driver/tcpm/tcpci.h" +#include "usb_pd.h" +#include "usbc_ppc.h" +#include "gpio.h" +#include "gpio_signal.h" + +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) + +#ifdef CONFIG_BRINGUP +#define GPIO_SET_LEVEL(pin, lvl) gpio_set_level_verbose(CC_USBPD, pin, lvl) +#else +#define GPIO_SET_LEVEL(pin, lvl) gpio_set_level(pin, lvl) +#endif + +/* PPC */ +struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + }, + { + .i2c_port = I2C_PORT_USB_C1, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + }, +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* USB Mux */ +static int goroh_usb_c0_init_mux(const struct usb_mux *me) +{ + return virtual_usb_mux_driver.init(me); +} + +static int goroh_usb_c0_set_mux(const struct usb_mux *me, mux_state_t mux_state, + bool *ack_required) +{ + /* + * b/188376636: Inverse C0 polarity. + * Goroh rev0 CC1/CC2 SBU1/SBU2 are reversed. + * We report inversed polarity to the SoC and SoC we reverse the SBU + * accordingly. + */ + mux_state = mux_state ^ USB_PD_MUX_POLARITY_INVERTED; + + return virtual_usb_mux_driver.set(me, mux_state, ack_required); + +} + +static int goroh_usb_c0_get_mux(const struct usb_mux *me, + mux_state_t *mux_state) +{ + return virtual_usb_mux_driver.get(me, mux_state); +} + +static struct usb_mux_driver goroh_usb_c0_mux_driver = { + .init = goroh_usb_c0_init_mux, + .set = goroh_usb_c0_set_mux, + .get = goroh_usb_c0_get_mux, +}; + +static const struct usb_mux goroh_usb_c1_ps8818_retimer = { + .usb_port = USBC_PORT_C1, + .i2c_port = I2C_PORT_USB_C1, + .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, + .driver = &ps8818_usb_retimer_driver, + .next_mux = NULL, +}; + +const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { + [USBC_PORT_C0] = { + .usb_port = USBC_PORT_C0, + .driver = &goroh_usb_c0_mux_driver, + .hpd_update = &virtual_hpd_update, + }, + [USBC_PORT_C1] = { + .usb_port = USBC_PORT_C1, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + .next_mux = &goroh_usb_c1_ps8818_retimer, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); + +/* TCPC */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it8xxx2_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it8xxx2_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, +}; + +void ppc_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_USB_C0_FAULT_ODL) + /* C0: PPC interrupt */ + syv682x_interrupt(0); + else + /* C1: PPC interrupt */ + syv682x_interrupt(1); +} + + +static void board_tcpc_init(void) +{ + gpio_enable_interrupt(GPIO_USB_C0_FAULT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_FAULT_ODL); +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); + +void board_reset_pd_mcu(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ + return 0; +} diff --git a/baseboard/grunt/baseboard.h b/baseboard/grunt/baseboard.h index c97ece285f..5a79c48c63 100644 --- a/baseboard/grunt/baseboard.h +++ b/baseboard/grunt/baseboard.h @@ -36,7 +36,7 @@ #define CONFIG_BACKLIGHT_LID_ACTIVE_LOW #define CONFIG_CMD_AP_RESET_LOG #define CONFIG_HIBERNATE_PSL -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_HOSTCMD_SKUID #define CONFIG_I2C #define CONFIG_I2C_BUS_MAY_BE_UNPOWERED diff --git a/baseboard/guybrush/base_gpio.inc b/baseboard/guybrush/base_gpio.inc index 259ccd9286..e60b71e543 100644 --- a/baseboard/guybrush/base_gpio.inc +++ b/baseboard/guybrush/base_gpio.inc @@ -21,8 +21,8 @@ GPIO_INT(PG_PWR_S5, PIN(C, 0), GPIO_INT_BOTH, baseboard_en_pwr_s0) /* S5 Powe GPIO_INT(PG_PCORE_S0_R_OD, PIN(B, 6), GPIO_INT_BOTH, power_signal_interrupt) /* S0 Power OK */ GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* AC Power Present */ GPIO_INT(EC_PCORE_INT_ODL, PIN(F, 0), GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) /* Power Core Interrupt */ -GPIO_INT(PG_GROUPC_S0_OD, PIN(A, 3), GPIO_INT_BOTH, baseboard_en_pwr_pcore_s0) /* Power Group C S0 */ -GPIO_INT(PG_LPDDR4X_S3_OD, PIN(9, 5), GPIO_INT_BOTH, baseboard_en_pwr_pcore_s0) /* Power Group LPDDR4 S3 */ +GPIO_INT(PG_GROUPC_S0_OD, PIN(A, 3), GPIO_INT_BOTH, baseboard_en_pwr_pcore_signal) /* Power Group C S0 */ +GPIO_INT(PG_LPDDR4X_S3_OD, PIN(9, 5), GPIO_INT_BOTH, baseboard_en_pwr_pcore_signal) /* Power Group LPDDR4 S3 */ GPIO(EN_PWR_S5, PIN(B, 7), GPIO_OUT_LOW) /* Enable S5 Power */ GPIO(EN_PWR_S0_R, PIN(F, 1), GPIO_OUT_LOW) GPIO(EN_PWR_PCORE_S0_R, PIN(E, 1), GPIO_OUT_LOW) diff --git a/baseboard/guybrush/baseboard.c b/baseboard/guybrush/baseboard.c index 344ea459de..26f212e986 100644 --- a/baseboard/guybrush/baseboard.c +++ b/baseboard/guybrush/baseboard.c @@ -43,6 +43,8 @@ #define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) #define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTSCHIP(format, args...) cprints(CC_CHIPSET, format ## args) + static void reset_nct38xx_port(int port); /* Wake Sources */ @@ -431,7 +433,7 @@ int board_set_active_charge_port(int port) int is_valid_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); int i; - int cur_port = charge_manager_get_active_charge_port(); + int rv; if (port == CHARGE_PORT_NONE) { CPRINTSUSB("Disabling all charger ports"); @@ -444,7 +446,7 @@ int board_set_active_charge_port(int port) */ if (nct38xx_get_boot_type(i) == NCT38XX_BOOT_DEAD_BATTERY) { - reset_nct38xx_port(cur_port); + reset_nct38xx_port(i); pd_set_error_recovery(i); } @@ -461,36 +463,56 @@ int board_set_active_charge_port(int port) return EC_ERROR_INVAL; } - - /* Check if the port is sourcing VBUS. */ - if (tcpm_get_src_ctrl(port)) { - CPRINTSUSB("Skip enable C%d", port); - return EC_ERROR_INVAL; - } - /* - * Disallow changing ports if we booted in dead battery mode and don't - * have sufficient power to withstand Vbus loss. The NCT3807 may - * continue to keep EN_SNK low on the original port and allow a - * dangerous level of voltage to pass through to the initial charge - * port (see b/183660105) + * Check if we can reset any ports in dead battery mode * - * If we do have sufficient power, then reset the dead battery port and - * set up Type-C error recovery on its connection. + * The NCT3807 may continue to keep EN_SNK low on the dead battery port + * and allow a dangerous level of voltage to pass through to the initial + * charge port (see b/183660105). We must reset the ports if we have + * sufficient battery to do so, which will bring EN_SNK back under + * normal control. */ - if (cur_port != CHARGE_PORT_NONE && - port != cur_port && - nct38xx_get_boot_type(cur_port) == + rv = EC_SUCCESS; + for (i = 0; i < board_get_usb_pd_port_count(); i++) { + if (nct38xx_get_boot_type(i) == NCT38XX_BOOT_DEAD_BATTERY) { + CPRINTSUSB("Found dead battery on %d", i); + /* + * If we have battery, get this port reset ASAP. + * This means temporarily rejecting charge manager + * sets to it. + */ + if (pd_is_battery_capable()) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + + if (port == i) + rv = EC_ERROR_INVAL; + } else if (port != i) { + /* + * If other port is selected and in dead battery + * mode, reset this port. Otherwise, reject + * change because we'll brown out. + */ + if (nct38xx_get_boot_type(port) == NCT38XX_BOOT_DEAD_BATTERY) { - if (pd_is_battery_capable()) { - reset_nct38xx_port(cur_port); - pd_set_error_recovery(cur_port); - } else { - CPRINTSUSB("Battery too low for charge port change"); - return EC_ERROR_INVAL; + reset_nct38xx_port(i); + pd_set_error_recovery(i); + } else { + rv = EC_ERROR_INVAL; + } + } } } + if (rv != EC_SUCCESS) + return rv; + + /* Check if the port is sourcing VBUS. */ + if (tcpm_get_src_ctrl(port)) { + CPRINTSUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + CPRINTSUSB("New charge port: C%d", port); /* @@ -872,14 +894,32 @@ void board_overcurrent_event(int port, int is_overcurrented) } } -void baseboard_en_pwr_pcore_s0(enum gpio_signal signal) +static void baseboard_set_en_pwr_pcore(void) { - - /* EC must AND signals PG_LPDDR4X_S3_OD and PG_GROUPC_S0_OD */ + /* + * EC must AND signals PG_LPDDR4X_S3_OD, PG_GROUPC_S0_OD, and + * EN_PWR_S0_R. + */ gpio_set_level(GPIO_EN_PWR_PCORE_S0_R, gpio_get_level(GPIO_PG_LPDDR4X_S3_OD) && - gpio_get_level(GPIO_PG_GROUPC_S0_OD)); + gpio_get_level(GPIO_PG_GROUPC_S0_OD) && + gpio_get_level(GPIO_EN_PWR_S0_R)); +} + +void baseboard_en_pwr_pcore_signal(enum gpio_signal signal) +{ + baseboard_set_en_pwr_pcore(); +} + +static void baseboard_check_groupc_low(void) +{ + /* Warn if we see unexpected sequencing here */ + if (!gpio_get_level(GPIO_EN_PWR_S0_R) && + gpio_get_level(GPIO_PG_GROUPC_S0_OD)) + CPRINTSCHIP("WARN: PG_GROUPC_S0_OD high while EN_PWR_S0_R low"); + } +DECLARE_DEFERRED(baseboard_check_groupc_low); void baseboard_en_pwr_s0(enum gpio_signal signal) { @@ -889,6 +929,17 @@ void baseboard_en_pwr_s0(enum gpio_signal signal) gpio_get_level(GPIO_SLP_S3_L) && gpio_get_level(GPIO_PG_PWR_S5)); + /* + * If we set EN_PWR_S0_R low, then check PG_GROUPC_S0_OD went low as + * well some reasonable time later + */ + if (!gpio_get_level(GPIO_EN_PWR_S0_R)) + hook_call_deferred(&baseboard_check_groupc_low_data, + 100 * MSEC); + + /* Change EN_PWR_PCORE_S0_R if needed */ + baseboard_set_en_pwr_pcore(); + /* Now chain off to the normal power signal interrupt handler. */ power_signal_interrupt(signal); } diff --git a/baseboard/guybrush/baseboard.h b/baseboard/guybrush/baseboard.h index 41ef9d6e94..9f010c2bf3 100644 --- a/baseboard/guybrush/baseboard.h +++ b/baseboard/guybrush/baseboard.h @@ -80,7 +80,6 @@ #define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B #define CONFIG_THROTTLE_AP #define CONFIG_TEMP_SENSOR_SB_TSI -#define CONFIG_TEMP_SENSOR_TMP112 #define CONFIG_THERMISTOR #define CONFIG_CPU_PROCHOT_ACTIVE_LOW #define GPIO_CPU_PROCHOT GPIO_PROCHOT_ODL @@ -92,7 +91,7 @@ /* Host communication */ #define CONFIG_CMD_CHARGEN -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_MKBP_EVENT #define CONFIG_MKBP_USE_GPIO_AND_HOST_EVENT #define GPIO_EC_INT_L GPIO_EC_SOC_INT_L @@ -178,7 +177,6 @@ #define CONFIG_USB_PD_TCPMV2 #define CONFIG_USB_PD_DECODE_SOP #define CONFIG_USB_DRP_ACC_TRYSRC -/* TODO: Enable TCPMv2 Fast Role Swap (FRS) */ #define CONFIG_HOSTCMD_PD_CONTROL #define CONFIG_CMD_TCPC_DUMP #define CONFIG_USB_CHARGER @@ -223,12 +221,6 @@ #define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ #define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_CURRENT_MA 5000 -#define PD_MAX_VOLTAGE_MV 20000 -/* Max Power = 100 W */ -#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000) - /* USB-A config */ #define USB_PORT_COUNT USBA_PORT_COUNT #define CONFIG_USB_PORT_POWER_SMART @@ -239,8 +231,8 @@ #define GPIO_USB1_ILIM_SEL IOEX_USB_A0_LIMIT_SDP #define GPIO_USB2_ILIM_SEL IOEX_USB_A1_LIMIT_SDP_DB -/* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ -#define GUYBRUSH_AC_PROCHOT_CURRENT_MA 3328 +/* Round up 5000 max current to multiple of 128mA for ISL9241 AC prochot. */ +#define GUYBRUSH_AC_PROCHOT_CURRENT_MA 5120 /* * USB ID - This is allocated specifically for Guybrush @@ -357,7 +349,7 @@ void bc12_interrupt(enum gpio_signal signal); void ppc_interrupt(enum gpio_signal signal); void sbu_fault_interrupt(enum ioex_signal signal); -void baseboard_en_pwr_pcore_s0(enum gpio_signal signal); +void baseboard_en_pwr_pcore_signal(enum gpio_signal signal); void baseboard_en_pwr_s0(enum gpio_signal signal); int board_get_soc_temp_k(int idx, int *temp_k); diff --git a/baseboard/hatch/baseboard.h b/baseboard/hatch/baseboard.h index bf9140b33f..dc39fcf8ac 100644 --- a/baseboard/hatch/baseboard.h +++ b/baseboard/hatch/baseboard.h @@ -100,8 +100,8 @@ #undef CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON #define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1 #define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 /* * Don't allow the system to boot to S0 when the battery is low and unable to * communicate on locked systems (which haven't PD negotiated) diff --git a/baseboard/herobrine/baseboard.h b/baseboard/herobrine/baseboard.h index 108f7f8cf5..ae5b2a3d33 100644 --- a/baseboard/herobrine/baseboard.h +++ b/baseboard/herobrine/baseboard.h @@ -42,7 +42,7 @@ #undef CONFIG_PECI -#define CONFIG_HOSTCMD_SHI +#define CONFIG_HOST_INTERFACE_SHI #define CONFIG_HOST_COMMAND_STATUS #define CONFIG_HOSTCMD_SECTION_SORTED #define CONFIG_KEYBOARD_COL2_INVERTED diff --git a/baseboard/honeybuns/usb_pd_policy.c b/baseboard/honeybuns/usb_pd_policy.c index ef2350a03d..faaef9083f 100644 --- a/baseboard/honeybuns/usb_pd_policy.c +++ b/baseboard/honeybuns/usb_pd_policy.c @@ -369,20 +369,16 @@ static void usb_tc_connect(void) { int port = TASK_ID_TO_PD_PORT(task_get_current()); + /* Clear data role swap attempt counter at each usbc attach */ + pd_dr_swap_attempt_count[port] = 0; + /* * The EC needs to indicate to the USB hub when the host port is * attached so that the USB-EP can be properly enumerated. GPIO_BPWR_DET * is used for this purpose. */ - if (port == USB_PD_PORT_HOST) { + if (port == USB_PD_PORT_HOST) gpio_set_level(GPIO_BPWR_DET, 1); -#ifdef GPIO_UFP_PLUG_DET - gpio_set_level(GPIO_UFP_PLUG_DET, 0); -#endif - } - - /* Clear data role swap attempt counter at each usbc attach */ - pd_dr_swap_attempt_count[port] = 0; } DECLARE_HOOK(HOOK_USB_PD_CONNECT, usb_tc_connect, HOOK_PRIO_DEFAULT); @@ -391,12 +387,8 @@ static void usb_tc_disconnect(void) int port = TASK_ID_TO_PD_PORT(task_get_current()); /* Only the host port disconnect is relevant */ - if (port == USB_PD_PORT_HOST) { + if (port == USB_PD_PORT_HOST) gpio_set_level(GPIO_BPWR_DET, 0); -#ifdef GPIO_UFP_PLUG_DET - gpio_set_level(GPIO_UFP_PLUG_DET, 1); -#endif - } } DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, usb_tc_disconnect, HOOK_PRIO_DEFAULT); diff --git a/baseboard/intelrvp/adlrvp.c b/baseboard/intelrvp/adlrvp.c index 78f4b3613a..8ec1b820b2 100644 --- a/baseboard/intelrvp/adlrvp.c +++ b/baseboard/intelrvp/adlrvp.c @@ -6,6 +6,7 @@ /* Intel ADLRVP board-specific common configuration */ #include "charger.h" +#include "bq25710.h" #include "common.h" #include "driver/retimer/bb_retimer_public.h" #include "hooks.h" @@ -16,6 +17,7 @@ #include "sn5s330.h" #include "system.h" #include "task.h" +#include "tusb1064.h" #include "usb_mux.h" #include "usbc_ppc.h" #include "util.h" @@ -235,7 +237,7 @@ struct ioexpander_config_t ioex_config[] = { BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); /* Charger Chips */ -const struct charger_config_t chg_chips[] = { +struct charger_config_t chg_chips[] = { { .i2c_port = I2C_PORT_CHARGER, .i2c_addr_flags = ISL9241_ADDR_FLAGS, @@ -312,8 +314,6 @@ static void board_connect_c0_sbu_deferred(void) } } DECLARE_DEFERRED(board_connect_c0_sbu_deferred); -/* Make sure SBU are routed to CCD or AUX based on CCD status at init */ -DECLARE_HOOK(HOOK_INIT, board_connect_c0_sbu_deferred, HOOK_PRIO_INIT_I2C + 2); void board_connect_c0_sbu(enum gpio_signal s) { @@ -326,15 +326,37 @@ static void enable_h1_irq(void) } DECLARE_HOOK(HOOK_INIT, enable_h1_irq, HOOK_PRIO_LAST); +static void configure_charger(void) +{ + switch (ADL_RVP_BOARD_ID(board_get_version())) { + case ADLN_LP5_ERB_SKU_BOARD_ID: + case ADLN_LP5_RVP_SKU_BOARD_ID: + /* charger chip BQ25720 support */ + chg_chips[0].i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS; + chg_chips[0].drv = &bq25710_drv; + break; + + /* Add additional board SKUs */ + default: + break; + } +} + static void configure_retimer_usbmux(void) { switch (ADL_RVP_BOARD_ID(board_get_version())) { case ADLN_LP5_ERB_SKU_BOARD_ID: case ADLN_LP5_RVP_SKU_BOARD_ID: - /* No retimer on Port0 & Port1 */ - usb_muxes[TYPE_C_PORT_0].driver = NULL; + /* enable TUSB1044RNQR redriver on Port0 */ + usb_muxes[TYPE_C_PORT_0].i2c_addr_flags = + TUSB1064_I2C_ADDR14_FLAGS; + usb_muxes[TYPE_C_PORT_0].driver = + &tusb1064_usb_mux_driver; + usb_muxes[TYPE_C_PORT_0].hpd_update = tusb1044_hpd_update; + #if defined(HAS_TASK_PD_C1) usb_muxes[TYPE_C_PORT_1].driver = NULL; + usb_muxes[TYPE_C_PORT_1].hpd_update = NULL; #endif break; @@ -365,7 +387,6 @@ static void configure_retimer_usbmux(void) break; } } -DECLARE_HOOK(HOOK_INIT, configure_retimer_usbmux, HOOK_PRIO_INIT_I2C + 1); /******************************************************************************/ /* PWROK signal configuration */ @@ -448,3 +469,18 @@ __override bool board_is_tbt_usb4_port(int port) return tbt_usb4; } + +__override void board_pre_task_i2c_peripheral_init(void) +{ + /* Initialized IOEX-0 to access IOEX-GPIOs needed pre-task */ + ioex_init(IOEX_C0_PCA9675); + + /* Make sure SBU are routed to CCD or AUX based on CCD status at init */ + board_connect_c0_sbu_deferred(); + + /* Reconfigure board specific charger drivers */ + configure_charger(); + + /* Configure board specific retimer & mux */ + configure_retimer_usbmux(); +} diff --git a/baseboard/intelrvp/adlrvp.h b/baseboard/intelrvp/adlrvp.h index 31bfc5aded..4edc9a9da3 100644 --- a/baseboard/intelrvp/adlrvp.h +++ b/baseboard/intelrvp/adlrvp.h @@ -41,6 +41,7 @@ #define CONFIG_USB_PD_PORT_MAX_COUNT 1 #endif #define CONFIG_USB_MUX_VIRTUAL +#define CONFIG_USB_MUX_TUSB1044 #define PD_MAX_POWER_MW 100000 #define CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY @@ -117,8 +118,16 @@ #define BOARD_FAN_MIN_RPM 3000 #define BOARD_FAN_MAX_RPM 10000 -/* Charger */ +/* Charger Configs */ +#define CONFIG_CHARGER_RUNTIME_CONFIG +/* Charger chip on ADL-P, ADL-M */ #define CONFIG_CHARGER_ISL9241 +/* Charger chip on ADL-N */ +#define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 /* Port 80 */ #define PORT80_I2C_ADDR MAX695X_I2C_ADDR1_FLAGS @@ -181,6 +190,16 @@ enum battery_type { BATTERY_TYPE_COUNT, }; +/* I2C access in polling mode before task is initialized */ +#define CONFIG_I2C_BITBANG + +enum adlrvp_bitbang_i2c_channel { + I2C_BITBANG_CHAN_BRD_ID, + I2C_BITBANG_CHAN_IOEX_0, + I2C_BITBANG_CHAN_COUNT +}; +#define I2C_BITBANG_PORT_COUNT I2C_BITBANG_CHAN_COUNT + void espi_reset_pin_asserted_interrupt(enum gpio_signal signal); void extpower_interrupt(enum gpio_signal signal); void ppc_interrupt(enum gpio_signal signal); diff --git a/baseboard/intelrvp/baseboard.h b/baseboard/intelrvp/baseboard.h index 853c1e30ff..6c9cef25fb 100644 --- a/baseboard/intelrvp/baseboard.h +++ b/baseboard/intelrvp/baseboard.h @@ -122,7 +122,7 @@ /* SoC / PCH */ #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_MKBP_EVENT diff --git a/baseboard/ite_evb/baseboard.h b/baseboard/ite_evb/baseboard.h index 7fe309491c..23b3f80fba 100644 --- a/baseboard/ite_evb/baseboard.h +++ b/baseboard/ite_evb/baseboard.h @@ -30,7 +30,7 @@ #define CONFIG_SPI_CONTROLLER #define CONFIG_SPI_FLASH_PORT 0 #define CONFIG_UART_HOST -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC /* Optional console commands */ #define CONFIG_CMD_FLASH diff --git a/baseboard/ite_evb/build.mk b/baseboard/ite_evb/build.mk index 77352145ee..507222e6b3 100644 --- a/baseboard/ite_evb/build.mk +++ b/baseboard/ite_evb/build.mk @@ -7,4 +7,4 @@ # baseboard-y=baseboard.o -baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o diff --git a/baseboard/ite_evb/usb_pd_pdo.c b/baseboard/ite_evb/usb_pd_pdo.c new file mode 100644 index 0000000000..24cbc8b996 --- /dev/null +++ b/baseboard/ite_evb/usb_pd_pdo.c @@ -0,0 +1,23 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_UNCONSTRAINED | PDO_FIXED_COMM_CAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4500, 14000, 10000), + PDO_VAR(4500, 14000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/baseboard/ite_evb/usb_pd_pdo.h b/baseboard/ite_evb/usb_pd_pdo.h new file mode 100644 index 0000000000..ce3300cc7d --- /dev/null +++ b/baseboard/ite_evb/usb_pd_pdo.h @@ -0,0 +1,20 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BASEBOARD_ITE_EVB_USB_PD_PDO_H +#define __CROS_EC_BASEBOARD_ITE_EVB_USB_PD_PDO_H + +#include "config.h" +#include "stdint.h" + +/* Threshold voltage of VBUS provided (mV) */ +#define PD_VBUS_PROVIDED_THRESHOLD 3900 + +extern const uint32_t pd_src_pdo[1]; +extern const int pd_src_pdo_cnt; +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BASEBOARD_ITE_EVB_USB_PD_PDO_H */ diff --git a/baseboard/ite_evb/usb_pd_policy.c b/baseboard/ite_evb/usb_pd_policy.c index 59f3da13f5..b5462bd1e2 100644 --- a/baseboard/ite_evb/usb_pd_policy.c +++ b/baseboard/ite_evb/usb_pd_policy.c @@ -18,31 +18,11 @@ #include "timer.h" #include "util.h" #include "usb_mux.h" +#include "usb_pd_pdo.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -/* ---------------- Power Data Objects (PDOs) ----------------- */ -#ifdef CONFIG_USB_PD_CUSTOM_PDO -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_UNCONSTRAINED | PDO_FIXED_COMM_CAP) - -/* Threshold voltage of VBUS provided (mV) */ -#define PD_VBUS_PROVIDED_THRESHOLD 3900 - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4500, 14000, 10000), - PDO_VAR(4500, 14000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); -#endif - int pd_is_max_request_allowed(void) { /* Max voltage request allowed */ diff --git a/baseboard/kalista/baseboard.h b/baseboard/kalista/baseboard.h index 94ced2f989..717d26b313 100644 --- a/baseboard/kalista/baseboard.h +++ b/baseboard/kalista/baseboard.h @@ -63,7 +63,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/baseboard/kalista/build.mk b/baseboard/kalista/build.mk index e64b6a2d71..85270d4bd4 100644 --- a/baseboard/kalista/build.mk +++ b/baseboard/kalista/build.mk @@ -8,4 +8,4 @@ baseboard-y=baseboard.o baseboard-y+=led.o -baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
\ No newline at end of file +baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o
\ No newline at end of file diff --git a/baseboard/kalista/usb_pd_pdo.c b/baseboard/kalista/usb_pd_pdo.c new file mode 100644 index 0000000000..0addbcc51c --- /dev/null +++ b/baseboard/kalista/usb_pd_pdo.c @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | \ + PDO_FIXED_DATA_SWAP | \ + PDO_FIXED_COMM_CAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); diff --git a/baseboard/kalista/usb_pd_pdo.h b/baseboard/kalista/usb_pd_pdo.h new file mode 100644 index 0000000000..1dad035d3d --- /dev/null +++ b/baseboard/kalista/usb_pd_pdo.h @@ -0,0 +1,15 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BASEBOARD_KALISTA_USB_PD_PDO_H +#define __CROS_EC_BASEBOARD_KALISTA_USB_PD_PDO_H + +#include "config.h" +#include "stdint.h" + +extern const uint32_t pd_src_pdo[1]; +extern const int pd_src_pdo_cnt; + +#endif /* __CROS_EC_BASEBOARD_KALISTA_USB_PD_PDO_H */ diff --git a/baseboard/kalista/usb_pd_policy.c b/baseboard/kalista/usb_pd_policy.c index 89af4b50fb..85b26aac76 100644 --- a/baseboard/kalista/usb_pd_policy.c +++ b/baseboard/kalista/usb_pd_policy.c @@ -20,20 +20,12 @@ #include "util.h" #include "usb_mux.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | \ - PDO_FIXED_DATA_SWAP | \ - PDO_FIXED_COMM_CAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - int board_vbus_source_enabled(int port) { if (port != 0) diff --git a/baseboard/kukui/baseboard.h b/baseboard/kukui/baseboard.h index f6a5c764ef..fb6c9a977f 100644 --- a/baseboard/kukui/baseboard.h +++ b/baseboard/kukui/baseboard.h @@ -147,7 +147,7 @@ #define CONFIG_ADC #undef CONFIG_ADC_WATCHDOG #define CONFIG_CHIPSET_MT8183 -#define CONFIG_CMD_ACCELS +#undef CONFIG_CMD_ACCELS #define CONFIG_EMULATED_SYSRQ #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER @@ -288,14 +288,21 @@ #define CONFIG_USB_PD_VBUS_DETECT_TCPC /* Modules we want to exclude */ +#undef CONFIG_CMD_ACCELSPOOF #undef CONFIG_CMD_BATTFAKE #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_FLASH_WP #undef CONFIG_CMD_FLASHINFO +#undef CONFIG_CMD_GETTIME #undef CONFIG_CMD_HASH #undef CONFIG_CMD_MD +#undef CONFIG_CMD_MEM #undef CONFIG_CMD_POWERINDEBUG +#undef CONFIG_CMD_SHMEM +#undef CONFIG_CMD_SYSLOCK #undef CONFIG_CMD_TIMERINFO +#undef CONFIG_CONSOLE_CMDHELP +#undef CONFIG_CONSOLE_HISTORY /* save space at RO image */ #ifdef SECTION_IS_RO @@ -303,7 +310,6 @@ #undef CONFIG_CMD_APTHROTTLE #undef CONFIG_CMD_CHARGE_SUPPLIER_INFO #undef CONFIG_CMD_CRASH -#undef CONFIG_CMD_GETTIME #undef CONFIG_CMD_HCDEBUG #undef CONFIG_CMD_IDLE_STATS #undef CONFIG_CMD_MFALLOW @@ -311,14 +317,11 @@ #undef CONFIG_CMD_PWR_AVG #undef CONFIG_CMD_REGULATOR #undef CONFIG_CMD_RW -#undef CONFIG_CMD_SHMEM #undef CONFIG_CMD_SLEEPMASK #undef CONFIG_CMD_SLEEPMASK_SET -#undef CONFIG_CMD_SYSLOCK #undef CONFIG_CMD_TYPEC #undef CONFIG_HOSTCMD_FLASHPD #undef CONFIG_HOSTCMD_RWHASHPD -#undef CONFIG_CONSOLE_CMDHELP #undef CONFIG_HOSTCMD_GET_UPTIME_INFO #undef CONFIG_CMD_AP_RESET_LOG @@ -333,7 +336,9 @@ #define CONFIG_DEBUG_ASSERT_BRIEF /* Exclude PD state names from RO image to save space */ #undef CONFIG_USB_PD_TCPMV1_DEBUG -#endif +#undef CONFIG_TASK_PROFILING +#endif /* SECTION_IS_RO */ + #elif defined(VARIANT_KUKUI_EC_IT81202) #define CONFIG_IT83XX_HARD_RESET_BY_GPG1 #define CONFIG_IT83XX_VCC_1P8V diff --git a/baseboard/kukui/emmc_ite.c b/baseboard/kukui/emmc_ite.c index 8c3e63064c..b0e1f6b3de 100644 --- a/baseboard/kukui/emmc_ite.c +++ b/baseboard/kukui/emmc_ite.c @@ -101,7 +101,7 @@ static void emmc_send_data_over_spi(uint8_t *tx, int tx_size, int rst_tx) IT83XX_SPI_CPUWTFDB0 = *(uint32_t *)(tx + i); /* * After writing data to TX FIFO is finished, this bit will - * be to indicate the SPI slave controller. + * be to indicate the SPI peripheral controller. */ IT83XX_SPI_TXFCR = IT83XX_SPI_TXFS; /* End CPU access TX FIFO */ diff --git a/baseboard/mtscp-rv32i/baseboard.c b/baseboard/mtscp-rv32i/baseboard.c index a34a08f1fe..ac261c3aa8 100644 --- a/baseboard/mtscp-rv32i/baseboard.c +++ b/baseboard/mtscp-rv32i/baseboard.c @@ -6,6 +6,7 @@ #include "cache.h" #include "csr.h" +#include "hooks.h" #include "registers.h" #define SCP_SRAM_END (CONFIG_IPC_SHARED_OBJ_ADDR & (~(0x400 - 1))) @@ -25,9 +26,33 @@ struct mpu_entry mpu_entries[NR_MPU_ENTRIES] = { {0x70000000, 0x80000000, MPU_ATTR_W | MPU_ATTR_R}, #ifdef CHIP_VARIANT_MT8195 {0x10000000, 0x11400000, MPU_ATTR_C | MPU_ATTR_W | MPU_ATTR_R}, + {CONFIG_PANIC_DRAM_BASE, CONFIG_PANIC_DRAM_BASE + CONFIG_PANIC_DRAM_SIZE, MPU_ATTR_W | MPU_ATTR_R}, #else {0x10000000, 0x11400000, MPU_ATTR_W | MPU_ATTR_R}, #endif }; #include "gpio_list.h" + +#ifdef CONFIG_PANIC_CONSOLE_OUTPUT +static void report_previous_panic(void) +{ + struct panic_data * panic = panic_get_data(); + + if (panic == NULL && SCP_CORE0_MON_PC_LATCH == 0) + return; + + ccprintf("[Previous Panic]\n"); + if (panic) { + panic_data_ccprint(panic); + } else { + ccprintf("No panic data\n"); + } + ccprintf("Latch PC:%x LR:%x SP:%x\n", + SCP_CORE0_MON_PC_LATCH, + SCP_CORE0_MON_LR_LATCH, + SCP_CORE0_MON_SP_LATCH); + +} +DECLARE_HOOK(HOOK_INIT, report_previous_panic, HOOK_PRIO_DEFAULT); +#endif diff --git a/baseboard/mtscp-rv32i/baseboard.h b/baseboard/mtscp-rv32i/baseboard.h index a8f3b522a0..d7694cd1c7 100644 --- a/baseboard/mtscp-rv32i/baseboard.h +++ b/baseboard/mtscp-rv32i/baseboard.h @@ -15,6 +15,10 @@ #define CONFIG_POWER_TRACK_HOST_SLEEP_STATE #define CONFIG_UART_CONSOLE 0 +#ifdef CHIP_VARIANT_MT8195 +#define CONFIG_PANIC_CONSOLE_OUTPUT +#endif + /* IPI configs */ #define CONFIG_IPC_SHARED_OBJ_BUF_SIZE 288 #define CONFIG_IPC_SHARED_OBJ_ADDR \ @@ -51,6 +55,13 @@ #define CONFIG_DRAM_BASE_LOAD 0x50000000 #define CONFIG_DRAM_SIZE 0x01400000 /* 20 MB */ +/* Add some space (0x100) before panic for jump data */ +#define CONFIG_PANIC_DRAM_BASE (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE) +#define CONFIG_PANIC_DRAM_SIZE 0x00001000 /* 4K */ + +#define CONFIG_PANIC_BASE_OFFSET 0x100 /* reserved for jump data */ +#define CONFIG_PANIC_DATA_BASE (CONFIG_PANIC_DRAM_BASE + CONFIG_PANIC_BASE_OFFSET) + /* MPU settings */ #define NR_MPU_ENTRIES 16 diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index 8b05c30f4c..cb75bd0c1e 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -129,7 +129,8 @@ #define CONFIG_CHARGER_ISL9238 #define CONFIG_CHARGER_BQ25710 #define CONFIG_CHARGER_SENSE_RESISTOR_AC_ISL9238 20 - #define CONFIG_CHARGER_SENSE_RESISTOR_AC_BQ25710 10 + #define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 + #define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 #undef CONFIG_EXTPOWER_DEBOUNCE_MS #define CONFIG_EXTPOWER_DEBOUNCE_MS 200 @@ -248,7 +249,7 @@ /* Common SoC / PCH defines */ #define CONFIG_CHIPSET_GEMINILAKE #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI /* TODO(b/74123961): Enable Virtual Wires after bringup */ #define CONFIG_POWER_COMMON #define CONFIG_POWER_S0IX diff --git a/baseboard/trogdor/baseboard.h b/baseboard/trogdor/baseboard.h index 4eabeb0ca3..d361aeaac8 100644 --- a/baseboard/trogdor/baseboard.h +++ b/baseboard/trogdor/baseboard.h @@ -41,7 +41,7 @@ #undef CONFIG_PECI -#define CONFIG_HOSTCMD_SHI +#define CONFIG_HOST_INTERFACE_SHI #define CONFIG_HOST_COMMAND_STATUS #define CONFIG_HOSTCMD_SECTION_SORTED #define CONFIG_KEYBOARD_COL2_INVERTED @@ -72,6 +72,9 @@ #define CONFIG_BATTERY_CUT_OFF #define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_PRES_ODL #define CONFIG_BATTERY_SMART +#define CONFIG_BATTERY_V2 +#define CONFIG_BATTERY_COUNT 1 +#define CONFIG_HOSTCMD_BATTERY_V2 /* Charger */ #define CONFIG_CHARGER diff --git a/baseboard/volteer/baseboard.h b/baseboard/volteer/baseboard.h index 38a464813a..fd90b20b9e 100644 --- a/baseboard/volteer/baseboard.h +++ b/baseboard/volteer/baseboard.h @@ -43,7 +43,7 @@ #define CONFIG_BOARD_RESET_AFTER_POWER_ON /* Host communication */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 /* Chipset config */ @@ -77,6 +77,7 @@ #define CONFIG_MKBP_EVENT #define CONFIG_MKBP_USE_GPIO +#define CONFIG_MKBP_INPUT_DEVICES #define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT #define CONFIG_ACCEL_INTERRUPTS diff --git a/baseboard/zork/baseboard.h b/baseboard/zork/baseboard.h index d84ebbcef8..e97bcb4e45 100644 --- a/baseboard/zork/baseboard.h +++ b/baseboard/zork/baseboard.h @@ -38,7 +38,7 @@ #define CONFIG_CMD_AP_RESET_LOG #define CONFIG_CPU_PROCHOT_ACTIVE_LOW #define CONFIG_HIBERNATE_PSL -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER #define CONFIG_I2C_UPDATE_IF_CHANGED diff --git a/baseboard/zork/cbi_ec_fw_config.c b/baseboard/zork/cbi_ec_fw_config.c index cbb0821c42..50a29d3634 100644 --- a/baseboard/zork/cbi_ec_fw_config.c +++ b/baseboard/zork/cbi_ec_fw_config.c @@ -53,7 +53,7 @@ enum ec_cfg_lid_accel_sensor_type ec_config_has_lid_accel_sensor(void) /* * ec_config_has_base_gyro_sensor() will return ec_cfg_base_gyro_sensor_type */ -enum ec_cfg_base_gyro_sensor_type ec_config_has_base_gyro_sensor(void) +enum ec_ssfc_base_gyro_sensor ec_config_has_base_gyro_sensor(void) { return ((get_cbi_fw_config() & EC_CFG_BASE_GYRO_SENSOR_MASK) >> EC_CFG_BASE_GYRO_SENSOR_L); diff --git a/baseboard/zork/cbi_ec_fw_config.h b/baseboard/zork/cbi_ec_fw_config.h index 4888298e3a..c3ed5b654c 100644 --- a/baseboard/zork/cbi_ec_fw_config.h +++ b/baseboard/zork/cbi_ec_fw_config.h @@ -6,6 +6,8 @@ #ifndef _ZORK_CBI_EC_FW_CONFIG__H_ #define _ZORK_CBI_EC_FW_CONFIG__H_ +#include "cbi_ssfc.h" + /**************************************************************************** * CBI Zork EC FW Configuration */ @@ -56,12 +58,6 @@ enum ec_cfg_lid_accel_sensor_type { * * ec_config_has_base_gyro_sensor() will return ec_cfg_base_gyro_sensor_type */ -enum ec_cfg_base_gyro_sensor_type { - BASE_GYRO_NONE = 0, - BASE_GYRO_BMI160 = 1, - BASE_GYRO_LSM6DSM = 2, - BASE_GYRO_ICM426XX = 3, -}; #define EC_CFG_BASE_GYRO_SENSOR_L 11 #define EC_CFG_BASE_GYRO_SENSOR_H 13 #define EC_CFG_BASE_GYRO_SENSOR_MASK \ @@ -133,7 +129,7 @@ uint32_t get_cbi_fw_config(void); enum ec_cfg_usb_db_type ec_config_get_usb_db(void); enum ec_cfg_usb_mb_type ec_config_get_usb_mb(void); enum ec_cfg_lid_accel_sensor_type ec_config_has_lid_accel_sensor(void); -enum ec_cfg_base_gyro_sensor_type ec_config_has_base_gyro_sensor(void); +enum ec_ssfc_base_gyro_sensor ec_config_has_base_gyro_sensor(void); enum ec_cfg_pwm_keyboard_backlight_type ec_config_has_pwm_keyboard_backlight( void); enum ec_cfg_lid_angle_tablet_mode_type ec_config_has_lid_angle_tablet_mode( diff --git a/board/adlrvpp_ite/board.c b/board/adlrvpp_ite/board.c index 835cdcb986..3baec4aeaf 100644 --- a/board/adlrvpp_ite/board.c +++ b/board/adlrvpp_ite/board.c @@ -9,6 +9,7 @@ #include "fusb302.h" #include "gpio.h" #include "i2c.h" +#include "i2c_bitbang.h" #include "it83xx_pd.h" #include "lid_switch.h" #include "pca9675.h" @@ -76,6 +77,27 @@ const struct i2c_port_t i2c_ports[] = { BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); +const struct i2c_port_t i2c_bitbang_ports[] = { + [I2C_BITBANG_CHAN_BRD_ID] = { + .name = "bitbang_brd_id", + .port = IT83XX_I2C_CH_B, + .kbps = 100, + .scl = GPIO_SMB_BS_CLK, + .sda = GPIO_SMB_BS_DATA, + .drv = &bitbang_drv, + }, + [I2C_BITBANG_CHAN_IOEX_0] = { + .name = "bitbang_ioex_0", + .port = IT83XX_I2C_CH_C, + .kbps = 100, + .scl = GPIO_USBC_TCPC_I2C_CLK_P0, + .sda = GPIO_USBC_TCPC_I2C_DATA_P0, + .drv = &bitbang_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(i2c_bitbang_ports) == I2C_BITBANG_CHAN_COUNT); +const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); + /* USB-C TCPC Configuration */ const struct tcpc_config_t tcpc_config[] = { [TYPE_C_PORT_0] = { diff --git a/board/adlrvpp_ite/gpio.inc b/board/adlrvpp_ite/gpio.inc index 59af6cf877..00b4aefa3e 100644 --- a/board/adlrvpp_ite/gpio.inc +++ b/board/adlrvpp_ite/gpio.inc @@ -77,11 +77,11 @@ GPIO(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INPUT) GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INPUT) #endif -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(ESPI_RST_R, PIN(D, 2), GPIO_INPUT) #endif -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RST_R, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif @@ -112,7 +112,7 @@ GPIO(SYS_PWROK_EC, PIN(D, 1), GPIO_OUT_LOW) GPIO(DSW_PWROK_EC, PIN(L, 6), GPIO_OUT_LOW) /* Host communication GPIOs */ -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(PLT_RST_L, PIN(H, 6), GPIO_INPUT | GPIO_PULL_UP) /* PCH_PLTRST_L */ #endif GPIO(PCH_WAKE_N, PIN(J, 0), GPIO_ODR_HIGH) diff --git a/board/adlrvpp_mchp1521/board.c b/board/adlrvpp_mchp1521/board.c index 3e676a1c6c..7a51d0cbd9 100644 --- a/board/adlrvpp_mchp1521/board.c +++ b/board/adlrvpp_mchp1521/board.c @@ -10,6 +10,7 @@ #include "fusb302.h" #include "gpio.h" #include "i2c.h" +#include "i2c_bitbang.h" #include "keyboard_scan.h" #include "lid_switch.h" #include "pca9675.h" @@ -60,6 +61,27 @@ const struct i2c_port_t i2c_ports[] = { BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); +const struct i2c_port_t i2c_bitbang_ports[] = { + [I2C_BITBANG_CHAN_BRD_ID] = { + .name = "bitbang_brd_id", + .port = I2C_PORT_CHARGER, + .kbps = 100, + .scl = GPIO_SMB_BS_CLK, + .sda = GPIO_SMB_BS_DATA, + .drv = &bitbang_drv, + }, + [I2C_BITBANG_CHAN_IOEX_0] = { + .name = "bitbang_ioex_0", + .port = I2C_PORT_TYPEC_0, + .kbps = 100, + .scl = GPIO_TYPEC_EC_SMBUS1_CLK_EC, + .sda = GPIO_TYPEC_EC_SMBUS1_DATA_EC, + .drv = &bitbang_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(i2c_bitbang_ports) == I2C_BITBANG_CHAN_COUNT); +const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); + /* USB-C TCPC Configuration */ const struct tcpc_config_t tcpc_config[] = { [TYPE_C_PORT_0] = { diff --git a/board/adlrvpp_mchp1521/gpio.inc b/board/adlrvpp_mchp1521/gpio.inc index fd20e16568..5ec398903e 100644 --- a/board/adlrvpp_mchp1521/gpio.inc +++ b/board/adlrvpp_mchp1521/gpio.inc @@ -105,7 +105,7 @@ UNIMPLEMENTED(EN_PP5000) GPIO(SMC_WAKE_SCI_N, PIN(0114), GPIO_ODR_HIGH) /* EC_INT_L pin */ GPIO(EC_TRACE_DATA_0, PIN(0200), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(ESPI_RST_EC_R_N, PIN(061), GPIO_INPUT) #endif diff --git a/board/adlrvpp_mchp1727/board.c b/board/adlrvpp_mchp1727/board.c index 7e2b777e70..05ff3664c4 100644 --- a/board/adlrvpp_mchp1727/board.c +++ b/board/adlrvpp_mchp1727/board.c @@ -6,6 +6,7 @@ /* Intel ADL-P-RVP-MCHP1727 board-specific configuration */ #include "button.h" #include "fusb302.h" +#include "i2c_bitbang.h" #include "lid_switch.h" #include "pca9675.h" #include "power.h" @@ -63,6 +64,27 @@ const struct i2c_port_t i2c_ports[] = { BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); +const struct i2c_port_t i2c_bitbang_ports[] = { + [I2C_BITBANG_CHAN_BRD_ID] = { + .name = "bitbang_brd_id", + .port = I2C_PORT_CHARGER, + .kbps = 100, + .scl = GPIO_SMB_BS_CLK, + .sda = GPIO_SMB_BS_DATA, + .drv = &bitbang_drv, + }, + [I2C_BITBANG_CHAN_IOEX_0] = { + .name = "bitbang_ioex_0", + .port = I2C_PORT_TYPEC_0, + .kbps = 100, + .scl = GPIO_USBC_TCPC_I2C_CLK_P0, + .sda = GPIO_USBC_TCPC_I2C_DATA_P0, + .drv = &bitbang_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(i2c_bitbang_ports) == I2C_BITBANG_CHAN_COUNT); +const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); + /* USB-C TCPC Configuration */ const struct tcpc_config_t tcpc_config[] = { [TYPE_C_PORT_0] = { diff --git a/board/adlrvpp_mchp1727/gpio.inc b/board/adlrvpp_mchp1727/gpio.inc index 1eea86462c..42973648b4 100644 --- a/board/adlrvpp_mchp1727/gpio.inc +++ b/board/adlrvpp_mchp1727/gpio.inc @@ -83,7 +83,7 @@ GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(0142), GPIO_INPUT) /* Host communication GPIOs */ GPIO(SMC_WAKE_SCI_N_MECC, PIN(051), GPIO_ODR_HIGH) GPIO(EC_PCH_MKBP_INT_ODL, PIN(0127), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(LPC_ESPI_RST_N, PIN(061), GPIO_INPUT) GPIO(PLT_RST_L, PIN(052), GPIO_INPUT) /* PCH_PLTRST_L */ #endif diff --git a/board/adlrvpp_npcx/board.c b/board/adlrvpp_npcx/board.c index d4221696f1..412cebdb9a 100644 --- a/board/adlrvpp_npcx/board.c +++ b/board/adlrvpp_npcx/board.c @@ -6,6 +6,7 @@ /* Intel ADLRVP-NPCX board-specific configuration */ #include "button.h" #include "fusb302.h" +#include "i2c_bitbang.h" #include "lid_switch.h" #include "pca9675.h" #include "power.h" @@ -63,6 +64,27 @@ const struct i2c_port_t i2c_ports[] = { BUILD_ASSERT(ARRAY_SIZE(i2c_ports) == I2C_CHAN_COUNT); const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); +const struct i2c_port_t i2c_bitbang_ports[] = { + [I2C_BITBANG_CHAN_BRD_ID] = { + .name = "bitbang_brd_id", + .port = I2C_PORT_CHARGER, + .kbps = 100, + .scl = GPIO_SMB_BS_CLK, + .sda = GPIO_SMB_BS_DATA, + .drv = &bitbang_drv, + }, + [I2C_BITBANG_CHAN_IOEX_0] = { + .name = "bitbang_ioex_0", + .port = I2C_PORT_TYPEC_0, + .kbps = 100, + .scl = GPIO_USBC_TCPC_I2C_CLK_P0, + .sda = GPIO_USBC_TCPC_I2C_DATA_P0, + .drv = &bitbang_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(i2c_bitbang_ports) == I2C_BITBANG_CHAN_COUNT); +const unsigned int i2c_bitbang_ports_used = ARRAY_SIZE(i2c_bitbang_ports); + /* USB-C TCPC Configuration */ const struct tcpc_config_t tcpc_config[] = { [TYPE_C_PORT_0] = { diff --git a/board/adlrvpp_npcx/gpio.inc b/board/adlrvpp_npcx/gpio.inc index a059b1c6b6..4a696e4c09 100644 --- a/board/adlrvpp_npcx/gpio.inc +++ b/board/adlrvpp_npcx/gpio.inc @@ -62,7 +62,7 @@ GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(F, 3), GPIO_INPUT) /* Host communication GPIOs */ GPIO(SMC_WAKE_SCI_N_MECC, PIN(A, 4), GPIO_ODR_HIGH) GPIO(EC_PCH_MKBP_INT_ODL, PIN(F, 5), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(LPC_ESPI_RST_N, PIN(5, 4), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(PLT_RST_L, PIN(A, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* PCH_PLTRST_L */ #endif diff --git a/board/akemi/board.c b/board/akemi/board.c index 5b88f82fb5..1cfdedb626 100644 --- a/board/akemi/board.c +++ b/board/akemi/board.c @@ -332,20 +332,25 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Hatch. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/akemi/board.h b/board/akemi/board.h index 524607d8bb..af580a02b0 100644 --- a/board/akemi/board.h +++ b/board/akemi/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/ambassador/board.c b/board/ambassador/board.c index 94ceac98e4..698acf70bb 100644 --- a/board/ambassador/board.c +++ b/board/ambassador/board.c @@ -379,36 +379,46 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* Thermal control; drive fan based on temperature sensors. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(84), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(84), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_CORE] = thermal_a, + [TEMP_SENSOR_CORE] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/ambassador/board.h b/board/ambassador/board.h index 4ca9966873..14b9260509 100644 --- a/board/ambassador/board.h +++ b/board/ambassador/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/ampton/gpio.inc b/board/ampton/gpio.inc index 724d9a98d9..8b0a433842 100644 --- a/board/ampton/gpio.inc +++ b/board/ampton/gpio.inc @@ -32,7 +32,7 @@ GPIO_INT(RSMRST_L_PGOOD, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) /* PM GPIO_INT(ALL_SYS_PGOOD, PIN(F, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */ GPIO_INT(AC_PRESENT, PIN(A, 7), GPIO_INT_BOTH, extpower_interrupt) /* ACOK_OD */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif diff --git a/board/anahera/board.h b/board/anahera/board.h index 52666ff8e2..591e18bced 100644 --- a/board/anahera/board.h +++ b/board/anahera/board.h @@ -136,10 +136,11 @@ /* Charger defines */ #define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 #define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 /* Keyboard features */ #define CONFIG_KEYBOARD_FACTORY_TEST diff --git a/board/anahera/ec.tasklist b/board/anahera/ec.tasklist index 5cf454d4c2..187609f36e 100644 --- a/board/anahera/ec.tasklist +++ b/board/anahera/ec.tasklist @@ -11,18 +11,19 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ TASK_ALWAYS(LED, led_task, NULL, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/anahera/sensors.c b/board/anahera/sensors.c index bb86af940b..7f388579e2 100644 --- a/board/anahera/sensors.c +++ b/board/anahera/sensors.c @@ -74,17 +74,20 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* * TODO(b/199246802): Need to update for Alder Lake/anahera */ -static const struct ec_thermal_config thermal_fan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_FAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_fan = THERMAL_FAN; /* * TODO(b/199246802): Need to update for Alder Lake/anahera @@ -93,53 +96,64 @@ static const struct ec_thermal_config thermal_fan = { * 130 C. However, sensor is located next to SOC, so we need to use the lower * SOC temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/199246802): Need to update for Alder Lake/anahera */ -static const struct ec_thermal_config thermal_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; /* * TODO(b/199246802): Need to update for Alder Lake/anahera */ -static const struct ec_thermal_config thermal_regulator = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_REGULATOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_regulator = + THERMAL_REGULATOR; /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_FAN] = thermal_fan, - [TEMP_SENSOR_2_SOC] = thermal_cpu, - [TEMP_SENSOR_3_CHARGER] = thermal_charger, - [TEMP_SENSOR_4_REGULATOR] = thermal_regulator, + [TEMP_SENSOR_1_FAN] = THERMAL_FAN, + [TEMP_SENSOR_2_SOC] = THERMAL_CPU, + [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, + [TEMP_SENSOR_4_REGULATOR] = THERMAL_REGULATOR, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/anahera/thermal.c b/board/anahera/thermal.c index 3a9fdd8ab5..c26379e356 100644 --- a/board/anahera/thermal.c +++ b/board/anahera/thermal.c @@ -37,44 +37,44 @@ struct fan_step { static const struct fan_step fan_table[] = { { /* level 0 */ - .on = {49, 51, 0, -1}, + .on = {51, 51, 0, -1}, .off = {99, 99, 99, -1}, .rpm = {0}, }, { /* level 1 */ - .on = {50, 52, 0, -1}, - .off = {48, 50, 99, -1}, + .on = {52, 52, 0, -1}, + .off = {50, 50, 99, -1}, .rpm = {3000}, }, { /* level 2 */ - .on = {51, 53, 0, -1}, - .off = {49, 51, 99, -1}, + .on = {53, 53, 0, -1}, + .off = {51, 51, 99, -1}, .rpm = {3200}, }, { /* level 3 */ - .on = {52, 54, 0, -1}, - .off = {50, 52, 99, -1}, + .on = {54, 54, 0, -1}, + .off = {52, 52, 99, -1}, .rpm = {3600}, }, { /* level 4 */ - .on = {54, 56, 58, -1}, - .off = {51, 53, 55, -1}, + .on = {55, 56, 56, -1}, + .off = {53, 53, 54, -1}, .rpm = {3900}, }, { /* level 5 */ - .on = {55, 57, 60, -1}, - .off = {53, 55, 57, -1}, + .on = {56, 57, 58, -1}, + .off = {54, 55, 55, -1}, .rpm = {4200}, }, { /* level 6 */ .on = {100, 100, 100, -1}, - .off = {54, 56, 59, -1}, + .off = {55, 56, 57, -1}, .rpm = {4600}, }, }; diff --git a/board/arcada_ish/board.h b/board/arcada_ish/board.h index ce735bd268..0064086619 100644 --- a/board/arcada_ish/board.h +++ b/board/arcada_ish/board.h @@ -62,7 +62,7 @@ #define CONFIG_DMA_PAGING /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI /* I2C ports */ #define I2C_PORT_SENSOR ISH_I2C0 diff --git a/board/asurada/board.c b/board/asurada/board.c index b57d327015..ea7da39fa6 100644 --- a/board/asurada/board.c +++ b/board/asurada/board.c @@ -194,6 +194,7 @@ struct motion_sensor_t icm426xx_base_gyro = { .location = MOTIONSENSE_LOC_BASE, .drv = &icm426xx_drv, .mutex = &g_base_mutex, + .drv_data = &g_icm426xx_data, .port = I2C_PORT_ACCEL, .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, .default_range = 1000, /* dps */ diff --git a/board/atlas/board.h b/board/atlas/board.h index df2a2ee2c2..6fdf77b0f0 100644 --- a/board/atlas/board.h +++ b/board/atlas/board.h @@ -54,7 +54,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_CPU_PROCHOT_ACTIVE_LOW -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 diff --git a/board/baklava/board.c b/board/baklava/board.c index d256a37d68..61d9496180 100644 --- a/board/baklava/board.c +++ b/board/baklava/board.c @@ -267,6 +267,31 @@ int dock_get_mf_preference(void) { return MF_ON; } + +static void board_usb_tc_connect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* + * The EC needs to indicate to the MST hub when the host port is + * attached. GPIO_UFP_PLUG_DET is used for this purpose. + */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 0); +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_tc_connect, HOOK_PRIO_DEFAULT); + +static void board_usb_tc_disconnect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* Only the host port disconnect is relevant */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 1); +} +DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect, \ + HOOK_PRIO_DEFAULT); + #endif /* SECTION_IS_RW */ static void board_init(void) diff --git a/board/bds/board.h b/board/bds/board.h index c859089f04..21dc2ad598 100644 --- a/board/bds/board.h +++ b/board/bds/board.h @@ -19,7 +19,7 @@ /* Modules we want to exclude */ #undef CONFIG_LID_SWITCH -#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_HOST_INTERFACE_LPC #undef CONFIG_PECI #undef CONFIG_SWITCH diff --git a/board/berknip/board.c b/board/berknip/board.c index a119007de6..36b6b4f68f 100644 --- a/board/berknip/board.c +++ b/board/berknip/board.c @@ -484,51 +484,74 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_thermistor_soc = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(62), - [EC_TEMP_THRESH_HALT] = C_TO_K(66), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(57), - }, - .temp_fan_off = C_TO_K(39), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_THERMISTOR_SOC \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(62), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(66), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(57), \ + }, \ + .temp_fan_off = C_TO_K(39), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_thermistor_soc = + THERMAL_THERMISTOR_SOC; -const static struct ec_thermal_config thermal_thermistor_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(99), - [EC_TEMP_THRESH_HALT] = C_TO_K(99), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(98), - }, - .temp_fan_off = C_TO_K(98), - .temp_fan_max = C_TO_K(99), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_THERMISTOR_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(99), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(99), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(98), \ + }, \ + .temp_fan_off = C_TO_K(98), \ + .temp_fan_max = C_TO_K(99), \ + } +__maybe_unused static const struct ec_thermal_config + thermal_thermistor_charger = THERMAL_THERMISTOR_CHARGER; -const static struct ec_thermal_config thermal_thermistor_5v = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(60), - [EC_TEMP_THRESH_HALT] = C_TO_K(99), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(50), - }, - .temp_fan_off = C_TO_K(98), - .temp_fan_max = C_TO_K(99), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_THERMISTOR_5V \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(60), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(99), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(50), \ + }, \ + .temp_fan_off = C_TO_K(98), \ + .temp_fan_max = C_TO_K(99), \ + } +__maybe_unused static const struct ec_thermal_config thermal_thermistor_5v = + THERMAL_THERMISTOR_5V; -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(100), - [EC_TEMP_THRESH_HALT] = C_TO_K(105), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(99), - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(100), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(105), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(99), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/blipper/board.c b/board/blipper/board.c index 2ca56a1b51..0f19763ebd 100644 --- a/board/blipper/board.c +++ b/board/blipper/board.c @@ -21,6 +21,10 @@ #include "driver/tcpm/raa489000.h" #include "driver/tcpm/tcpci.h" #include "driver/usb_mux/it5205.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/accelgyro_bmi260.h" +#include "driver/accelgyro_icm42607.h" +#include "driver/accelgyro_icm_common.h" #include "gpio.h" #include "hooks.h" #include "intc.h" @@ -43,6 +47,7 @@ #include "usb_pd.h" #include "usb_pd_tcpm.h" +#define CPRINTF(format, args...) cprints(CC_SYSTEM, format, ## args) #define CPRINTUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) #define INT_RECHECK_US 5000 @@ -308,6 +313,104 @@ struct motion_sensor_t motion_sensors[] = { }, }; +static struct icm_drv_data_t g_icm42607_data; +const mat33_fp_t based_ref_icm42607 = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(1), 0}, + { 0, 0, FLOAT_TO_FP(1)} +}; +struct motion_sensor_t icm42607_base_accel = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_ICM42607, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &icm42607_drv, + .mutex = &g_base_mutex, + .drv_data = &g_icm42607_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = ICM42607_ADDR0_FLAGS, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs.*/ + .rot_standard_ref = &based_ref_icm42607, + .min_frequency = ICM42607_ACCEL_MIN_FREQ, + .max_frequency = ICM42607_ACCEL_MAX_FREQ, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, +}; +struct motion_sensor_t icm42607_base_gyro = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_ICM42607, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &icm42607_drv, + .mutex = &g_base_mutex, + .drv_data = &g_icm42607_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = ICM42607_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = &based_ref_icm42607, + .min_frequency = ICM42607_GYRO_MIN_FREQ, + .max_frequency = ICM42607_GYRO_MAX_FREQ, +}; + +static struct bmi_drv_data_t g_bmi220_data; +const mat33_fp_t based_ref_bmi220 = { + { 0, FLOAT_TO_FP(1), 0}, + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} +}; +struct motion_sensor_t bmi220_base_accel = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI220, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi260_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi220_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs.*/ + .rot_standard_ref = &based_ref_bmi220, + .min_frequency = BMI_ACCEL_MIN_FREQ, + .max_frequency = BMI_ACCEL_MAX_FREQ, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, +}; +struct motion_sensor_t bmi220_base_gyro = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI220, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi260_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi220_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = &based_ref_bmi220, + .min_frequency = BMI_GYRO_MIN_FREQ, + .max_frequency = BMI_GYRO_MAX_FREQ, +}; + unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); void board_init(void) @@ -356,12 +459,38 @@ void board_init(void) gpio_set_flags(GPIO_VOLUP_BTN_ODL, GPIO_INPUT | GPIO_PULL_DOWN); - + } else { + if (get_cbi_ssfc_base_sensor() == SSFC_SENSOR_ICM42607) { + motion_sensors[BASE_ACCEL] = icm42607_base_accel; + motion_sensors[BASE_GYRO] = icm42607_base_gyro; + CPRINTF("BASE GYRO is ICM42607"); + } else if (get_cbi_ssfc_base_sensor() == SSFC_SENSOR_BMI220) { + motion_sensors[BASE_ACCEL] = bmi220_base_accel; + motion_sensors[BASE_GYRO] = bmi220_base_gyro; + CPRINTF("BASE GYRO is BMI220"); + } else { + CPRINTF("BASE GYRO is LSM6DSM"); + } } - } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); +void motion_interrupt(enum gpio_signal signal) +{ + switch (get_cbi_ssfc_base_sensor()) { + case SSFC_SENSOR_ICM42607: + icm42607_interrupt(signal); + break; + case SSFC_SENSOR_BMI220: + bmi260_interrupt(signal); + break; + case SSFC_SENSOR_LSM6DSM: + default: + lsm6dsm_interrupt(signal); + break; + } +} + void board_hibernate(void) { /* diff --git a/board/blipper/board.h b/board/blipper/board.h index fdee05e800..9f0865b66b 100644 --- a/board/blipper/board.h +++ b/board/blipper/board.h @@ -36,12 +36,15 @@ #define CONFIG_LED_ONOFF_STATES /*SENSOR*/ +#define I2C_PORT_ACCEL I2C_PORT_SENSOR #define CONFIG_CMD_ACCELS #define CONFIG_CMD_ACCEL_INFO #define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT #define CONFIG_ACCEL_LIS2DWL /* Lid accel */ #define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ +#define CONFIG_ACCELGYRO_ICM42607 +#define CONFIG_ACCELGYRO_BMI220 /* Lid operates in forced mode, base in FIFO */ #define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ACCEL) @@ -49,10 +52,19 @@ #define CONFIG_ACCEL_FIFO_SIZE 256 /* Must be a power of 2 */ #define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) +#define CONFIG_I2C_XFER_LARGE_TRANSFER + #define CONFIG_ACCEL_INTERRUPTS #define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) +#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +/* ICM426XX Base accel/gyro */ +#define CONFIG_ACCELGYRO_ICM42607_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + #define CONFIG_LID_ANGLE #define CONFIG_LID_ANGLE_UPDATE #define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL @@ -144,6 +156,8 @@ enum battery_type { BATTERY_TYPE_COUNT, }; +void motion_interrupt(enum gpio_signal signal); + #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/blipper/cbi_ssfc.h b/board/blipper/cbi_ssfc.h index 935049b6ae..f4a51b8e91 100644 --- a/board/blipper/cbi_ssfc.h +++ b/board/blipper/cbi_ssfc.h @@ -20,7 +20,8 @@ enum ec_ssfc_base_sensor { SSFC_SENSOR_BMI160 = 1, SSFC_SENSOR_ICM426XX = 2, SSFC_SENSOR_LSM6DSM = 3, - SSFC_SENSOR_ICM42607 = 4 + SSFC_SENSOR_ICM42607 = 4, + SSFC_SENSOR_BMI220 = 5 }; /* diff --git a/board/blipper/gpio.inc b/board/blipper/gpio.inc index f072f1c832..8558aab638 100644 --- a/board/blipper/gpio.inc +++ b/board/blipper/gpio.inc @@ -37,7 +37,7 @@ GPIO_INT(LID_OPEN, PIN(F, 3), GPIO_INT_BOTH, lid_interrupt) GPIO_INT(LID_360_L, PIN(A, 7), GPIO_INT_BOTH, gmr_tablet_switch_isr) GPIO_INT(VOLDN_BTN_ODL, PIN(I, 6), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) GPIO_INT(VOLUP_BTN_ODL, PIN(I, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(BASE_SIXAXIS_INT_L, PIN(J, 0), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) +GPIO_INT(BASE_SIXAXIS_INT_L, PIN(J, 0), GPIO_INT_FALLING | GPIO_SEL_1P8V, motion_interrupt) GPIO_INT(EC_WP_OD, PIN(A, 6), GPIO_INT_BOTH, switch_interrupt) GPIO_INT(HDMI_HPD_SUB_ODL, PIN(E, 7), GPIO_INT_BOTH, hdmi_hpd_interrupt) diff --git a/board/blipper/led.c b/board/blipper/led.c index 7ba065fa5e..c28b39f6af 100644 --- a/board/blipper/led.c +++ b/board/blipper/led.c @@ -105,7 +105,7 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) if (brightness[EC_LED_COLOR_WHITE] != 0) led_set_color_power(EC_LED_COLOR_WHITE); else - led_set_color_battery(LED_OFF); + led_set_color_power(LED_OFF); } else { return EC_ERROR_INVAL; } diff --git a/board/boldar/board.c b/board/boldar/board.c index 49a3a79831..2e412fe0d7 100644 --- a/board/boldar/board.c +++ b/board/boldar/board.c @@ -108,41 +108,51 @@ const struct fan_t fans[FAN_CH_COUNT] = { /******************************************************************************/ /* EC thermal management configuration */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(15), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(15), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator * * Need to use the lower of the charger IC, PP3300 regulator, and the inductors */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(15), - .temp_fan_max = C_TO_K(55), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(15), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/boten/board.c b/board/boten/board.c index b6301834bf..17436a0091 100644 --- a/board/boten/board.c +++ b/board/boten/board.c @@ -7,6 +7,7 @@ #include "adc_chip.h" #include "button.h" +#include "cbi_fw_config.h" #include "charge_manager.h" #include "charge_state_v2.h" #include "charger.h" @@ -216,37 +217,6 @@ const int usb_port_enable[USB_PORT_COUNT] = { GPIO_EN_USB_A0_VBUS, }; -void board_init(void) -{ - gpio_enable_interrupt(GPIO_USB_C0_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C0_CCSBU_OVP_ODL); - /* Enable gpio interrupt for base accelgyro sensor */ - gpio_enable_interrupt(GPIO_BASE_SIXAXIS_INT_L); - gpio_enable_interrupt(GPIO_HDMI_HPD_SUB_ODL); - /* Enable gpio interrupt for pen detect */ - gpio_enable_interrupt(GPIO_PEN_DET_ODL); - - /* Make sure pen detection is triggered or not at sysjump */ - if (!gpio_get_level(GPIO_PEN_DET_ODL)) - gpio_set_level(GPIO_EN_PP5000_PEN, 1); - - if (gpio_get_level(GPIO_PEN_DET_ODL)) - gpio_set_level(GPIO_PEN_DET_PCH, 1); - - /* Set LEDs luminance */ - pwm_set_duty(PWM_CH_LED_RED, 70); - pwm_set_duty(PWM_CH_LED_GREEN, 70); - pwm_set_duty(PWM_CH_LED_WHITE, 70); - - /* - * If interrupt lines are already low, schedule them to be processed - * after inits are completed. - */ - if (!gpio_get_level(GPIO_USB_C0_INT_ODL)) - hook_call_deferred(&check_c0_line_data, 0); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - void board_reset_pd_mcu(void) { /* @@ -467,7 +437,56 @@ struct motion_sensor_t motion_sensors[] = { }, }; -const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); +unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +void board_init(void) +{ + gpio_enable_interrupt(GPIO_USB_C0_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C0_CCSBU_OVP_ODL); + gpio_enable_interrupt(GPIO_HDMI_HPD_SUB_ODL); + if (get_cbi_fw_config_tablet_mode() == TABLET_MODE_PRESENT) { + motion_sensor_count = ARRAY_SIZE(motion_sensors); + /* Enable gpio interrupt for base accelgyro sensor */ + gpio_enable_interrupt(GPIO_BASE_SIXAXIS_INT_L); + + /* Enable gpio interrupt for pen detect */ + gpio_enable_interrupt(GPIO_PEN_DET_ODL); + + /* Make sure pen detection is triggered or not at sysjump */ + if (!gpio_get_level(GPIO_PEN_DET_ODL)) + gpio_set_level(GPIO_EN_PP5000_PEN, 1); + + if (gpio_get_level(GPIO_PEN_DET_ODL)) + gpio_set_level(GPIO_PEN_DET_PCH, 1); + } else { + motion_sensor_count = 0; + gmr_tablet_switch_disable(); + /* Base accel is not stuffed, don't allow line to float */ + gpio_set_flags(GPIO_BASE_SIXAXIS_INT_L, + GPIO_INPUT | GPIO_PULL_DOWN); + + /* only clamshell sku todo */ + gpio_set_flags(GPIO_PEN_DET_ODL, GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_PEN_DET_PCH, GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_EN_PP5000_PEN, GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_LID_360_L, GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_VOLUP_BTN_ODL, GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_VOLDN_BTN_ODL, GPIO_INPUT | GPIO_PULL_DOWN); + } + + /* Set LEDs luminance */ + pwm_set_duty(PWM_CH_LED_RED, 70); + pwm_set_duty(PWM_CH_LED_GREEN, 70); + pwm_set_duty(PWM_CH_LED_WHITE, 70); + + /* + * If interrupt lines are already low, schedule them to be processed + * after inits are completed. + */ + if (!gpio_get_level(GPIO_USB_C0_INT_ODL)) + hook_call_deferred(&check_c0_line_data, 0); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); /* Thermistors */ const struct temp_sensor_t temp_sensors[] = { diff --git a/board/boten/board.h b/board/boten/board.h index 0e2a72015c..8c2b1d4417 100644 --- a/board/boten/board.h +++ b/board/boten/board.h @@ -93,6 +93,8 @@ #define USB_PORT_COUNT 1 #define CONFIG_USB_PORT_POWER_DUMB +#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT + #ifndef __ASSEMBLER__ #include "gpio_signal.h" diff --git a/board/brask/board.c b/board/brask/board.c index 8b53f63eec..7fb0162d17 100644 --- a/board/brask/board.c +++ b/board/brask/board.c @@ -4,6 +4,7 @@ */ #include "assert.h" +#include "button.h" #include "charge_manager.h" #include "charge_state_v2.h" #include "common.h" diff --git a/board/brask/board.h b/board/brask/board.h index 120c2a574a..df15615bdd 100644 --- a/board/brask/board.h +++ b/board/brask/board.h @@ -38,11 +38,10 @@ #define CONFIG_USB_PD_PPC #define CONFIG_USB_PD_TCPM_RT1715 #define CONFIG_USBC_RETIMER_INTEL_BB -/* TODO(b/197505149): need to fix the build error and clarify - * how to set the usb_ls_en_gpio and retimer_rst_gpio - * in the same array. +/* TODO: Do not add CONFIG_KB800X_CUSTOM_XBAR until find out how + * to config ss_lane. */ -/* #define CONFIG_USBC_RETIMER_KB800X */ +#define CONFIG_USBC_RETIMER_KB800X #define CONFIG_USBC_PPC_SYV682X /* TODO: b/177608416 - measure and check these values on brya */ @@ -114,11 +113,8 @@ #define I2C_ADDR_MP2964_FLAGS 0x20 -/* - * see b/174768555#comment22 - */ -#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56 -#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x57 +#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x58 +#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x59 /* Enabling Thunderbolt-compatible mode */ #define CONFIG_USB_PD_TBT_COMPAT_MODE diff --git a/board/brask/gpio.inc b/board/brask/gpio.inc index b79690c903..9282b915cd 100644 --- a/board/brask/gpio.inc +++ b/board/brask/gpio.inc @@ -27,6 +27,7 @@ GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt) GPIO_INT(BJ_ADP_PRESENT_ODL, PIN(8, 2), GPIO_INT_BOTH | GPIO_PULL_UP, adp_connect_interrupt) +GPIO_INT(EC_RECOVERY_BTN_OD, PIN(2, 3), GPIO_INT_BOTH, button_interrupt) /* CCD */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) @@ -65,7 +66,6 @@ GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT) /* Button */ GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) -GPIO(EC_RECOVERY_BTN_OD, PIN(2, 3), GPIO_INPUT) GPIO(GSC_EC_RECOVERY_BTN_OD, PIN(2, 2), GPIO_INPUT) /* NFC */ @@ -128,7 +128,7 @@ GPIO(LED_RED_L, PIN(C, 4), GPIO_OUT_LOW) GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) -GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) +GPIO(USB_C1_RT_RST_R_L, PIN(0, 2), GPIO_OUT_LOW) /* GPIO02_P2 to PU */ /* GPIO03_P2 to PU */ diff --git a/board/brask/sensors.c b/board/brask/sensors.c index 72b8297aa1..7071c89f54 100644 --- a/board/brask/sensors.c +++ b/board/brask/sensors.c @@ -85,26 +85,31 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/197478860): add the thermal sensor setting */ /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CPU] = thermal_cpu, - [TEMP_SENSOR_2_CPU_VR] = thermal_cpu, - [TEMP_SENSOR_3_WIFI] = thermal_cpu, - [TEMP_SENSOR_4_DIMM] = thermal_cpu, + [TEMP_SENSOR_1_CPU] = THERMAL_CPU, + [TEMP_SENSOR_2_CPU_VR] = THERMAL_CPU, + [TEMP_SENSOR_3_WIFI] = THERMAL_CPU, + [TEMP_SENSOR_4_DIMM] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/brask/usbc_config.c b/board/brask/usbc_config.c index 563034fcb4..a8c952df6f 100644 --- a/board/brask/usbc_config.c +++ b/board/brask/usbc_config.c @@ -107,6 +107,17 @@ static const struct usb_mux usbc2_tcss_usb_mux = { .hpd_update = &virtual_hpd_update, }; +struct kb800x_control_t kb800x_control[] = { + [USBC_PORT_C0] = { + }, + [USBC_PORT_C1] = { + .retimer_rst_gpio = GPIO_USB_C1_RT_RST_R_L, + }, + [USBC_PORT_C2] = { + }, +}; +BUILD_ASSERT(ARRAY_SIZE(kb800x_control) == USBC_PORT_COUNT); + const struct usb_mux usb_muxes[] = { [USBC_PORT_C0] = { .usb_port = USBC_PORT_C0, @@ -118,13 +129,9 @@ const struct usb_mux usb_muxes[] = { }, [USBC_PORT_C1] = { .usb_port = USBC_PORT_C1, - /* TODO(b/197505149): need to fix the build error and - * clarify how to set the usb_ls_en_gpio and - * retimer_rst_gpio in the same array. - */ - /*.driver = &kb800x_usb_mux_driver, */ + .driver = &kb800x_usb_mux_driver, .i2c_port = I2C_PORT_USB_C1_MUX, - .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, + .i2c_addr_flags = KB800X_I2C_ADDR0_FLAGS, .next_mux = &usbc1_tcss_usb_mux, }, [USBC_PORT_C2] = { @@ -242,7 +249,7 @@ void board_reset_pd_mcu(void) */ gpio_set_level(tcpc_rst, 0); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 0); /* * delay for power-on to reset-off and min. assertion time @@ -251,7 +258,7 @@ void board_reset_pd_mcu(void) msleep(20); gpio_set_level(tcpc_rst, 1); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 1); /* wait for chips to come up */ diff --git a/board/brya/battery.c b/board/brya/battery.c index a18ab029b6..91faab57a3 100644 --- a/board/brya/battery.c +++ b/board/brya/battery.c @@ -6,9 +6,10 @@ */ #include "battery_fuel_gauge.h" +#include "cbi.h" #include "common.h" #include "compile_time_macros.h" - +#include "gpio.h" /* * Battery info for all Brya battery types. Note that the fields * start_charging_min/max and charging_min/max are not used for the charger. @@ -96,3 +97,16 @@ const struct board_batt_params board_battery_info[] = { BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_POWER_TECH; + +enum battery_present battery_hw_present(void) +{ + enum gpio_signal batt_pres; + + if (get_board_id() == 1) + batt_pres = GPIO_ID_1_EC_BATT_PRES_ODL; + else + batt_pres = GPIO_EC_BATT_PRES_ODL; + + /* The GPIO is low when the battery is physically present */ + return gpio_get_level(batt_pres) ? BP_NO : BP_YES; +} diff --git a/board/brya/board.c b/board/brya/board.c index 1935988607..c9246c197b 100644 --- a/board/brya/board.c +++ b/board/brya/board.c @@ -33,16 +33,6 @@ #define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) #define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) -/******************************************************************************/ -/* USB-A charging control */ - -const int usb_port_enable[USB_PORT_COUNT] = { - GPIO_EN_PP5000_USBA_R, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); - -/******************************************************************************/ - __override void board_cbi_init(void) { config_usb_db_type(); @@ -72,53 +62,6 @@ static void board_chipset_suspend(void) } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); -#ifdef CONFIG_CHARGE_RAMP_SW - -/* - * TODO(b/181508008): tune this threshold - */ - -#define BC12_MIN_VOLTAGE 4400 - -/** - * Return true if VBUS is too low - */ -int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) -{ - int voltage; - - if (charger_get_vbus_voltage(port, &voltage)) - voltage = 0; - - if (voltage == 0) { - CPRINTS("%s: must be disconnected", __func__); - return 1; - } - - if (voltage < BC12_MIN_VOLTAGE) { - CPRINTS("%s: port %d: vbus %d lower than %d", __func__, - port, voltage, BC12_MIN_VOLTAGE); - return 1; - } - - return 0; -} - -#endif /* CONFIG_CHARGE_RAMP_SW */ - -enum battery_present battery_hw_present(void) -{ - enum gpio_signal batt_pres; - - if (get_board_id() == 1) - batt_pres = GPIO_ID_1_EC_BATT_PRES_ODL; - else - batt_pres = GPIO_EC_BATT_PRES_ODL; - - /* The GPIO is low when the battery is physically present */ - return gpio_get_level(batt_pres) ? BP_NO : BP_YES; -} - /* * Explicitly apply the board ID 1 *gpio.inc settings to pins that * were reassigned on current boards. diff --git a/board/brya/board.h b/board/brya/board.h index 77f0ab8490..f7ce860fe9 100644 --- a/board/brya/board.h +++ b/board/brya/board.h @@ -203,10 +203,12 @@ /* Charger defines */ #define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 #define CONFIG_CHARGE_RAMP_SW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_PSYS_SENSING /* * Older boards have a different ADC assignment. diff --git a/board/brya/ec.tasklist b/board/brya/ec.tasklist index 470a1fcdde..260f6561d9 100644 --- a/board/brya/ec.tasklist +++ b/board/brya/ec.tasklist @@ -11,21 +11,22 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C2, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C2, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/brya/fw_config.c b/board/brya/fw_config.c index fb8acb635d..9c28c3ca58 100644 --- a/board/brya/fw_config.c +++ b/board/brya/fw_config.c @@ -3,6 +3,7 @@ * found in the LICENSE file. */ +#include "cbi.h" #include "common.h" #include "compile_time_macros.h" #include "console.h" diff --git a/board/brya/i2c.c b/board/brya/i2c.c index b3eb8352da..3db2e0c17b 100644 --- a/board/brya/i2c.c +++ b/board/brya/i2c.c @@ -5,9 +5,11 @@ #include "common.h" #include "compile_time_macros.h" - +#include "hooks.h" #include "i2c.h" +#define BOARD_ID_FAST_PLUS_CAPABLE 2 + /* I2C port map configuration */ const struct i2c_port_t i2c_ports[] = { { @@ -46,7 +48,7 @@ const struct i2c_port_t i2c_ports[] = { /* I2C4 C1 TCPC */ .name = "tcpc1", .port = I2C_PORT_USB_C1_TCPC, - .kbps = 400, + .kbps = 1000, .scl = GPIO_EC_I2C_USB_C1_TCPC_SCL, .sda = GPIO_EC_I2C_USB_C1_TCPC_SDA, .flags = I2C_PORT_FLAG_DYNAMIC_SPEED, @@ -63,9 +65,10 @@ const struct i2c_port_t i2c_ports[] = { /* I2C6 */ .name = "ppc1", .port = I2C_PORT_USB_C1_PPC, - .kbps = 400, + .kbps = 1000, .scl = GPIO_EC_I2C_USB_C1_MIX_SCL, .sda = GPIO_EC_I2C_USB_C1_MIX_SDA, + .flags = I2C_PORT_FLAG_DYNAMIC_SPEED, }, { /* I2C7 */ @@ -77,3 +80,19 @@ const struct i2c_port_t i2c_ports[] = { }, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* + * I2C controllers are initialized in main.c. This sets the speed much + * later, but before I2C peripherals are initialized. + */ +static void set_board_legacy_i2c_speeds(void) +{ + if (get_board_id() >= BOARD_ID_FAST_PLUS_CAPABLE) + return; + + ccprints("setting USB DB I2C buses to 400 kHz\n"); + + i2c_set_freq(I2C_PORT_USB_C1_TCPC, I2C_FREQ_400KHZ); + i2c_set_freq(I2C_PORT_USB_C1_PPC, I2C_FREQ_400KHZ); +} +DECLARE_HOOK(HOOK_INIT, set_board_legacy_i2c_speeds, HOOK_PRIO_INIT_I2C - 1); diff --git a/board/brya/led.c b/board/brya/led.c index 68945ec79e..78c10e65b8 100644 --- a/board/brya/led.c +++ b/board/brya/led.c @@ -27,7 +27,7 @@ const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); /* * We only have a white and an amber LED, so setting any other color results in - * both LEDs being off. + * both LEDs being off. Cap at 50% to save power. */ struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { /* Amber, White */ @@ -35,8 +35,8 @@ struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { [EC_LED_COLOR_GREEN] = { 0, 0 }, [EC_LED_COLOR_BLUE] = { 0, 0 }, [EC_LED_COLOR_YELLOW] = { 0, 0 }, - [EC_LED_COLOR_WHITE] = { 0, 100 }, - [EC_LED_COLOR_AMBER] = { 100, 0 }, + [EC_LED_COLOR_WHITE] = { 0, 50 }, + [EC_LED_COLOR_AMBER] = { 50, 0 }, }; /* Two logical LEDs with amber and white channels. */ diff --git a/board/brya/pwm.c b/board/brya/pwm.c index 6e662f8e7d..2203f14c8d 100644 --- a/board/brya/pwm.c +++ b/board/brya/pwm.c @@ -53,17 +53,17 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); static void board_pwm_init(void) { /* - * Turn on all the LED at 50%. + * Turn off all the LEDs. * Turn on the fan at 100%. */ pwm_enable(PWM_CH_LED1, 1); - pwm_set_duty(PWM_CH_LED1, 50); + pwm_set_duty(PWM_CH_LED1, 0); pwm_enable(PWM_CH_LED2, 1); - pwm_set_duty(PWM_CH_LED2, 50); + pwm_set_duty(PWM_CH_LED2, 0); pwm_enable(PWM_CH_LED3, 1); - pwm_set_duty(PWM_CH_LED3, 50); + pwm_set_duty(PWM_CH_LED3, 0); pwm_enable(PWM_CH_LED4, 1); - pwm_set_duty(PWM_CH_LED4, 50); + pwm_set_duty(PWM_CH_LED4, 0); pwm_enable(PWM_CH_KBLIGHT, 1); pwm_set_duty(PWM_CH_KBLIGHT, 50); diff --git a/board/brya/sensors.c b/board/brya/sensors.c index d4fd905884..0a4b0198bd 100644 --- a/board/brya/sensors.c +++ b/board/brya/sensors.c @@ -294,17 +294,22 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/180681346): update for Alder Lake/brya @@ -319,17 +324,23 @@ static const struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -static const struct ec_thermal_config thermal_ambient = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_AMBIENT \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_ambient = + THERMAL_AMBIENT; /* * Inductor limits - used for both charger and PP3300 regulator @@ -342,38 +353,50 @@ static const struct ec_thermal_config thermal_ambient = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(105), - [EC_TEMP_THRESH_HALT] = C_TO_K(120), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(65), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(105), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(120), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(65), \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; /* * TODO(b/180681346): update for brya WWAN module */ -static const struct ec_thermal_config thermal_wwan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(130), - [EC_TEMP_THRESH_HALT] = C_TO_K(130), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(100), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_WWAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(130), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(130), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(100), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_wwan = + THERMAL_WWAN; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_2_AMBIENT] = thermal_ambient, - [TEMP_SENSOR_3_CHARGER] = thermal_charger, - [TEMP_SENSOR_4_WWAN] = thermal_wwan, + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_AMBIENT] = THERMAL_AMBIENT, + [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, + [TEMP_SENSOR_4_WWAN] = THERMAL_WWAN, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/brya/usbc_config.c b/board/brya/usbc_config.c index faf1904967..f653a93d1f 100644 --- a/board/brya/usbc_config.c +++ b/board/brya/usbc_config.c @@ -6,6 +6,9 @@ #include <stdint.h> #include <stdbool.h> +#include "cbi.h" +#include "charger.h" +#include "charge_ramp.h" #include "common.h" #include "compile_time_macros.h" #include "console.h" @@ -56,7 +59,8 @@ const struct tcpc_config_t tcpc_config[] = { }, .drv = &ps8xxx_tcpm_drv, .flags = TCPC_FLAGS_TCPCI_REV2_0 | - TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V, + TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | + TCPC_FLAGS_CONTROL_VCONN, }, [USBC_PORT_C2] = { .bus_type = EC_BUS_TYPE_I2C, @@ -71,6 +75,16 @@ const struct tcpc_config_t tcpc_config[] = { BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); +/******************************************************************************/ +/* USB-A charging control */ + +const int usb_port_enable[USB_PORT_COUNT] = { + GPIO_EN_PP5000_USBA_R, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); + +/******************************************************************************/ + /* USBC PPC configuration */ struct ppc_config_t ppc_chips[] = { [USBC_PORT_C0] = { @@ -202,6 +216,40 @@ struct ioexpander_config_t ioex_config[] = { }; BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); +#ifdef CONFIG_CHARGE_RAMP_SW + +/* + * TODO(b/181508008): tune this threshold + */ + +#define BC12_MIN_VOLTAGE 4400 + +/** + * Return true if VBUS is too low + */ +int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) +{ + int voltage; + + if (charger_get_vbus_voltage(port, &voltage)) + voltage = 0; + + if (voltage == 0) { + CPRINTS("%s: must be disconnected", __func__); + return 1; + } + + if (voltage < BC12_MIN_VOLTAGE) { + CPRINTS("%s: port %d: vbus %d lower than %d", __func__, + port, voltage, BC12_MIN_VOLTAGE); + return 1; + } + + return 0; +} + +#endif /* CONFIG_CHARGE_RAMP_SW */ + void config_usb_db_type(void) { enum ec_cfg_usb_db_type db_type = ec_cfg_usb_db_type(); diff --git a/board/bugzzy/board.c b/board/bugzzy/board.c index 7fc6776b3f..315f3a738b 100644 --- a/board/bugzzy/board.c +++ b/board/bugzzy/board.c @@ -17,6 +17,7 @@ #include "cros_board_info.h" #include "driver/accel_lis2ds.h" #include "driver/accelgyro_bmi_common.h" +#include "driver/accelgyro_lsm6dsm.h" #include "driver/bc12/pi3usb9201.h" #include "driver/charger/isl923x.h" #include "driver/tcpm/raa489000.h" @@ -422,6 +423,8 @@ __override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) static struct mutex g_lid_mutex; static struct mutex g_base_mutex; +static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; + /* Matrices to rotate accelerometers into the standard reference. */ static const mat33_fp_t lid_standard_ref = { { 0, FLOAT_TO_FP(1), 0}, @@ -435,6 +438,58 @@ static const mat33_fp_t base_standard_ref = { { 0, 0, FLOAT_TO_FP(-1)} }; +struct motion_sensor_t ldm6dsm_base_accel = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_ACCEL), + .int_signal = GPIO_BASE_SIXAXIS_INT_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, +}; +struct motion_sensor_t ldm6dsm_base_gyro = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_GYRO), + .int_signal = GPIO_BASE_SIXAXIS_INT_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .default_range = 1000 | ROUND_UP_FLAG, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + +}; + static struct stprivate_data g_lis2ds_data; static struct bmi_drv_data_t g_bmi160_data; @@ -511,6 +566,39 @@ struct motion_sensor_t motion_sensors[] = { const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); +enum base_accelgyro_type { + BASE_GYRO_NONE = 0, + BASE_GYRO_BMI160 = 1, + BASE_GYRO_LSM6DSM = 2, +}; + +static enum base_accelgyro_type base_accelgyro_config; +static void board_set_motionsensor(void) +{ + if (board_id == -1) { + uint32_t val; + + if (cbi_get_board_version(&val) == EC_SUCCESS) + board_id = val; + } + + base_accelgyro_config = BASE_GYRO_BMI160; + if (board_id > 6) { + motion_sensors[BASE_ACCEL] = ldm6dsm_base_accel; + motion_sensors[BASE_GYRO] = ldm6dsm_base_gyro; + base_accelgyro_config = BASE_GYRO_LSM6DSM; + } +} +DECLARE_HOOK(HOOK_INIT, board_set_motionsensor, HOOK_PRIO_INIT_I2C + 2); + +void motion_interrupt(enum gpio_signal signal) +{ + if (base_accelgyro_config == BASE_GYRO_BMI160) + bmi160_interrupt(signal); + else + lsm6dsm_interrupt(signal); +} + __override void ocpc_get_pid_constants(int *kp, int *kp_div, int *ki, int *ki_div, int *kd, int *kd_div) @@ -734,7 +822,6 @@ static void panel_power_change_deferred(void) if (cbi_get_board_version(&val) == EC_SUCCESS) board_id = val; } - if (board_id < 4) { gpio_set_level(GPIO_EN_LCD_ENP, signal); msleep(1); @@ -747,7 +834,6 @@ static void panel_power_change_deferred(void) i2c_write8(I2C_PORT_LCD, I2C_ADDR_ISL98607_FLAGS, ISL98607_REG_VP_OUT, ISL98607_VP_OUT_5P5); } - gpio_set_level(GPIO_TSP_TA, signal & extpower_is_present()); } DECLARE_DEFERRED(panel_power_change_deferred); @@ -758,6 +844,43 @@ void panel_power_change_interrupt(enum gpio_signal signal) hook_call_deferred(&panel_power_change_deferred_data, 1 * MSEC); } +/* + * Detect LCD reset & control LCD DCDC power + */ +static void lcd_reset_detect_init(void) +{ + if (board_id == -1) { + uint32_t val; + + if (cbi_get_board_version(&val) == EC_SUCCESS) + board_id = val; + } + + if (board_id < 4) + return; + gpio_enable_interrupt(GPIO_DDI0_DDC_SCL); +} +DECLARE_HOOK(HOOK_INIT, lcd_reset_detect_init, HOOK_PRIO_DEFAULT); +/* + * Handle VSP / VSN for mipi display when lcd turns off + */ +static void lcd_reset_change_deferred(void) +{ + int signal = gpio_get_level(GPIO_DDI0_DDC_SCL); + + if (signal != 0) + return; + + i2c_write8(I2C_PORT_LCD, I2C_ADDR_ISL98607_FLAGS, + ISL98607_REG_ENABLE, ISL97607_VP_VN_VBST_DIS); + +} +DECLARE_DEFERRED(lcd_reset_change_deferred); +void lcd_reset_change_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&lcd_reset_change_deferred_data, 10 * MSEC); +} + /** * Handle TSP_TA according to AC status */ @@ -798,7 +921,7 @@ void backlit_gpio_tick(void) if (board_id >= 4 && signal == 1) i2c_write16(I2C_PORT_LCD, I2C_ADDR_MP3372_FLAGS, MP3372_REG_ISET_CHEN, - MP3372_ISET_21P8_CHEN_ALL); + MP3372_ISET_19P4_CHEN_ALL); } DECLARE_HOOK(HOOK_TICK, backlit_gpio_tick, HOOK_PRIO_DEFAULT); diff --git a/board/bugzzy/board.h b/board/bugzzy/board.h index 617d99ea1d..9b9f6cf015 100644 --- a/board/bugzzy/board.h +++ b/board/bugzzy/board.h @@ -125,6 +125,11 @@ #define I2C_ADDR_MP3372_FLAGS 0x28 /* ISL98607 registers and value */ +/* Enable VP / VN / VBST */ +#define ISL98607_REG_ENABLE 0x05 +#define ISL98607_VP_VN_VBST_EN 0x07 +#define ISL97607_VP_VN_VBST_DIS 0x00 + /* VBST Voltage Adjustment */ #define ISL98607_REG_VBST_OUT 0x06 #define ISL98607_VBST_OUT_5P65 0x0a @@ -141,6 +146,7 @@ /* ISET & CHEN */ #define MP3372_REG_ISET_CHEN 0x00 #define MP3372_ISET_21P8_CHEN_ALL 0x70ff +#define MP3372_ISET_19P4_CHEN_ALL 0x63ff /* * I2C pin names for baseboard * @@ -166,6 +172,10 @@ #define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) +#define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ +#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + #define CONFIG_LID_ANGLE #define CONFIG_LID_ANGLE_UPDATE #define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL @@ -222,5 +232,7 @@ enum battery_type { }; void panel_power_change_interrupt(enum gpio_signal signal); +void lcd_reset_change_interrupt(enum gpio_signal signal); +void motion_interrupt(enum gpio_signal signal); #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/bugzzy/gpio.inc b/board/bugzzy/gpio.inc index af69120e22..5c5e4e811b 100644 --- a/board/bugzzy/gpio.inc +++ b/board/bugzzy/gpio.inc @@ -37,9 +37,10 @@ GPIO_INT(VOLUP_BTN_ODL, PIN(7, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button /* Other interrupts */ GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH, lid_interrupt) GPIO_INT(EC_WP_OD, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(BASE_SIXAXIS_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi160_interrupt) +GPIO_INT(BASE_SIXAXIS_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, motion_interrupt) GPIO_INT(LID_360_L, PIN(9, 5), GPIO_INT_FALLING | GPIO_SEL_1P8V, lis2ds_interrupt) GPIO_INT(EN_PP1800_PANEL_S0, PIN(4, 1), GPIO_INT_BOTH, panel_power_change_interrupt) +GPIO_INT(DDI0_DDC_SCL, PIN(6, 0), GPIO_INT_FALLING, lcd_reset_change_interrupt) /* I2C Ports */ GPIO(EC_I2C_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) @@ -133,7 +134,6 @@ GPIO(GPIO32_NC, PIN(3, 2), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIO35_NC, PIN(3, 5), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIO50_NC, PIN(5, 0), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIO57_NC, PIN(5, 7), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(GPIO60_NC, PIN(6, 0), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIO80_NC, PIN(8, 0), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIO81_NC, PIN(8, 1), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(GPIOC0_NC, PIN(C, 0), GPIO_INPUT | GPIO_PULL_DOWN) diff --git a/board/burnet/battery.c b/board/burnet/battery.c index 35a2ebc7df..2a465df227 100644 --- a/board/burnet/battery.c +++ b/board/burnet/battery.c @@ -34,6 +34,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Dynapack CosMX Battery Information */ @@ -62,6 +63,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Simplo CosMX Battery Information */ @@ -90,6 +92,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Simplo HIGHPOWER Battery Information */ @@ -118,6 +121,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Samsung SDI Battery Information */ @@ -146,6 +150,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* CosMX Battery Information */ @@ -174,6 +179,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, }; diff --git a/board/burnet/board.c b/board/burnet/board.c index d932624b0a..f98955a19d 100644 --- a/board/burnet/board.c +++ b/board/burnet/board.c @@ -567,25 +567,3 @@ static void board_chipset_shutdown(void) gpio_set_level(GPIO_EN_USBA_5V, 0); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/burnet/board.h b/board/burnet/board.h index 009da83ac5..f59d3d5972 100644 --- a/board/burnet/board.h +++ b/board/burnet/board.h @@ -24,6 +24,8 @@ #define CONFIG_BATTERY_HW_PRESENT_CUSTOM #define CONFIG_BATTERY_VENDOR_PARAM +#define CONFIG_BATTERY_V2 +#define CONFIG_BATTERY_COUNT 1 #define CONFIG_CHARGER_PSYS @@ -45,6 +47,9 @@ #define CONFIG_USB_MUX_IT5205 +/* Disable verbose output in EC pd */ +#define CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE + /* Motion Sensors */ #ifndef VARIANT_KUKUI_NO_SENSORS #define CONFIG_ACCEL_BMA255 /* Lid accel */ @@ -84,7 +89,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/cerise/board.h b/board/cerise/board.h index 5cf8c06f01..ce2b692ae8 100644 --- a/board/cerise/board.h +++ b/board/cerise/board.h @@ -86,7 +86,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/cherry/board.c b/board/cherry/board.c index 8e456e2c80..35dae9ed36 100644 --- a/board/cherry/board.c +++ b/board/cherry/board.c @@ -170,5 +170,10 @@ static void board_init(void) pwm_enable(PWM_CH_LED2, 0); board_update_motion_sensor_config(); + + if (board_get_version() >= 2) { + gpio_set_flags(GPIO_I2C_H_SCL, GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_I2C_H_SDA, GPIO_INPUT | GPIO_PULL_DOWN); + } } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/board/cherry/board.h b/board/cherry/board.h index 9db5042085..cafe99da3f 100644 --- a/board/cherry/board.h +++ b/board/cherry/board.h @@ -15,6 +15,7 @@ /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED #define CONFIG_LTO +#define CONFIG_PRESERVE_LOGS /* * TODO: Remove this option once the VBAT no longer keeps high when diff --git a/board/cherry/gpio.inc b/board/cherry/gpio.inc index 8213d74cea..296e3a418e 100644 --- a/board/cherry/gpio.inc +++ b/board/cherry/gpio.inc @@ -77,8 +77,7 @@ GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_ /* USB and USBC Signals */ GPIO(DP_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) -/* TODO: Turn off in S3 */ -GPIO(DP_DEMUX_EN, PIN(G, 1), GPIO_OUT_HIGH) +GPIO(DP_DEMUX_EN, PIN(G, 1), GPIO_OUT_LOW) GPIO(EC_AP_DP_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH) GPIO(EN_PP5000_USB_A0_VBUS_X,PIN(B, 7), GPIO_OUT_LOW) GPIO(USB_C0_DP_IN_HPD, PIN(H, 4), GPIO_OUT_LOW) @@ -121,7 +120,7 @@ ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ ALTERNATE(PIN_MASK(A, 0b1111), 1, MODULE_PWM, 0) /* PWM 0,1,2,3 */ /* ADC */ -ALTERNATE(PIN_MASK(I, 0xCF), 0, MODULE_ADC, 0) /* ADC 0,1,2,3,6,7 */ +ALTERNATE(PIN_MASK(I, 0b11001001), 0, MODULE_ADC, 0) /* ADC 0,3,6,7 */ /* SPI */ ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ @@ -138,23 +137,28 @@ GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) */ #ifdef BOARD_CHERRY GPIO(NC_GPI5, PIN(I, 5), GPIO_OUT_LOW) +#else +GPIO(NC_GPJ4, PIN(J, 4), GPIO_INPUT | GPIO_PULL_DOWN) #endif /* NC pins, enable internal pull-up/down to avoid floating state. */ -GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPA1, PIN(A, 1), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(PWM7, PIN(A, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(EC_NVME_PLN_ODL, PIN(D, 7), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) +GPIO(PG_NVME_OD, PIN(H, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(EN_PP2500_NVME_X, PIN(J, 2), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(EN_PP1200_NVME_X, PIN(J, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) /* - * These 4 pins don't have internal pull-down capability, + * These pins don't have internal pull-down capability, * so we set them as output low. */ GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) +GPIO(EC_ID0, PIN(I, 1), GPIO_OUT_LOW) +GPIO(EC_ID1, PIN(I, 2), GPIO_OUT_LOW) /* Other unused pins */ -GPIO(PWM7, PIN(A, 7), GPIO_INPUT) -GPIO(EC_NVME_PLN_ODL, PIN(D, 7), GPIO_INPUT) GPIO(NVME_EC_PLA_S3_ODL, PIN(I, 7), GPIO_INPUT) -GPIO(EN_PP2500_NVME_X, PIN(J, 2), GPIO_INPUT) -GPIO(EN_PP1200_NVME_X, PIN(J, 3), GPIO_INPUT) -GPIO(PG_NVME_OD, PIN(H, 3), GPIO_INPUT) diff --git a/board/cherry/led.c b/board/cherry/led.c index 43c4e45b86..c177a1b48f 100644 --- a/board/cherry/led.c +++ b/board/cherry/led.c @@ -21,7 +21,9 @@ __override struct led_descriptor [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, + [STATE_CHARGING_FULL_S5] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, [STATE_DISCHARGE_S0] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, + [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, [STATE_DISCHARGE_S3] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, {LED_OFF, 3 * LED_ONE_SEC} }, [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, diff --git a/board/cherry_scp/ec.tasklist b/board/cherry_scp/ec.tasklist index f0e97e0ffe..98f5d57327 100644 --- a/board/cherry_scp/ec.tasklist +++ b/board/cherry_scp/ec.tasklist @@ -11,7 +11,7 @@ TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(VDEC_SERVICE, vdec_service_task, NULL, TRENTA_TASK_STACK_SIZE) \ - TASK_ALWAYS(VDEC_CORE_SERVICE, vdec_core_service_task, NULL, TRENTA_TASK_STACK_SIZE) \ + TASK_ALWAYS(VDEC_SERVICE, vdec_service_task, NULL, 4096) \ + TASK_ALWAYS(VDEC_CORE_SERVICE, vdec_core_service_task, NULL, 4096) \ TASK_ALWAYS(VENC_SERVICE, venc_service_task, NULL, TRENTA_TASK_STACK_SIZE) \ - TASK_ALWAYS(MDP_SERVICE, mdp_service_task, NULL, TRENTA_TASK_STACK_SIZE) + TASK_ALWAYS(MDP_SERVICE, mdp_service_task, NULL, 4096) diff --git a/board/chronicler/board.c b/board/chronicler/board.c index c86ad462e1..af352e1e1e 100644 --- a/board/chronicler/board.c +++ b/board/chronicler/board.c @@ -66,34 +66,46 @@ const struct fan_t fans[FAN_CH_COUNT] = { * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (80 C) */ -const static struct ec_thermal_config thermal_config_without_fan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(77), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CONFIG_WITHOUT_FAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(77), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config + thermal_config_without_fan = THERMAL_CONFIG_WITHOUT_FAN; -const static struct ec_thermal_config thermal_config_with_fan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(77), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - /* For real temperature fan_table (0 ~ 99C) */ - .temp_fan_off = C_TO_K(0), - .temp_fan_max = C_TO_K(99), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CONFIG_WITH_FAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(77), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + /* For real temperature fan_table (0 ~ 99C) */ \ + .temp_fan_off = C_TO_K(0), \ + .temp_fan_max = C_TO_K(99), \ + } +__maybe_unused static const struct ec_thermal_config thermal_config_with_fan = + THERMAL_CONFIG_WITH_FAN; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_config_with_fan, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_config_without_fan, - [TEMP_SENSOR_3_DDR_SOC] = thermal_config_without_fan, - [TEMP_SENSOR_4_FAN] = thermal_config_without_fan, + [TEMP_SENSOR_1_CHARGER] = THERMAL_CONFIG_WITH_FAN, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_CONFIG_WITHOUT_FAN, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CONFIG_WITHOUT_FAN, + [TEMP_SENSOR_4_FAN] = THERMAL_CONFIG_WITHOUT_FAN, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/coachz/battery.c b/board/coachz/battery.c index 56c89b655b..a5be64df0f 100644 --- a/board/coachz/battery.c +++ b/board/coachz/battery.c @@ -60,6 +60,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* COSMX GH02047XL */ @@ -89,6 +90,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* COSMX DS02032XL */ @@ -118,6 +120,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* SMP DS02032XL */ @@ -147,6 +150,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, }; diff --git a/board/coachz/board.c b/board/coachz/board.c index d1f31a64c3..81a749c1d1 100644 --- a/board/coachz/board.c +++ b/board/coachz/board.c @@ -718,25 +718,3 @@ uint16_t tcpc_get_alert_status(void) return status; } - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/coffeecake/board.h b/board/coffeecake/board.h index d655466a14..cabbb0bf4e 100644 --- a/board/coffeecake/board.h +++ b/board/coffeecake/board.h @@ -32,7 +32,7 @@ #define CONFIG_RWSIG #define CONFIG_RWSIG_TYPE_USBPD1 #define CONFIG_SHA256 -/* TODO(tbroch) Re-enable once STM spi master can be inhibited at boot so it +/* TODO(tbroch) Re-enable once STM spi controller can be inhibited at boot so it doesn't interfere with HDMI loading its f/w */ #undef CONFIG_SPI_FLASH #define CONFIG_SPI_CS_GPIO GPIO_PD_MCDP_SPI_CS_L diff --git a/board/coffeecake/build.mk b/board/coffeecake/build.mk index fb5a6fccdb..59ca88486b 100644 --- a/board/coffeecake/build.mk +++ b/board/coffeecake/build.mk @@ -14,4 +14,4 @@ CHIP_VARIANT:=stm32f07x test-list-y= board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o diff --git a/board/coffeecake/usb_pd_pdo.c b/board/coffeecake/usb_pd_pdo.c new file mode 100644 index 0000000000..a766d7dbe5 --- /dev/null +++ b/board/coffeecake/usb_pd_pdo.c @@ -0,0 +1,26 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS_EXT (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP | PDO_FIXED_UNCONSTRAINED) + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP) + +const uint32_t pd_src_pdo[] = { + [PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS_EXT), + [PDO_IDX_9V] = PDO_FIXED(9000, 2500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); +BUILD_ASSERT(ARRAY_SIZE(pd_src_pdo) == PDO_IDX_COUNT); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/coffeecake/usb_pd_pdo.h b/board/coffeecake/usb_pd_pdo.h new file mode 100644 index 0000000000..f695defddb --- /dev/null +++ b/board/coffeecake/usb_pd_pdo.h @@ -0,0 +1,25 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_COFFEECAKE_USB_PD_PDO_H +#define __CROS_EC_BOARD_COFFEECAKE_USB_PD_PDO_H + +#include "stdint.h" + +/* Voltage indexes for the PDOs */ +enum volt_idx { + PDO_IDX_5V = 0, + PDO_IDX_9V = 1, + /* TODO: add PPS support */ + PDO_IDX_COUNT +}; + +extern const uint32_t pd_src_pdo[2]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[1]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_COFFEECAKE_USB_PD_PDO_H */ diff --git a/board/coffeecake/usb_pd_policy.c b/board/coffeecake/usb_pd_policy.c index dc19207a0e..c8c74688a8 100644 --- a/board/coffeecake/usb_pd_policy.c +++ b/board/coffeecake/usb_pd_policy.c @@ -18,40 +18,13 @@ #include "usb_api.h" #include "usb_bb.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #include "util.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS_EXT (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP | PDO_FIXED_UNCONSTRAINED) - -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP) - - -/* Voltage indexes for the PDOs */ -enum volt_idx { - PDO_IDX_5V = 0, - PDO_IDX_9V = 1, - /* TODO: add PPS support */ - PDO_IDX_COUNT -}; - -/* PDOs */ -const uint32_t pd_src_pdo[] = { - [PDO_IDX_5V] = PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS_EXT), - [PDO_IDX_9V] = PDO_FIXED(9000, 2500, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); -BUILD_ASSERT(ARRAY_SIZE(pd_src_pdo) == PDO_IDX_COUNT); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - /* Holds valid object position (opos) for entered mode */ static int alt_mode[PD_AMODE_COUNT]; diff --git a/board/collis/board.c b/board/collis/board.c index 42a0f1469a..3076c2692f 100644 --- a/board/collis/board.c +++ b/board/collis/board.c @@ -176,17 +176,22 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -199,24 +204,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/copano/board.c b/board/copano/board.c index 9a20eee45f..efcde2c177 100644 --- a/board/copano/board.c +++ b/board/copano/board.c @@ -177,17 +177,22 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -200,24 +205,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/coral/board.h b/board/coral/board.h index 0def402993..bac1a2c5f5 100644 --- a/board/coral/board.h +++ b/board/coral/board.h @@ -105,7 +105,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/coral/gpio.inc b/board/coral/gpio.inc index 8e52eeeed2..da15615c86 100644 --- a/board/coral/gpio.inc +++ b/board/coral/gpio.inc @@ -62,7 +62,7 @@ GPIO(EC_I2C_POWER_SCL, PIN(D, 1), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOST_INTERFACE_SHI option. */ GPIO(PCH_SMI_L, PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ @@ -161,7 +161,7 @@ ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* GPIOB5-B4 for EC_I2C_USB_C0_PD ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* GPOPB3-B2 for EC_I2C_USB_C1_PD_SDA/SCL */ ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* GPIOD1-D0 for EC_I2C_POWER_SDA/SCL */ -ALTERNATE(PIN(B, 6), 3, MODULE_PWM, 0) /* PWM KB Backlight */ +ALTERNATE(PIN_MASK(B, BIT(6)), 3, MODULE_PWM, 0) /* PWM KB Backlight */ /* FIXME: Make UART RX an interrupt? */ ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* UART from EC to Servo */ diff --git a/board/corori/board.c b/board/corori/board.c index 1ecbeeff25..03f9641d9f 100644 --- a/board/corori/board.c +++ b/board/corori/board.c @@ -165,31 +165,41 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(73), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(73), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/cret/battery.c b/board/cret/battery.c index 8b6205eda5..ee5def4183 100644 --- a/board/cret/battery.c +++ b/board/cret/battery.c @@ -46,8 +46,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -78,8 +78,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -141,8 +141,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -173,8 +173,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -206,8 +206,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -238,8 +238,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -270,8 +270,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -302,8 +302,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -334,8 +334,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -366,8 +366,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -429,8 +429,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -461,8 +461,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -550,9 +550,9 @@ const struct board_batt_params board_battery_info[] = { .reg_data = { 0x0010, 0x0010 }, }, .fet = { - .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_addr = 0x0, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } diff --git a/board/dalboz/board.c b/board/dalboz/board.c index 8b1dc01b39..5e65298b82 100644 --- a/board/dalboz/board.c +++ b/board/dalboz/board.c @@ -175,8 +175,8 @@ struct motion_sensor_t motion_sensors[] = { unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); /* These IO expander GPIOs vary with DB option. */ -enum gpio_signal IOEX_USB_A1_RETIMER_EN = IOEX_USB_A1_RETIMER_EN_OPT1; -enum gpio_signal IOEX_USB_A1_CHARGE_EN_DB_L = IOEX_USB_A1_CHARGE_EN_DB_L_OPT1; +enum ioex_signal IOEX_USB_A1_RETIMER_EN = IOEX_USB_A1_RETIMER_EN_OPT1; +enum ioex_signal IOEX_USB_A1_CHARGE_EN_DB_L = IOEX_USB_A1_CHARGE_EN_DB_L_OPT1; static void pcal6408_handler(void) { diff --git a/board/dalboz/board.h b/board/dalboz/board.h index eecdc72d41..419ce6f913 100644 --- a/board/dalboz/board.h +++ b/board/dalboz/board.h @@ -195,8 +195,8 @@ static inline bool ec_config_has_hdmi_retimer_pi3hdx1204(void) } /* These IO expander GPIOs vary with DB option. */ -extern enum gpio_signal IOEX_USB_A1_RETIMER_EN; -extern enum gpio_signal IOEX_USB_A1_CHARGE_EN_DB_L; +extern enum ioex_signal IOEX_USB_A1_RETIMER_EN; +extern enum ioex_signal IOEX_USB_A1_CHARGE_EN_DB_L; void board_reset_pd_mcu(void); diff --git a/board/damu/board.h b/board/damu/board.h index 6df8bb2a7a..f127df251f 100644 --- a/board/damu/board.h +++ b/board/damu/board.h @@ -85,7 +85,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/delbin/board.c b/board/delbin/board.c index 5984c4d157..92c5ebe839 100644 --- a/board/delbin/board.c +++ b/board/delbin/board.c @@ -111,17 +111,22 @@ const struct fan_t fans[FAN_CH_COUNT] = { * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(65), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(65), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -134,24 +139,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(65), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(65), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/dewatt/battery.c b/board/dewatt/battery.c index ddf3adff50..40d5f930e3 100644 --- a/board/dewatt/battery.c +++ b/board/dewatt/battery.c @@ -30,57 +30,25 @@ * address, mask, and disconnect value need to be provided. */ const struct board_batt_params board_battery_info[] = { - /* AEC 5477109 */ - [BATTERY_AEC] = { + /* AP19B8M */ + [BATTERY_AP19B8M] = { .fuel_gauge = { - .manuf_name = "AEC", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, - }, - .sleep_mode = { - .sleep_supported = true, - .reg_addr = 0x00, - .reg_data = 0x0011, - }, - .fet = { - .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, - } - }, - .batt_info = { - .voltage_max = 8700, /* mV */ - .voltage_normal = 7600, - .voltage_min = 6000, - .precharge_current = 100, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 50, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, - /* AP18F4M / LIS4163ACPC */ - [BATTERY_AP18F4M] = { - .fuel_gauge = { - .manuf_name = "Murata KT00404001", + .manuf_name = "LGC KT0030G024", .ship_mode = { .reg_addr = 0x3A, .reg_data = { 0xC574, 0xC574 }, }, .fet = { - .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_addr = 0x43, + .reg_mask = 0x0001, + .disconnect_val = 0x0, } }, .batt_info = { - .voltage_max = 8700, /* mV */ - .voltage_normal = 7600, - .voltage_min = 5500, - .precharge_current = 256, /* mA */ + .voltage_max = 13350, + .voltage_normal = 11610, + .voltage_min = 9000, + .precharge_current = 256, .start_charging_min_c = 0, .start_charging_max_c = 50, .charging_min_c = 0, @@ -89,39 +57,7 @@ const struct board_batt_params board_battery_info[] = { .discharging_max_c = 75, }, }, - /* POW-TECH Battery Information */ - [BATTERY_POWER_TECH] = { - .fuel_gauge = { - .manuf_name = "POW-TECH", - .ship_mode = { - .reg_addr = 0x0, - .reg_data = { 0x10, 0x10 }, - }, - .sleep_mode = { - .sleep_supported = true, - .reg_addr = 0x00, - .reg_data = 0x0011, - }, - .fet = { - .reg_addr = 0x00, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7700, - .voltage_min = 6000, - .precharge_current = 88, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, }; BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_AP18F4M; +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_AP19B8M; diff --git a/board/dewatt/board.c b/board/dewatt/board.c index 53180d39cb..60c2bba17a 100644 --- a/board/dewatt/board.c +++ b/board/dewatt/board.c @@ -22,6 +22,7 @@ #include "extpower.h" #include "gpio.h" #include "hooks.h" +#include "keyboard_8042.h" #include "keyboard_scan.h" #include "lid_switch.h" #include "power.h" @@ -534,3 +535,27 @@ static int board_get_memory_temp(int idx, int *temp_k) return EC_ERROR_NOT_POWERED; return get_temp_3v3_30k9_47k_4050b(idx, temp_k); } + +/* keyboard config */ +static const struct ec_response_keybd_config main_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config +*board_vivaldi_keybd_config(void) +{ + return &main_kb; +} diff --git a/board/dewatt/board.h b/board/dewatt/board.h index f5c47718d5..67f30a648b 100644 --- a/board/dewatt/board.h +++ b/board/dewatt/board.h @@ -15,6 +15,7 @@ /* Keyboard features */ #define CONFIG_KEYBOARD_FACTORY_TEST +#define CONFIG_KEYBOARD_REFRESH_ROW3 /* Sensors */ #define CONFIG_ACCELGYRO_BMI160 @@ -37,6 +38,12 @@ #define CONFIG_USB_MUX_ANX7451 #define CONFIG_USBC_RETIMER_ANX7451 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_CURRENT_MA 3250 +#define PD_MAX_VOLTAGE_MV 20000 +/* Max Power = 65 W */ +#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000) + /* USB Type A Features */ /* BC 1.2 */ @@ -49,6 +56,9 @@ #define CONFIG_LED_COMMON #define CONFIG_LED_ONOFF_STATES +/* Thermal Config */ +#define CONFIG_TEMP_SENSOR_TMP112 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" @@ -59,9 +69,7 @@ void motion_interrupt(enum gpio_signal signal); /* Battery Types */ enum battery_type { - BATTERY_AEC, - BATTERY_AP18F4M, - BATTERY_POWER_TECH, + BATTERY_AP19B8M, BATTERY_TYPE_COUNT, }; diff --git a/board/dingdong/build.mk b/board/dingdong/build.mk index 18799c3b9f..71cea3f845 100644 --- a/board/dingdong/build.mk +++ b/board/dingdong/build.mk @@ -11,4 +11,4 @@ CHIP_FAMILY:=stm32f0 CHIP_VARIANT:=stm32f07x board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o diff --git a/board/dingdong/usb_pd_pdo.c b/board/dingdong/usb_pd_pdo.c new file mode 100644 index 0000000000..990c2de5ab --- /dev/null +++ b/board/dingdong/usb_pd_pdo.c @@ -0,0 +1,20 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS PDO_FIXED_COMM_CAP + +/* Source PDOs */ +const uint32_t pd_src_pdo[] = {}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +/* Fake PDOs : we just want our pre-defined voltages */ +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/dingdong/usb_pd_pdo.h b/board/dingdong/usb_pd_pdo.h new file mode 100644 index 0000000000..66bb713ee8 --- /dev/null +++ b/board/dingdong/usb_pd_pdo.h @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_DINGDONG_USB_PD_PDO_H +#define __CROS_EC_BOARD_DINGDONG_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[0]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[1]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_DINGDONG_USB_PD_PDO_H */ diff --git a/board/dingdong/usb_pd_policy.c b/board/dingdong/usb_pd_policy.c index 50700f8a62..9bcc7f806f 100644 --- a/board/dingdong/usb_pd_policy.c +++ b/board/dingdong/usb_pd_policy.c @@ -23,18 +23,6 @@ #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS PDO_FIXED_COMM_CAP - -/* Source PDOs */ -const uint32_t pd_src_pdo[] = {}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -/* Fake PDOs : we just want our pre-defined voltages */ -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - /* Holds valid object position (opos) for entered mode */ static int alt_mode[PD_AMODE_COUNT]; diff --git a/board/dirinboz/led.c b/board/dirinboz/led.c index 3343d0f924..b05ade3bcc 100644 --- a/board/dirinboz/led.c +++ b/board/dirinboz/led.c @@ -38,7 +38,7 @@ enum led_port { static void led_set_color_battery(int port, enum led_color color) { - enum gpio_signal amber_led, white_led; + int amber_led, white_led; uint32_t board_ver = 0; int led_batt_on_lvl, led_batt_off_lvl; diff --git a/board/discovery-stm32f072/board.h b/board/discovery-stm32f072/board.h index d3f51f6691..78d1b25b47 100644 --- a/board/discovery-stm32f072/board.h +++ b/board/discovery-stm32f072/board.h @@ -51,7 +51,7 @@ /* Enable control of SPI over USB */ #define CONFIG_SPI_CONTROLLER -#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */ +#define CONFIG_SPI_FLASH_PORT 0 /* First SPI controller port */ #define CONFIG_USB_SPI diff --git a/board/dooly/board.c b/board/dooly/board.c index 50cc9fd647..5f854ca647 100644 --- a/board/dooly/board.c +++ b/board/dooly/board.c @@ -627,23 +627,28 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* Thermal control; drive fan based on temperature sensors. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(78), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(41), - .temp_fan_max = C_TO_K(72), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(78), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(41), \ + .temp_fan_max = C_TO_K(72), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1] = thermal_a, + [TEMP_SENSOR_1] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/dooly/board.h b/board/dooly/board.h index 4e0f4a5481..d5baf98410 100644 --- a/board/dooly/board.h +++ b/board/dooly/board.h @@ -73,7 +73,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/drallion_ish/board.h b/board/drallion_ish/board.h index dab93426a6..53da677775 100644 --- a/board/drallion_ish/board.h +++ b/board/drallion_ish/board.h @@ -60,7 +60,7 @@ #define CONFIG_DMA_PAGING /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI /* I2C ports */ #define I2C_PORT_SENSOR ISH_I2C0 diff --git a/board/dratini/board.c b/board/dratini/board.c index 53fbe4b3d5..a32dfe9104 100644 --- a/board/dratini/board.c +++ b/board/dratini/board.c @@ -343,35 +343,45 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* Dratini Temperature sensors */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(73), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(70), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(73), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(70), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - [EC_TEMP_THRESH_HALT] = C_TO_K(70), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(70), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/dratini/board.h b/board/dratini/board.h index 12074e3447..dfa234cb86 100644 --- a/board/dratini/board.h +++ b/board/dratini/board.h @@ -17,7 +17,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 2048 diff --git a/board/drawcia_riscv/battery.c b/board/drawcia_riscv/battery.c new file mode 100644 index 0000000000..4aa0f49043 --- /dev/null +++ b/board/drawcia_riscv/battery.c @@ -0,0 +1,349 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery_fuel_gauge.h" +#include "charge_state.h" +#include "common.h" + +/* + * Battery info for all drawcia battery types. Note that the fields + * start_charging_min/max and charging_min/max are not used for the charger. + * The effective temperature limits are given by discharging_min/max_c. + * + * Fuel Gauge (FG) parameters which are used for determining if the battery + * is connected, the appropriate ship mode (battery cutoff) command, and the + * charge/discharge FETs status. + * + * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery + * register. For some batteries, the charge/discharge FET bits are set when + * charging/discharging is active, in other types, these bits set mean that + * charging/discharging is disabled. Therefore, in addition to the mask for + * these bits, a disconnect value must be specified. Note that for TI fuel + * gauge, the charge/discharge FET status is found in Operation Status (0x54), + * but a read of Manufacturer Access (0x00) will return the lower 16 bits of + * Operation status which contains the FET status bits. + * + * The assumption for battery types supported is that the charge/discharge FET + * status can be read with a sb_read() command and therefore, only the register + * address, mask, and disconnect value need to be provided. + */ +const struct board_batt_params board_battery_info[] = { + /* DynaPack CosMX Battery Information */ + [BATTERY_DYNAPACK_COS] = { + .fuel_gauge = { + .manuf_name = "333-2C-DA-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* DynaPack ATL Battery Information */ + [BATTERY_DYNAPACK_ATL] = { + .fuel_gauge = { + .manuf_name = "333-27-DA-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* DynaPack HIGHPOWER Battery Information */ + [BATTERY_DYNAPACK_HIGHPOWER] = { + .fuel_gauge = { + .manuf_name = "333-2D-0D-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* DynaPack BYD Battery Information */ + [BATTERY_DYNAPACK_BYD] = { + .fuel_gauge = { + .manuf_name = "333-2E-0D-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* Samsung SDI Battery Information */ + [BATTERY_SAMSUNG_SDI] = { + .fuel_gauge = { + .manuf_name = "333-54-DA-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* Simplo CosMX Battery Information */ + [BATTERY_SIMPLO_COS] = { + .fuel_gauge = { + .manuf_name = "333-1C-DA-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* Simplo HIGHPOWER Battery Information */ + [BATTERY_SIMPLO_HIGHPOWER] = { + .fuel_gauge = { + .manuf_name = "333-1D-DA-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* CosMX Battery Information */ + [BATTERY_COS] = { + .fuel_gauge = { + .manuf_name = "333-AC-0D-A", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* CosMX B00C4473A9D0002 Battery Information */ + [BATTERY_COS_2] = { + .fuel_gauge = { + .manuf_name = "333-AC-DA-A", + .ship_mode = { + .reg_addr = 0x0, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x0, + .reg_mask = 0x0006, + .disconnect_val = 0x0, + .cfet_mask = 0x0004, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, /* mV */ + .voltage_min = 6000, /* mV */ + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + + /* ATL GB-S20-4473A9-01H&020H Battery Information + * Gauge IC : RAJ240045 + */ + [BATTERY_ATL] = { + .fuel_gauge = { + .manuf_name = "313-B7-0D-A", + .ship_mode = { + .reg_addr = 0x0, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 0, + .reg_addr = 0x43, + .reg_mask = 0x0003, + .disconnect_val = 0x0, + .cfet_mask = 0x0002, + .cfet_off_val = 0x0, + }, + }, + .batt_info = { + .voltage_max = 8800, /* mV */ + .voltage_normal = 7700, /* mV */ + .voltage_min = 6000, /* mV */ + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); + +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_DYNAPACK_COS; diff --git a/board/drawcia_riscv/board.c b/board/drawcia_riscv/board.c new file mode 100644 index 0000000000..ffa7da0bea --- /dev/null +++ b/board/drawcia_riscv/board.c @@ -0,0 +1,723 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Drawcia board-specific configuration */ + +#include "adc_chip.h" +#include "button.h" +#include "cbi_fw_config.h" +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "cros_board_info.h" +#include "driver/accel_bma2x2.h" +#include "driver/accelgyro_lsm6dsm.h" +#include "driver/bc12/pi3usb9201.h" +#include "driver/charger/sm5803.h" +#include "driver/temp_sensor/thermistor.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/tcpm/ps8xxx.h" +#include "driver/usb_mux/it5205.h" +#include "gpio.h" +#include "hooks.h" +#include "intc.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "power.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "switch.h" +#include "system.h" +#include "tablet_mode.h" +#include "task.h" +#include "tcpm/tcpci.h" +#include "tcpm/it8xxx2_pd_public.h" +#include "temp_sensor.h" +#include "uart.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +#define CPRINTUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) + +#define INT_RECHECK_US 5000 + +uint32_t board_version; + +/* GPIO to enable/disable the USB Type-A port. */ +const int usb_port_enable[USB_PORT_COUNT] = { + GPIO_EN_USB_A_5V, +}; + +__override void board_process_pd_alert(int port) +{ + /* + * PD_INT task will process this alert, and that task is only needed on + * C1. + */ + if (port != 1) + return; + + if (gpio_get_level(GPIO_USB_C1_INT_ODL)) + return; + + sm5803_handle_interrupt(port); +} + +/* C0 interrupt line shared by BC 1.2 and charger */ +static void check_c0_line(void); +DECLARE_DEFERRED(check_c0_line); + +static void notify_c0_chips(void) +{ + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); + sm5803_interrupt(0); +} + +static void check_c0_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips + */ + if (!gpio_get_level(GPIO_USB_C0_INT_ODL)) { + notify_c0_chips(); + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); + } +} + +static void usb_c0_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c0_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c0_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c0_line_data, INT_RECHECK_US); +} + +/* C1 interrupt line shared by BC 1.2, TCPC, and charger */ +static void check_c1_line(void); +DECLARE_DEFERRED(check_c1_line); + +static void notify_c1_chips(void) +{ + schedule_deferred_pd_interrupt(1); + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); +} + +static void check_c1_line(void) +{ + /* + * If line is still being held low, see if there's more to process from + * one of the chips. + */ + if (!gpio_get_level(GPIO_USB_C1_INT_ODL)) { + notify_c1_chips(); + hook_call_deferred(&check_c1_line_data, INT_RECHECK_US); + } +} + +static void usb_c1_interrupt(enum gpio_signal s) +{ + /* Cancel any previous calls to check the interrupt line */ + hook_call_deferred(&check_c1_line_data, -1); + + /* Notify all chips using this line that an interrupt came in */ + notify_c1_chips(); + + /* Check the line again in 5ms */ + hook_call_deferred(&check_c1_line_data, INT_RECHECK_US); +} + +static void button_sub_hdmi_hpd_interrupt(enum gpio_signal s) +{ + enum fw_config_db db = get_cbi_fw_config_db(); + int hdmi_hpd = gpio_get_level(GPIO_VOLUP_BTN_ODL_HDMI_HPD); + + if (db == DB_1A_HDMI || db == DB_LTE_HDMI || db == DB_1A_HDMI_LTE) + gpio_set_level(GPIO_EC_AP_USB_C1_HDMI_HPD, hdmi_hpd); + else + button_interrupt(s); +} + +static void c0_ccsbu_ovp_interrupt(enum gpio_signal s) +{ + cprints(CC_USBPD, "C0: CC OVP, SBU OVP, or thermal event"); + pd_handle_cc_overvoltage(0); +} + +static void pen_detect_interrupt(enum gpio_signal s) +{ + int pen_detect = !gpio_get_level(GPIO_PEN_DET_ODL); + + gpio_set_level(GPIO_EN_PP5000_PEN, pen_detect); +} + +/* Must come after other header files and interrupt handler declarations */ +#include "gpio_list.h" + +/* ADC channels */ +const struct adc_t adc_channels[] = { + [ADC_VSNS_PP3300_A] = { + .name = "PP3300_A_PGOOD", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH0 + }, + [ADC_TEMP_SENSOR_1] = { + .name = "TEMP_SENSOR1", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH2 + }, + [ADC_TEMP_SENSOR_2] = { + .name = "TEMP_SENSOR2", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH3 + }, + [ADC_SUB_ANALOG] = { + .name = "SUB_ANALOG", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH13 + }, + [ADC_TEMP_SENSOR_3] = { + .name = "TEMP_SENSOR3", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH15 + }, + [ADC_TEMP_SENSOR_4] = { + .name = "TEMP_SENSOR4", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH16 + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/* BC 1.2 chips */ +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + .flags = PI3USB9201_ALWAYS_POWERED, + }, + { + .i2c_port = I2C_PORT_SUB_USB_C1, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + .flags = PI3USB9201_ALWAYS_POWERED, + }, +}; + +/* Charger chips */ +const struct charger_config_t chg_chips[] = { + [CHARGER_PRIMARY] = { + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = SM5803_ADDR_CHARGER_FLAGS, + .drv = &sm5803_drv, + }, + [CHARGER_SECONDARY] = { + .i2c_port = I2C_PORT_SUB_USB_C1, + .i2c_addr_flags = SM5803_ADDR_CHARGER_FLAGS, + .drv = &sm5803_drv, + }, +}; + +/* TCPCs */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + .drv = &it8xxx2_tcpm_drv, + }, + { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_SUB_USB_C1, + .addr_flags = PS8751_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + }, +}; + +/* USB Muxes */ +const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .usb_port = 0, + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, + .driver = &it5205_usb_mux_driver, + }, + { + .usb_port = 1, + .i2c_port = I2C_PORT_SUB_USB_C1, + .i2c_addr_flags = PS8751_I2C_ADDR1_FLAGS, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + }, +}; + +/* Sensor Mutexes */ +static struct mutex g_lid_mutex; +static struct mutex g_base_mutex; + +/* Sensor Data */ +static struct accelgyro_saved_data_t g_bma253_data; +static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; + +/* Matrix to rotate accelrator into standard reference frame */ +static const mat33_fp_t base_standard_ref = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +static const mat33_fp_t lid_standard_ref = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +/* Drivers */ +struct motion_sensor_t motion_sensors[] = { + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMA255, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &bma2x2_accel_drv, + .mutex = &g_lid_mutex, + .drv_data = &g_bma253_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS, + .rot_standard_ref = &lid_standard_ref, + .default_range = 2, + .min_frequency = BMA255_ACCEL_MIN_FREQ, + .max_frequency = BMA255_ACCEL_MAX_FREQ, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_ACCEL), + .int_signal = GPIO_BASE_SIXAXIS_INT_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g */ + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_GYRO), + .int_signal = GPIO_BASE_SIXAXIS_INT_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .default_range = 1000 | ROUND_UP_FLAG, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + }, +}; + +unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +void board_init(void) +{ + int on; + enum fw_config_db db = get_cbi_fw_config_db(); + + if (db == DB_1A_HDMI || db == DB_LTE_HDMI || db == DB_1A_HDMI_LTE) { + /* Select HDMI option */ + gpio_set_level(GPIO_HDMI_SEL_L, 0); + } else { + /* Select AUX option */ + gpio_set_level(GPIO_HDMI_SEL_L, 1); + } + + gpio_enable_interrupt(GPIO_USB_C0_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_INT_ODL); + + /* Store board version for use in determining charge limits */ + cbi_get_board_version(&board_version); + + /* + * If interrupt lines are already low, schedule them to be processed + * after inits are completed. + */ + if (!gpio_get_level(GPIO_USB_C0_INT_ODL)) + hook_call_deferred(&check_c0_line_data, 0); + if (!gpio_get_level(GPIO_USB_C1_INT_ODL)) + hook_call_deferred(&check_c1_line_data, 0); + + gpio_enable_interrupt(GPIO_USB_C0_CCSBU_OVP_ODL); + + if (get_cbi_fw_config_tablet_mode() == TABLET_MODE_PRESENT) { + motion_sensor_count = ARRAY_SIZE(motion_sensors); + /* Enable Base Accel interrupt */ + gpio_enable_interrupt(GPIO_BASE_SIXAXIS_INT_L); + } else { + motion_sensor_count = 0; + gmr_tablet_switch_disable(); + /* Base accel is not stuffed, don't allow line to float */ + gpio_set_flags(GPIO_BASE_SIXAXIS_INT_L, + GPIO_INPUT | GPIO_PULL_DOWN); + } + + gpio_enable_interrupt(GPIO_PEN_DET_ODL); + + /* Make sure pen detection is triggered or not at sysjump */ + if (!gpio_get_level(GPIO_PEN_DET_ODL)) + gpio_set_level(GPIO_EN_PP5000_PEN, 1); + + /* Charger on the MB will be outputting PROCHOT_ODL and OD CHG_DET */ + sm5803_configure_gpio0(CHARGER_PRIMARY, GPIO0_MODE_PROCHOT, 1); + sm5803_configure_chg_det_od(CHARGER_PRIMARY, 1); + + if (board_get_charger_chip_count() > 1) { + /* Charger on the sub-board will be a push-pull GPIO */ + sm5803_configure_gpio0(CHARGER_SECONDARY, GPIO0_MODE_OUTPUT, 0); + } + + /* Turn on 5V if the system is on, otherwise turn it off */ + on = chipset_in_state(CHIPSET_STATE_ON | CHIPSET_STATE_ANY_SUSPEND | + CHIPSET_STATE_SOFT_OFF); + board_power_5v_enable(on); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +static void board_resume(void) +{ + sm5803_disable_low_power_mode(CHARGER_PRIMARY); + if (board_get_charger_chip_count() > 1) + sm5803_disable_low_power_mode(CHARGER_SECONDARY); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_resume, HOOK_PRIO_DEFAULT); + +static void board_suspend(void) +{ + sm5803_enable_low_power_mode(CHARGER_PRIMARY); + if (board_get_charger_chip_count() > 1) + sm5803_enable_low_power_mode(CHARGER_SECONDARY); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_suspend, HOOK_PRIO_DEFAULT); + +void board_hibernate(void) +{ + /* + * Put all charger ICs present into low power mode before entering + * z-state. + */ + sm5803_hibernate(CHARGER_PRIMARY); + if (board_get_charger_chip_count() > 1) + sm5803_hibernate(CHARGER_SECONDARY); +} + +__override void board_ocpc_init(struct ocpc_data *ocpc) +{ + /* There's no provision to measure Isys */ + ocpc->chg_flags[CHARGER_SECONDARY] |= OCPC_NO_ISYS_MEAS_CAP; +} + +__override void board_pulse_entering_rw(void) +{ + /* + * On the ITE variants, the EC_ENTERING_RW signal was connected to a pin + * which is active high by default. This causes Cr50 to think that the + * EC has jumped to its RW image even though this may not be the case. + * The pin is changed to GPIO_EC_ENTERING_RW2. + */ + gpio_set_level(GPIO_EC_ENTERING_RW, 1); + gpio_set_level(GPIO_EC_ENTERING_RW2, 1); + usleep(MSEC); + gpio_set_level(GPIO_EC_ENTERING_RW, 0); + gpio_set_level(GPIO_EC_ENTERING_RW2, 0); +} + +void board_reset_pd_mcu(void) +{ + /* + * Nothing to do. TCPC C0 is internal, TCPC C1 reset pin is not + * connected to the EC. + */ +} + +__override void board_power_5v_enable(int enable) +{ + /* + * Motherboard has a GPIO to turn on the 5V regulator, but the sub-board + * sets it through the charger GPIO. + */ + gpio_set_level(GPIO_EN_PP5000, !!enable); + + if (board_get_charger_chip_count() > 1) { + if (sm5803_set_gpio0_level(1, !!enable)) + CPRINTUSB("Failed to %sable sub rails!", enable ? + "en" : "dis"); + } +} + +__override uint8_t board_get_usb_pd_port_count(void) +{ + enum fw_config_db db = get_cbi_fw_config_db(); + + if (db == DB_1A_HDMI || db == DB_NONE || db == DB_LTE_HDMI + || db == DB_1A_HDMI_LTE) + return CONFIG_USB_PD_PORT_MAX_COUNT - 1; + else if (db == DB_1C || db == DB_1C_LTE || db == DB_1C_1A + || db == DB_1C_1A_LTE) + return CONFIG_USB_PD_PORT_MAX_COUNT; + + ccprints("Unhandled DB configuration: %d", db); + return 0; +} + +__override uint8_t board_get_charger_chip_count(void) +{ + enum fw_config_db db = get_cbi_fw_config_db(); + + if (db == DB_1A_HDMI || db == DB_NONE || db == DB_LTE_HDMI + || db == DB_1A_HDMI_LTE) + return CHARGER_NUM - 1; + else if (db == DB_1C || db == DB_1C_LTE || db == DB_1C_1A + || db == DB_1C_1A_LTE) + return CHARGER_NUM; + + ccprints("Unhandled DB configuration: %d", db); + return 0; +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * TCPC 0 is embedded in the EC and processes interrupts in the chip + * code (it83xx/intc.c) + */ + + uint16_t status = 0; + int regval; + + /* Check whether TCPC 1 pulled the shared interrupt line */ + if (!gpio_get_level(GPIO_USB_C1_INT_ODL)) { + if (!tcpc_read16(1, TCPC_REG_ALERT, ®val)) { + if (regval) + status = PD_STATUS_TCPC_ALERT_1; + } + } + + return status; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) +{ + int icl = MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT); + + /* Limit C1 on board version 0 to 2.0 A */ + if ((board_version == 0) && (port == 1)) + icl = MIN(icl, 2000); + /* + * TODO(b/151955431): Characterize the input current limit in case a + * scaling needs to be applied here + */ + charge_set_input_current_limit(icl, charge_mv); +} + +int board_set_active_charge_port(int port) +{ + int is_valid_port = (port >= 0 && port < board_get_usb_pd_port_count()); + + if (!is_valid_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + if (port == CHARGE_PORT_NONE) { + CPRINTUSB("Disabling all charge ports"); + + sm5803_vbus_sink_enable(CHARGER_PRIMARY, 0); + + if (board_get_charger_chip_count() > 1) + sm5803_vbus_sink_enable(CHARGER_SECONDARY, 0); + + return EC_SUCCESS; + } + + CPRINTUSB("New chg p%d", port); + + /* + * Ensure other port is turned off, then enable new charge port + */ + if (port == 0) { + if (board_get_charger_chip_count() > 1) + sm5803_vbus_sink_enable(CHARGER_SECONDARY, 0); + sm5803_vbus_sink_enable(CHARGER_PRIMARY, 1); + + } else { + sm5803_vbus_sink_enable(CHARGER_PRIMARY, 0); + sm5803_vbus_sink_enable(CHARGER_SECONDARY, 1); + } + + return EC_SUCCESS; +} + +/* Vconn control for integrated ITE TCPC */ +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* Vconn control is only for port 0 */ + if (port) + return; + + if (cc_pin == USBPD_CC_PIN_1) + gpio_set_level(GPIO_EN_USB_C0_CC1_VCONN, !!enabled); + else + gpio_set_level(GPIO_EN_USB_C0_CC2_VCONN, !!enabled); +} + +__override void typec_set_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int current; + + if (port < 0 || port > board_get_usb_pd_port_count()) + return; + + current = (rp == TYPEC_RP_3A0) ? 3000 : 1500; + + charger_set_otg_current_voltage(port, current, 5000); +} + +/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ +const struct pwm_t pwm_channels[] = { + [PWM_CH_KBLIGHT] = { + .channel = 0, + .flags = PWM_CONFIG_DSLEEP, + .freq_hz = 10000, + } +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +/* Thermistors */ +const struct temp_sensor_t temp_sensors[] = { + [TEMP_SENSOR_1] = {.name = "Memory", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_1}, + [TEMP_SENSOR_2] = {.name = "Ambient", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_2}, + [TEMP_SENSOR_3] = {.name = "Charger", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_3}, + [TEMP_SENSOR_4] = {.name = "5V regular", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_4}, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* This callback disables keyboard when convertibles are fully open */ +__override void lid_angle_peripheral_enable(int enable) +{ + int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON); + + /* + * If the lid is in tablet position via other sensors, + * ignore the lid angle, which might be faulty then + * disable keyboard. + */ + if (tablet_get_mode()) + enable = 0; + + if (enable) { + keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE); + } else { + /* + * Ensure that the chipset is off before disabling the keyboard. + * When the chipset is on, the EC keeps the keyboard enabled and + * the AP decides whether to ignore input devices or not. + */ + if (!chipset_in_s0) + keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE); + } +} + +__override void ocpc_get_pid_constants(int *kp, int *kp_div, + int *ki, int *ki_div, + int *kd, int *kd_div) +{ + *kp = 3; + *kp_div = 20; + + *ki = 3; + *ki_div = 125; + + *kd = 4; + *kd_div = 40; +} + +#ifdef CONFIG_KEYBOARD_FACTORY_TEST +/* + * Map keyboard connector pins to EC GPIO pins for factory test. + * Pins mapped to {-1, -1} are skipped. + * The connector has 24 pins total, and there is no pin 0. + */ +const int keyboard_factory_scan_pins[][2] = { + {-1, -1}, {GPIO_KSO_H, 4}, {GPIO_KSO_H, 0}, {GPIO_KSO_H, 1}, + {GPIO_KSO_H, 3}, {GPIO_KSO_H, 2}, {GPIO_KSO_L, 5}, {GPIO_KSO_L, 6}, + {GPIO_KSO_L, 3}, {GPIO_KSO_L, 2}, {GPIO_KSI, 0}, {GPIO_KSO_L, 1}, + {GPIO_KSO_L, 4}, {GPIO_KSI, 3}, {GPIO_KSI, 2}, {GPIO_KSO_L, 0}, + {GPIO_KSI, 5}, {GPIO_KSI, 4}, {GPIO_KSO_L, 7}, {GPIO_KSI, 6}, + {GPIO_KSI, 7}, {GPIO_KSI, 1}, {-1, -1}, {-1, -1}, {-1, -1}, +}; + +const int keyboard_factory_scan_pins_used = + ARRAY_SIZE(keyboard_factory_scan_pins); +#endif diff --git a/board/drawcia_riscv/board.h b/board/drawcia_riscv/board.h new file mode 100644 index 0000000000..529b8fccdc --- /dev/null +++ b/board/drawcia_riscv/board.h @@ -0,0 +1,159 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Drawcia board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Select Baseboard features */ + +/* + * We can use this define since it will work for IT81302 as well, since + * it is mostly used for TCPM config. + */ +#define VARIANT_DEDEDE_EC_IT8320 +#include "baseboard.h" + +#define CONFIG_LTO + +#undef GPIO_VOLUME_UP_L +#define GPIO_VOLUME_UP_L GPIO_VOLUP_BTN_ODL_HDMI_HPD + +/* Battery */ +#define CONFIG_BATTERY_FUEL_GAUGE + +/* BC 1.2 */ +#define CONFIG_BC12_DETECT_PI3USB9201 + +/* Charger */ +#define CONFIG_CHARGE_RAMP_HW +#define CONFIG_CHARGER_SM5803 /* C0 and C1: Charger */ +#define CONFIG_USB_PD_VBUS_DETECT_CHARGER +#define CONFIG_USB_PD_5V_CHARGER_CTRL +#define CONFIG_CHARGER_OTG +#undef CONFIG_CHARGER_SINGLE_CHIP +#define CONFIG_OCPC +#define CONFIG_OCPC_DEF_RBATT_MOHMS 21 /* R_DS(on) 10.7mOhm + 10mOhm sns rstr */ + +/* PWM */ +#define CONFIG_PWM + +/* Sensors */ +#define CONFIG_ACCEL_BMA255 /* Lid accel */ +#define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ +/* Sensors without hardware FIFO are in forced mode */ +#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ACCEL) + +#define CONFIG_CMD_ACCELS +#define CONFIG_CMD_ACCEL_INFO + +#define CONFIG_ACCEL_INTERRUPTS +/* Enable sensor fifo, must also define the _SIZE and _THRES */ +#define CONFIG_ACCEL_FIFO +/* Power of 2 - Too large of a fifo causes too much timestamp jitter */ +#define CONFIG_ACCEL_FIFO_SIZE 256 +#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) + +#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT + +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_UPDATE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL + +#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +#define CONFIG_TABLET_MODE +#define CONFIG_TABLET_MODE_SWITCH +#define CONFIG_GMR_TABLET_MODE + +/* Keyboard */ +#define CONFIG_KEYBOARD_FACTORY_TEST +#define CONFIG_PWM_KBLIGHT + +/* TCPC */ +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 +#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP /* C0: ITE EC TCPC */ +#define CONFIG_USB_PD_TCPM_PS8705 /* C1: PS8705 TCPC*/ +#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 1 +#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_TCPC_LOW_POWER + +/* Thermistors */ +#define CONFIG_TEMP_SENSOR +#define CONFIG_THERMISTOR +#define CONFIG_STEINHART_HART_3V3_51K1_47K_4050B + +/* USB Mux and Retimer */ +#define CONFIG_USB_MUX_IT5205 /* C1: ITE Mux */ +#define I2C_PORT_USB_MUX I2C_PORT_USB_C0 /* Required for ITE Mux */ + +/* USB Type A Features */ +#define USB_PORT_COUNT 1 +#define CONFIG_USB_PORT_POWER_DUMB + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum chg_id { + CHARGER_PRIMARY, + CHARGER_SECONDARY, + CHARGER_NUM, +}; + +enum pwm_channel { + PWM_CH_KBLIGHT, + PWM_CH_COUNT, +}; + +/* Motion sensors */ +enum sensor_id { + LID_ACCEL, + BASE_ACCEL, + BASE_GYRO, + SENSOR_COUNT +}; + +/* ADC channels */ +enum adc_channel { + ADC_VSNS_PP3300_A, /* ADC0 */ + ADC_TEMP_SENSOR_1, /* ADC2 */ + ADC_TEMP_SENSOR_2, /* ADC3 */ + ADC_SUB_ANALOG, /* ADC13 */ + ADC_TEMP_SENSOR_3, /* ADC15 */ + ADC_TEMP_SENSOR_4, /* ADC16 */ + ADC_CH_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_1, + TEMP_SENSOR_2, + TEMP_SENSOR_3, + TEMP_SENSOR_4, + TEMP_SENSOR_COUNT +}; + +/* List of possible batteries */ +enum battery_type { + BATTERY_DYNAPACK_COS, + BATTERY_DYNAPACK_ATL, + BATTERY_DYNAPACK_HIGHPOWER, + BATTERY_DYNAPACK_BYD, + BATTERY_SAMSUNG_SDI, + BATTERY_SIMPLO_COS, + BATTERY_SIMPLO_HIGHPOWER, + BATTERY_COS, + BATTERY_COS_2, + BATTERY_ATL, + BATTERY_TYPE_COUNT, +}; + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/drawcia_riscv/build.mk b/board/drawcia_riscv/build.mk new file mode 100644 index 0000000000..cf62dfc823 --- /dev/null +++ b/board/drawcia_riscv/build.mk @@ -0,0 +1,17 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# +# Reworked drawcia with it8320 replaced with RISC-V it82302 +# + +CHIP:=it83xx +CHIP_FAMILY:=it8xxx2 +CHIP_VARIANT:=it81302bx_512 +BASEBOARD:=dedede + +board-y=board.o cbi_ssfc.o led.o usb_pd_policy.o +board-$(CONFIG_BATTERY_SMART)+=battery.o diff --git a/board/drawcia_riscv/cbi_ssfc.c b/board/drawcia_riscv/cbi_ssfc.c new file mode 100644 index 0000000000..c4b859f133 --- /dev/null +++ b/board/drawcia_riscv/cbi_ssfc.c @@ -0,0 +1,36 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "cbi_ssfc.h" +#include "common.h" +#include "console.h" +#include "cros_board_info.h" +#include "hooks.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) + +/* Cache SSFC on init since we don't expect it to change in runtime */ +static union dedede_cbi_ssfc cached_ssfc; +BUILD_ASSERT(sizeof(cached_ssfc) == sizeof(uint32_t)); + +static void cbi_ssfc_init(void) +{ + if (cbi_get_ssfc(&cached_ssfc.raw_value) != EC_SUCCESS) + /* Default to 0 when CBI isn't populated */ + cached_ssfc.raw_value = 0; + + CPRINTS("Read CBI SSFC : 0x%04X", cached_ssfc.raw_value); +} +DECLARE_HOOK(HOOK_INIT, cbi_ssfc_init, HOOK_PRIO_FIRST); + +enum ec_ssfc_base_sensor get_cbi_ssfc_base_sensor(void) +{ + return (enum ec_ssfc_base_sensor) cached_ssfc.base_sensor; +} + +enum ec_ssfc_lid_sensor get_cbi_ssfc_lid_sensor(void) +{ + return (enum ec_ssfc_lid_sensor) cached_ssfc.lid_sensor; +} diff --git a/board/drawcia_riscv/cbi_ssfc.h b/board/drawcia_riscv/cbi_ssfc.h new file mode 100644 index 0000000000..935049b6ae --- /dev/null +++ b/board/drawcia_riscv/cbi_ssfc.h @@ -0,0 +1,60 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef _DEDEDE_CBI_SSFC__H_ +#define _DEDEDE_CBI_SSFC__H_ + +#include "stdint.h" + +/**************************************************************************** + * Dedede CBI Second Source Factory Cache + */ + +/* + * Base Sensor (Bits 0-2) + */ +enum ec_ssfc_base_sensor { + SSFC_SENSOR_BASE_DEFAULT = 0, + SSFC_SENSOR_BMI160 = 1, + SSFC_SENSOR_ICM426XX = 2, + SSFC_SENSOR_LSM6DSM = 3, + SSFC_SENSOR_ICM42607 = 4 +}; + +/* + * Lid Sensor (Bits 3-5) + */ +enum ec_ssfc_lid_sensor { + SSFC_SENSOR_LID_DEFAULT = 0, + SSFC_SENSOR_BMA255 = 1, + SSFC_SENSOR_KX022 = 2, + SSFC_SENSOR_LIS2DWL = 3 +}; + +union dedede_cbi_ssfc { + struct { + uint32_t base_sensor : 3; + uint32_t lid_sensor : 3; + uint32_t reserved_2 : 26; + }; + uint32_t raw_value; +}; + +/** + * Get the Base sensor type from SSFC_CONFIG. + * + * @return the Base sensor board type. + */ +enum ec_ssfc_base_sensor get_cbi_ssfc_base_sensor(void); + +/** + * Get the Lid sensor type from SSFC_CONFIG. + * + * @return the Lid sensor board type. + */ +enum ec_ssfc_lid_sensor get_cbi_ssfc_lid_sensor(void); + + +#endif /* _DEDEDE_CBI_SSFC__H_ */ diff --git a/board/drawcia_riscv/ec.tasklist b/board/drawcia_riscv/ec.tasklist new file mode 100644 index 0000000000..5c9a2d1a01 --- /dev/null +++ b/board/drawcia_riscv/ec.tasklist @@ -0,0 +1,24 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * See CONFIG_TASK_LIST in config.h for details. + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, TRENTA_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, ULTRA_TASK_STACK_SIZE) diff --git a/board/drawcia_riscv/gpio.inc b/board/drawcia_riscv/gpio.inc new file mode 100644 index 0000000000..cf0e3377cd --- /dev/null +++ b/board/drawcia_riscv/gpio.inc @@ -0,0 +1,148 @@ +/* -*- mode:c -*- + * + * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* Power State interrupts */ +GPIO_INT(SLP_S4_L, PIN(I, 5), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SLP_S3_L, PIN(H, 3), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt) +GPIO_INT(SLP_S0_L, PIN(E, 4), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SLP_SUS_L, PIN(G, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(VCCIN_AUX_VID0, PIN(D, 0), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(RSMRST_PWRGD_L, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(CPU_C10_GATE_L, PIN(G, 1), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_DRAM_OD, PIN(D, 3), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt) +GPIO_INT(PG_PP1050_ST_OD, PIN(L, 1), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(VCCIN_AUX_VID1, PIN(K, 1), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_VCCIO_EXT_OD, PIN(D, 7), GPIO_INT_BOTH, baseboard_all_sys_pgood_interrupt) +GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) + +GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) +#ifdef CONFIG_LOW_POWER_IDLE +/* Used to wake up the EC from Deep Doze mode when writing to console */ +GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_BOTH, uart_deepsleep_interrupt) /* UART_DBG_TX_EC_RX */ +#endif + +/* USB-C interrupts */ +GPIO_INT(USB_C0_INT_ODL, PIN(K, 0), GPIO_INT_FALLING | GPIO_PULL_UP, usb_c0_interrupt) /* BC12 and charger */ +GPIO_INT(USB_C1_INT_ODL, PIN(E, 6), GPIO_INT_FALLING | GPIO_PULL_UP, usb_c1_interrupt) /* TCPC, charger, BC12 */ +GPIO_INT(USB_C0_CCSBU_OVP_ODL, PIN(K, 6), GPIO_INT_FALLING | GPIO_PULL_UP, c0_ccsbu_ovp_interrupt) /* Fault protection */ + +/* Other interrupts */ +GPIO_INT(LID_OPEN, PIN(F, 3), GPIO_INT_BOTH, lid_interrupt) +GPIO_INT(LID_360_L, PIN(A, 7), GPIO_INT_BOTH, gmr_tablet_switch_isr) +GPIO_INT(VOLDN_BTN_ODL, PIN(I, 6), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(VOLUP_BTN_ODL_HDMI_HPD, PIN(I, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_sub_hdmi_hpd_interrupt) +GPIO_INT(BASE_SIXAXIS_INT_L, PIN(J, 0), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) +GPIO_INT(EC_WP_OD, PIN(A, 6), GPIO_INT_BOTH, switch_interrupt) +GPIO_INT(PEN_DET_ODL, PIN(J, 1), GPIO_INT_BOTH | GPIO_PULL_UP, pen_detect_interrupt) + +/* Power sequence GPIOs */ +GPIO(EC_AP_RTCRST, PIN(K, 2), GPIO_OUT_LOW) +GPIO(EC_AP_PWR_BTN_ODL, PIN(B, 6), GPIO_ODR_HIGH) +GPIO(EC_AP_DPWROK, PIN(L, 7), GPIO_OUT_LOW) +GPIO(EC_AP_RSMRST_L, PIN(H, 0), GPIO_OUT_LOW) +GPIO(EC_AP_WAKE_ODL, PIN(D, 5), GPIO_ODR_HIGH) +GPIO(SYS_RST_ODL, PIN(D, 1), GPIO_ODR_HIGH) +GPIO(EC_AP_SYS_PWROK, PIN(F, 2), GPIO_OUT_LOW) +GPIO(PG_PP5000_U_OD, PIN(E, 3), GPIO_INPUT) +GPIO(EN_PP3300_A, PIN(C, 5), GPIO_OUT_LOW) +GPIO(EC_AP_PCH_PWROK_OD, PIN(D, 6), GPIO_ODR_LOW) +GPIO(EN_PP5000_U, PIN(K, 5), GPIO_OUT_LOW) +/* TODO(b:149775160) - Modify if needed if we ever use this signal. */ +GPIO(EN_VCCST, PIN(D, 4), GPIO_INPUT) +GPIO(EN_VCCIO_EXT, PIN(B, 2), GPIO_OUT_LOW) +GPIO(EC_PROCHOT_ODL, PIN(I, 1), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(EC_AP_VCCST_PWRGD_OD, PIN(E, 5), GPIO_ODR_LOW) +GPIO(ALL_SYS_PWRGD, PIN(B, 7), GPIO_OUT_LOW) +GPIO(EN_SLP_Z, PIN(K, 3), GPIO_OUT_LOW) + +/* Required for icelake chipset code, but implemented through other means for dedede */ +UNIMPLEMENTED(AC_PRESENT) +UNIMPLEMENTED(PG_EC_DSW_PWROK) +UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD) + +/* I2C pins - Alternate function below configures I2C module on these pins */ +GPIO(EC_I2C_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) +GPIO(EC_I2C_EEPROM_SDA, PIN(B, 4), GPIO_INPUT) +GPIO(EC_I2C_BATTERY_SCL, PIN(C, 1), GPIO_INPUT) +GPIO(EC_I2C_BATTERY_SDA, PIN(C, 2), GPIO_INPUT) +GPIO(EC_I2C_SENSOR_SCL, PIN(F, 6), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_SENSOR_SDA, PIN(F, 7), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_SUB_USB_C1_SCL, PIN(E, 0), GPIO_INPUT) +GPIO(EC_I2C_SUB_USB_C1_SDA, PIN(E, 7), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_SCL, PIN(A, 4), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_SDA, PIN(A, 5), GPIO_INPUT) + +/* USB pins */ +GPIO(EN_USB_A_5V, PIN(L, 6), GPIO_OUT_LOW) +GPIO(EN_USB_C0_CC1_VCONN, PIN(H, 4), GPIO_OUT_LOW) +GPIO(EN_USB_C0_CC2_VCONN, PIN(H, 6), GPIO_OUT_LOW) +GPIO(EC_AP_USB_C0_HPD, PIN(L, 4), GPIO_OUT_LOW) +GPIO(EC_AP_USB_C1_HDMI_HPD, PIN(K, 7), GPIO_OUT_LOW) +GPIO(USB_C0_FRS, PIN(C, 4), GPIO_OUT_LOW) +GPIO(HDMI_SEL_L, PIN(C, 6), GPIO_OUT_HIGH) + +/* MKBP event synchronization */ +GPIO(EC_AP_MKBP_INT_L, PIN(L, 5), GPIO_ODR_HIGH) + +/* Misc pins which will run to the I/O board */ +GPIO(EC_SUB_IO_1_2, PIN(F, 0), GPIO_INPUT) +GPIO(EC_SUB_IO_2_1, PIN(F, 1), GPIO_INPUT) + +/* Misc */ +GPIO(EN_BL_OD, PIN(K, 4), GPIO_ODR_LOW) +GPIO(EC_ENTERING_RW, PIN(G, 0), GPIO_OUT_LOW) +GPIO(EC_ENTERING_RW2, PIN(C, 7), GPIO_OUT_LOW) +GPIO(CCD_MODE_ODL, PIN(H, 5), GPIO_ODR_HIGH) +GPIO(EC_BATTERY_PRES_ODL, PIN(I, 4), GPIO_INPUT) +GPIO(EN_KB_BL, PIN(J, 3), GPIO_OUT_LOW) /* Currently unused */ +GPIO(ECH1_PACKET_MODE, PIN(H, 1), GPIO_OUT_LOW) +GPIO(EN_PP5000_PEN, PIN(B, 5), GPIO_OUT_LOW) + +/* NC pins, enable internal pull-down to avoid floating state. */ +GPIO(GPIOC0_NC, PIN(C, 0), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOC3_NC, PIN(C, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOG3_NC, PIN(G, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOG4_NC, PIN(G, 4), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOG5_NC, PIN(G, 5), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOG6_NC, PIN(G, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOG7_NC, PIN(G, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOJ4_NC, PIN(J, 4), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOJ5_NC, PIN(J, 5), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOJ6_NC, PIN(J, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(GPIOM6_NC, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) + +/* LED */ +GPIO(BAT_LED_AMBER_L, PIN(A, 1), GPIO_OUT_HIGH) +GPIO(BAT_LED_WHITE_L, PIN(A, 2), GPIO_OUT_HIGH) +GPIO(PWR_LED_WHITE_L, PIN(A, 3), GPIO_OUT_HIGH) + +/* Alternate functions GPIO definitions */ +/* Keyboard */ +ALTERNATE(PIN_MASK(KSI, 0xFF), 0, MODULE_KEYBOARD_SCAN, 0) /* KSI0-7 */ +ALTERNATE(PIN_MASK(KSO_H, 0xFF), 0, MODULE_KEYBOARD_SCAN, 0) /* KSO8-15 */ +ALTERNATE(PIN_MASK(KSO_L, 0xFB), 0, MODULE_KEYBOARD_SCAN, 0) /* KSO0-1, 3-7 */ +GPIO(EC_KSO_02_INV, PIN(KSO_L, 2), GPIO_OUT_HIGH) /* KSO2 inverted */ + +/* UART */ +ALTERNATE(PIN_MASK(B, BIT(0) | BIT(1)), 0, MODULE_UART, 0) /* UART for debug */ + +/* I2C */ +ALTERNATE(PIN_MASK(B, BIT(3) | BIT(4)), 0, MODULE_I2C, 0) /* I2C0 */ +ALTERNATE(PIN_MASK(C, BIT(1) | BIT(2)), 0, MODULE_I2C, 0) /* I2C1 */ +ALTERNATE(PIN_MASK(F, BIT(6) | BIT(7)), 0, MODULE_I2C, GPIO_SEL_1P8V) /* I2C2 - 1.8V */ +ALTERNATE(PIN_MASK(E, BIT(0) | BIT(7)), 0, MODULE_I2C, 0) /* I2C4 */ +ALTERNATE(PIN_MASK(A, BIT(4) | BIT(5)), 0, MODULE_I2C, 0) /* I2C5 */ + +/* ADC */ +ALTERNATE(PIN_MASK(L, BIT(0) | BIT(2) | BIT(3)), 0, MODULE_ADC, 0) /* ADC13: EC_SUB_ANALOG, ADC15: TEMP_SENSOR_3, ADC16: TEMP_SENSOR_4 */ +ALTERNATE(PIN_MASK(I, BIT(0) | BIT(2) | BIT(3)), 0, MODULE_ADC, 0) /* ADC0: EC_VSNS_PP3300_A, ADC2: TEMP_SENSOR_1, ADC3: TEMP_SENSOR_2 */ + +/* PWM */ +ALTERNATE(PIN_MASK(A, BIT(0)), 0, MODULE_PWM, 0) /* KB_BL_PWM */ diff --git a/board/drawcia_riscv/led.c b/board/drawcia_riscv/led.c new file mode 100644 index 0000000000..eb93a0ee82 --- /dev/null +++ b/board/drawcia_riscv/led.c @@ -0,0 +1,203 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Drawcia specific LED settings. */ + +#include "cbi_fw_config.h" +#include "charge_state.h" +#include "extpower.h" +#include "hooks.h" +#include "led_common.h" + +#define BAT_LED_ON 0 +#define BAT_LED_OFF 1 + +#define POWER_LED_ON 0 +#define POWER_LED_OFF 1 + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED, + EC_LED_ID_POWER_LED +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_AMBER, + LED_WHITE, + LED_COLOR_COUNT /* Number of colors, not a color itself */ +}; + +static int led_set_color_battery(enum led_color color) +{ + switch (color) { + case LED_OFF: + gpio_set_level(GPIO_BAT_LED_WHITE_L, BAT_LED_OFF); + gpio_set_level(GPIO_BAT_LED_AMBER_L, BAT_LED_OFF); + break; + case LED_WHITE: + gpio_set_level(GPIO_BAT_LED_WHITE_L, BAT_LED_ON); + gpio_set_level(GPIO_BAT_LED_AMBER_L, BAT_LED_OFF); + break; + case LED_AMBER: + gpio_set_level(GPIO_BAT_LED_WHITE_L, BAT_LED_OFF); + gpio_set_level(GPIO_BAT_LED_AMBER_L, BAT_LED_ON); + break; + default: + return EC_ERROR_UNKNOWN; + } + return EC_SUCCESS; +} + +static int led_set_color_power(enum led_color color) +{ + switch (color) { + case LED_OFF: + gpio_set_level(GPIO_PWR_LED_WHITE_L, POWER_LED_OFF); + break; + case LED_WHITE: + gpio_set_level(GPIO_PWR_LED_WHITE_L, POWER_LED_ON); + break; + default: + return EC_ERROR_UNKNOWN; + } + return EC_SUCCESS; +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + switch (led_id) { + case EC_LED_ID_BATTERY_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + brightness_range[EC_LED_COLOR_AMBER] = 1; + break; + case EC_LED_ID_POWER_LED: + brightness_range[EC_LED_COLOR_WHITE] = 1; + break; + default: + break; + } +} + +static int led_set_color(enum ec_led_id led_id, enum led_color color) +{ + int rv; + + switch (led_id) { + case EC_LED_ID_BATTERY_LED: + rv = led_set_color_battery(color); + break; + case EC_LED_ID_POWER_LED: + rv = led_set_color_power(color); + break; + default: + return EC_ERROR_UNKNOWN; + } + return rv; +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color(led_id, LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color(led_id, LED_AMBER); + else + led_set_color(led_id, LED_OFF); + + return EC_SUCCESS; +} + +static void led_set_battery(void) +{ + static int battery_ticks; + static int power_ticks; + uint32_t chflags = charge_get_flags(); + + battery_ticks++; + + /* + * Override battery LED for Drawlet/Drawman, Drawlet/Drawman + * don't have power LED, blinking battery white LED to indicate + * system suspend without charging. + */ + if (get_cbi_fw_config_tablet_mode() == TABLET_MODE_ABSENT) { + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + charge_get_state() != PWR_STATE_CHARGE) { + led_set_color_battery(power_ticks++ & 0x2 ? + LED_WHITE : LED_OFF); + return; + } + } + + power_ticks = 0; + + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + led_set_color_battery(LED_AMBER); + break; + case PWR_STATE_DISCHARGE_FULL: + if (extpower_is_present()) { + led_set_color_battery(LED_WHITE); + break; + } + /* Intentional fall-through */ + case PWR_STATE_DISCHARGE: + /* + * Blink white light (1 sec on, 1 sec off) + * when battery capacity is less than 10% + */ + if (charge_get_percent() < 10) + led_set_color_battery( + (battery_ticks & 0x2) ? LED_WHITE : LED_OFF); + else + led_set_color_battery(LED_OFF); + break; + case PWR_STATE_ERROR: + led_set_color_battery( + (battery_ticks % 0x2) ? LED_WHITE : LED_OFF); + break; + case PWR_STATE_CHARGE_NEAR_FULL: + led_set_color_battery(LED_WHITE); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + if (chflags & CHARGE_FLAG_FORCE_IDLE) + led_set_color_battery( + (battery_ticks & 0x2) ? LED_AMBER : LED_OFF); + else + led_set_color_battery(LED_WHITE); + break; + default: + /* Other states don't alter LED behavior */ + break; + } +} + +static void led_set_power(void) +{ + static int power_tick; + + power_tick++; + + if (chipset_in_state(CHIPSET_STATE_ON)) + led_set_color_power(LED_WHITE); + else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) + led_set_color_power( + (power_tick & 0x2) ? LED_WHITE : LED_OFF); + else + led_set_color_power(LED_OFF); +} + +/* Called by hook task every TICK */ +static void led_tick(void) +{ + if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) + led_set_power(); + + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) + led_set_battery(); +} +DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); diff --git a/board/drawcia_riscv/usb_pd_policy.c b/board/drawcia_riscv/usb_pd_policy.c new file mode 100644 index 0000000000..3ff7152541 --- /dev/null +++ b/board/drawcia_riscv/usb_pd_policy.c @@ -0,0 +1,85 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery_smart.h" +#include "charge_manager.h" +#include "charger.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/charger/sm5803.h" +#include "driver/tcpm/tcpci.h" +#include "usb_pd.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +int pd_check_vconn_swap(int port) +{ + /* Allow VCONN swaps if the AP is on */ + return chipset_in_state(CHIPSET_STATE_ANY_SUSPEND | CHIPSET_STATE_ON); +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + if (port < 0 || port >= board_get_usb_pd_port_count()) + return; + + prev_en = charger_is_sourcing_otg_power(port); + + /* Disable Vbus */ + charger_enable_otg_power(port, 0); + + /* Discharge Vbus if previously enabled */ + if (prev_en) + sm5803_set_vbus_disch(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + enum ec_error_list rv; + + /* Disable sinking */ + rv = sm5803_vbus_sink_enable(port, 0); + if (rv) + return rv; + + /* Disable Vbus discharge */ + sm5803_set_vbus_disch(port, 0); + + /* Provide Vbus */ + charger_enable_otg_power(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +__override bool pd_check_vbus_level(int port, enum vbus_level level) +{ + int vbus_voltage; + + /* If we're unable to speak to the charger, best to guess false */ + if (charger_get_vbus_voltage(port, &vbus_voltage)) + return false; + + if (level == VBUS_SAFE0V) + return vbus_voltage < PD_V_SAFE0V_MAX; + else if (level == VBUS_PRESENT) + return vbus_voltage > PD_V_SAFE5V_MIN; + else + return vbus_voltage < PD_V_SINK_DISCONNECT_MAX; +} + +int pd_snk_is_vbus_provided(int port) +{ + return sm5803_is_vbus_present(port); +} diff --git a/board/halvor/vif_override.xml b/board/drawcia_riscv/vif_override.xml index 32736caf64..32736caf64 100644 --- a/board/halvor/vif_override.xml +++ b/board/drawcia_riscv/vif_override.xml diff --git a/board/driblee/battery.c b/board/driblee/battery.c index ff67e823ff..19f0312305 100644 --- a/board/driblee/battery.c +++ b/board/driblee/battery.c @@ -6,8 +6,10 @@ */ #include "battery_fuel_gauge.h" +#include "battery_smart.h" #include "charge_state.h" #include "common.h" +#include "util.h" /* * Battery info for lalala battery types. Note that the fields @@ -44,8 +46,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -76,8 +78,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -139,8 +141,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -171,8 +173,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -204,8 +206,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -236,8 +238,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -268,8 +270,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -300,8 +302,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -332,8 +334,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -364,8 +366,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -427,8 +429,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -459,8 +461,8 @@ const struct board_batt_params board_battery_info[] = { }, .fet = { .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -548,9 +550,9 @@ const struct board_batt_params board_battery_info[] = { .reg_data = { 0x0010, 0x0010 }, }, .fet = { - .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, + .reg_addr = 0x0, + .reg_mask = 0x8000, + .disconnect_val = 0x8000, .cfet_mask = 0x4000, .cfet_off_val = 0x4000, } @@ -632,3 +634,25 @@ const struct board_batt_params board_battery_info[] = { BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_BYD_1VX1H; + +int charger_profile_override(struct charge_state_data *curr) +{ + if (chipset_in_state(CHIPSET_STATE_ON)) { + curr->requested_current = MIN(curr->requested_current, + CHARGING_CURRENT_1100MA); + } + + return 0; +} + +enum ec_status charger_profile_override_get_param(uint32_t param, + uint32_t *value) +{ + return EC_RES_INVALID_PARAM; +} + +enum ec_status charger_profile_override_set_param(uint32_t param, + uint32_t value) +{ + return EC_RES_INVALID_PARAM; +} diff --git a/board/driblee/board.c b/board/driblee/board.c index d40ebe25a6..e204632024 100644 --- a/board/driblee/board.c +++ b/board/driblee/board.c @@ -176,31 +176,41 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(73), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(73), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/driblee/board.h b/board/driblee/board.h index 9d4ce3b6f2..e1bd9d1dca 100644 --- a/board/driblee/board.h +++ b/board/driblee/board.h @@ -31,6 +31,8 @@ #undef CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE #define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE (100 * MSEC) #define CONFIG_MATH_UTIL +#define CONFIG_CHARGER_PROFILE_OVERRIDE +#define CHARGING_CURRENT_1100MA 1100 /* * GPIO for C1 interrupts, for baseboard use diff --git a/board/drobit/board.c b/board/drobit/board.c index b08294bd24..fdfab38b52 100644 --- a/board/drobit/board.c +++ b/board/drobit/board.c @@ -128,17 +128,22 @@ const struct fan_t fans[FAN_CH_COUNT] = { * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(72), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(75), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(72), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(75), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -151,24 +156,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(72), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(75), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(72), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(75), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/eldrid/thermal.c b/board/eldrid/thermal.c index 4f9ac8796b..3f20b16d70 100644 --- a/board/eldrid/thermal.c +++ b/board/eldrid/thermal.c @@ -27,17 +27,20 @@ * TODO(b/170143672): Have different sensor placement. The temperature need to * be changed. */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -50,23 +53,27 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/elemi/board.c b/board/elemi/board.c index bb59308213..6bca0e577d 100644 --- a/board/elemi/board.c +++ b/board/elemi/board.c @@ -98,47 +98,64 @@ const struct fan_t fans[FAN_CH_COUNT] = { * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - [EC_TEMP_THRESH_HALT] = C_TO_K(70), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(58), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(70), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(58), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; -const static struct ec_thermal_config thermal_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(70), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(70), \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; -const static struct ec_thermal_config thermal_regulator = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - [EC_TEMP_THRESH_HALT] = C_TO_K(70), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(58), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_REGULATOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(70), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(58), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_regulator = + THERMAL_REGULATOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_charger, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_regulator, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_CHARGER, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_REGULATOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/elm/board.h b/board/elm/board.h index 40eb81eab8..d5d28bcd1b 100644 --- a/board/elm/board.h +++ b/board/elm/board.h @@ -122,6 +122,8 @@ #define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF #define CONFIG_CMD_I2C_PROTECT #define CONFIG_HOSTCMD_PD_CONTROL +/* Disable verbose output in EC pd */ +#define CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE /* * Flash layout: @@ -168,7 +170,7 @@ #define I2C_PORT_TCPC 1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI controller port (SPI2) */ /* Timer selection */ #define TIM_CLOCK32 2 diff --git a/board/endeavour/board.h b/board/endeavour/board.h index fd1b3e5b9c..9b0107b2c4 100644 --- a/board/endeavour/board.h +++ b/board/endeavour/board.h @@ -58,7 +58,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/eve/battery.c b/board/eve/battery.c index b5fb949ffe..2a505b80ec 100644 --- a/board/eve/battery.c +++ b/board/eve/battery.c @@ -607,7 +607,7 @@ static int board_battery_fix_otd_recovery_temp(uint32_t value) return EC_SUCCESS; } -int battery_get_vendor_param(uint32_t param, uint32_t *value) +__override int battery_get_vendor_param(uint32_t param, uint32_t *value) { /* * These registers can't be read directly because the flash area @@ -638,7 +638,7 @@ int battery_get_vendor_param(uint32_t param, uint32_t *value) return EC_RES_ERROR; } -int battery_set_vendor_param(uint32_t param, uint32_t value) +__override int battery_set_vendor_param(uint32_t param, uint32_t value) { switch (param) { case SB_VENDOR_PARAM_CTO_DISABLE: diff --git a/board/eve/board.h b/board/eve/board.h index 64e299bc54..5dcb9fc32f 100644 --- a/board/eve/board.h +++ b/board/eve/board.h @@ -72,7 +72,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/ezkinil/board.c b/board/ezkinil/board.c index 14f8e6e915..2244a7146a 100644 --- a/board/ezkinil/board.c +++ b/board/ezkinil/board.c @@ -309,27 +309,27 @@ const struct usb_mux usbc0_sbu_mux = { * Base Gyro Sensor dynamic configuration */ -static int base_gyro_config; +static enum ec_ssfc_base_gyro_sensor base_gyro_config = SSFC_BASE_GYRO_NONE; static void setup_base_gyro_config(void) { base_gyro_config = ec_config_has_base_gyro_sensor(); - if (base_gyro_config == BASE_GYRO_ICM426XX) { + if (base_gyro_config == SSFC_BASE_GYRO_ICM426XX) { motion_sensors[BASE_ACCEL] = icm426xx_base_accel; motion_sensors[BASE_GYRO] = icm426xx_base_gyro; ccprints("BASE GYRO is ICM426XX"); - } else if (base_gyro_config == BASE_GYRO_BMI160) + } else if (base_gyro_config == SSFC_BASE_GYRO_BMI160) ccprints("BASE GYRO is BMI160"); } void motion_interrupt(enum gpio_signal signal) { switch (base_gyro_config) { - case BASE_GYRO_ICM426XX: + case SSFC_BASE_GYRO_ICM426XX: icm426xx_interrupt(signal); break; - case BASE_GYRO_BMI160: + case SSFC_BASE_GYRO_BMI160: default: bmi160_interrupt(signal); break; @@ -715,29 +715,40 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_thermistor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - [EC_TEMP_THRESH_HALT] = C_TO_K(95), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - }, - .temp_fan_off = 0, - .temp_fan_max = 0, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_THERMISTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(95), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + }, \ + .temp_fan_off = 0, \ + .temp_fan_max = 0, \ + } +__maybe_unused static const struct ec_thermal_config thermal_thermistor = + THERMAL_THERMISTOR; -const static struct ec_thermal_config thermal_soc = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(32), - .temp_fan_max = C_TO_K(75), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_SOC \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(32), \ + .temp_fan_max = C_TO_K(75), \ + } +__maybe_unused static const struct ec_thermal_config thermal_soc = THERMAL_SOC; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/felwinter/battery.c b/board/felwinter/battery.c index e0c1213130..08c129d118 100644 --- a/board/felwinter/battery.c +++ b/board/felwinter/battery.c @@ -42,10 +42,9 @@ const struct board_batt_params board_battery_info[] = { .reg_data = { 0x0010, 0x0010 }, }, .fet = { - .mfgacc_support = 1, - .reg_addr = 0x0054, - .reg_mask = 0x0006, /* XDSG */ - .disconnect_val = 0x0006, + .reg_addr = 0x00, + .reg_mask = 0x2000, /* XDSG */ + .disconnect_val = 0x2000, } }, .batt_info = { diff --git a/board/felwinter/board.c b/board/felwinter/board.c index c4dfe8e530..cd7768d0ea 100644 --- a/board/felwinter/board.c +++ b/board/felwinter/board.c @@ -110,5 +110,9 @@ static void board_init(void) { if (ec_cfg_usb_db_type() == DB_USB4_NCT3807) db_update_usb4_config_from_config(); + + if (ec_cfg_usb_mb_type() == MB_USB4_TBT) + mb_update_usb4_tbt_config_from_config(); + } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); diff --git a/board/felwinter/board.h b/board/felwinter/board.h index 81e4ddbc0e..60997bc1ae 100644 --- a/board/felwinter/board.h +++ b/board/felwinter/board.h @@ -10,11 +10,6 @@ #include "compile_time_macros.h" -/* - * Early brya boards are not set up for vivaldi - */ -#undef CONFIG_KEYBOARD_VIVALDI - /* Baseboard features */ #include "baseboard.h" @@ -176,18 +171,16 @@ #define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_SEQ_EC_DSW_PWROK #define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B -/* - * TODO(b/181271666): no fan control loop until sensors are tuned - */ -/* #define CONFIG_FANS FAN_CH_COUNT */ +#define CONFIG_FANS FAN_CH_COUNT /* Charger defines */ -#define CONFIG_CHARGER_BQ25720 -#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 +#define CONFIG_CHARGER_ISL9241 #define CONFIG_CHARGE_RAMP_SW #define CONFIG_CHARGER_SENSE_RESISTOR 10 #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_KEYBOARD_REFRESH_ROW3 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" /* needed by registers.h */ diff --git a/board/felwinter/build.mk b/board/felwinter/build.mk index df453187bf..5a0a20b5e6 100644 --- a/board/felwinter/build.mk +++ b/board/felwinter/build.mk @@ -14,7 +14,7 @@ BASEBOARD:=brya board-y= board-y+=battery.o board-y+=board.o -board-y+=charger.o +board-y+=charger_isl9241.o board-y+=fans.o board-y+=fw_config.o board-y+=i2c.o diff --git a/board/felwinter/charger.c b/board/felwinter/charger.c deleted file mode 120000 index 476ce97df2..0000000000 --- a/board/felwinter/charger.c +++ /dev/null @@ -1 +0,0 @@ -../../baseboard/brya/charger_bq25720.c
\ No newline at end of file diff --git a/board/felwinter/charger_isl9241.c b/board/felwinter/charger_isl9241.c new file mode 100644 index 0000000000..9f7c760858 --- /dev/null +++ b/board/felwinter/charger_isl9241.c @@ -0,0 +1,90 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "compile_time_macros.h" +#include "console.h" +#include "driver/charger/isl9241.h" +#include "usbc_ppc.h" +#include "usb_pd.h" +#include "util.h" + + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* Charger Chip Configuration */ +const struct charger_config_t chg_chips[] = { + { + .i2c_port = I2C_PORT_CHARGER, + .i2c_addr_flags = ISL9241_ADDR_FLAGS, + .drv = &isl9241_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(chg_chips) == CHARGER_NUM); + +int board_set_active_charge_port(int port) +{ + int is_valid_port = board_is_usb_pd_port_present(port); + int i; + + if (port == CHARGE_PORT_NONE) { + CPRINTSUSB("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } else if (!is_valid_port) { + return EC_ERROR_INVAL; + } + + /* Check if the port is sourcing VBUS. */ + if (ppc_is_sourcing_vbus(port)) { + CPRINTFUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTSUSB("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTSUSB("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +__overridable void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), + charge_mv); +} diff --git a/board/felwinter/ec.tasklist b/board/felwinter/ec.tasklist index 290c17c748..6d995d6b44 100644 --- a/board/felwinter/ec.tasklist +++ b/board/felwinter/ec.tasklist @@ -11,19 +11,20 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/felwinter/fw_config.c b/board/felwinter/fw_config.c index 7afdae3837..d733df3208 100644 --- a/board/felwinter/fw_config.c +++ b/board/felwinter/fw_config.c @@ -43,3 +43,8 @@ enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) { return fw_config.usb_db; } + +enum ec_cfg_usb_mb_type ec_cfg_usb_mb_type(void) +{ + return fw_config.usb_mb; +} diff --git a/board/felwinter/fw_config.h b/board/felwinter/fw_config.h index f9de98a93f..fb5c374b5d 100644 --- a/board/felwinter/fw_config.h +++ b/board/felwinter/fw_config.h @@ -24,14 +24,22 @@ enum ec_cfg_keyboard_backlight_type { KEYBOARD_BACKLIGHT_ENABLED = 1 }; +enum ec_cfg_usb_mb_type { + MB_USB4_TBT = 0, + MB_USB3_NON_TBT = 1 +}; + union brya_cbi_fw_config { struct { - enum ec_cfg_usb_db_type usb_db : 4; - uint32_t sd_db : 2; - uint32_t lte_db : 1; + enum ec_cfg_usb_db_type usb_db : 3; + uint32_t wifi : 2; + uint32_t stylus : 1; enum ec_cfg_keyboard_backlight_type kb_bl : 1; uint32_t audio : 3; - uint32_t reserved_1 : 21; + uint32_t thermal : 2; + uint32_t table_mode : 1; + enum ec_cfg_usb_mb_type usb_mb : 3; + uint32_t reserved_1 : 16; }; uint32_t raw_value; }; @@ -50,4 +58,11 @@ union brya_cbi_fw_config get_fw_config(void); */ enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void); +/** + * Get the USB main board type from FW_CONFIG. + * + * @return the USB main board type. + */ +enum ec_cfg_usb_mb_type ec_cfg_usb_mb_type(void); + #endif /* __BOARD_BRYA_FW_CONFIG_H_ */ diff --git a/board/felwinter/gpio.inc b/board/felwinter/gpio.inc index ba7116847a..609db06ba1 100644 --- a/board/felwinter/gpio.inc +++ b/board/felwinter/gpio.inc @@ -143,7 +143,9 @@ GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* GPIO02_P2 to PU */ /* GPIO03_P2 to PU */ +IOEX(USB_C1_RT_RST_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 2), GPIO_ODR_LOW) IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C1_FRS_EN, EXPIN(IOEX_C1_NCT38XX, 0, 6), GPIO_LOW) IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH) diff --git a/board/felwinter/keyboard.c b/board/felwinter/keyboard.c index a9f033130d..a8cbf72238 100644 --- a/board/felwinter/keyboard.c +++ b/board/felwinter/keyboard.c @@ -4,7 +4,7 @@ */ #include "common.h" - +#include "ec_commands.h" #include "keyboard_scan.h" #include "timer.h" @@ -19,7 +19,30 @@ __override struct keyboard_scan_config keyscan_config = { .min_post_scan_delay_us = 1000, .poll_timeout_us = 100 * MSEC, .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + 0x1c, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfe, 0xff, 0xff, 0xff, /* full set */ }, }; + +static const struct ec_response_keybd_config felwinter_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY | KEYBD_CAP_NUMERIC_KEYPAD, +}; + +__override const struct ec_response_keybd_config +*board_vivaldi_keybd_config(void) +{ + return &felwinter_kb; +} diff --git a/board/felwinter/pwm.c b/board/felwinter/pwm.c index 985305449b..1312135a2c 100644 --- a/board/felwinter/pwm.c +++ b/board/felwinter/pwm.c @@ -24,8 +24,8 @@ const struct pwm_t pwm_channels[] = { }, [PWM_CH_FAN] = { .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000 + .flags = PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_DSLEEP, + .freq = 1000 }, }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); diff --git a/board/felwinter/sensors.c b/board/felwinter/sensors.c index 87025c017e..b25d39f136 100644 --- a/board/felwinter/sensors.c +++ b/board/felwinter/sensors.c @@ -45,11 +45,10 @@ K_MUTEX_DEFINE(g_base_accel_mutex); static struct stprivate_data g_lis2dw12_data; static struct lsm6dso_data lsm6dso_data; -/* TODO(b/184779333): calibrate the orientation matrix on later board stage */ static const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(1), 0}, { FLOAT_TO_FP(1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { 0, FLOAT_TO_FP(1), 0}, + { 0, 0, FLOAT_TO_FP(1)} }; /* TODO(b/184779743): verify orientation matrix */ @@ -174,17 +173,22 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/180681346): update for Alder Lake/brya @@ -199,21 +203,26 @@ static const struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -static const struct ec_thermal_config thermal_fan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_FAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_fan = THERMAL_FAN; /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_2_FAN] = thermal_fan, + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_FAN] = THERMAL_FAN, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/felwinter/usbc_config.c b/board/felwinter/usbc_config.c index 8e2b8927ea..b8657c4785 100644 --- a/board/felwinter/usbc_config.c +++ b/board/felwinter/usbc_config.c @@ -124,11 +124,8 @@ static const struct usb_mux usbc1_usb3_db_retimer = { struct usb_mux usb_muxes[] = { [USBC_PORT_C2] = { .usb_port = USBC_PORT_C2, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_C2_MUX, - .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, - .next_mux = &usbc2_tcss_usb_mux, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, }, [USBC_PORT_C1] = { /* PS8815 DB */ @@ -140,7 +137,7 @@ struct usb_mux usb_muxes[] = { }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); -struct usb_mux usb_muxes_c1 = { +static const struct usb_mux usb_muxes_c1 = { .usb_port = USBC_PORT_C1, .driver = &bb_usb_retimer, .hpd_update = bb_retimer_hpd_update, @@ -149,6 +146,16 @@ struct usb_mux usb_muxes_c1 = { .next_mux = &usbc1_tcss_usb_mux, }; +static const struct usb_mux usb_muxes_c2 = { + .usb_port = USBC_PORT_C2, + .driver = &bb_usb_retimer, + .hpd_update = bb_retimer_hpd_update, + .i2c_port = I2C_PORT_USB_C2_MUX, + .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc2_tcss_usb_mux, +}; + + /* BC1.2 charger detect configuration */ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { [USBC_PORT_C2] = { @@ -157,7 +164,7 @@ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { }, [USBC_PORT_C1] = { .i2c_port = I2C_PORT_USB_C1_BC12, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, }, }; BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); @@ -200,10 +207,10 @@ void config_usb_db_type(void) __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) { - enum ioex_signal rst_signal; + int rst_signal; if (me->usb_port == USBC_PORT_C1) - rst_signal = GPIO_USB_C1_RT_RST_R_ODL; + rst_signal = IOEX_USB_C1_RT_RST_ODL; else if (me->usb_port == USBC_PORT_C2) rst_signal = IOEX_USB_C2_RT_RST_ODL; else @@ -221,14 +228,14 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) * retimer_init() function ensures power is up before calling * this function. */ - ioex_set_level(rst_signal, 1); + gpio_or_ioex_set_level(rst_signal, 1); /* * Allow 1ms time for the retimer to power up lc_domain * which powers I2C controller within retimer */ msleep(1); } else { - ioex_set_level(rst_signal, 0); + gpio_or_ioex_set_level(rst_signal, 0); msleep(1); } return EC_SUCCESS; @@ -384,7 +391,8 @@ __override bool board_is_dts_port(int port) __override bool board_is_tbt_usb4_port(int port) { - if ((port == USBC_PORT_C2) || + if (((port == USBC_PORT_C2) && + (ec_cfg_usb_mb_type() == MB_USB4_TBT)) || ((port == USBC_PORT_C1) && (ec_cfg_usb_db_type() == DB_USB4_NCT3807))) return true; @@ -406,3 +414,8 @@ void db_update_usb4_config_from_config(void) ppc_chips[USBC_PORT_C1] = ppc_chips_c1; usb_muxes[USBC_PORT_C1] = usb_muxes_c1; } + +void mb_update_usb4_tbt_config_from_config(void) +{ + usb_muxes[USBC_PORT_C2] = usb_muxes_c2; +} diff --git a/board/felwinter/usbc_config.h b/board/felwinter/usbc_config.h index cea53dcaa2..9f0a26210f 100644 --- a/board/felwinter/usbc_config.h +++ b/board/felwinter/usbc_config.h @@ -20,5 +20,6 @@ enum usbc_port { void config_usb_db_type(void); void db_update_usb4_config_from_config(void); +void mb_update_usb4_tbt_config_from_config(void); #endif /* __CROS_EC_USBC_CONFIG_H */ diff --git a/board/fennel/board.h b/board/fennel/board.h index 697480770c..dc73b2e132 100644 --- a/board/fennel/board.h +++ b/board/fennel/board.h @@ -91,7 +91,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/fizz/board.h b/board/fizz/board.h index 59cba93c8a..ad1ca85cac 100644 --- a/board/fizz/board.h +++ b/board/fizz/board.h @@ -60,13 +60,17 @@ /* EC console commands */ #define CONFIG_CMD_BUTTON +#undef CONFIG_CMD_ADC + +/* Reduce flash space usage */ +#undef CONFIG_CONSOLE_CMDHELP /* SOC */ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/fizz/build.mk b/board/fizz/build.mk index 74094ac834..febbb7fac2 100644 --- a/board/fizz/build.mk +++ b/board/fizz/build.mk @@ -10,5 +10,5 @@ CHIP:=npcx CHIP_VARIANT:=npcx5m6g board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o board-y+=led.o diff --git a/board/fizz/usb_pd_pdo.c b/board/fizz/usb_pd_pdo.c new file mode 100644 index 0000000000..bb612affef --- /dev/null +++ b/board/fizz/usb_pd_pdo.c @@ -0,0 +1,23 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 50000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/fizz/usb_pd_pdo.h b/board/fizz/usb_pd_pdo.h new file mode 100644 index 0000000000..de4f8f9474 --- /dev/null +++ b/board/fizz/usb_pd_pdo.h @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_FIZZ_USB_PD_PDO_H +#define __CROS_EC_BOARD_FIZZ_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[1]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_FIZZ_USB_PD_PDO_H */ diff --git a/board/fizz/usb_pd_policy.c b/board/fizz/usb_pd_policy.c index 5de57f3c9b..5fc495417f 100644 --- a/board/fizz/usb_pd_policy.c +++ b/board/fizz/usb_pd_policy.c @@ -20,26 +20,12 @@ #include "util.h" #include "usb_mux.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 50000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - int board_vbus_source_enabled(int port) { if (port != 0) diff --git a/board/galtic/board.c b/board/galtic/board.c index 1adcc7f77c..a54655dec2 100644 --- a/board/galtic/board.c +++ b/board/galtic/board.c @@ -816,37 +816,56 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - [EC_TEMP_THRESH_HALT] = C_TO_K(98), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, -}; -const static struct ec_thermal_config thermal_vcore = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(50), - }, -}; -const static struct ec_thermal_config thermal_ambient = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(50), - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(98), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_VCORE \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(50), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_vcore = + THERMAL_VCORE; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_AMBIENT \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(50), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_ambient = + THERMAL_AMBIENT; + struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1] = thermal_charger, - [TEMP_SENSOR_2] = thermal_vcore, - [TEMP_SENSOR_3] = thermal_ambient, + [TEMP_SENSOR_1] = THERMAL_CHARGER, + [TEMP_SENSOR_2] = THERMAL_VCORE, + [TEMP_SENSOR_3] = THERMAL_AMBIENT, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/genesis/board.c b/board/genesis/board.c index 2a44d4416a..a846478ecb 100644 --- a/board/genesis/board.c +++ b/board/genesis/board.c @@ -227,23 +227,28 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* Thermal control; drive fan based on temperature sensors. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(84), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(84), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_CORE] = thermal_a, + [TEMP_SENSOR_CORE] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/genesis/board.h b/board/genesis/board.h index 7c32579440..8a31b9500b 100644 --- a/board/genesis/board.h +++ b/board/genesis/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/gimble/board.c b/board/gimble/board.c index 6483d8ca6d..550a3a7176 100644 --- a/board/gimble/board.c +++ b/board/gimble/board.c @@ -21,9 +21,11 @@ #include "driver/accelgyro_lsm6dsm.h" #include "fw_config.h" #include "hooks.h" +#include "keyboard_8042_sharedlib.h" #include "lid_switch.h" #include "power_button.h" #include "power.h" +#include "ps8xxx.h" #include "registers.h" #include "switch.h" #include "tablet_mode.h" @@ -49,6 +51,13 @@ BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); __override void board_cbi_init(void) { config_usb_db_type(); + + /* + * If keyboard is US2(KB_LAYOUT_1), we need translate right ctrl + * to backslash(\|) key. + */ + if (ec_cfg_keyboard_layout() == KB_LAYOUT_1) + set_scancode_set2(4, 0, get_scancode_set2(2, 7)); } /* Called on AP S3 -> S0 transition */ @@ -128,6 +137,55 @@ static void board_init(void) } DECLARE_HOOK(HOOK_SECOND, board_init, HOOK_PRIO_DEFAULT); +__overridable void board_ps8xxx_tcpc_init(int port) +{ + int val; + + if (i2c_read8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_APTX_EQ_AT_10G, &val)) + CPRINTS("ps8815: fail to read reg 0x%02x", + PS8815_REG_APTX_EQ_AT_10G); + + /* APTX2 EQ 23dB, APTX1 EQ 23dB */ + if (i2c_write8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_APTX_EQ_AT_10G, 0x99)) + CPRINTS("ps8815: fail to write reg 0x%02x", + PS8815_REG_APTX_EQ_AT_10G); + + if (i2c_read8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_RX_EQ_AT_10G, &val)) + CPRINTS("ps8815: fail to read reg 0x%02x", + PS8815_REG_RX_EQ_AT_10G); + + /* RX2 EQ 18dB, RX1 EQ 16dB */ + if (i2c_write8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_RX_EQ_AT_10G, 0x64)) + CPRINTS("ps8815: fail to write reg 0x%02x", + PS8815_REG_RX_EQ_AT_10G); + + if (i2c_read8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_APTX_EQ_AT_5G, &val)) + CPRINTS("ps8815: fail to read reg 0x%02x", + PS8815_REG_APTX_EQ_AT_5G); + + /* APTX2 EQ 16dB, APTX1 EQ 16dB */ + if (i2c_write8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_APTX_EQ_AT_5G, 0x44)) + CPRINTS("ps8815: fail to write reg 0x%02x", + PS8815_REG_APTX_EQ_AT_5G); + + if (i2c_read8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_RX_EQ_AT_5G, &val)) + CPRINTS("ps8815: fail to read reg 0x%02x", + PS8815_REG_RX_EQ_AT_5G); + + /* RX2 EQ 16dB, RX1 EQ 16dB */ + if (i2c_write8(I2C_PORT_USB_C1_TCPC, + PS8751_I2C_ADDR1_P1_FLAGS, PS8815_REG_RX_EQ_AT_5G, 0x44)) + CPRINTS("ps8815: fail to write reg 0x%02x", + PS8815_REG_RX_EQ_AT_5G); +} + __override void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, int charge_mv) { diff --git a/board/gimble/board.h b/board/gimble/board.h index b7a31631f7..96c8e6326d 100644 --- a/board/gimble/board.h +++ b/board/gimble/board.h @@ -179,14 +179,26 @@ /* Charger defines */ #define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 #define CONFIG_CHARGE_RAMP_SW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 /* PROCHOT defines */ #define BATT_MAX_CONTINUE_DISCHARGE_WATT 45 +/* Prochot assertion/deassertion ratios*/ +#define PROCHOT_ADAPTER_WATT_RATIO 97 +#define PROCHOT_ASSERTION_BATTERY_RATIO 95 +#define PROCHOT_DEASSERTION_BATTERY_RATIO 85 +#define PROCHOT_ASSERTION_PD_RATIO 104 +#define PROCHOT_DEASSERTION_PD_RATIO 94 +#define PROCHOT_DEASSERTION_PD_BATTERY_RATIO 95 +#define PROCHOT_ASSERTION_ADAPTER_RATIO 102 +#define PROCHOT_DEASSERTION_ADAPTER_RATIO 90 +#define PROCHOT_DEASSERTION_ADAPTER_BATT_RATIO 90 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" /* needed by registers.h */ diff --git a/board/gimble/ec.tasklist b/board/gimble/ec.tasklist index 2742967660..9207f8729d 100644 --- a/board/gimble/ec.tasklist +++ b/board/gimble/ec.tasklist @@ -11,20 +11,21 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) \ - TASK_NOTEST(PROCHOT, prochot_task, NULL, LARGER_TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_NOTEST(PROCHOT, prochot_task, NULL, VENTI_TASK_STACK_SIZE) diff --git a/board/gimble/fw_config.c b/board/gimble/fw_config.c index fb8acb635d..1589811ad0 100644 --- a/board/gimble/fw_config.c +++ b/board/gimble/fw_config.c @@ -54,6 +54,11 @@ union brya_cbi_fw_config get_fw_config(void) return fw_config; } +enum ec_cfg_keyboard_layout ec_cfg_keyboard_layout(void) +{ + return fw_config.kb_layout; +} + enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) { return fw_config.usb_db; diff --git a/board/gimble/fw_config.h b/board/gimble/fw_config.h index 6e4eb3ef58..32631f7b77 100644 --- a/board/gimble/fw_config.h +++ b/board/gimble/fw_config.h @@ -25,14 +25,22 @@ enum ec_cfg_keyboard_backlight_type { KEYBOARD_BACKLIGHT_ENABLED = 1 }; +enum ec_cfg_keyboard_layout { + KB_LAYOUT_DEFAULT = 0, + KB_LAYOUT_1 = 1 +}; + union brya_cbi_fw_config { struct { enum ec_cfg_usb_db_type usb_db : 4; uint32_t sd_db : 2; - uint32_t lte_db : 1; + uint32_t reserved_0 : 1; enum ec_cfg_keyboard_backlight_type kb_bl : 1; uint32_t audio : 3; - uint32_t reserved_1 : 21; + uint32_t cellular_db : 2; + uint32_t wifi_sar_id : 1; + enum ec_cfg_keyboard_layout kb_layout : 2; + uint32_t reserved_1 : 16; }; uint32_t raw_value; }; @@ -45,6 +53,13 @@ union brya_cbi_fw_config { union brya_cbi_fw_config get_fw_config(void); /** + * Get keyboard type from FW_CONFIG. + * + * @return the keyboard type. + */ +enum ec_cfg_keyboard_layout ec_cfg_keyboard_layout(void); + +/** * Get the USB daughter board type from FW_CONFIG. * * @return the USB daughter board type. diff --git a/board/gimble/pwm.c b/board/gimble/pwm.c index 73f63821e0..54ffd9411d 100644 --- a/board/gimble/pwm.c +++ b/board/gimble/pwm.c @@ -3,6 +3,7 @@ * found in the LICENSE file. */ +#include "chipset.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" @@ -51,10 +52,7 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); static void board_pwm_init(void) { - /* - * Turn off LED1 to LED4. - * Turn on KB LED at 50%. - */ + /* Turn off LED1 to LED4 */ pwm_enable(PWM_CH_LED1, 1); pwm_set_duty(PWM_CH_LED1, 0); pwm_enable(PWM_CH_LED2, 1); @@ -63,7 +61,9 @@ static void board_pwm_init(void) pwm_set_duty(PWM_CH_LED3, 0); pwm_enable(PWM_CH_LED4, 1); pwm_set_duty(PWM_CH_LED4, 0); - + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + return; + /* Turn on KB LED at 50%. */ pwm_enable(PWM_CH_KBLIGHT, 1); pwm_set_duty(PWM_CH_KBLIGHT, 50); } diff --git a/board/gimble/sensors.c b/board/gimble/sensors.c index 3468e3eb35..07f18950f0 100644 --- a/board/gimble/sensors.c +++ b/board/gimble/sensors.c @@ -316,17 +316,20 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/194318801): confirm thermal limits setting for gimble @@ -341,23 +344,27 @@ static const struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -static const struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR_SOC] = thermal_cpu, + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, /* TODO(b/194318801): confirm thermal limits setting for gimble */ - [TEMP_SENSOR_2_FAN] = thermal_inductor, - [TEMP_SENSOR_3_CHARGER] = thermal_inductor, + [TEMP_SENSOR_2_FAN] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_CHARGER] = THERMAL_INDUCTOR, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/gimble/thermal.c b/board/gimble/thermal.c index 101c436886..25e7bf2c00 100644 --- a/board/gimble/thermal.c +++ b/board/gimble/thermal.c @@ -9,6 +9,7 @@ #include "fan.h" #include "hooks.h" #include "host_command.h" +#include "tablet_mode.h" #include "temp_sensor.h" #include "thermal.h" #include "util.h" @@ -31,6 +32,8 @@ struct fan_step { int8_t off[TEMP_SENSOR_COUNT]; /* Fan rpm */ uint16_t rpm[FAN_CH_COUNT]; + /* Fan rpm for tablet mode */ + uint16_t rpm_tablet[FAN_CH_COUNT]; }; /* * TODO(b/167931578) Only monitor sensor3 for now. @@ -39,39 +42,45 @@ struct fan_step { static const struct fan_step fan_table[] = { { /* level 0 */ - .on = {44, -1, -1}, + .on = {43, -1, -1}, .off = {0, -1, -1}, .rpm = {0}, + .rpm_tablet = {0}, }, { /* level 1 */ - .on = {46, -1, -1}, - .off = {44, -1, -1}, - .rpm = {3200}, + .on = {45, -1, -1}, + .off = {43, -1, -1}, + .rpm = {3400}, + .rpm_tablet = {3400}, }, { /* level 2 */ - .on = {50, -1, -1}, - .off = {45, -1, -1}, - .rpm = {3600}, + .on = {46, -1, -1}, + .off = {44, -1, -1}, + .rpm = {3800}, + .rpm_tablet = {3700}, }, { /* level 3 */ - .on = {54, -1, -1}, - .off = {49, -1, -1}, - .rpm = {4100}, + .on = {48, -1, -1}, + .off = {45, -1, -1}, + .rpm = {4200}, + .rpm_tablet = {4100}, }, { /* level 4 */ - .on = {58, -1, -1}, - .off = {53, -1, -1}, - .rpm = {4900}, + .on = {50, -1, -1}, + .off = {47, -1, -1}, + .rpm = {4800}, + .rpm_tablet = {4800}, }, { /* level 5 */ - .on = {60, -1, -1}, - .off = {57, -1, -1}, - .rpm = {5200}, + .on = {52, -1, -1}, + .off = {49, -1, -1}, + .rpm = {5400}, + .rpm_tablet = {5200}, }, }; const int num_fan_levels = ARRAY_SIZE(fan_table); @@ -127,7 +136,10 @@ int fan_table_to_rpm(int fan, int *temp, enum temp_sensor_id temp_sensor) switch (fan) { case FAN_CH_0: - new_rpm = fan_table[current_level].rpm[FAN_CH_0]; + if (tablet_get_mode()) + new_rpm = fan_table[current_level].rpm_tablet[FAN_CH_0]; + else + new_rpm = fan_table[current_level].rpm[FAN_CH_0]; break; default: break; diff --git a/board/gingerbread/board.c b/board/gingerbread/board.c index 6a2ae0c683..4c4911dbf2 100644 --- a/board/gingerbread/board.c +++ b/board/gingerbread/board.c @@ -152,6 +152,20 @@ struct ppc_config_t ppc_chips[] = { #endif #ifdef SECTION_IS_RW + +/* TUSB1064 set mux board tuning for DP Rx path */ +static int board_tusb1064_dp_rx_eq_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + int rv = EC_SUCCESS; + + /* DP specific config */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + rv = tusb1064_set_dp_rx_eq(me, TUSB1064_DP_EQ_RX_8_9_DB); + + return rv; +} + /* * TCPCs: 2 USBC/PD ports * port 0 -> host port -> STM32G4 UCPD @@ -178,6 +192,7 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_port = I2C_PORT_I2C1, .i2c_addr_flags = TUSB1064_I2C_ADDR0_FLAGS, .driver = &tusb1064_usb_mux_driver, + .board_set = &board_tusb1064_dp_rx_eq_set, }, [USB_PD_PORT_DP] = { .usb_port = USB_PD_PORT_DP, @@ -311,6 +326,34 @@ int dock_get_mf_preference(void) return mf; } +static void board_usb_tc_connect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* + * The EC needs to keep the USB hubs in reset until the host port is + * attached so that the USB-EP can be properly enumerated. + */ + if (port == USB_PD_PORT_HOST) { + gpio_set_level(GPIO_EC_HUB1_RESET_L, 1); + gpio_set_level(GPIO_EC_HUB2_RESET_L, 1); + } +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_tc_connect, HOOK_PRIO_DEFAULT); + +static void board_usb_tc_disconnect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* Only the host port disconnect is relevant */ + if (port == USB_PD_PORT_HOST) { + gpio_set_level(GPIO_EC_HUB1_RESET_L, 0); + gpio_set_level(GPIO_EC_HUB2_RESET_L, 0); + } +} +DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect, \ + HOOK_PRIO_DEFAULT); + #endif /* SECTION_IS_RW */ static void board_init(void) diff --git a/board/gingerbread/gpio.inc b/board/gingerbread/gpio.inc index 5b7b3a9619..6226ff747e 100644 --- a/board/gingerbread/gpio.inc +++ b/board/gingerbread/gpio.inc @@ -57,8 +57,8 @@ GPIO(DEBUG_GPIO1, PIN(B, 13), GPIO_OUT_LOW) * USB CDP enables. */ GPIO(USB3_A1_CDP_EN, PIN(E, 7), GPIO_OUT_LOW) GPIO(USB3_A2_CDP_EN, PIN(E, 8), GPIO_OUT_LOW) -GPIO(USB3_P3_CDP_EN, PIN(D, 1), GPIO_OUT_LOW) -GPIO(USB3_P4_CDP_EN, PIN(E, 12), GPIO_OUT_LOW) +GPIO(USB3_P3_CDP_EN, PIN(D, 1), GPIO_OUT_HIGH) +GPIO(USB3_P4_CDP_EN, PIN(E, 12), GPIO_OUT_HIGH) /* Write protect */ GPIO(EC_FLASH_WP_ODL, PIN(A, 3), GPIO_ODR_HIGH) diff --git a/board/goroh/battery.c b/board/goroh/battery.c index f07c38e1b8..f76af4d99b 100644 --- a/board/goroh/battery.c +++ b/board/goroh/battery.c @@ -14,34 +14,35 @@ #include "usb_pd.h" const struct board_batt_params board_battery_info[] = { - [BATTERY_C235] = { + [BATTERY_LGC_AP18C8K] = { .fuel_gauge = { - .manuf_name = "AS3GWRc3KA", - .device_name = "C235-41", + .manuf_name = "LGC KT0030G020", .ship_mode = { - .reg_addr = 0x0, - .reg_data = { 0x10, 0x10 }, + .reg_addr = 0x3A, + .reg_data = { 0xC574, 0xC574 }, }, .fet = { - .reg_addr = 0x99, - .reg_mask = 0x0c, - .disconnect_val = 0x0c, - } + .reg_addr = 0x43, + .reg_mask = 0x0001, + .disconnect_val = 0x0, + .cfet_mask = 0x0002, + .cfet_off_val = 0x0000, + }, }, .batt_info = { - .voltage_max = 8800, - .voltage_normal = 7700, - .voltage_min = 6000, - .precharge_current = 256, - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = 0, - .discharging_max_c = 60, + .voltage_max = 13050, + .voltage_normal = 11250, + .voltage_min = 9000, + .precharge_current = 256, + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, }, }, }; BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_C235; +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_LGC_AP18C8K; diff --git a/board/goroh/board.c b/board/goroh/board.c index b28322eca0..c99b0deff6 100644 --- a/board/goroh/board.c +++ b/board/goroh/board.c @@ -15,14 +15,10 @@ #include "driver/accel_lis2dw12.h" #include "driver/accelgyro_bmi_common.h" #include "driver/als_tcs3400.h" -#include "driver/bc12/mt6360.h" -#include "driver/bc12/pi3usb9201.h" #include "driver/charger/isl923x.h" #include "driver/ppc/syv682x.h" #include "driver/tcpm/it83xx_pd.h" #include "driver/temp_sensor/thermistor.h" -#include "driver/usb_mux/it5205.h" -#include "driver/usb_mux/ps8743.h" #include "extpower.h" #include "gpio.h" #include "hooks.h" @@ -34,7 +30,6 @@ #include "power_button.h" #include "pwm.h" #include "pwm_chip.h" -#include "regulator.h" #include "spi.h" #include "switch.h" #include "tablet_mode.h" @@ -42,7 +37,6 @@ #include "temp_sensor.h" #include "timer.h" #include "uart.h" -#include "usb_charge.h" #include "usb_mux.h" #include "usb_pd_tcpm.h" #include "usbc_ppc.h" @@ -56,196 +50,55 @@ static void board_init(void) { /* Enable motion sensor interrupt */ gpio_enable_interrupt(GPIO_BASE_IMU_INT_L); - gpio_enable_interrupt(GPIO_LID_ACCEL_INT_L); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); -/* Sensor */ -static struct mutex g_base_mutex; -static struct mutex g_lid_mutex; - -static struct bmi_drv_data_t g_bmi160_data; -static struct stprivate_data g_lis2dwl_data; - -/* Matrix to rotate accelerometer into standard reference frame */ -static const mat33_fp_t base_standard_ref = { - {0, FLOAT_TO_FP(1), 0}, - {FLOAT_TO_FP(-1), 0, 0}, - {0, 0, FLOAT_TO_FP(1)}, -}; - -static void update_rotation_matrix(void) -{ - if (board_get_version() >= 2) { - motion_sensors[BASE_ACCEL].rot_standard_ref = - &base_standard_ref; - motion_sensors[BASE_GYRO].rot_standard_ref = - &base_standard_ref; - } -} -DECLARE_HOOK(HOOK_INIT, update_rotation_matrix, HOOK_PRIO_INIT_ADC + 2); - -struct motion_sensor_t motion_sensors[] = { - /* - * Note: bmi160: supports accelerometer and gyro sensor - * Requirement: accelerometer sensor must init before gyro sensor - * DO NOT change the order of the following table. - */ - [BASE_ACCEL] = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI160, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi160_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi160_data, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, - .rot_standard_ref = NULL, /* identity matrix */ - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .min_frequency = BMI_ACCEL_MIN_FREQ, - .max_frequency = BMI_ACCEL_MAX_FREQ, - .config = { - /* Sensor on for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Sensor on for angle detection */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - }, - }, - [BASE_GYRO] = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI160, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi160_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi160_data, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, - .default_range = 1000, /* dps */ - .rot_standard_ref = NULL, /* identity matrix */ - .min_frequency = BMI_GYRO_MIN_FREQ, - .max_frequency = BMI_GYRO_MAX_FREQ, - }, - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LIS2DWL, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &lis2dw12_drv, - .mutex = &g_lid_mutex, - .drv_data = &g_lis2dwl_data, - .int_signal = GPIO_LID_ACCEL_INT_L, - .port = I2C_PORT_ACCEL, - .i2c_spi_addr_flags = LIS2DWL_ADDR1_FLAGS, - .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .rot_standard_ref = NULL, /* identity matrix */ - .default_range = 2, /* g */ - .min_frequency = LIS2DW12_ODR_MIN_VAL, - .max_frequency = LIS2DW12_ODR_MAX_VAL, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 12500 | ROUND_UP_FLAG, - }, - /* Sensor on for lid angle detection */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, -}; -const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - /* ADC channels. Must be in the exactly same order as in enum adc_channel. */ const struct adc_t adc_channels[] = { - /* Convert to mV (3000mV/1024). */ - {"VBUS_C0", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, - {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, - {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, - /* AMON/BMON gain = 17.97 */ - {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, - CHIP_ADC_CH3}, - {"VBUS_C1", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH5}, - {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, + { "BOARD_ID", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1 }, + { "TEMP_CPU", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2 }, + { "TEMP_GPU", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH3 }, + { "TEMP_CHARGER", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH5 }, }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); -/* PWM */ - -/* - * PWM channels. Must be in the exactly same order as in enum pwm_channel. - * There total three 16 bits clock prescaler registers for all pwm channels, - * so use the same frequency and prescaler register setting is required if - * number of pwm channel greater than three. - */ +/* PWM channels. */ const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1] = { - .channel = 0, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + [PWM_CH_LED_GREEN] = { + .channel = PWM_HW_CH_DCR0, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_OPEN_DRAIN | + PWM_CONFIG_ACTIVE_LOW, .freq_hz = 324, /* maximum supported frequency */ .pcfsr_sel = PWM_PRESCALER_C4 }, - [PWM_CH_LED2] = { - .channel = 1, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + [PWM_CH_LED_RED] = { + .channel = PWM_HW_CH_DCR1, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_OPEN_DRAIN | + PWM_CONFIG_ACTIVE_LOW, .freq_hz = 324, /* maximum supported frequency */ .pcfsr_sel = PWM_PRESCALER_C4 }, - [PWM_CH_LED3] = { - .channel = 2, - .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, - .freq_hz = 324, /* maximum supported frequency */ + [PWM_CH_FAN] = { + .channel = PWM_HW_CH_DCR2, + .flags = PWM_CONFIG_OPEN_DRAIN, + .freq_hz = 25000, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_KBLIGHT] = { + .channel = PWM_HW_CH_DCR3, + .flags = PWM_CONFIG_DSLEEP, + .freq_hz = 25000, .pcfsr_sel = PWM_PRESCALER_C4 }, }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); -int board_accel_force_mode_mask(void) -{ - int version = board_get_version(); - - if (version == -1 || version >= 2) - return 0; - return BIT(LID_ACCEL); -} - static void board_suspend(void) { - if (board_get_version() >= 3) - gpio_set_level(GPIO_EN_5V_USM, 0); } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_suspend, HOOK_PRIO_DEFAULT); static void board_resume(void) { - if (board_get_version() >= 3) - gpio_set_level(GPIO_EN_5V_USM, 1); } DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_resume, HOOK_PRIO_DEFAULT); - -__override int syv682x_board_is_syv682c(int port) -{ - return board_get_version() > 2; -} - -#ifdef CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT -enum adc_channel board_get_vbus_adc(int port) -{ - if (port == 0) - return ADC_VBUS_C0; - if (port == 1) - return ADC_VBUS_C1; - CPRINTSUSB("Unknown vbus adc port id: %d", port); - return ADC_VBUS_C0; -} -#endif /* CONFIG_USB_PD_VBUS_MEASURE_ADC_EACH_PORT */ diff --git a/board/goroh/board.h b/board/goroh/board.h index 29334c9d7e..dec936adb7 100644 --- a/board/goroh/board.h +++ b/board/goroh/board.h @@ -21,14 +21,22 @@ */ #define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM -/* BC12 */ -/* TODO(b/159583342): remove after rev0 deprecated */ -#define CONFIG_MT6360_BC12_GPIO - /* LED */ +#define CONFIG_LED_PWM_COUNT 1 +#define CONFIG_LED_PWM #define CONFIG_LED_POWER_LED -#define CONFIG_LED_ONOFF_STATES -#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10 +#undef CONFIG_LED_PWM_NEAR_FULL_COLOR +#undef CONFIG_LED_PWM_CHARGE_COLOR +#undef CONFIG_LED_PWM_CHARGE_ERROR_COLOR +#undef CONFIG_LED_PWM_LOW_BATT_COLOR +#undef CONFIG_LED_PWM_SOC_ON_COLOR +#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR +#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_GREEN +#define CONFIG_LED_PWM_CHARGE_COLOR EC_LED_COLOR_GREEN +#define CONFIG_LED_PWM_CHARGE_ERROR_COLOR EC_LED_COLOR_RED +#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_RED +#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_COUNT /* OFF */ +#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_COUNT /* OFF */ /* PD / USB-C / PPC */ #define CONFIG_USB_PD_DEBUG_LEVEL 3 @@ -50,18 +58,21 @@ #define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) -#define CONFIG_ACCEL_LIS2DWL -#define CONFIG_ACCEL_LIS2DW_AS_BASE -#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) - #define CONFIG_LID_ANGLE #define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL #define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL #define CONFIG_LID_ANGLE_UPDATE -/* TODO(b/171931139): remove this after rev1 board deprecated */ -#define CONFIG_ACCEL_FORCE_MODE_MASK (board_accel_force_mode_mask()) +#define CONFIG_ACCEL_BMA255 /* Lid accel BMA253 */ + +/* Sensors without hardware FIFO are in forced mode */ +#define CONFIG_ACCEL_FORCE_MODE_MASK \ + (BIT(LID_ACCEL) | BIT(BASE_GYRO) | BIT(BASE_ACCEL)) + +/* Thermistors */ +#define CONFIG_TEMP_SENSOR +#define CONFIG_THERMISTOR +#define CONFIG_STEINHART_HART_3V3_51K1_47K_4050B /* SPI / Host Command */ #undef CONFIG_HOSTCMD_DEBUG_MODE @@ -76,7 +87,7 @@ #include "registers.h" enum battery_type { - BATTERY_C235, + BATTERY_LGC_AP18C8K, BATTERY_TYPE_COUNT, }; @@ -89,25 +100,40 @@ enum sensor_id { }; enum adc_channel { - ADC_VBUS, /* ADC 0 */ - ADC_BOARD_ID_0, /* ADC 1 */ - ADC_BOARD_ID_1, /* ADC 2 */ - ADC_CHARGER_AMON_R, /* ADC 3 */ - ADC_VBUS_C1, /* ADC 5 */ - ADC_CHARGER_PMON, /* ADC 6 */ + ADC_BOARD_ID, /* ADC 1 */ + ADC_TEMP_SENSOR_CPU, /* ADC 2 */ + ADC_TEMP_SENSOR_GPU, /* ADC 3 */ + ADC_TEMP_SENSOR_CHARGER, /* ADC 5 */ /* Number of ADC channels */ ADC_CH_COUNT, }; +enum usbc_port { + USBC_PORT_C0 = 0, + USBC_PORT_C1, + USBC_PORT_COUNT +}; + enum pwm_channel { - PWM_CH_LED1, - PWM_CH_LED2, - PWM_CH_LED3, + PWM_CH_LED_GREEN, + PWM_CH_LED_RED, + PWM_CH_FAN, + PWM_CH_KBLIGHT, PWM_CH_COUNT, }; -int board_accel_force_mode_mask(void); +enum fan_channel { + FAN_CH_0, + FAN_CH_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_CPU, + TEMP_SENSOR_GPU, + TEMP_SENSOR_CHARGER, + TEMP_SENSOR_COUNT, +}; #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/goroh/build.mk b/board/goroh/build.mk index 468d9ad365..4bc0561678 100644 --- a/board/goroh/build.mk +++ b/board/goroh/build.mk @@ -11,4 +11,8 @@ CHIP_FAMILY:=it8xxx2 CHIP_VARIANT:=it81202bx_1024 BASEBOARD:=goroh -board-y+=battery.o board.o led.o +board-y+=battery.o +board-y+=board.o +board-y+=fans.o +board-y+=led.o +board-y+=sensors.o diff --git a/board/goroh/ec.tasklist b/board/goroh/ec.tasklist index 75dbb1a828..6bc80781d8 100644 --- a/board/goroh/ec.tasklist +++ b/board/goroh/ec.tasklist @@ -8,11 +8,9 @@ */ #define CONFIG_TASK_LIST \ TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(PDCMD, pd_command_task, NULL, 1024) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 1024) \ TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ diff --git a/board/goroh/fans.c b/board/goroh/fans.c new file mode 100644 index 0000000000..415eb9681d --- /dev/null +++ b/board/goroh/fans.c @@ -0,0 +1,91 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Physical fans. These are logically separate from pwm_channels. */ + +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "fan.h" +#include "hooks.h" +#include "pwm.h" +#include "pwm_chip.h" + +const struct fan_conf fan_conf_0 = { + .flags = FAN_USE_RPM_MODE, + .ch = PWM_CH_FAN, + .pgood_gpio = -1, + .enable_gpio = GPIO_EN_PP5000_FAN_X, +}; + +const struct fan_rpm fan_rpm_0 = { + .rpm_min = 2400, + .rpm_start = 2400, + .rpm_max = 5700, +}; + +const struct fan_t fans[] = { + [FAN_CH_0] = { + .conf = &fan_conf_0, + .rpm = &fan_rpm_0, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS); +/* + * PWM HW channelx binding tachometer channelx for fan control. + * Four tachometer input pins but two tachometer modules only, + * so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or + * [TACH_CH_TACH1A | TACH_CH_TACH1B] + */ +const struct fan_tach_t fan_tach[] = { + [PWM_HW_CH_DCR0] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR1] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR2] = { + .ch_tach = TACH_CH_TACH0A, + .fan_p = 2, + .rpm_re = 50, + .s_duty = 30, + }, + [PWM_HW_CH_DCR3] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR4] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR5] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR6] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR7] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, +}; diff --git a/board/goroh/gpio.inc b/board/goroh/gpio.inc index 8ffbb16414..9d10ea37bd 100644 --- a/board/goroh/gpio.inc +++ b/board/goroh/gpio.inc @@ -9,45 +9,46 @@ * Note: Those with interrupt handlers must be declared first. */ /* Wake Source interrupts */ -GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP | - GPIO_HIB_WAKE_HIGH, power_button_interrupt) /* H1_EC_PWR_BTN_ODL */ +GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + power_button_interrupt) /* H1_EC_PWR_BTN_ODL */ GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) GPIO_INT(TABLET_MODE_L, PIN(J, 7), GPIO_INT_BOTH, gmr_tablet_switch_isr) -/* Chipset interrupts */ +/* Power sequencing interrupts */ GPIO_INT(AP_EC_WARM_RST_REQ, PIN(D, 3), GPIO_INT_RISING | GPIO_SEL_1P8V, chipset_reset_request_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(AP_EC_WATCHDOG_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, - chipset_watchdog_interrupt) -GPIO_INT(AP_IN_SLEEP_L, PIN(F, 2), - GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) -GPIO_INT(PMIC_EC_PWRGD, PIN(F, 3), - GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) +GPIO_INT(AP_EC_SHUTDOWN_REQ_L, PIN(F, 2), + GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, + chipset_reset_request_interrupt) +GPIO_INT(AP_EC_WATCHDOG_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, + power_signal_interrupt) +GPIO_INT(PG_S5_PWR_OD, PIN(A, 6), GPIO_INT_BOTH, + power_signal_interrupt) +GPIO_INT(PG_VDD1_VDD2_OD, PIN(M, 6), GPIO_INT_BOTH | GPIO_SEL_1P8V, + power_signal_interrupt) +GPIO_INT(PG_VDD_MEDIA_ML_OD, PIN(J, 3), GPIO_INT_BOTH, + power_signal_interrupt) +GPIO_INT(PG_VDD_SOC_OD, PIN(J, 4), GPIO_INT_BOTH, + power_signal_interrupt) +GPIO_INT(PG_VDD_DDR_OD, PIN(J, 5), GPIO_INT_BOTH, + power_signal_interrupt) /* Sensor Interrupts */ -GPIO_INT(BASE_IMU_INT_L, PIN(J, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, +GPIO_INT(BASE_IMU_INT_L, PIN(M, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi160_interrupt) -GPIO_INT(LID_ACCEL_INT_L, PIN(J, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, - lis2dw12_interrupt) -GPIO(ALS_RGB_INT_ODL, PIN(F, 0), GPIO_INPUT) /* USB-C interrupts */ -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(D, 1), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C0_BC12_INT_ODL,PIN(J, 6), GPIO_INT_FALLING, bc12_interrupt) -GPIO_INT(USB_C1_BC12_INT_L, PIN(J, 4), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C0_FAULT_ODL, PIN(D, 1), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USB_C1_FAULT_ODL, PIN(B, 2), GPIO_INT_BOTH, ppc_interrupt) /* Volume button interrupts */ -GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, - button_interrupt) /* EC_VOLDN_BTN_ODL */ -GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, - button_interrupt) /* EC_VOLUP_BTN_ODL */ +GPIO_INT(EC_VOLUP_BTN_ODL, PIN(D, 5), GPIO_INT_BOTH, button_interrupt) +GPIO_INT(EC_VOLDN_BTN_ODL, PIN(H, 6), GPIO_INT_BOTH, button_interrupt) /* Other interrupts */ -GPIO_INT(AC_PRESENT, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, +GPIO_INT(ACOK_OD, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* AC_OK / AC_PRESENT in rev1+ */ GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UART_DEBUG_TX_EC_RX */ @@ -55,34 +56,44 @@ GPIO_INT(WP, PIN(I, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, switch_interrupt) /* EC_FLASH_WP_OD */ GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING, spi_event) /* SPI slave Chip Select -- AP_SPI_EC_CS_L */ -GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_ODR_HIGH, x_ec_interrupt) /* Power Sequencing Signals */ -GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(EC_PMIC_WATCHDOG_L, PIN(H, 0), GPIO_ODR_LOW | GPIO_SEL_1P8V) -GPIO(EN_PP5000_A, PIN(C, 6), GPIO_OUT_HIGH) -GPIO(PG_MT6315_PROC_ODL, PIN(E, 1), GPIO_INPUT) -GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT) -GPIO(PG_PP5000_A_ODL, PIN(A, 6), GPIO_INPUT) -GPIO(EN_SLP_Z, PIN(E, 3), GPIO_OUT_LOW) +GPIO(EN_PP1800_S5, PIN(H, 0), GPIO_OUT_LOW) +GPIO(EN_PP5000_S5, PIN(C, 6), GPIO_OUT_HIGH) /* default high for PPC init on start up. */ +GPIO(EN_VDD_SOC, PIN(E, 1), GPIO_OUT_LOW) +GPIO(EN_VDD_MEDIA_ML, PIN(F, 1), GPIO_OUT_LOW) GPIO(SYS_RST_ODL, PIN(B, 6), GPIO_ODR_LOW) GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V) +GPIO(EN_VDDQ_VR_D, PIN(M, 3), GPIO_OUT_LOW) +GPIO(EN_PP1820A_IO_X, PIN(D, 4), GPIO_OUT_LOW) +GPIO(EN_PP1800_VDD33_PMC_X, PIN(D, 0), GPIO_OUT_LOW) +GPIO(EN_PP0800_VDD_PMC_X, PIN(D, 2), GPIO_OUT_LOW) +GPIO(EN_VDD1_VDD2_VR, PIN(A, 7), GPIO_OUT_LOW) +GPIO(EN_PP3300A_IO_X, PIN(D, 7), GPIO_OUT_LOW) +GPIO(EN_VDD_DDR, PIN(I, 0), GPIO_OUT_LOW) +GPIO(EN_VDD_CPU, PIN(F, 3), GPIO_OUT_LOW) +GPIO(EN_PP1800_S3, PIN(G, 2), GPIO_OUT_LOW) +GPIO(EN_PP3300_S3, PIN(G, 3), GPIO_OUT_LOW) +GPIO(EN_VDD_GPU, PIN(G, 1), GPIO_OUT_LOW) +GPIO(EN_PP1800_VDDIO_PMC_X, PIN(B, 7), GPIO_OUT_LOW) /* MKBP event synchronization */ GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ /* USB and USBC Signals */ -GPIO(DP_AUX_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) -GPIO(EC_DPBRDG_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(EN_PP5000_USB_A0_VBUS, PIN(B, 7), GPIO_OUT_LOW) -GPIO(USB_C0_FRS_EN, PIN(H, 3), GPIO_OUT_LOW) +GPIO(USB_C1_HPD_3V3, PIN(J, 0), GPIO_OUT_LOW) +GPIO(USB_C0_HPD_3V3, PIN(J, 1), GPIO_OUT_LOW) +GPIO(USB_C1_HPD_IN, PIN(J, 2), GPIO_OUT_LOW) +GPIO(EN_USB_C1_MUX_PWR, PIN(F, 0), GPIO_OUT_LOW) +GPIO(USB_C0_SBU1_DC, PIN(H, 4), GPIO_OUT_LOW) +GPIO(USB_C0_SBU2_DC, PIN(H, 5), GPIO_OUT_LOW) /* Misc Signals */ GPIO(EC_BATT_PRES_ODL, PIN(C, 0), GPIO_INPUT) -GPIO(BC12_DET_EN, PIN(J, 5), GPIO_OUT_LOW) /* EN_USB_C0_BC12_DET */ -GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ -GPIO(EN_5V_USM, PIN(D, 7), GPIO_OUT_LOW) +GPIO(EN_EC_ID_ODL, PIN(C, 3), GPIO_OUT_LOW) +GPIO(EN_PP5000_FAN_X, PIN(E, 3), GPIO_OUT_LOW) +GPIO(EN_PPVAR_KB_BL_X, PIN(H, 3), GPIO_OUT_LOW) /* I2C pins - Alternate function below configures I2C module on these pins */ GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) /* I2C_CHG_BATT_SCL */ @@ -100,9 +111,8 @@ GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */ /* Keyboard pins */ -/* Subboards HDMI/TYPEC */ -GPIO(EC_X_GPIO1, PIN(H, 4), GPIO_OUT_LOW) -GPIO(EC_X_GPIO3, PIN(J, 1), GPIO_INPUT) +/* CLOCK */ +GPIO(CLK_32_EC, PIN(J, 6), GPIO_INPUT) /* Alternate functions GPIO definitions */ ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */ @@ -114,24 +124,20 @@ ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E */ ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ /* PWM */ -ALTERNATE(PIN_MASK(A, 0x07), 1, MODULE_PWM, 0) /* PWM 0~2 */ +ALTERNATE(PIN_MASK(A, 0x0F), 1, MODULE_PWM, 0) /* PWM 0~3 */ +ALTERNATE(PIN_MASK(D, 0x40), 3, MODULE_PWM, GPIO_PULL_UP) /* TACH0A for FAN1 */ /* ADC */ -ALTERNATE(PIN_MASK(I, 0x6F), 0, MODULE_ADC, 0) /* ADC 0,1,2,3,5,6 */ +ALTERNATE(PIN_MASK(I, 0x2E), 0, MODULE_ADC, 0) /* ADC 1,2,3,5 */ /* SPI */ ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ -/* Unimplemented Pins */ -GPIO(SET_VMC_VOLT_AT_1V8, PIN(D, 4), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) -GPIO(EN_PP3000_VMC_PMU, PIN(D, 2), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) -GPIO(PACKET_MODE_EN, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) -/* b/160218054: behavior not defined */ +/* unused, configure as input pin */ +GPIO(LID_ACCEL_INT_L, PIN(G, 0), GPIO_INPUT | GPIO_SEL_1P8V) + /* *_ODL pin has external pullup so don't pull it down. */ -GPIO(USB_A0_FAULT_ODL, PIN(A, 7), GPIO_INPUT) -GPIO(CHARGER_PROCHOT_ODL, PIN(C, 3), GPIO_INPUT) -GPIO(PG_MT6315_GPU_ODL, PIN(H, 6), GPIO_INPUT) -GPIO(EN_PP3000_SD_U, PIN(G, 1), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) + /* reserved for future use */ GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) /* @@ -140,15 +146,11 @@ GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) */ GPIO(NC_GPI7, PIN(I, 7), GPIO_OUT_LOW) /* NC pins, enable internal pull-up/down to avoid floating state. */ -GPIO(NC_GPM2, PIN(M, 2), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM3, PIN(M, 3), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) /* - * These 4 pins don't have internal pull-down capability, + * These 3 pins don't have internal pull-down capability, * so we set them as output low. */ -GPIO(NC_GPG3, PIN(G, 3), GPIO_OUT_LOW) GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) diff --git a/board/goroh/led.c b/board/goroh/led.c index c06fdef0cb..63f00ef82e 100644 --- a/board/goroh/led.c +++ b/board/goroh/led.c @@ -4,41 +4,31 @@ */ #include "ec_commands.h" -#include "gpio.h" #include "led_common.h" -#include "led_onoff_states.h" -#include "chipset.h" -#include "driver/bc12/mt6360.h" +#include "led_pwm.h" +#include "pwm.h" -const int led_charge_lvl_1 = 5; -const int led_charge_lvl_2 = 95; - -struct led_descriptor led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_WHITE, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC} }, +struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { + /* Green, Red */ + [EC_LED_COLOR_RED] = { 0, 100 }, + [EC_LED_COLOR_GREEN] = { 100, 0 }, + [EC_LED_COLOR_BLUE] = { 0, 0 }, + [EC_LED_COLOR_YELLOW] = { 0, 0 }, + [EC_LED_COLOR_WHITE] = { 0, 0 }, + [EC_LED_COLOR_AMBER] = { 0, 0 }, }; -const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 3 * LED_ONE_SEC} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, +struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = { + [PWM_LED0] = { + /* left port LEDs */ + .ch0 = PWM_CH_LED_GREEN, + .ch1 = PWM_CH_LED_RED, + .ch2 = PWM_LED_NO_CHANNEL, + .enable = &pwm_enable, + .set_duty = &pwm_set_duty, + }, }; - const enum ec_led_id supported_led_ids[] = { EC_LED_ID_BATTERY_LED, EC_LED_ID_POWER_LED, @@ -46,74 +36,31 @@ const enum ec_led_id supported_led_ids[] = { const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); -void led_set_color_battery(enum ec_led_colors color) -{ - mt6360_led_set_brightness(MT6360_LED_RGB2, 50); - mt6360_led_set_brightness(MT6360_LED_RGB3, 50); - - switch (color) { - case EC_LED_COLOR_AMBER: - mt6360_led_enable(MT6360_LED_RGB2, 0); - mt6360_led_enable(MT6360_LED_RGB3, 1); - break; - case EC_LED_COLOR_WHITE: - mt6360_led_enable(MT6360_LED_RGB2, 1); - mt6360_led_enable(MT6360_LED_RGB3, 0); - break; - default: /* LED_OFF and other unsupported colors */ - mt6360_led_enable(MT6360_LED_RGB2, 0); - mt6360_led_enable(MT6360_LED_RGB3, 0); - break; - } -} - -void led_set_color_power(enum ec_led_colors color) -{ - mt6360_led_set_brightness(MT6360_LED_RGB1, 1); - mt6360_led_enable(MT6360_LED_RGB1, color == EC_LED_COLOR_WHITE); -} - void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { - if (led_id == EC_LED_ID_BATTERY_LED) { - brightness_range[EC_LED_COLOR_AMBER] = - MT6360_LED_BRIGHTNESS_MAX; - brightness_range[EC_LED_COLOR_WHITE] = - MT6360_LED_BRIGHTNESS_MAX; - } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = - MT6360_LED_BRIGHTNESS_MAX; - } + if (led_id == EC_LED_ID_BATTERY_LED) + brightness_range[EC_LED_COLOR_RED] = 100; + else if (led_id == EC_LED_ID_POWER_LED) + brightness_range[EC_LED_COLOR_GREEN] = 100; } int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) { - if (led_id == EC_LED_ID_BATTERY_LED) { - if (brightness[EC_LED_COLOR_AMBER] != 0) - led_set_color_battery(EC_LED_COLOR_AMBER); - else if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_battery(EC_LED_COLOR_WHITE); - else - led_set_color_battery(LED_OFF); - } else if (led_id == EC_LED_ID_POWER_LED) { - if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_power(EC_LED_COLOR_WHITE); - else - led_set_color_power(LED_OFF); - } + enum pwm_led_id pwm_id; - return EC_SUCCESS; -} + /* Convert ec_led_id to pwm_led_id. */ + if (led_id == EC_LED_ID_POWER_LED || led_id == EC_LED_ID_BATTERY_LED) + pwm_id = PWM_LED0; + else + return EC_ERROR_UNKNOWN; -__override enum led_states board_led_get_state(enum led_states desired_state) -{ - if (desired_state == STATE_BATTERY_ERROR) { - if (chipset_in_state(CHIPSET_STATE_ON)) - return desired_state; - else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) - return STATE_DISCHARGE_S3; - else - return STATE_DISCHARGE_S5; - } - return desired_state; + if (brightness[EC_LED_COLOR_RED]) + set_pwm_led_color(pwm_id, EC_LED_COLOR_RED); + else if (brightness[EC_LED_COLOR_GREEN]) + set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN); + else + /* Otherwise, the "color" is "off". */ + set_pwm_led_color(pwm_id, -1); + + return EC_SUCCESS; } diff --git a/board/goroh/sensors.c b/board/goroh/sensors.c new file mode 100644 index 0000000000..fe0a50b762 --- /dev/null +++ b/board/goroh/sensors.c @@ -0,0 +1,124 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Goroh sensors configuration */ + +#include "driver/accel_bma2x2.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/als_tcs3400.h" +#include "driver/temp_sensor/thermistor.h" +#include "lid_switch.h" +#include "motion_sense.h" +#include "spi.h" +#include "thermal.h" +#include "temp_sensor.h" + +static struct mutex g_base_mutex; +static struct mutex g_lid_mutex; + +static struct bmi_drv_data_t g_bmi160_data; +static struct accelgyro_saved_data_t g_bma253_data; + +struct motion_sensor_t motion_sensors[] = { + /* + * Note: bmi160: supports accelerometer and gyro sensor + * Requirement: accelerometer sensor must init before gyro sensor + * DO NOT change the order of the following table. + */ + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, + .rot_standard_ref = NULL, /* identity matrix */ + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ + .min_frequency = BMI_ACCEL_MIN_FREQ, + .max_frequency = BMI_ACCEL_MAX_FREQ, + .config = { + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = NULL, /* identity matrix */ + .min_frequency = BMI_GYRO_MIN_FREQ, + .max_frequency = BMI_GYRO_MAX_FREQ, + }, + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMA255, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &bma2x2_accel_drv, + .mutex = &g_lid_mutex, + .drv_data = &g_bma253_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS, + .rot_standard_ref = NULL, /* identity matrix */ + .min_frequency = BMI_GYRO_MIN_FREQ, + .min_frequency = BMA255_ACCEL_MIN_FREQ, + .max_frequency = BMA255_ACCEL_MAX_FREQ, + .default_range = 2, /* g, to support tablet mode */ + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on in S3 */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +/* Temperature sensor configuration */ +const struct temp_sensor_t temp_sensors[] = { + [TEMP_SENSOR_CPU] = { + .name = "CPU", + .type = TEMP_SENSOR_TYPE_CPU, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_CPU, + }, + [TEMP_SENSOR_GPU] = { + .name = "GPU", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_GPU, + }, + [TEMP_SENSOR_CHARGER] = { + .name = "Charger", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_51k1_47k_4050b, + .idx = ADC_TEMP_SENSOR_CHARGER, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); diff --git a/board/goroh/usbc_confg.c b/board/goroh/usbc_confg.c new file mode 100644 index 0000000000..57a52da986 --- /dev/null +++ b/board/goroh/usbc_confg.c @@ -0,0 +1,33 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <stdbool.h> + +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "driver/bc12/pi3usb9201_public.h" +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/syv682x_public.h" +#include "driver/retimer/bb_retimer_public.h" +#include "driver/tcpm/nct38xx.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" +#include "ec_commands.h" +#include "fw_config.h" +#include "gpio.h" + +static void board_tcpc_init(void) +{ + /* Don't reset TCPCs after initial reset */ + if (!system_jumped_late()) + board_reset_pd_mcu(); + + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_FAULT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_FAULT_ODL); +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); diff --git a/board/gumboz/led.c b/board/gumboz/led.c index 8565da313f..ac27fe3a2c 100644 --- a/board/gumboz/led.c +++ b/board/gumboz/led.c @@ -45,7 +45,7 @@ enum led_port { static void led_set_color_battery(int port, enum led_color color) { - enum gpio_signal amber_led, white_led; + int amber_led, white_led; uint32_t board_ver = 0; int led_batt_on_lvl, led_batt_off_lvl; diff --git a/board/guybrush/board.h b/board/guybrush/board.h index 39adbc2ec7..dc6a7e882a 100644 --- a/board/guybrush/board.h +++ b/board/guybrush/board.h @@ -37,6 +37,12 @@ #define CONFIG_USB_MUX_ANX7451 #define CONFIG_USBC_RETIMER_ANX7451 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_CURRENT_MA 5000 +#define PD_MAX_VOLTAGE_MV 20000 +/* Max Power = 100 W */ +#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000) + /* USB Type A Features */ /* BC 1.2 */ @@ -49,6 +55,9 @@ #define CONFIG_LED_COMMON #define CONFIG_LED_ONOFF_STATES +/* Thermal Config */ +#define CONFIG_TEMP_SENSOR_TMP112 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" diff --git a/board/halvor/battery.c b/board/halvor/battery.c deleted file mode 100644 index 828220fd49..0000000000 --- a/board/halvor/battery.c +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery_fuel_gauge.h" -#include "common.h" -#include "util.h" - -/* - * Battery info for all Volteer battery types. Note that the fields - * start_charging_min/max and charging_min/max are not used for the charger. - * The effective temperature limits are given by discharging_min/max_c. - * - * Fuel Gauge (FG) parameters which are used for determining if the battery - * is connected, the appropriate ship mode (battery cutoff) command, and the - * charge/discharge FETs status. - * - * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery - * register. For some batteries, the charge/discharge FET bits are set when - * charging/discharging is active, in other types, these bits set mean that - * charging/discharging is disabled. Therefore, in addition to the mask for - * these bits, a disconnect value must be specified. Note that for TI fuel - * gauge, the charge/discharge FET status is found in Operation Status (0x54), - * but a read of Manufacturer Access (0x00) will return the lower 16 bits of - * Operation status which contains the FET status bits. - * - * The assumption for battery types supported is that the charge/discharge FET - * status can be read with a sb_read() command and therefore, only the register - * address, mask, and disconnect value need to be provided. - */ -const struct board_batt_params board_battery_info[] = { - /* AEC AEC335181 Battery Information */ - /* - * Battery info provided by ODM on b/162908664, comment #4 - */ - [BATTERY_AEC] = { - .fuel_gauge = { - .manuf_name = "AEC", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, - }, - .fet = { - .mfgacc_support = 1, - .reg_addr = 0x0, - .reg_mask = 0x2000, - .disconnect_val = 0x2000, - } - }, - .batt_info = { - .voltage_max = 8700, /* mV */ - .voltage_normal = 7600, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 50, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_AEC; diff --git a/board/halvor/board.c b/board/halvor/board.c deleted file mode 100644 index 53828b5318..0000000000 --- a/board/halvor/board.c +++ /dev/null @@ -1,528 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board-specific configuration */ -#include "accelgyro.h" -#include "assert.h" -#include "button.h" -#include "common.h" -#include "cbi_ec_fw_config.h" -#include "driver/accel_bma2x2.h" -#include "driver/als_tcs3400.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/ppc/syv682x.h" -#include "driver/retimer/bb_retimer_public.h" -#include "driver/sync.h" -#include "driver/tcpm/tcpci.h" -#include "driver/tcpm/tusb422.h" -#include "extpower.h" -#include "gpio.h" -#include "hooks.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "tablet_mode.h" -#include "uart.h" -#include "usb_pd_tbt.h" -#include "usbc_ppc.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" -#include "usb_mux.h" -#include "util.h" - -#include "gpio_list.h" /* Must come after other header files. */ - -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - /* Increase from 50 us, because KSO_02 passes through the H1. */ - .output_settle_us = 80, - /* Other values should be the same as the default configuration. */ - .debounce_down_us = 9 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf4, 0xff, - 0xa0, 0xff, 0xfe, 0x41, 0xfa, 0xc0, 0x02, - 0x08, /* full set */ - }, -}; - -/******************************************************************************/ -static const struct ec_response_keybd_config halvor_kb = { - .num_top_row_keys = 10, - .action_keys = { - TK_BACK, /* T1 */ - TK_REFRESH, /* T2 */ - TK_FULLSCREEN, /* T3 */ - TK_OVERVIEW, /* T4 */ - TK_BRIGHTNESS_DOWN, /* T5 */ - TK_BRIGHTNESS_UP, /* T6 */ - TK_PLAY_PAUSE, /* T7 */ - TK_VOL_MUTE, /* T8 */ - TK_VOL_DOWN, /* T9 */ - TK_VOL_UP, /* T10 */ - }, - .capabilities = KEYBD_CAP_SCRNLOCK_KEY, -}; - -__override const struct ec_response_keybd_config -*board_vivaldi_keybd_config(void) -{ - return &halvor_kb; -} - -/* - * FW_CONFIG defaults for Halvor if the CBI data is not initialized. - */ -union volteer_cbi_fw_config fw_config_defaults = { - /* Set all FW_CONFIG fields default to 0 */ - .raw_value = 0, -}; - -static void board_init(void) -{ - /* Illuminate motherboard and daughter board LEDs equally to start. */ - pwm_enable(PWM_CH_LED4_SIDESEL, 1); - pwm_set_duty(PWM_CH_LED4_SIDESEL, 50); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) -{ - /* Routing length exceeds 205mm prior to connection to re-timer */ - if (port == USBC_PORT_C1) - return TBT_SS_U32_GEN1_GEN2; - - /* - * Thunderbolt-compatible mode not supported - * - * TODO (b/153995632): All the USB-C ports need to support same speed. - * Need to fix once USB-C feature set is known for Halvor. - */ - return TBT_SS_RES_0; -} - -__override bool board_is_tbt_usb4_port(int port) -{ - /* - * On the volteer reference board 1 only port 1 supports TBT & USB4 - * - * TODO (b/153995632): All the USB-C ports need to support same - * features. Need to fix once USB-C feature set is known for Halvor. - */ - return port == USBC_PORT_C1; -} - -/******************************************************************************/ -/* I2C port map configuration */ -const struct i2c_port_t i2c_ports[] = { - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C_0_SCL, - .sda = GPIO_EC_I2C_0_SDA, - }, - { - .name = "usb_c0", - .port = I2C_PORT_USB_C0, - .kbps = 1000, - .scl = GPIO_EC_I2C_1_SCL, - .sda = GPIO_EC_I2C_1_SDA, - }, - { - .name = "usb_c1", - .port = I2C_PORT_USB_C1, - .kbps = 1000, - .scl = GPIO_EC_I2C_2_SCL, - .sda = GPIO_EC_I2C_2_SDA, - }, - { - .name = "usb_bb_retimer", - .port = I2C_PORT_USB_BB_RETIMER, - .kbps = 100, - .scl = GPIO_EC_I2C_3_SCL, - .sda = GPIO_EC_I2C_3_SDA, - }, - { - .name = "usb_c2", - .port = I2C_PORT_USB_C2, - .kbps = 1000, - .scl = GPIO_EC_I2C_4_SCL, - .sda = GPIO_EC_I2C_4_SDA, - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 100, - .scl = GPIO_EC_I2C_5_SCL, - .sda = GPIO_EC_I2C_5_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C_7_SCL, - .sda = GPIO_EC_I2C_7_SDA, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* PWM configuration */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1_BLUE] = { - .channel = 2, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED2_GREEN] = { - .channel = 0, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED3_RED] = { - .channel = 1, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED4_SIDESEL] = { - .channel = 7, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - /* Run at a higher frequency than the color PWM signals to avoid - * timing-based color shifts. - */ - .freq = 4800, - }, - [PWM_CH_FAN] = { - .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000 - }, - [PWM_CH_KBLIGHT] = { - .channel = 3, - .flags = 0, - /* - * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent - * flicker. Higher frequencies consume similar average power to - * lower PWM frequencies, but higher frequencies record a much - * lower maximum power. - */ - .freq = 2400, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/******************************************************************************/ -/* EC thermal management configuration */ - -/* - * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at - * 130 C. However, sensor is located next to DDR, so we need to use the lower - * DDR temperature limit (85 C) - */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; - -/* - * Inductor limits - used for both charger and PP3300 regulator - * - * Need to use the lower of the charger IC, PP3300 regulator, and the inductors - * - * Charger max recommended temperature 100C, max absolute temperature 125C - * PP3300 regulator: operating range -40 C to 145 C - * - * Inductors: limit of 125c - * PCB: limit is 80c - */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - - -struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -/******************************************************************************/ -void halvor_tcpc_alert_event(enum gpio_signal signal) -{ - int port = -1; - - switch (signal) { - case GPIO_USB_C0_TCPC_INT_ODL: - port = USBC_PORT_C0; - break; - case GPIO_USB_C1_TCPC_INT_ODL: - port = USBC_PORT_C1; - break; - case GPIO_USB_C2_TCPC_INT_ODL: - port = USBC_PORT_C2; - break; - default: - return; - } - - ASSERT(port != -1); - schedule_deferred_pd_interrupt(port); -} - -void halvor_ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C0); - break; - case GPIO_USB_C1_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C1); - break; - case GPIO_USB_C2_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C2); - break; - default: - break; - } -} - -void halvor_bc12_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); - break; - case GPIO_USB_C1_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); - break; - case GPIO_USB_C2_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12); - break; - - default: - break; - } -} - -void board_reset_pd_mcu(void) -{ - /* TODO (b/153705222): Need to implement three USB-C function */ -} - -__override void board_cbi_init(void) -{ - /* TODO (b/153705222): Check FW_CONFIG for USB DB options */ -} - -/******************************************************************************/ -/* USBC PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, - [USBC_PORT_C2] = { - .i2c_port = I2C_PORT_USB_C2, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/******************************************************************************/ -/* BC1.2 charger detect configuration */ -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C2] = { - .i2c_port = I2C_PORT_USB_C2, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC TCPC configuration */ -struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, - [USBC_PORT_C2] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C2, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC mux configuration - Tiger Lake includes internal mux */ -struct usb_mux usbc0_tcss_usb_mux = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; -struct usb_mux usbc1_tcss_usb_mux = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; -struct usb_mux usbc2_tcss_usb_mux = { - .usb_port = USBC_PORT_C2, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .next_mux = &usbc0_tcss_usb_mux, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .next_mux = &usbc1_tcss_usb_mux, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR, - }, - [USBC_PORT_C2] = { - .usb_port = USBC_PORT_C2, - .next_mux = &usbc2_tcss_usb_mux, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); - -struct bb_usb_control bb_controls[] = { - [USBC_PORT_C0] = { - .usb_ls_en_gpio = GPIO_USB_C0_LS_EN, - .retimer_rst_gpio = GPIO_USB_C0_RT_RST_ODL, - }, - [USBC_PORT_C1] = { - .usb_ls_en_gpio = GPIO_USB_C1_LS_EN, - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_ODL, - }, - [USBC_PORT_C2] = { - .usb_ls_en_gpio = GPIO_USB_C2_LS_EN, - .retimer_rst_gpio = GPIO_USB_C2_RT_RST_ODL, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(bb_controls) == USBC_PORT_COUNT); - -static void board_usb_chip_init(void) -{ - /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C2_TCPC_INT_ODL); - - /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_usb_chip_init, HOOK_PRIO_INIT_CHIPSET); - -/******************************************************************************/ -/* TCPC support routines */ -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set - */ - if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - if (!gpio_get_level(GPIO_USB_C2_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_2; - - return status; -} - -int ppc_get_alert_status(int port) -{ - if (port == USBC_PORT_C0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else if (port == USBC_PORT_C1) - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; - else - return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0; -} diff --git a/board/halvor/board.h b/board/halvor/board.h deleted file mode 100644 index b6ba645405..0000000000 --- a/board/halvor/board.h +++ /dev/null @@ -1,175 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Baseboard features */ -#include "baseboard.h" - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ - -#define CONFIG_POWER_BUTTON - -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* LED defines */ -#define CONFIG_LED_ONOFF_STATES -#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10 - -/* Keyboard features */ - -/* Sensors */ -/* BMA253 accelerometer in base */ -#define CONFIG_ACCEL_BMA255 - -/* TCS3400 ALS */ -#define CONFIG_ALS -#define ALS_COUNT 1 -#define CONFIG_ALS_TCS3400 -#define CONFIG_ALS_TCS3400_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) - -/* Sensors without hardware FIFO are in forced mode */ -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - (BIT(LID_ACCEL) | BIT(CLEAR_ALS)) - -/* USB Type C and USB PD defines */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 3 - -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* - * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C - * cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 65000 -#define PD_MAX_CURRENT_MA 3250 -#define PD_MAX_VOLTAGE_MV 20000 - -/* Enabling Thunderbolt-compatible mode */ -#define CONFIG_USB_PD_TBT_COMPAT_MODE - -/* Enabling USB4 mode */ -#define CONFIG_USB_PD_USB4 -#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x40 -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x41 -#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x42 - -/* USB Type A Features */ - -/* USBC PPC*/ -#define CONFIG_USBC_PPC_SYV682X /* USBC port C0 C1 C2 */ - -/* BC 1.2 */ - -/* Volume Button feature */ - -/* Fan features */ - -/* charger defines */ -#define CONFIG_CHARGER_SENSE_RESISTOR 5 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -/* - * Macros for GPIO signals used in common code that don't match the - * schematic names. Signal names in gpio.inc match the schematic and are - * then redefined here to so it's more clear which signal is being used for - * which purpose. - */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_USB_C0_BC12_INT_ODL GPIO_USB_C0_MIX_INT_ODL -#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL -#define GPIO_USB_C2_BC12_INT_ODL GPIO_USB_C2_MIX_INT_ODL -#define GPIO_WP_L GPIO_EC_WP_L -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -#undef CONFIG_FANS -#undef CONFIG_VOLUME_BUTTONS - -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_BB_RETIMER NPCX_I2C_PORT3_0 -#define I2C_PORT_USB_C2 NPCX_I2C_PORT4_1 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 - -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_EEPROM -#define I2C_PORT_USB_1_MIX I2C_PORT_USB_BB_RETIMER - -#define I2C_ADDR_EEPROM_FLAGS 0x50 -#define CONFIG_I2C_CONTROLLER - - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_AEC, - BATTERY_TYPE_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED1_BLUE = 0, - PWM_CH_LED2_GREEN, - PWM_CH_LED3_RED, - PWM_CH_LED4_SIDESEL, - PWM_CH_FAN, - PWM_CH_KBLIGHT, - PWM_CH_COUNT -}; - -enum sensor_id { - LID_ACCEL = 0, - CLEAR_ALS, - RGB_ALS, - SENSOR_COUNT, -}; - -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_C2, - USBC_PORT_COUNT -}; - -/* Definition for Halvor USB PD interrupt handlers. */ -void halvor_tcpc_alert_event(enum gpio_signal signal); -void halvor_ppc_interrupt(enum gpio_signal signal); -void halvor_bc12_interrupt(enum gpio_signal signal); - -void board_reset_pd_mcu(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/halvor/build.mk b/board/halvor/build.mk deleted file mode 100644 index b78172d3cf..0000000000 --- a/board/halvor/build.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m6fc -BASEBOARD:=volteer - -board-y=board.o -board-y+=battery.o -board-y+=led.o -board-y+=sensors.o diff --git a/board/halvor/ec.tasklist b/board/halvor/ec.tasklist deleted file mode 100644 index 936a4276e6..0000000000 --- a/board/halvor/ec.tasklist +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C2, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C2, pd_interrupt_handler_task, 2, TASK_STACK_SIZE) diff --git a/board/halvor/gpio.inc b/board/halvor/gpio.inc deleted file mode 100644 index 71823773e3..0000000000 --- a/board/halvor/gpio.inc +++ /dev/null @@ -1,183 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) -#endif -GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(EC_ALS_RGB_INT_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) -GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, halvor_tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, halvor_tcpc_alert_event) -GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(A, 0), GPIO_INT_BOTH, halvor_tcpc_alert_event) - -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, halvor_ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, halvor_ppc_interrupt) -GPIO_INT(USB_C2_PPC_INT_ODL, PIN(A, 4), GPIO_INT_BOTH, halvor_ppc_interrupt) - -GPIO_INT(USB_C0_MIX_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, halvor_bc12_interrupt) -GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, halvor_bc12_interrupt) -GPIO_INT(USB_C2_MIX_INT_ODL, PIN(6, 1), GPIO_INT_BOTH, halvor_bc12_interrupt) - -/* HDMI interrupts */ - -/* Volume button interrupts */ - -/* Unused signals */ -GPIO(EN_PP1050_STG, PIN(C, 0), GPIO_INPUT | GPIO_PULL_UP) -GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EN_PP1050_ST_S0, PIN(3, 4), GPIO_INPUT | GPIO_PULL_UP) -/* Power Sequencing Signals */ -GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) -GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000_USB_AG, PIN(A, 7), GPIO_OUT_HIGH) - -/* The EC does not buffer this signal on Halvor. */ -UNIMPLEMENTED(PCH_DSW_PWROK) -UNIMPLEMENTED(EN_PP5000_A) - -/* Other wake sources */ -/* - * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an - * interrupt handler because it is automatically handled by the PSL. - * - * We need to lock the setting so this gpio can't be reconfigured to overdrive - * the real reset signal. (This is the PSL input pin not the real reset pin). - */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | - GPIO_HIB_WAKE_HIGH | - GPIO_LOCKED) - -/* AP/PCH Signals */ -GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */ -GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) -GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_ODL, PIN(7, 4), GPIO_ODR_HIGH) -GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) -GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) - -GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) - -/* USB and USBC Signals */ -GPIO(USB_C0_RT_RST_ODL, PIN(6, 6), GPIO_ODR_LOW) -GPIO(USB_C1_RT_RST_ODL, PIN(8, 6), GPIO_ODR_LOW) -GPIO(USB_C2_RT_RST_ODL, PIN(9, 6), GPIO_ODR_LOW) - -GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) -GPIO(USB_C2_OC_ODL, PIN(3, 2), GPIO_ODR_HIGH) - - - -/* Don't have a load switch for retimer */ -UNIMPLEMENTED(USB_C0_LS_EN) -UNIMPLEMENTED(USB_C1_LS_EN) -UNIMPLEMENTED(USB_C2_LS_EN) -UNIMPLEMENTED(USB_C0_BC12_INT_ODL) -UNIMPLEMENTED(USB_C1_BC12_INT_ODL) - -/* Other input pins */ -GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) -GPIO(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INPUT) -GPIO(CHARGER_INT_L, PIN(7, 3), GPIO_INPUT) - -/* Other output pins */ -GPIO(EC_PPEXT_EN1, PIN(C, 2), GPIO_OUT_HIGH) -GPIO(EC_I2CBUFFER_EN, PIN(9, 3), GPIO_OUT_LOW) -GPIO(UART2_EC_RX, PIN(7, 5), GPIO_OUT_LOW) - -/* LED Signals */ -GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_LOW) -GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_LOW) - -/* Misc Signals */ - -/* - * eDP backlight - both PCH and EC have enable pins that must be high - * for the backlight to turn on. Default state is high, and can be turned - * off during sleep states. - */ -GPIO(EC_EDP_BL_EN, PIN(D, 3), GPIO_OUT_HIGH) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(EC_I2C_0_SCL, PIN(B, 5), GPIO_INPUT) -GPIO(EC_I2C_0_SDA, PIN(B, 4), GPIO_INPUT) -GPIO(EC_I2C_1_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C_1_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C_2_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C_2_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C_3_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C_3_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C_4_SCL, PIN(F, 3), GPIO_INPUT) -GPIO(EC_I2C_4_SDA, PIN(F, 2), GPIO_INPUT) -GPIO(EC_I2C_5_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C_5_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C_7_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C_7_SDA, PIN(B, 2), GPIO_INPUT) - -/* Battery signals */ -GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) - -/* Physical HPD pins are not needed on EC as these are configured by PMC */ -GPIO(USB_C0_DP_HPD, PIN(C, 6), GPIO_INPUT) -GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) -GPIO(USB_C2_DP_HPD, PIN(B, 7), GPIO_INPUT) - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, 0) /* I2C0 */ -ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE(PIN_MASK(F, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C4 */ -ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ - -/* Fan signals */ - -/* Keyboard pins */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ -GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 */ -ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ -ALTERNATE(PIN_MASK(8, 0x0C), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14-15 */ -ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_KB_BL_PWM */ - -/* UART */ -ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0) /* UART from EC to Servo */ - -/* Power Switch Logic (PSL) inputs */ -ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* GPIOD2 = EC_LID_OPEN */ -ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, - GPIO01 = H1_EC_PWR_BTN_ODL - GPIO02 = EC_RST_ODL */ - -/* Temperature sensors */ -ALTERNATE(PIN_MASK(4, BIT(2) | BIT(4) | BIT(5)), 0, MODULE_ADC, 0) /* TEMP_SENSOR1,2,4 */ -ALTERNATE(PIN_MASK(F, BIT(1)), 0, MODULE_ADC, 0) /* TEMP_SENSOR3 */ diff --git a/board/halvor/led.c b/board/halvor/led.c deleted file mode 100644 index 1e25e3e666..0000000000 --- a/board/halvor/led.c +++ /dev/null @@ -1,90 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control for Halvor - */ - -#include "ec_commands.h" -#include "gpio.h" -#include "led_common.h" -#include "led_onoff_states.h" -#include "chipset.h" - -#define LED_ON_LVL 1 -#define LED_OFF_LVL 0 - -__override const int led_charge_lvl_1 = 10; - -__override const int led_charge_lvl_2 = 100; - -__override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC}, - {LED_OFF, 2 * LED_ONE_SEC} }, -}; - -__override const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, -}; - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_BATTERY_LED, - EC_LED_ID_POWER_LED, -}; -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -__override void led_set_color_battery(enum ec_led_colors color) -{ - gpio_set_level(GPIO_LED_2_L, - (color == EC_LED_COLOR_AMBER) ? LED_ON_LVL : LED_OFF_LVL); -} - -__override void led_set_color_power(enum ec_led_colors color) -{ - gpio_set_level(GPIO_LED_1_L, - (color == EC_LED_COLOR_WHITE) ? LED_ON_LVL : LED_OFF_LVL); -} - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - if (led_id == EC_LED_ID_BATTERY_LED) - brightness_range[EC_LED_COLOR_AMBER] = 1; - else if (led_id == EC_LED_ID_POWER_LED) - brightness_range[EC_LED_COLOR_WHITE] = 1; - -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - if (brightness[EC_LED_COLOR_AMBER] != 0) - led_set_color_battery(EC_LED_COLOR_AMBER); - else - led_set_color_battery(LED_OFF); - } else if (led_id == EC_LED_ID_POWER_LED) { - if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_power(EC_LED_COLOR_WHITE); - else - led_set_color_power(LED_OFF); - } - - return EC_SUCCESS; -} diff --git a/board/halvor/sensors.c b/board/halvor/sensors.c deleted file mode 100644 index b2795ee904..0000000000 --- a/board/halvor/sensors.c +++ /dev/null @@ -1,170 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer family-specific sensor configuration */ -#include "common.h" -#include "accelgyro.h" -#include "driver/accel_bma2x2.h" -#include "driver/als_tcs3400.h" -#include "driver/sync.h" -#include "keyboard_scan.h" -#include "hooks.h" -#include "task.h" -#include "util.h" - -/******************************************************************************/ -/* Sensors */ -static struct mutex g_lid_accel_mutex; - -/* BMA253 private data */ -static struct accelgyro_saved_data_t g_bma253_data; - -/* TCS3400 private data */ -static struct als_drv_data_t g_tcs3400_data = { - .als_cal.scale = 1, - .als_cal.uscale = 0, - .als_cal.offset = 0, - .als_cal.channel_scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc from VPD */ - .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */ - }, -}; - -/* - * TODO: b/146166425 need to calibrate ALS/RGB sensor. At default settings, - * shining phone flashlight on sensor pegs all readings at 0xFFFF. - */ -static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = { - .calibration.rgb_cal[X] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - } - }, - .calibration.rgb_cal[Y] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - }, - }, - .calibration.rgb_cal[Z] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - } - }, - .calibration.irt = INT_TO_FP(1), - .saturation.again = TCS_DEFAULT_AGAIN, - .saturation.atime = TCS_DEFAULT_ATIME, -}; - -/* Rotation matrix for the lid accelerometer */ -/* TODO: b/146144170 - the accelerometer is on the motherboard for proto1 - * for testing. Once the sensor moves to the lid, the rotation matrix needs - * to be updated for correct behavior. - */ -static const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(-1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -struct motion_sensor_t motion_sensors[] = { - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMA255, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &bma2x2_accel_drv, - .mutex = &g_lid_accel_mutex, - .drv_data = &g_bma253_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS, - .rot_standard_ref = &lid_standard_ref, - .min_frequency = BMA255_ACCEL_MIN_FREQ, - .max_frequency = BMA255_ACCEL_MAX_FREQ, - .default_range = 2, /* g, to support tablet mode */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - - [CLEAR_ALS] = { - .name = "Clear Light", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_TCS3400, - .type = MOTIONSENSE_TYPE_LIGHT, - .location = MOTIONSENSE_LOC_BASE, - .drv = &tcs3400_drv, - .drv_data = &g_tcs3400_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1x, uscale = 0 */ - .min_frequency = TCS3400_LIGHT_MIN_FREQ, - .max_frequency = TCS3400_LIGHT_MAX_FREQ, - .config = { - /* Run ALS sensor in S0 */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 1000, - }, - }, - }, - - [RGB_ALS] = { - /* - * RGB channels read by CLEAR_ALS and so the i2c port and - * address do not need to be defined for RGB_ALS. - */ - .name = "RGB Light", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_TCS3400, - .type = MOTIONSENSE_TYPE_LIGHT_RGB, - .location = MOTIONSENSE_LOC_BASE, - .drv = &tcs3400_rgb_drv, - .drv_data = &g_tcs3400_rgb_data, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1x, uscale = 0 */ - }, -}; -unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */ -const struct motion_sensor_t *motion_als_sensors[] = { - &motion_sensors[CLEAR_ALS], -}; -BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); - -static void baseboard_sensors_init(void) -{ - /* Note - BMA253 interrupt unused by EC */ - - /* Enable interrupt for the TCS3400 color light sensor */ - gpio_enable_interrupt(GPIO_EC_ALS_RGB_INT_L); -} -DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_DEFAULT); diff --git a/board/hatch/board.c b/board/hatch/board.c index 75f3b5f6cb..025702a291 100644 --- a/board/hatch/board.c +++ b/board/hatch/board.c @@ -410,20 +410,25 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Hatch. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/hatch/board.h b/board/hatch/board.h index 487c8c25eb..3867ffd819 100644 --- a/board/hatch/board.h +++ b/board/hatch/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/hatch_fp/board_rw.c b/board/hatch_fp/board_rw.c index 4c83c8723c..00a6b89b19 100644 --- a/board/hatch_fp/board_rw.c +++ b/board/hatch_fp/board_rw.c @@ -35,7 +35,9 @@ static void configure_fp_sensor_spi(void) /* Configure SPI GPIOs */ gpio_config_module(MODULE_SPI_CONTROLLER, 1); - /* Set all SPI master signal pins to very high speed: B12/13/14/15 */ + /* Set all SPI controller signal pins to very high speed: + * B12/13/14/15 + */ STM32_GPIO_OSPEEDR(GPIO_B) |= 0xff000000; /* Enable clocks to SPI2 module (master) */ diff --git a/board/helios/board.c b/board/helios/board.c index cd2fb7e798..5858447edc 100644 --- a/board/helios/board.c +++ b/board/helios/board.c @@ -445,20 +445,25 @@ const struct temp_sensor_t temp_sensors[] = { BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* Helios temperature control thresholds */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(60), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(65), - .temp_fan_max = C_TO_K(80), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(60), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(65), \ + .temp_fan_max = C_TO_K(80), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/helios/board.h b/board/helios/board.h index dcda6e01fe..a29dda1adf 100644 --- a/board/helios/board.h +++ b/board/helios/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/hoho/board.h b/board/hoho/board.h index 8e6ec34b3d..635abfbeda 100644 --- a/board/hoho/board.h +++ b/board/hoho/board.h @@ -24,7 +24,7 @@ #define CONFIG_RWSIG #define CONFIG_RWSIG_TYPE_USBPD1 #define CONFIG_SHA256 -/* TODO(tbroch) Re-enable once STM spi master can be inhibited at boot so it +/* TODO(tbroch) Re-enable once STM spi controller can be inhibited at boot so it doesn't interfere with HDMI loading its f/w */ #undef CONFIG_SPI_FLASH #define CONFIG_SPI_CS_GPIO GPIO_PD_MCDP_SPI_CS_L diff --git a/board/hoho/build.mk b/board/hoho/build.mk index 18799c3b9f..71cea3f845 100644 --- a/board/hoho/build.mk +++ b/board/hoho/build.mk @@ -11,4 +11,4 @@ CHIP_FAMILY:=stm32f0 CHIP_VARIANT:=stm32f07x board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o diff --git a/board/hoho/usb_pd_pdo.c b/board/hoho/usb_pd_pdo.c new file mode 100644 index 0000000000..19b5d127a5 --- /dev/null +++ b/board/hoho/usb_pd_pdo.c @@ -0,0 +1,18 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +/* Source PDOs */ +const uint32_t pd_src_pdo[] = {}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +/* Fake PDOs : we just want our pre-defined voltages */ +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_COMM_CAP), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/hoho/usb_pd_pdo.h b/board/hoho/usb_pd_pdo.h new file mode 100644 index 0000000000..8a43db795e --- /dev/null +++ b/board/hoho/usb_pd_pdo.h @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_HOHO_USB_PD_PDO_H +#define __CROS_EC_BOARD_HOHO_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[0]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[1]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_HOHO_USB_PD_PDO_H */ diff --git a/board/hoho/usb_pd_policy.c b/board/hoho/usb_pd_policy.c index 2ee83d32aa..73f3fca16e 100644 --- a/board/hoho/usb_pd_policy.c +++ b/board/hoho/usb_pd_policy.c @@ -17,22 +17,13 @@ #include "usb_api.h" #include "usb_bb.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #include "util.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -/* Source PDOs */ -const uint32_t pd_src_pdo[] = {}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -/* Fake PDOs : we just want our pre-defined voltages */ -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_COMM_CAP), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - /* Holds valid object position (opos) for entered mode */ static int alt_mode[PD_AMODE_COUNT]; diff --git a/board/homestar/battery.c b/board/homestar/battery.c index b1a05809f0..7cfd201b0f 100644 --- a/board/homestar/battery.c +++ b/board/homestar/battery.c @@ -60,6 +60,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* COSMX GH02047XL */ @@ -89,6 +90,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* COSMX DS02032XL */ @@ -118,6 +120,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* SMP DS02032XL */ @@ -147,6 +150,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Sunwoda L21D4PG0 */ @@ -176,6 +180,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 60, .discharging_min_c = -20, .discharging_max_c = 60, + .vendor_param_start = 0x2f, }, }, /* SMP L21M4PG0 */ @@ -205,6 +210,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 60, .discharging_min_c = -20, .discharging_max_c = 60, + .vendor_param_start = 0x2f, }, }, }; diff --git a/board/homestar/board.c b/board/homestar/board.c index 22f940eec2..47ac34af2c 100644 --- a/board/homestar/board.c +++ b/board/homestar/board.c @@ -674,25 +674,3 @@ uint16_t tcpc_get_alert_status(void) return status; } - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/homestar/board.h b/board/homestar/board.h index 650ba638ec..4f33b08acc 100644 --- a/board/homestar/board.h +++ b/board/homestar/board.h @@ -34,6 +34,7 @@ #define CONFIG_USB_PD_TCPM_MULTI_PS8XXX #define CONFIG_USB_PD_TCPM_PS8755 #define CONFIG_USB_PD_TCPM_PS8805 +#define CONFIG_USB_PD_TCPM_PS8805_FORCE_DID #define CONFIG_USBC_PPC_SN5S330 #define CONFIG_USB_PD_PORT_MAX_COUNT 2 diff --git a/board/host/build.mk b/board/host/build.mk index 241f197342..17927528c2 100644 --- a/board/host/build.mk +++ b/board/host/build.mk @@ -12,4 +12,4 @@ board-y=board.o board-$(HAS_TASK_CHIPSET)+=chipset.o board-$(CONFIG_BATTERY_MOCK)+=battery.o charger.o board-$(CONFIG_FANS)+=fan.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_config.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_config.o usb_pd_pdo.o diff --git a/board/host/chipset.c b/board/host/chipset.c index 3cb859eb29..5213d06acb 100644 --- a/board/host/chipset.c +++ b/board/host/chipset.c @@ -16,7 +16,7 @@ static int chipset_state = CHIPSET_STATE_SOFT_OFF; static int power_on_req; static int power_off_req; -test_mockable void chipset_reset(enum chipset_reset_reason reason) +test_mockable void chipset_reset(enum chipset_shutdown_reason reason) { fprintf(stderr, "Chipset reset: %d!\n", reason); } diff --git a/board/host/usb_pd_pdo.c b/board/host/usb_pd_pdo.c new file mode 100644 index 0000000000..a84b03f75f --- /dev/null +++ b/board/host/usb_pd_pdo.c @@ -0,0 +1,23 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), + PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 15000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/host/usb_pd_pdo.h b/board/host/usb_pd_pdo.h new file mode 100644 index 0000000000..64d73c7a15 --- /dev/null +++ b/board/host/usb_pd_pdo.h @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_HOST_USB_PD_PDO_H +#define __CROS_EC_BOARD_HOST_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[2]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_HOST_USB_PD_PDO_H */ diff --git a/board/host/usb_pd_policy.c b/board/host/usb_pd_policy.c index 23285f4838..b02891ee29 100644 --- a/board/host/usb_pd_policy.c +++ b/board/host/usb_pd_policy.c @@ -6,26 +6,12 @@ #include "common.h" #include "console.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "util.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), - PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 15000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - test_mockable int pd_set_power_supply_ready(int port) { /* Not implemented */ diff --git a/board/it83xx_evb/gpio.inc b/board/it83xx_evb/gpio.inc index 52df89e5cb..505f91ad64 100644 --- a/board/it83xx_evb/gpio.inc +++ b/board/it83xx_evb/gpio.inc @@ -9,7 +9,7 @@ * Note: Those with interrupt handlers must be declared first. */ GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) #endif GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN, lid_interrupt) diff --git a/board/it8xxx2_evb/gpio.inc b/board/it8xxx2_evb/gpio.inc index 8a7f593ab6..e5e7d5e942 100644 --- a/board/it8xxx2_evb/gpio.inc +++ b/board/it8xxx2_evb/gpio.inc @@ -9,7 +9,7 @@ * Note: Those with interrupt handlers must be declared first. */ GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) #endif GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) diff --git a/board/it8xxx2_pdevb/board.h b/board/it8xxx2_pdevb/board.h index 8646c6c7b3..d23898f3aa 100644 --- a/board/it8xxx2_pdevb/board.h +++ b/board/it8xxx2_pdevb/board.h @@ -31,7 +31,7 @@ #undef CONFIG_SPI_CONTROLLER #undef CONFIG_SPI_FLASH_PORT #undef CONFIG_UART_HOST -#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_HOST_INTERFACE_LPC #undef CONFIG_CMD_MMAPINFO #undef CONFIG_SWITCH diff --git a/board/jacuzzi/board.h b/board/jacuzzi/board.h index ef8a02a3dc..6270b308f6 100644 --- a/board/jacuzzi/board.h +++ b/board/jacuzzi/board.h @@ -102,7 +102,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/jinlon/board.c b/board/jinlon/board.c index 470ff37f65..183e0dbd75 100644 --- a/board/jinlon/board.c +++ b/board/jinlon/board.c @@ -349,33 +349,39 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* Dratini Temperature sensors */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(70), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(86), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(86), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/jinlon/board.h b/board/jinlon/board.h index 944413591b..1e3d287009 100644 --- a/board/jinlon/board.h +++ b/board/jinlon/board.h @@ -19,7 +19,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/jinlon/thermal.c b/board/jinlon/thermal.c index 4d75f70738..03437fa3cd 100644 --- a/board/jinlon/thermal.c +++ b/board/jinlon/thermal.c @@ -40,101 +40,101 @@ static const struct fan_step *fan_step_table; static const struct fan_step fan_table_clamshell[] = { { /* level 0 */ - .on = {0, -1, 54, 34}, + .on = {0, -1, 54, 37}, .off = {99, -1, 99, 99}, .rpm = {0, 0}, }, { /* level 1 */ - .on = {0, -1, 57, 35}, - .off = {99, -1, 54, 34}, + .on = {0, -1, 57, 39}, + .off = {99, -1, 54, 37}, .rpm = {3950, 3850}, }, { /* level 2 */ - .on = {0, -1, 58, 36}, - .off = {99, -1, 57, 35}, + .on = {0, -1, 58, 40}, + .off = {99, -1, 57, 39}, .rpm = {4200, 4100}, }, { /* level 3 */ - .on = {0, -1, 59, 37}, - .off = {99, -1, 58, 36}, + .on = {0, -1, 59, 41}, + .off = {99, -1, 58, 40}, .rpm = {4550, 4450}, }, { /* level 4 */ - .on = {60, -1, 60, 38}, - .off = {58, -1, 59, 37}, + .on = {62, -1, 60, 42}, + .off = {58, -1, 59, 41}, .rpm = {4900, 4800}, }, { /* level 5 */ - .on = {62, -1, 61, 39}, - .off = {60, -1, 60, 38}, + .on = {64, -1, 61, 43}, + .off = {62, -1, 60, 42}, .rpm = {5250, 5150}, }, { /* level 6 */ - .on = {65, -1, 64, 40}, - .off = {62, -1, 61, 39}, + .on = {65, -1, 64, 45}, + .off = {63, -1, 61, 43}, .rpm = {5400, 5300}, }, { /* level 7 */ .on = {100, -1, 100, 100}, - .off = {65, -1, 62, 40}, - .rpm = {6000, 6150}, + .off = {65, -1, 62, 44}, + .rpm = {6000, 5900}, }, }; static const struct fan_step fan_table_tablet[] = { { /* level 0 */ - .on = {0, -1, 55, 39}, + .on = {0, -1, 55, 41}, .off = {99, -1, 99, 99}, .rpm = {0, 0}, }, { /* level 1 */ - .on = {0, -1, 56, 40}, - .off = {99, -1, 55, 39}, + .on = {0, -1, 56, 42}, + .off = {99, -1, 55, 41}, .rpm = {0, 0}, }, { /* level 2 */ - .on = {0, -1, 57, 41}, - .off = {99, -1, 56, 40}, + .on = {0, -1, 57, 43}, + .off = {99, -1, 56, 42}, .rpm = {4000, 3350}, }, { /* level 3 */ - .on = {0, -1, 58, 42}, - .off = {99, -1, 57, 41}, + .on = {0, -1, 58, 44}, + .off = {99, -1, 57, 43}, .rpm = {4200, 3400}, }, { /* level 4 */ - .on = {60, -1, 59, 43}, - .off = {58, -1, 58, 42}, + .on = {60, -1, 59, 45}, + .off = {58, -1, 58, 44}, .rpm = {4400, 3500}, }, { /* level 5 */ - .on = {62, -1, 60, 44}, - .off = {60, -1, 59, 43}, + .on = {62, -1, 60, 46}, + .off = {60, -1, 59, 45}, .rpm = {4800, 4350}, }, { /* level 6 */ - .on = {65, -1, 61, 45}, - .off = {62, -1, 60, 44}, + .on = {65, -1, 61, 47}, + .off = {62, -1, 60, 46}, .rpm = {5000, 4500}, }, { /* level 7 */ .on = {100, -1, 100, 100}, - .off = {65, -1, 61, 45}, + .off = {65, -1, 61, 47}, .rpm = {5200, 5100}, }, }; diff --git a/board/jslrvp_ite/gpio.inc b/board/jslrvp_ite/gpio.inc index 5c0219263e..387020100e 100644 --- a/board/jslrvp_ite/gpio.inc +++ b/board/jslrvp_ite/gpio.inc @@ -37,7 +37,7 @@ GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UAR GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif @@ -72,7 +72,7 @@ UNIMPLEMENTED(EN_VCCIO_EXT) /* Host communication GPIOs */ GPIO(PCH_WAKE_L, PIN(J, 0), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(PCH_PLTRST_L, PIN(E, 3), GPIO_INPUT | GPIO_PULL_UP) #endif @@ -139,7 +139,7 @@ GPIO(NC_PMIC_EN, PIN(H, 3), GPIO_INPUT) /* Used if Base EC is present */ GPIO(NC_EC_BASE_DET, PIN(I, 3), GPIO_INPUT) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INPUT) #endif diff --git a/board/kano/battery.c b/board/kano/battery.c index a18ab029b6..395b45371d 100644 --- a/board/kano/battery.c +++ b/board/kano/battery.c @@ -10,7 +10,7 @@ #include "compile_time_macros.h" /* - * Battery info for all Brya battery types. Note that the fields + * Battery info for all Kano battery types. Note that the fields * start_charging_min/max and charging_min/max are not used for the charger. * The effective temperature limits are given by discharging_min/max_c. * @@ -32,67 +32,36 @@ * address, mask, and disconnect value need to be provided. */ const struct board_batt_params board_battery_info[] = { - /* POW-TECH GQA05 Battery Information */ - [BATTERY_POWER_TECH] = { - /* BQ40Z50 Fuel Gauge */ + /* LGC AP19B8M Battery Information */ + [BATTERY_AP19B8M] = { .fuel_gauge = { - .manuf_name = "POW-TECH", - .device_name = "BATGQA05L22", + .manuf_name = "LGC KT0030G024", .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, + .reg_addr = 0x3A, + .reg_data = { 0xC574, 0xC574 }, }, .fet = { - .mfgacc_support = 1, - .reg_addr = 0x00, - .reg_mask = 0x2000, /* XDSG */ - .disconnect_val = 0x2000, + .reg_addr = 0x43, + .reg_mask = 0x0001, + .disconnect_val = 0x0, + .cfet_mask = 0x0002, + .cfet_off_val = 0x0000, } }, .batt_info = { - .voltage_max = TARGET_WITH_MARGIN(13050, 5), - .voltage_normal = 11400, /* mV */ - .voltage_min = 9000, /* mV */ - .precharge_current = 280, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -10, - .discharging_max_c = 60, - }, - }, - /* LGC L17L3PB0 Battery Information */ - /* - * Battery info provided by ODM on b/143477210, comment #11 - */ - [BATTERY_LGC011] = { - .fuel_gauge = { - .manuf_name = "LGC", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, - }, - .fet = { - .reg_addr = 0x0, - .reg_mask = 0x6000, - .disconnect_val = 0x6000, - } - }, - .batt_info = { - .voltage_max = TARGET_WITH_MARGIN(13200, 5), - .voltage_normal = 11550, /* mV */ - .voltage_min = 9000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = 0, - .discharging_max_c = 75, + .voltage_max = 13350, + .voltage_normal = 11610, + .voltage_min = 9000, + .precharge_current = 256, + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, }, }, }; BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_POWER_TECH; +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_AP19B8M; diff --git a/board/kano/board.h b/board/kano/board.h index 3294092848..c72249c0f3 100644 --- a/board/kano/board.h +++ b/board/kano/board.h @@ -3,18 +3,13 @@ * found in the LICENSE file. */ -/* Brya board configuration */ +/* Kano board configuration */ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H #include "compile_time_macros.h" -/* - * Early brya boards are not set up for vivaldi - */ -#undef CONFIG_KEYBOARD_VIVALDI - /* Baseboard features */ #include "baseboard.h" @@ -27,22 +22,16 @@ #define CONFIG_MP2964 /* LED */ -#define CONFIG_LED_PWM -#define CONFIG_LED_PWM_COUNT 1 -#undef CONFIG_LED_PWM_NEAR_FULL_COLOR -#undef CONFIG_LED_PWM_SOC_ON_COLOR -#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR -#undef CONFIG_LED_PWM_LOW_BATT_COLOR -#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE -#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_WHITE -#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE -#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_AMBER +#define CONFIG_LED_ONOFF_STATES /* Sensors */ #define CONFIG_ACCELGYRO_ICM426XX /* Base accel */ #define CONFIG_ACCELGYRO_ICM_COMM_I2C #define CONFIG_ACCELGYRO_ICM426XX_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) +#define CONFIG_ACCELGYRO_BMI260 +#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) /* Enable sensor fifo, must also define the _SIZE and _THRES */ #define CONFIG_ACCEL_FIFO @@ -60,6 +49,7 @@ #define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL #define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL #define CONFIG_ACCEL_KX022 +#define CONFIG_ACCEL_BMA4XX #define CONFIG_ACCEL_INTERRUPTS @@ -67,6 +57,11 @@ #define CONFIG_CMD_ACCELS #define CONFIG_CMD_ACCEL_INFO +/* Keyboard */ +#define CONFIG_KEYBOARD_VIVALDI +#define CONFIG_KEYBOARD_REFRESH_ROW3 + + /* USB Type A Features */ #define USB_PORT_COUNT 1 #define CONFIG_USB_PORT_POWER_DUMB @@ -133,7 +128,7 @@ /* I2C Bus Configuration */ -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 +#define I2C_PORT_ACCEL NPCX_I2C_PORT0_0 #define I2C_PORT_USB_C0_C2_TCPC NPCX_I2C_PORT1_0 #define I2C_PORT_USB_C1_TCPC NPCX_I2C_PORT4_1 @@ -207,6 +202,7 @@ enum adc_channel { enum temp_sensor_id { TEMP_SENSOR_1_DDR_SOC, TEMP_SENSOR_2_FAN, + TEMP_SENSOR_3_CHARGER, TEMP_SENSOR_COUNT }; @@ -218,15 +214,12 @@ enum sensor_id { }; enum battery_type { - BATTERY_POWER_TECH, - BATTERY_LGC011, + BATTERY_AP19B8M, BATTERY_TYPE_COUNT }; enum pwm_channel { - PWM_CH_LED2 = 0, /* PWM0 (white charger) */ - PWM_CH_LED1, /* PWM2 (orange charger) */ - PWM_CH_KBLIGHT, /* PWM3 */ + PWM_CH_KBLIGHT = 0, /* PWM3 */ PWM_CH_FAN, /* PWM5 */ PWM_CH_COUNT }; diff --git a/board/kano/ec.tasklist b/board/kano/ec.tasklist index 7574c1839d..f52567d9fa 100644 --- a/board/kano/ec.tasklist +++ b/board/kano/ec.tasklist @@ -11,19 +11,20 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/kano/fw_config.c b/board/kano/fw_config.c index fb8acb635d..a13dadeb5d 100644 --- a/board/kano/fw_config.c +++ b/board/kano/fw_config.c @@ -11,20 +11,19 @@ #define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) -static union brya_cbi_fw_config fw_config; +static union kano_cbi_fw_config fw_config; BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); /* - * FW_CONFIG defaults for brya if the CBI.FW_CONFIG data is not + * FW_CONFIG defaults for kano if the CBI.FW_CONFIG data is not * initialized. */ -static const union brya_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_PS8815, +static const union kano_cbi_fw_config fw_config_defaults = { .kb_bl = KEYBOARD_BACKLIGHT_ENABLED, }; /**************************************************************************** - * Brya FW_CONFIG access + * Kano FW_CONFIG access */ void board_init_fw_config(void) { @@ -36,25 +35,21 @@ void board_init_fw_config(void) if (get_board_id() == 0) { /* * Early boards have a zero'd out FW_CONFIG, so replace - * it with a sensible default value. If DB_USB_ABSENT2 - * was used as an alternate encoding of DB_USB_ABSENT to - * avoid the zero check, then fix it. + * it with a sensible default value. */ if (fw_config.raw_value == 0) { CPRINTS("CBI: FW_CONFIG is zero, using board defaults"); fw_config = fw_config_defaults; - } else if (fw_config.usb_db == DB_USB_ABSENT2) { - fw_config.usb_db = DB_USB_ABSENT; } } } -union brya_cbi_fw_config get_fw_config(void) +union kano_cbi_fw_config get_fw_config(void) { return fw_config; } -enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) +bool ec_cfg_has_kblight(void) { - return fw_config.usb_db; + return (fw_config.kb_bl == KEYBOARD_BACKLIGHT_ENABLED); } diff --git a/board/kano/fw_config.h b/board/kano/fw_config.h index 6e4eb3ef58..8402b5568d 100644 --- a/board/kano/fw_config.h +++ b/board/kano/fw_config.h @@ -3,36 +3,28 @@ * found in the LICENSE file. */ -#ifndef __BOARD_BRYA_FW_CONFIG_H_ -#define __BOARD_BRYA_FW_CONFIG_H_ +#ifndef __BOARD_KANO_FW_CONFIG_H_ +#define __BOARD_KANO_FW_CONFIG_H_ #include <stdint.h> /**************************************************************************** - * CBI FW_CONFIG layout for Brya board. + * CBI FW_CONFIG layout for Kano board. * - * Source of truth is the project/brya/brya/config.star configuration file. + * Source of truth is the project/brya/kano/config.star configuration file. */ -enum ec_cfg_usb_db_type { - DB_USB_ABSENT = 0, - DB_USB3_PS8815 = 1, - DB_USB_ABSENT2 = 15 -}; - enum ec_cfg_keyboard_backlight_type { KEYBOARD_BACKLIGHT_DISABLED = 0, KEYBOARD_BACKLIGHT_ENABLED = 1 }; -union brya_cbi_fw_config { +union kano_cbi_fw_config { struct { - enum ec_cfg_usb_db_type usb_db : 4; - uint32_t sd_db : 2; - uint32_t lte_db : 1; enum ec_cfg_keyboard_backlight_type kb_bl : 1; uint32_t audio : 3; - uint32_t reserved_1 : 21; + uint32_t ufc : 2; + uint32_t reserved_1 : 26; }; uint32_t raw_value; }; @@ -42,13 +34,14 @@ union brya_cbi_fw_config { * * @return the FW_CONFIG for the board. */ -union brya_cbi_fw_config get_fw_config(void); +union kano_cbi_fw_config get_fw_config(void); /** - * Get the USB daughter board type from FW_CONFIG. + * Check if the FW_CONFIG has enabled keyboard backlight. * - * @return the USB daughter board type. + * @return true if board supports keyboard backlight, false if the board + * doesn't support it. */ -enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void); +bool ec_cfg_has_kblight(void); -#endif /* __BOARD_BRYA_FW_CONFIG_H_ */ +#endif /* __BOARD_KANO_FW_CONFIG_H_ */ diff --git a/board/kano/gpio.inc b/board/kano/gpio.inc index 465f0fd4db..e5b452ced3 100644 --- a/board/kano/gpio.inc +++ b/board/kano/gpio.inc @@ -7,19 +7,118 @@ #define MODULE_KB MODULE_KEYBOARD_SCAN -/* - * Generated-gpio.inc is produced using a Brya specific tool that - * parses the GPIO definitions derived from the board schematics and - * EC pinout descriptions derived form the chip datasheets to generate - * the Chrome EC GPIO pinout definitions. Due to the confidential - * nature of schematics and datasheets, they are not provided here. - * - * Variants that do not auto-generate their GPIO definitions should - * combine the Brya gpio.inc and generated-gpio.inc into their - * gpio.inc and customize as appropriate. - */ +/* INTERRUPT GPIOs: */ +GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) +GPIO_INT(EC_IMU_INT_R_L, PIN(5, 6), GPIO_SEL_1P8V | GPIO_INT_FALLING, motion_interrupt) +GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) +GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) +GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) +GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt) +GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) +GPIO_INT(SEQ_EC_ALL_SYS_PG, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) +GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C0_C2_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt) +GPIO_INT(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event) + +/* USED GPIOs: */ +GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) +GPIO(CHARGER_VAP_OTG_EN, PIN(7, 3), GPIO_OUT_LOW) +GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT) +GPIO(EC_BATT_PRES_ODL, PIN(A, 3), GPIO_INPUT) +GPIO(EC_ENTERING_RW, PIN(0, 3), GPIO_OUT_LOW) +GPIO(EC_EN_EDP_BL, PIN(D, 3), GPIO_OUT_HIGH) +GPIO(EC_GSC_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) +GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT) +GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT) +GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT) +GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT) +GPIO(EC_I2C_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_USB_C0_C2_PPC_BC_SCL, PIN(9, 2), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_PPC_BC_SDA, PIN(9, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_RT_SCL, PIN(D, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_RT_SDA, PIN(D, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_TCPC_SCL, PIN(9, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_C2_TCPC_SDA, PIN(8, 7), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_MIX_SCL, PIN(E, 4), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT) +GPIO(EC_KB_BL_EN_L, PIN(8, 6), GPIO_OUT_HIGH) +GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT) +GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) +GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) +GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW) +GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) +GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) +GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH) +GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) +GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH) +GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW) +GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW) +GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) +GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) +GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) +GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) +GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) +GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) +GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) +GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_HIGH) +GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_HIGH) + +/* UART alternate functions */ +ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */ + +/* I2C alternate functions */ +ALTERNATE(PIN_MASK(3, 0x48), 0, MODULE_I2C, 0) /* GPIO33/I2C5_SCL0/CTS_L, GPIO36/RTS_L/I2C5_SDA0 */ +ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* GPIO87/I2C1_SDA0 */ +ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* GPIO92/I2C2_SCL0, GPIO91/I2C2_SDA0, GPIO90/I2C1_SCL0 */ +ALTERNATE(PIN_MASK(B, 0x0c), 0, MODULE_I2C, 0) /* GPIOB3/I2C7_SCL0/DCD_L, GPIOB2/I2C7_SDA0/DSR_L */ +ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, GPIO_SEL_1P8V) /* GPIOB5/I2C0_SCL0, GPIOB4/I2C0_SDA0 */ +ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* GPIOD1/I2C3_SCL0, GPIOD0/I2C3_SDA0 */ +ALTERNATE(PIN_MASK(E, 0x18), 0, MODULE_I2C, 0) /* GPIOE4/I2C6_SCL1/I3C_SCL, GPIOE3/I2C6_SDA1/I3C_SDA */ +ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0) /* GPIOF3/I2C4_SCL1, GPIOF2/I2C4_SDA1 */ + +/* PWM alternate functions */ +ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */ +ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */ +ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */ + +/* ADC alternate functions */ +ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ +ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */ + +/* KB alternate functions */ +ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ +ALTERNATE(PIN_MASK(1, 0x7f), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO06/GPO13/GP_SEL_L, KSO07/GPO12/JEN_L, KSO03/GPIO16/JTAG_TDO0_SWO, KSO04/GPIO15/XNOR, KSO05/GPIO14, KSO08/GPIO11/CR_SOUT1, KSO09/GPIO10/CR_SIN1 */ +ALTERNATE(PIN_MASK(2, 0xfc), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI2/GPIO27/TRACEDATA1, KSI3/GPIO26/TRACEDATA0, KSI4/GPIO25/TRACECLK/GP_SCLK, KSI5/GPIO24/GP_MISO, KSI6/GPIO23/S_SBUB, KSI7/GPIO22/S_SBUA */ +ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO00/GPIO21/JTAG_TCK_SWCLK, KSO01/GPIO20/JTAG_TMS_SWIO */ +ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KB, GPIO_INPUT | GPIO_PULL_UP) /* KSI0/GPIO31/TRACEDATA3/GP_MOSI, KSI1/GPIO30/TRACEDATA2/GP_CS_L */ +ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO14/GPIO82 */ + +/* PMU alternate functions */ +ALTERNATE(PIN_MASK(0, 0x01), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN2_L&GPI00/GPIO00 */ +ALTERNATE(PIN_MASK(0, 0x02), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW) /* GPIO01/PSL_IN3_L&GPI01 */ +ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) /* PSL_IN1_L&GPID2/GPIOD2 */ + +/* Unused Pins */ +UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ +UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ +UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ +UNUSED(PIN(6, 6)) /* GPIO66 */ -#include "generated-gpio.inc" +/* Pre-configured PSL balls: J8 K6 */ /* * The NPCX keyboard driver does not use named GPIOs to access diff --git a/board/kano/i2c.c b/board/kano/i2c.c index bb55b13d0c..e779e119e3 100644 --- a/board/kano/i2c.c +++ b/board/kano/i2c.c @@ -13,7 +13,7 @@ const struct i2c_port_t i2c_ports[] = { { /* I2C0 */ .name = "sensor", - .port = I2C_PORT_SENSOR, + .port = I2C_PORT_ACCEL, .kbps = 400, .scl = GPIO_EC_I2C_SENSOR_SCL, .sda = GPIO_EC_I2C_SENSOR_SDA, diff --git a/board/kano/keyboard.c b/board/kano/keyboard.c index a9f033130d..38e96620e2 100644 --- a/board/kano/keyboard.c +++ b/board/kano/keyboard.c @@ -5,6 +5,7 @@ #include "common.h" +#include "ec_commands.h" #include "keyboard_scan.h" #include "timer.h" @@ -23,3 +24,25 @@ __override struct keyboard_scan_config keyscan_config = { 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ }, }; + +static const struct ec_response_keybd_config kano_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; +__override const struct ec_response_keybd_config +*board_vivaldi_keybd_config(void) +{ + return &kano_kb; +} diff --git a/board/kano/led.c b/board/kano/led.c index ab1021b845..23c9fca50c 100644 --- a/board/kano/led.c +++ b/board/kano/led.c @@ -1,83 +1,79 @@ /* Copyright 2021 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. + * Power and battery LED control for kano */ -/* Brya specific PWM LED settings: there are 2 LEDs on each side of the board, - * each one can be controlled separately. The LED colors are white or amber, - * and the default behavior is tied to the charging process: both sides are - * amber while charging the battery and white when the battery is charged. - */ +#include "ec_commands.h" +#include "gpio.h" +#include "led_common.h" +#include "led_onoff_states.h" +#include "chipset.h" -#include <stdint.h> +#define LED_ON_LVL 0 +#define LED_OFF_LVL 1 -#include "common.h" -#include "compile_time_macros.h" -#include "ec_commands.h" -#include "led_pwm.h" -#include "pwm.h" -#include "util.h" +__override const int led_charge_lvl_1 = 5; + +__override const int led_charge_lvl_2 = 95; + +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, + [STATE_DISCHARGE_S0] = {{EC_LED_COLOR_BLUE, LED_INDEFINITE} }, + [STATE_DISCHARGE_S3] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, + {LED_OFF, 3 * LED_ONE_SEC} }, + [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, + {LED_OFF, 1 * LED_ONE_SEC} }, + [STATE_FACTORY_TEST] = {{EC_LED_COLOR_BLUE, 2 * LED_ONE_SEC}, + {EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC} }, +}; const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_LEFT_LED, - EC_LED_ID_RIGHT_LED, + EC_LED_ID_BATTERY_LED }; const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); -/* - * We only have a white and an amber LED, so setting any other color results in - * both LEDs being off. - */ -struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { - /* Amber, White */ - [EC_LED_COLOR_RED] = { 0, 0 }, - [EC_LED_COLOR_GREEN] = { 0, 0 }, - [EC_LED_COLOR_BLUE] = { 0, 0 }, - [EC_LED_COLOR_YELLOW] = { 0, 0 }, - [EC_LED_COLOR_WHITE] = { 0, 100 }, - [EC_LED_COLOR_AMBER] = { 100, 0 }, -}; - -/* Two logical LEDs with amber and white channels. */ -struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = { - { - .ch0 = PWM_CH_LED1, - .ch1 = PWM_CH_LED2, - .ch2 = PWM_LED_NO_CHANNEL, - .enable = &pwm_enable, - .set_duty = &pwm_set_duty, - }, -}; +__override void led_set_color_battery(enum ec_led_colors color) +{ + switch (color) { + case EC_LED_COLOR_AMBER: + gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); + gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); + break; + case EC_LED_COLOR_BLUE: + gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); + gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); + break; + default: /* LED_OFF and other unsupported colors */ + gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); + gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); + break; + } +} void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { - memset(brightness_range, '\0', - sizeof(*brightness_range) * EC_LED_COLOR_COUNT); - brightness_range[EC_LED_COLOR_AMBER] = 100; - brightness_range[EC_LED_COLOR_WHITE] = 100; + if (led_id == EC_LED_ID_BATTERY_LED) { + brightness_range[EC_LED_COLOR_AMBER] = 1; + brightness_range[EC_LED_COLOR_BLUE] = 1; + } } int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) { - enum pwm_led_id pwm_id; - - /* Convert ec_led_id to pwm_led_id. */ - switch (led_id) { - case EC_LED_ID_LEFT_LED: - pwm_id = PWM_LED0; - break; - default: - return EC_ERROR_UNKNOWN; + if (led_id == EC_LED_ID_BATTERY_LED) { + if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(EC_LED_COLOR_AMBER); + else if (brightness[EC_LED_COLOR_BLUE] != 0) + led_set_color_battery(EC_LED_COLOR_BLUE); + else + led_set_color_battery(LED_OFF); } - if (brightness[EC_LED_COLOR_WHITE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); - else if (brightness[EC_LED_COLOR_AMBER]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); - else - /* Otherwise, the "color" is "off". */ - set_pwm_led_color(pwm_id, -1); - return EC_SUCCESS; } diff --git a/board/kano/pwm.c b/board/kano/pwm.c index 66239d606f..dc09a2bed5 100644 --- a/board/kano/pwm.c +++ b/board/kano/pwm.c @@ -11,16 +11,6 @@ #include "pwm_chip.h" const struct pwm_t pwm_channels[] = { - [PWM_CH_LED2] = { - .channel = 0, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 4800, - }, - [PWM_CH_LED1] = { - .channel = 2, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 4800, - }, [PWM_CH_KBLIGHT] = { .channel = 3, .flags = 0, @@ -43,14 +33,8 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); static void board_pwm_init(void) { /* - * Turn on all the LED at 50%. - * Turn on the fan at 100%. + * Turn on the fan at 50%. */ - pwm_enable(PWM_CH_LED1, 1); - pwm_set_duty(PWM_CH_LED1, 50); - pwm_enable(PWM_CH_LED2, 1); - pwm_set_duty(PWM_CH_LED2, 50); - pwm_enable(PWM_CH_KBLIGHT, 1); pwm_set_duty(PWM_CH_KBLIGHT, 50); } diff --git a/board/kano/sensors.c b/board/kano/sensors.c index 442400a12a..9a5812a9be 100644 --- a/board/kano/sensors.c +++ b/board/kano/sensors.c @@ -6,6 +6,9 @@ #include "common.h" #include "accelgyro.h" #include "adc_chip.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/accelgyro_bmi260.h" +#include "driver/accel_bma422.h" #include "driver/accelgyro_icm426xx.h" #include "driver/accelgyro_icm_common.h" #include "driver/accel_kionix.h" @@ -45,6 +48,16 @@ K_MUTEX_DEFINE(g_lid_accel_mutex); K_MUTEX_DEFINE(g_base_accel_mutex); static struct kionix_accel_data g_kx022_data; static struct icm_drv_data_t g_icm426xx_data; +static struct bmi_drv_data_t g_bmi260_data; +static struct accelgyro_saved_data_t g_bma422_data; + +enum base_accelgyro_type { + BASE_GYRO_NONE = 0, + BASE_GYRO_BMI260 = 1, + BASE_GYRO_ICM426XX = 2, +}; + +static enum base_accelgyro_type base_accelgyro_config; /* * TODO:(b/197200940): Verify lid and base orientation @@ -61,6 +74,92 @@ static const mat33_fp_t base_standard_ref = { { 0, 0, FLOAT_TO_FP(1)} }; +static const mat33_fp_t lid_bma422_standard_ref = { + { 0, FLOAT_TO_FP(-1), 0}, + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; +static const mat33_fp_t base_bmi260_standard_ref = { + { 0, FLOAT_TO_FP(-1), 0}, + { FLOAT_TO_FP(1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} +}; + +static struct motion_sensor_t bmi260_base_accel = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI260, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi260_drv, + .mutex = &g_base_accel_mutex, + .drv_data = &g_bmi260_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, + .rot_standard_ref = &base_bmi260_standard_ref, + .min_frequency = BMI_ACCEL_MIN_FREQ, + .max_frequency = BMI_ACCEL_MAX_FREQ, + .default_range = 4, /* g */ + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on in S3 */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, +}; + +static struct motion_sensor_t bmi260_base_gyro = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI260, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi260_drv, + .mutex = &g_base_accel_mutex, + .drv_data = &g_bmi260_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = &base_bmi260_standard_ref, + .min_frequency = BMI_GYRO_MIN_FREQ, + .max_frequency = BMI_GYRO_MAX_FREQ, +}; + +static struct motion_sensor_t bma422_lid_accel = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMA422, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &bma4_accel_drv, + .mutex = &g_lid_accel_mutex, + .drv_data = &g_bma422_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMA4_I2C_ADDR_SECONDARY, + .rot_standard_ref = &lid_bma422_standard_ref, + .min_frequency = BMA4_ACCEL_MIN_FREQ, + .max_frequency = BMA4_ACCEL_MAX_FREQ, + .default_range = 2, /* g, enough for laptop. */ + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 12500 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on in S3 */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 12500 | ROUND_UP_FLAG, + .ec_rate = 0, + }, + }, +}; + struct motion_sensor_t motion_sensors[] = { [LID_ACCEL] = { .name = "Lid Accel", @@ -71,7 +170,7 @@ struct motion_sensor_t motion_sensors[] = { .drv = &kionix_accel_drv, .mutex = &g_lid_accel_mutex, .drv_data = &g_kx022_data, - .port = I2C_PORT_SENSOR, + .port = I2C_PORT_ACCEL, .i2c_spi_addr_flags = KX022_ADDR1_FLAGS, .flags = MOTIONSENSE_FLAG_INT_SIGNAL, .rot_standard_ref = &lid_standard_ref, /* identity matrix */ @@ -101,7 +200,7 @@ struct motion_sensor_t motion_sensors[] = { .drv_data = &g_icm426xx_data, .int_signal = GPIO_EC_IMU_INT_R_L, .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .port = I2C_PORT_SENSOR, + .port = I2C_PORT_ACCEL, .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, .rot_standard_ref = &base_standard_ref, .default_range = 4, /* g */ @@ -130,7 +229,7 @@ struct motion_sensor_t motion_sensors[] = { .drv_data = &g_icm426xx_data, .int_signal = GPIO_EC_IMU_INT_R_L, .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .port = I2C_PORT_SENSOR, + .port = I2C_PORT_ACCEL, .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, .default_range = 1000 | ROUND_UP_FLAG, /* dps */ .rot_standard_ref = &base_standard_ref, @@ -140,6 +239,36 @@ struct motion_sensor_t motion_sensors[] = { }; const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); +static void baseboard_sensors_detect(void) +{ + int ret, val; + + if (base_accelgyro_config != BASE_GYRO_NONE) + return; + + ret = i2c_read8(I2C_PORT_ACCEL, BMA4_I2C_ADDR_SECONDARY, + BMA4_CHIP_ID_ADDR, &val); + if (ret == 0 && val == BMA422_CHIP_ID) { + motion_sensors[LID_ACCEL] = bma422_lid_accel; + ccprints("LID_ACCEL is BMA422"); + } else + ccprints("LID_ACCEL is KX022"); + + ret = bmi_read8(I2C_PORT_ACCEL, BMI260_ADDR0_FLAGS, + BMI260_CHIP_ID, &val); + if (ret == 0 && val == BMI260_CHIP_ID_MAJOR) { + motion_sensors[BASE_ACCEL] = bmi260_base_accel; + motion_sensors[BASE_GYRO] = bmi260_base_gyro; + base_accelgyro_config = BASE_GYRO_BMI260; + ccprints("BASE ACCEL is BMI260"); + } else { + base_accelgyro_config = BASE_GYRO_ICM426XX; + ccprints("BASE ACCEL IS ICM426XX"); + } +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, baseboard_sensors_detect, + HOOK_PRIO_DEFAULT); + static void baseboard_sensors_init(void) { /* Enable gpio interrupt for base accelgyro sensor */ @@ -149,7 +278,12 @@ DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_INIT_I2C + 1); void motion_interrupt(enum gpio_signal signal) { - icm426xx_interrupt(signal); + if (base_accelgyro_config == BASE_GYRO_NONE) + return; + if (base_accelgyro_config == BASE_GYRO_BMI260) + bmi260_interrupt(signal); + else + icm426xx_interrupt(signal); } /* Temperature sensor configuration */ @@ -166,6 +300,12 @@ const struct temp_sensor_t temp_sensors[] = { .read = get_temp_3v3_30k9_47k_4050b, .idx = ADC_TEMP_SENSOR_2_FAN }, + [TEMP_SENSOR_3_CHARGER] = { + .name = "CHARGER", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_3_CHARGER + }, }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); @@ -176,17 +316,22 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/180681346): update for Alder Lake/brya @@ -201,21 +346,48 @@ static const struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -static const struct ec_thermal_config thermal_fan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_FAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_fan = THERMAL_FAN; + +/* + * Set value to zero to disable charger thermal control. + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = 0, \ + }, \ + .temp_fan_off = 0, \ + .temp_fan_max = 0, \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_2_FAN] = thermal_fan, + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_FAN] = THERMAL_FAN, + [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/kano/tune_mp2964.c b/board/kano/tune_mp2964.c index 198f06d8eb..3e1c3c8d0b 100644 --- a/board/kano/tune_mp2964.c +++ b/board/kano/tune_mp2964.c @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -/* Tune the MP2964 IMVP9.1 parameters for brya */ +/* Tune the MP2964 IMVP9.1 parameters for kano */ #include "common.h" #include "compile_time_macros.h" diff --git a/board/kano/usbc_config.h b/board/kano/usbc_config.h index 87e601ee3e..38fce7d2cf 100644 --- a/board/kano/usbc_config.h +++ b/board/kano/usbc_config.h @@ -3,7 +3,7 @@ * found in the LICENSE file. */ -/* Brya board-specific USB-C configuration */ +/* Kano board-specific USB-C configuration */ #ifndef __CROS_EC_USBC_CONFIG_H #define __CROS_EC_USBC_CONFIG_H diff --git a/board/kappa/battery.c b/board/kappa/battery.c index 5ae6dc9b91..7a82ed029e 100644 --- a/board/kappa/battery.c +++ b/board/kappa/battery.c @@ -34,6 +34,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Dynapack CosMX DAK124960-W0P0707HT Battery Information */ @@ -62,6 +63,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, }; diff --git a/board/kappa/board.c b/board/kappa/board.c index a0d7cf6a4e..963ade7430 100644 --- a/board/kappa/board.c +++ b/board/kappa/board.c @@ -271,25 +271,3 @@ static void board_chipset_shutdown(void) gpio_set_level(GPIO_EN_USBA_5V, 0); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/kappa/board.h b/board/kappa/board.h index 287f22416e..4fd76cf965 100644 --- a/board/kappa/board.h +++ b/board/kappa/board.h @@ -22,6 +22,8 @@ #define CONFIG_BATTERY_HW_PRESENT_CUSTOM #define CONFIG_BATTERY_VENDOR_PARAM +#define CONFIG_BATTERY_V2 +#define CONFIG_BATTERY_COUNT 1 #define CONFIG_CHARGER_PSYS diff --git a/board/kindred/board.c b/board/kindred/board.c index c17ddb1b8a..79d197bdcc 100644 --- a/board/kindred/board.c +++ b/board/kindred/board.c @@ -439,20 +439,25 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Hatch. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(75), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(55), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(75), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(55), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/kindred/board.h b/board/kindred/board.h index dd63efb390..89cd18bcc0 100644 --- a/board/kindred/board.h +++ b/board/kindred/board.h @@ -18,7 +18,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/kingler/battery.c b/board/kingler/battery.c new file mode 100644 index 0000000000..f07c38e1b8 --- /dev/null +++ b/board/kingler/battery.c @@ -0,0 +1,47 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery.h" +#include "battery_fuel_gauge.h" +#include "battery_smart.h" +#include "charge_manager.h" +#include "chipset.h" +#include "gpio.h" +#include "hooks.h" +#include "system.h" +#include "usb_pd.h" + +const struct board_batt_params board_battery_info[] = { + [BATTERY_C235] = { + .fuel_gauge = { + .manuf_name = "AS3GWRc3KA", + .device_name = "C235-41", + .ship_mode = { + .reg_addr = 0x0, + .reg_data = { 0x10, 0x10 }, + }, + .fet = { + .reg_addr = 0x99, + .reg_mask = 0x0c, + .disconnect_val = 0x0c, + } + }, + .batt_info = { + .voltage_max = 8800, + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = 0, + .discharging_max_c = 60, + }, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); + +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_C235; diff --git a/board/kingler/board.c b/board/kingler/board.c new file mode 100644 index 0000000000..e01d64c386 --- /dev/null +++ b/board/kingler/board.c @@ -0,0 +1,188 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Corsola board configuration */ + +#include "adc.h" +#include "button.h" +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_icm_common.h" +#include "driver/accelgyro_icm426xx.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "motion_sense.h" +#include "power.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "regulator.h" +#include "spi.h" +#include "switch.h" +#include "tablet_mode.h" +#include "task.h" +#include "timer.h" +#include "uart.h" + +/* Initialize board. */ +static void board_init(void) +{ + /* Enable motion sensor interrupt */ + gpio_enable_interrupt(GPIO_BASE_IMU_INT_L); + gpio_enable_interrupt(GPIO_LID_ACCEL_INT_L); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +/* Sensor */ +static struct mutex g_base_mutex; +static struct mutex g_lid_mutex; + +static struct stprivate_data g_lis2dwl_data; +static struct icm_drv_data_t g_icm426xx_data; + +struct motion_sensor_t motion_sensors[] = { + /* + * Note: icm426xx: supports accelerometer and gyro sensor + * Requirement: accelerometer sensor must init before gyro sensor + * DO NOT change the order of the following table. + */ + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_ICM426XX, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &icm426xx_drv, + .mutex = &g_base_mutex, + .drv_data = &g_icm426xx_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs. */ + .rot_standard_ref = NULL, + .min_frequency = ICM426XX_ACCEL_MIN_FREQ, + .max_frequency = ICM426XX_ACCEL_MAX_FREQ, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_ICM426XX, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &icm426xx_drv, + .mutex = &g_base_mutex, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = ICM426XX_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = NULL, + .min_frequency = ICM426XX_GYRO_MIN_FREQ, + .max_frequency = ICM426XX_GYRO_MAX_FREQ, + }, + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LIS2DWL, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &lis2dw12_drv, + .mutex = &g_lid_mutex, + .drv_data = &g_lis2dwl_data, + .int_signal = GPIO_LID_ACCEL_INT_L, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = LIS2DWL_ADDR1_FLAGS, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .rot_standard_ref = NULL, /* identity matrix */ + .default_range = 2, /* g */ + .min_frequency = LIS2DW12_ODR_MIN_VAL, + .max_frequency = LIS2DW12_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 12500 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +void motion_interrupt(enum gpio_signal signal) +{ + icm426xx_interrupt(signal); +} + +/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ +const struct adc_t adc_channels[] = { + /* Convert to mV (3000mV/1024). */ + {"VBUS_C0", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, + {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, + {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, + /* AMON/BMON gain = 17.97 */ + {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, + CHIP_ADC_CH3}, + {"VBUS_C1", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH5}, + {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/* PWM */ + +/* + * PWM channels. Must be in the exactly same order as in enum pwm_channel. + * There total three 16 bits clock prescaler registers for all pwm channels, + * so use the same frequency and prescaler register setting is required if + * number of pwm channel greater than three. + */ +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED1] = { + .channel = 0, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_LED2] = { + .channel = 1, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_LED3] = { + .channel = 2, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +static void board_suspend(void) +{ + gpio_set_level(GPIO_EN_5V_USM, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_suspend, HOOK_PRIO_DEFAULT); + +static void board_resume(void) +{ + gpio_set_level(GPIO_EN_5V_USM, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_resume, HOOK_PRIO_DEFAULT); diff --git a/board/kingler/board.h b/board/kingler/board.h new file mode 100644 index 0000000000..857e654787 --- /dev/null +++ b/board/kingler/board.h @@ -0,0 +1,118 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Krabby board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +#include "baseboard.h" + +/* Chipset config */ + +/* Optional features */ +#define CONFIG_LTO + +/* + * TODO: Remove this option once the VBAT no longer keeps high when + * system's power isn't presented. + */ +#define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM + +/* BC12 */ +/* TODO(b/159583342): remove after rev0 deprecated */ +#define CONFIG_MT6360_BC12_GPIO + +/* LED */ +#define CONFIG_LED_ONOFF_STATES +#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10 + +/* PD / USB-C / PPC */ +#define CONFIG_USB_PD_DEBUG_LEVEL 3 +#define PD_MAX_CURRENT_MA 3000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_VOLTAGE_MV 15000 +#define PD_MAX_POWER_MW 45000 +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* Optional console commands */ +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_SCRATCHPAD +#define CONFIG_CMD_STACKOVERFLOW + +#define CONFIG_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV 9000 + +/* Sensor */ +#define CONFIG_GMR_TABLET_MODE +#define CONFIG_TABLET_MODE +#define CONFIG_TABLET_MODE_SWITCH +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +#define CONFIG_ACCELGYRO_BMI160 /* Base accel */ +#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) +#define CONFIG_ACCELGYRO_ICM426XX /* Base accel */ +#define CONFIG_ACCELGYRO_ICM426XX_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +#define CONFIG_ACCEL_LIS2DWL +#define CONFIG_ACCEL_LIS2DW_AS_BASE +#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) + +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL +#define CONFIG_LID_ANGLE_UPDATE + +#define CONFIG_ACCEL_FORCE_MODE_MASK 0 + +/* SPI / Host Command */ +#undef CONFIG_HOSTCMD_DEBUG_MODE +#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF + +/* USB-A */ +#define USBA_PORT_COUNT 1 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum battery_type { + BATTERY_C235, + BATTERY_TYPE_COUNT, +}; + +enum sensor_id { + BASE_ACCEL = 0, + BASE_GYRO, + LID_ACCEL, + SENSOR_COUNT, +}; + +enum adc_channel { + ADC_VBUS_C0, /* ADC 0 */ + ADC_BOARD_ID_0, /* ADC 1 */ + ADC_BOARD_ID_1, /* ADC 2 */ + ADC_CHARGER_AMON_R, /* ADC 3 */ + ADC_VBUS_C1, /* ADC 5 */ + ADC_CHARGER_PMON, /* ADC 6 */ + + /* Number of ADC channels */ + ADC_CH_COUNT, +}; + +enum pwm_channel { + PWM_CH_LED1, + PWM_CH_LED2, + PWM_CH_LED3, + PWM_CH_COUNT, +}; + +void motion_interrupt(enum gpio_signal signal); + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/kingler/build.mk b/board/kingler/build.mk new file mode 100644 index 0000000000..b355dfd90d --- /dev/null +++ b/board/kingler/build.mk @@ -0,0 +1,16 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build + +# the IC is ITE IT8xxx2 +CHIP:=it83xx +CHIP_FAMILY:=it8xxx2 +CHIP_VARIANT:=it81202bx_1024 +BASEBOARD:=corsola + +board-y=led.o +board-y+=battery.o board.o +board-y+=usbc_config.o diff --git a/board/kingler/ec.tasklist b/board/kingler/ec.tasklist new file mode 100644 index 0000000000..75dbb1a828 --- /dev/null +++ b/board/kingler/ec.tasklist @@ -0,0 +1,22 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, 1024) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 1024) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, 1280) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, 1280) \ + diff --git a/board/kingler/gpio.inc b/board/kingler/gpio.inc new file mode 100644 index 0000000000..1d4700c1c1 --- /dev/null +++ b/board/kingler/gpio.inc @@ -0,0 +1,160 @@ +/* -*- mode:c -*- + * + * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* Wake Source interrupts */ +GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP | + GPIO_HIB_WAKE_HIGH, power_button_interrupt) /* H1_EC_PWR_BTN_ODL */ +GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + lid_interrupt) +GPIO_INT(TABLET_MODE_L, PIN(J, 7), GPIO_INT_BOTH, + gmr_tablet_switch_isr) + +/* Chipset interrupts */ +GPIO_INT(AP_EC_WARM_RST_REQ, PIN(D, 3), GPIO_INT_RISING | GPIO_SEL_1P8V, + chipset_reset_request_interrupt) + +/* Power sequencing interrupts */ +GPIO_INT(AP_EC_WATCHDOG_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, + chipset_watchdog_interrupt) +GPIO_INT(AP_IN_SLEEP_L, PIN(F, 2), + GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) +GPIO_INT(PMIC_EC_PWRGD, PIN(F, 3), + GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) + +/* Sensor Interrupts */ +GPIO_INT(BASE_IMU_INT_L, PIN(J, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, + motion_interrupt) +GPIO_INT(LID_ACCEL_INT_L, PIN(J, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, + lis2dw12_interrupt) +GPIO(ALS_RGB_INT_ODL, PIN(F, 0), GPIO_INPUT) + +/* USB-C interrupts */ +/* TODO: driver not ready */ +GPIO(USB_C0_PPC_INT_ODL, PIN(D, 1), GPIO_INT_BOTH) +GPIO_INT(USB_C0_BC12_INT_ODL,PIN(J, 6), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C1_BC12_INT_L, PIN(J, 4), GPIO_INT_FALLING, bc12_interrupt) + +/* Volume button interrupts */ +GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, + button_interrupt) /* EC_VOLDN_BTN_ODL */ +GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, + button_interrupt) /* EC_VOLUP_BTN_ODL */ + +/* Other interrupts */ +GPIO_INT(AP_XHCI_INIT_DONE, PIN(D, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, + usb_a0_interrupt) +GPIO_INT(AC_PRESENT, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + extpower_interrupt) /* AC_OK / AC_PRESENT in rev1+ */ +GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, + uart_deepsleep_interrupt) /* UART_DEBUG_TX_EC_RX */ +GPIO_INT(WP, PIN(I, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, + switch_interrupt) /* EC_FLASH_WP_OD */ +GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING, + spi_event) /* SPI slave Chip Select -- AP_SPI_EC_CS_L */ +GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_ODR_HIGH, x_ec_interrupt) + +/* Power Sequencing Signals */ +GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(EC_PMIC_WATCHDOG_L, PIN(H, 0), GPIO_ODR_LOW | GPIO_SEL_1P8V) +GPIO(EN_PP5000_A, PIN(C, 6), GPIO_OUT_HIGH) +GPIO(PG_MT6315_PROC_ODL, PIN(E, 1), GPIO_INPUT) +GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT) +GPIO(PG_PP5000_A_ODL, PIN(A, 6), GPIO_INPUT) +GPIO(EN_ULP, PIN(E, 3), GPIO_OUT_LOW) +GPIO(SYS_RST_ODL, PIN(B, 6), GPIO_ODR_LOW) +GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V) + +/* MKBP event synchronization */ +GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ + +/* USB and USBC Signals */ +GPIO(DP_AUX_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) +GPIO(EC_AP_DP_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(EN_PP5000_USB_A0_VBUS, PIN(B, 7), GPIO_OUT_LOW) +GPIO(USB_C0_FRS_EN, PIN(H, 3), GPIO_OUT_LOW) + +/* Misc Signals */ +GPIO(EC_BATT_PRES_ODL, PIN(C, 0), GPIO_INPUT) +GPIO(BC12_DET_EN, PIN(J, 5), GPIO_OUT_LOW) /* EN_USB_C0_BC12_DET */ +GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) +GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ +GPIO(EN_5V_USM, PIN(D, 7), GPIO_OUT_LOW) + +/* I2C pins - Alternate function below configures I2C module on these pins */ +GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) /* I2C_CHG_BATT_SCL */ +GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) /* I2C_CHG_BATT_SDA */ +GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SCL */ +GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SDA */ +GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) /* I2C_USB_C0_SCL */ +GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) /* I2C_USB_C0_SCL */ +GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) /* I2C_USB_C1_SCL */ +GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */ + +/* SPI pins - Alternate function below configures SPI module on these pins */ + +/* NC / TP */ + +/* Keyboard pins */ + +/* Subboards HDMI/TYPEC */ +GPIO(EC_X_GPIO1, PIN(H, 4), GPIO_OUT_LOW) +GPIO(EC_X_GPIO3, PIN(J, 1), GPIO_INPUT) + +/* Alternate functions GPIO definitions */ +ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */ +ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C B */ +ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C */ +ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E */ + +/* UART */ +ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ + +/* PWM */ +ALTERNATE(PIN_MASK(A, 0x07), 1, MODULE_PWM, 0) /* PWM 0~2 */ + +/* ADC */ +ALTERNATE(PIN_MASK(I, 0x6F), 0, MODULE_ADC, 0) /* ADC 0,1,2,3,5,6 */ + +/* SPI */ +ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ + +/* Unimplemented Pins */ +GPIO(SET_VMC_VOLT_AT_1V8, PIN(D, 4), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) +GPIO(PACKET_MODE_EN, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) +/* b/160218054: behavior not defined */ +/* *_ODL pin has external pullup so don't pull it down. */ +GPIO(USB_A0_FAULT_ODL, PIN(A, 7), GPIO_INPUT) +GPIO(CHARGER_PROCHOT_ODL, PIN(C, 3), GPIO_INPUT) +GPIO(PG_MT6315_GPU_ODL, PIN(H, 6), GPIO_INPUT) +GPIO(EN_PP3000_SD_U, PIN(G, 1), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) +/* reserved for future use */ +GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) +/* + * ADC pins don't have internal pull-down capability, + * so we set them as output low. + */ +GPIO(NC_GPI7, PIN(I, 7), GPIO_OUT_LOW) +/* NC pins, enable internal pull-up/down to avoid floating state. */ +GPIO(NC_GPM2, PIN(M, 2), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPM3, PIN(M, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) +/* + * These 4 pins don't have internal pull-down capability, + * so we set them as output low. + */ +GPIO(NC_GPG3, PIN(G, 3), GPIO_OUT_LOW) +GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) +GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) +GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) + +UNIMPLEMENTED(USB_C0_PPC_BC12_INT_ODL) +UNIMPLEMENTED(USB_C0_PPC_FRSINFO) +UNIMPLEMENTED(USB_C1_BC12_CHARGER_INT_ODL) diff --git a/board/kingler/led.c b/board/kingler/led.c new file mode 100644 index 0000000000..1d3108c47b --- /dev/null +++ b/board/kingler/led.c @@ -0,0 +1,120 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" +#include "gpio.h" +#include "led_common.h" +#include "led_onoff_states.h" +#include "chipset.h" +#include "driver/bc12/mt6360.h" + +__override const int led_charge_lvl_1 = 5; +__override const int led_charge_lvl_2 = 95; + +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, + [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_DISCHARGE_S0_BAT_LOW] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, + {LED_OFF, 3 * LED_ONE_SEC} }, + [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, + {LED_OFF, 1 * LED_ONE_SEC} }, + [STATE_FACTORY_TEST] = {{EC_LED_COLOR_WHITE, 2 * LED_ONE_SEC}, + {EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC} }, +}; + +__override const struct led_descriptor + led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { + [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, + [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, + {LED_OFF, 3 * LED_ONE_SEC} }, + [PWR_LED_STATE_SUSPEND_NO_AC] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, + {LED_OFF, 3 * LED_ONE_SEC} }, + [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, +}; + + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED, + EC_LED_ID_POWER_LED, +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +__override void led_set_color_battery(enum ec_led_colors color) +{ + mt6360_led_set_brightness(MT6360_LED_RGB2, 50); + mt6360_led_set_brightness(MT6360_LED_RGB3, 50); + + switch (color) { + case EC_LED_COLOR_AMBER: + mt6360_led_enable(MT6360_LED_RGB2, 0); + mt6360_led_enable(MT6360_LED_RGB3, 1); + break; + case EC_LED_COLOR_WHITE: + mt6360_led_enable(MT6360_LED_RGB2, 1); + mt6360_led_enable(MT6360_LED_RGB3, 0); + break; + default: /* LED_OFF and other unsupported colors */ + mt6360_led_enable(MT6360_LED_RGB2, 0); + mt6360_led_enable(MT6360_LED_RGB3, 0); + break; + } +} + +__override void led_set_color_power(enum ec_led_colors color) +{ + mt6360_led_set_brightness(MT6360_LED_RGB1, 1); + mt6360_led_enable(MT6360_LED_RGB1, color == EC_LED_COLOR_WHITE); +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + brightness_range[EC_LED_COLOR_AMBER] = + MT6360_LED_BRIGHTNESS_MAX; + brightness_range[EC_LED_COLOR_WHITE] = + MT6360_LED_BRIGHTNESS_MAX; + } else if (led_id == EC_LED_ID_POWER_LED) { + brightness_range[EC_LED_COLOR_WHITE] = + MT6360_LED_BRIGHTNESS_MAX; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(EC_LED_COLOR_AMBER); + else if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(EC_LED_COLOR_WHITE); + else + led_set_color_battery(LED_OFF); + } else if (led_id == EC_LED_ID_POWER_LED) { + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_power(EC_LED_COLOR_WHITE); + else + led_set_color_power(LED_OFF); + } + + return EC_SUCCESS; +} + +__override enum led_states board_led_get_state(enum led_states desired_state) +{ + if (desired_state == STATE_BATTERY_ERROR) { + if (chipset_in_state(CHIPSET_STATE_ON)) + return desired_state; + else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) + return STATE_DISCHARGE_S3; + else + return STATE_DISCHARGE_S5; + } + return desired_state; +} diff --git a/board/kingler/usbc_config.c b/board/kingler/usbc_config.c new file mode 100644 index 0000000000..485a02c10f --- /dev/null +++ b/board/kingler/usbc_config.c @@ -0,0 +1,28 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Krabby board-specific USB-C configuration */ + +#include "driver/tcpm/it83xx_pd.h" +#include "driver/usb_mux/ps8743.h" +#include "hooks.h" + +void board_usb_mux_init(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) { + ps8743_tune_usb_eq(&usb_muxes[1], + PS8743_USB_EQ_TX_12_8_DB, + PS8743_USB_EQ_RX_12_8_DB); + ps8743_write(&usb_muxes[1], + PS8743_REG_HS_DET_THRESHOLD, + PS8743_USB_HS_THRESH_NEG_10); + } +} +DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); + +const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) +{ + return NULL; +} diff --git a/board/lingcod/vif_override.xml b/board/kingler/vif_override.xml index 32736caf64..32736caf64 100644 --- a/board/lingcod/vif_override.xml +++ b/board/kingler/vif_override.xml diff --git a/board/kingoftown/battery.c b/board/kingoftown/battery.c index c039fb3e45..3fd82bc282 100644 --- a/board/kingoftown/battery.c +++ b/board/kingoftown/battery.c @@ -59,6 +59,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, @@ -88,6 +89,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, @@ -117,6 +119,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, @@ -148,6 +151,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 45, .discharging_min_c = -10, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, }; diff --git a/board/kingoftown/board.h b/board/kingoftown/board.h index 5b49618d12..1ba0ed0c34 100644 --- a/board/kingoftown/board.h +++ b/board/kingoftown/board.h @@ -30,6 +30,7 @@ #define CONFIG_BATTERY_DEVICE_CHEMISTRY "LION" #define CONFIG_BATTERY_REVIVE_DISCONNECT #define CONFIG_BATTERY_FUEL_GAUGE +#define CONFIG_BATTERY_VENDOR_PARAM /* BC 1.2 Charger */ #define CONFIG_BC12_DETECT_PI3USB9201 diff --git a/board/kingoftown/led.c b/board/kingoftown/led.c index 295c8effeb..09c1f89598 100644 --- a/board/kingoftown/led.c +++ b/board/kingoftown/led.c @@ -17,12 +17,17 @@ #include "system.h" #include "util.h" +/* Times of tick per 1 second */ +#define TIMES_TICK_ONE_SEC (1000 / HOOK_TICK_INTERVAL_MS) +/* Times of tick per half second */ +#define TIMES_TICK_HALF_SEC (500 / HOOK_TICK_INTERVAL_MS) + #define BAT_LED_ON 1 #define BAT_LED_OFF 0 const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_RIGHT_LED, EC_LED_ID_LEFT_LED, + EC_LED_ID_RIGHT_LED, }; const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); @@ -53,10 +58,10 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) int port; switch (led_id) { - case EC_LED_ID_RIGHT_LED: + case EC_LED_ID_LEFT_LED: port = 0; break; - case EC_LED_ID_LEFT_LED: + case EC_LED_ID_RIGHT_LED: port = 1; break; default: @@ -81,19 +86,41 @@ static void set_active_port_color(enum led_color color) { int port = charge_manager_get_active_charge_port(); - if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) - side_led_set_color(0, (port == 0) ? color : LED_OFF); if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) + side_led_set_color(0, (port == 0) ? color : LED_OFF); + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) side_led_set_color(1, (port == 1) ? color : LED_OFF); } static void board_led_set_battery(void) { static int battery_ticks; + static int power_ticks; + int led_blink_cycle; uint32_t chflags = charge_get_flags(); battery_ticks++; + /* + * Override battery LED for kingoftown which doesn't have power LED, + * blinking battery white LED to indicate system suspend without + * charging. + */ + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + charge_get_state() != PWR_STATE_CHARGE) { + + power_ticks++; + led_blink_cycle = power_ticks % (2 * TIMES_TICK_ONE_SEC); + + side_led_set_color(0, (led_blink_cycle < TIMES_TICK_ONE_SEC) ? + LED_WHITE : LED_OFF); + side_led_set_color(1, (led_blink_cycle < TIMES_TICK_ONE_SEC) ? + LED_WHITE : LED_OFF); + return; + } + + power_ticks = 0; + switch (charge_get_state()) { case PWR_STATE_CHARGE: /* Always indicate when charging, even in suspend. */ @@ -101,28 +128,35 @@ static void board_led_set_battery(void) break; case PWR_STATE_DISCHARGE: if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { - if (charge_get_percent() <= 10) - side_led_set_color(0, - (battery_ticks & 0x4) ? LED_WHITE : LED_OFF); + if (charge_get_percent() <= 10) { + led_blink_cycle = + battery_ticks % (2 * TIMES_TICK_ONE_SEC); + side_led_set_color(1, + (led_blink_cycle < TIMES_TICK_ONE_SEC) ? + LED_WHITE : LED_OFF); + } else - side_led_set_color(0, LED_OFF); + side_led_set_color(1, LED_OFF); } if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) - side_led_set_color(1, LED_OFF); + side_led_set_color(0, LED_OFF); break; case PWR_STATE_ERROR: - set_active_port_color((battery_ticks & 0x2) ? - LED_WHITE : LED_OFF); + led_blink_cycle = battery_ticks % TIMES_TICK_ONE_SEC; + set_active_port_color((led_blink_cycle < TIMES_TICK_HALF_SEC) ? + LED_WHITE : LED_OFF); break; case PWR_STATE_CHARGE_NEAR_FULL: set_active_port_color(LED_WHITE); break; case PWR_STATE_IDLE: /* External power connected in IDLE */ - if (chflags & CHARGE_FLAG_FORCE_IDLE) - set_active_port_color((battery_ticks & 0x4) ? + if (chflags & CHARGE_FLAG_FORCE_IDLE) { + led_blink_cycle = battery_ticks % (2 * TIMES_TICK_ONE_SEC); + set_active_port_color( + (led_blink_cycle < TIMES_TICK_ONE_SEC) ? LED_AMBER : LED_OFF); - else + } else set_active_port_color(LED_WHITE); break; default: diff --git a/board/kodama/board.h b/board/kodama/board.h index 48e39b2300..03200f0f3c 100644 --- a/board/kodama/board.h +++ b/board/kodama/board.h @@ -58,6 +58,9 @@ TASK_EVENT_MOTION_SENSOR_INTERRUPT(VSYNC) #endif /* SECTION_IS_RW */ +/* Disable verbose output in EC pd */ +#define CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE + /* I2C ports */ #define I2C_PORT_CHARGER 0 #define I2C_PORT_TCPC0 0 diff --git a/board/kohaku/board.c b/board/kohaku/board.c index 0204cdd87f..aa5441e6f5 100644 --- a/board/kohaku/board.c +++ b/board/kohaku/board.c @@ -420,26 +420,31 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Kohaku. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1] = thermal_a, - [TEMP_SENSOR_2] = thermal_a, - [TEMP_SENSOR_3] = thermal_a, - [TEMP_SENSOR_4] = thermal_a, + [TEMP_SENSOR_1] = THERMAL_A, + [TEMP_SENSOR_2] = THERMAL_A, + [TEMP_SENSOR_3] = THERMAL_A, + [TEMP_SENSOR_4] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/kohaku/board.h b/board/kohaku/board.h index b8470d9ba7..5217cd6b3b 100644 --- a/board/kohaku/board.h +++ b/board/kohaku/board.h @@ -19,7 +19,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/krabby/board.c b/board/krabby/board.c index e01d64c386..1e81aed838 100644 --- a/board/krabby/board.c +++ b/board/krabby/board.c @@ -174,15 +174,3 @@ const struct pwm_t pwm_channels[] = { }, }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -static void board_suspend(void) -{ - gpio_set_level(GPIO_EN_5V_USM, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_suspend, HOOK_PRIO_DEFAULT); - -static void board_resume(void) -{ - gpio_set_level(GPIO_EN_5V_USM, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_resume, HOOK_PRIO_DEFAULT); diff --git a/board/krabby/board.h b/board/krabby/board.h index 857e654787..4e3dfc43d6 100644 --- a/board/krabby/board.h +++ b/board/krabby/board.h @@ -21,8 +21,6 @@ #define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM /* BC12 */ -/* TODO(b/159583342): remove after rev0 deprecated */ -#define CONFIG_MT6360_BC12_GPIO /* LED */ #define CONFIG_LED_ONOFF_STATES diff --git a/board/krabby/build.mk b/board/krabby/build.mk index b355dfd90d..86903344a1 100644 --- a/board/krabby/build.mk +++ b/board/krabby/build.mk @@ -12,5 +12,5 @@ CHIP_VARIANT:=it81202bx_1024 BASEBOARD:=corsola board-y=led.o -board-y+=battery.o board.o +board-y+=battery.o board.o hooks.o board-y+=usbc_config.o diff --git a/board/krabby/gpio.inc b/board/krabby/gpio.inc index 0486799a82..be37d43fb8 100644 --- a/board/krabby/gpio.inc +++ b/board/krabby/gpio.inc @@ -9,10 +9,11 @@ * Note: Those with interrupt handlers must be declared first. */ /* Wake Source interrupts */ -GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP | - GPIO_HIB_WAKE_HIGH, power_button_interrupt) /* H1_EC_PWR_BTN_ODL */ +GPIO_INT(POWER_BUTTON_L, PIN(E, 4), + GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + power_button_interrupt) /* GSC_EC_PWR_BTN_ODL */ GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - lid_interrupt) + lid_interrupt) /* LID_OPEN_3V3 */ GPIO_INT(TABLET_MODE_L, PIN(J, 7), GPIO_INT_BOTH, gmr_tablet_switch_isr) @@ -21,95 +22,93 @@ GPIO_INT(AP_EC_WARM_RST_REQ, PIN(D, 3), GPIO_INT_RISING | GPIO_SEL_1P8V, chipset_reset_request_interrupt) /* Power sequencing interrupts */ -GPIO_INT(AP_EC_WATCHDOG_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, - chipset_watchdog_interrupt) -GPIO_INT(AP_IN_SLEEP_L, PIN(F, 2), - GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) -GPIO_INT(PMIC_EC_PWRGD, PIN(F, 3), - GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) +GPIO_INT(AP_IN_SLEEP_L, PIN(B, 6), + GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt) /* Sensor Interrupts */ -GPIO_INT(BASE_IMU_INT_L, PIN(J, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, +GPIO_INT(BASE_IMU_INT_L, PIN(M, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, motion_interrupt) -GPIO_INT(LID_ACCEL_INT_L, PIN(J, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, +GPIO_INT(LID_ACCEL_INT_L, PIN(M, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, lis2dw12_interrupt) -GPIO(ALS_RGB_INT_ODL, PIN(F, 0), GPIO_INPUT) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(D, 1), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C0_BC12_INT_ODL,PIN(J, 6), GPIO_INT_FALLING, bc12_interrupt) -GPIO_INT(USB_C1_BC12_INT_L, PIN(J, 4), GPIO_INT_FALLING, bc12_interrupt) /* Volume button interrupts */ -GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, +GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH, button_interrupt) /* EC_VOLDN_BTN_ODL */ -GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, +GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH, button_interrupt) /* EC_VOLUP_BTN_ODL */ /* Other interrupts */ -GPIO_INT(AP_XHCI_INIT_DONE, PIN(D, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, +GPIO_INT(AP_XHCI_INIT_DONE, PIN(J, 5), + GPIO_INT_BOTH | GPIO_SEL_1P8V, usb_a0_interrupt) GPIO_INT(AC_PRESENT, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, - extpower_interrupt) /* AC_OK / AC_PRESENT in rev1+ */ + extpower_interrupt) /* GSC_ACOK_OD */ GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UART_DEBUG_TX_EC_RX */ GPIO_INT(WP, PIN(I, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, switch_interrupt) /* EC_FLASH_WP_OD */ -GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING, - spi_event) /* SPI slave Chip Select -- AP_SPI_EC_CS_L */ -GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_ODR_HIGH, x_ec_interrupt) +GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING | GPIO_SEL_1P8V, + spi_event) /* SPI slave Chip Select -- AP_EC_SPI_CS_L */ +GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_INT_BOTH | GPIO_ODR_HIGH, + x_ec_interrupt) + +/* USB-C interrupts */ +/* TODO: interrupt function not ready */ +GPIO(USB_C0_PPC_BC12_INT_ODL, PIN(D, 1), GPIO_INT_FALLING) +GPIO(USB_C1_BC12_CHARGER_INT_ODL, PIN(J, 4), GPIO_INT_FALLING) /* Power Sequencing Signals */ GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) -GPIO(EC_PMIC_WATCHDOG_L, PIN(H, 0), GPIO_ODR_LOW | GPIO_SEL_1P8V) -GPIO(EN_PP5000_A, PIN(C, 6), GPIO_OUT_HIGH) -GPIO(PG_MT6315_PROC_ODL, PIN(E, 1), GPIO_INPUT) -GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT) -GPIO(PG_PP5000_A_ODL, PIN(A, 6), GPIO_INPUT) -GPIO(EN_SLP_Z, PIN(E, 3), GPIO_OUT_LOW) -GPIO(SYS_RST_ODL, PIN(B, 6), GPIO_ODR_LOW) +GPIO(EN_PP5000_Z2, PIN(C, 6), GPIO_OUT_HIGH) +GPIO(EN_ULP, PIN(E, 3), GPIO_OUT_LOW) +GPIO(SYS_RST_ODL, PIN(G, 1), GPIO_ODR_LOW) GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V) +GPIO(AP_EC_SYSRST_ODL, PIN(J, 2), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(AP_EC_WDTRST_L, PIN(C, 7), GPIO_INPUT | GPIO_SEL_1P8V) /* MKBP event synchronization */ GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ /* USB and USBC Signals */ GPIO(DP_AUX_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) -GPIO(EC_DPBRDG_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(EC_AP_DP_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH) GPIO(EN_PP5000_USB_A0_VBUS, PIN(B, 7), GPIO_OUT_LOW) -GPIO(USB_C0_FRS_EN, PIN(H, 3), GPIO_OUT_LOW) +GPIO(USB_C0_PPC_FRSINFO, PIN(F, 0), GPIO_INPUT) /* Misc Signals */ GPIO(EC_BATT_PRES_ODL, PIN(C, 0), GPIO_INPUT) -GPIO(BC12_DET_EN, PIN(J, 5), GPIO_OUT_LOW) /* EN_USB_C0_BC12_DET */ GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ -GPIO(EN_5V_USM, PIN(D, 7), GPIO_OUT_LOW) +GPIO(EN_5V_USM, PIN(G, 3), GPIO_OUT_LOW) +GPIO(USB_A0_FAULT_ODL, PIN(J, 6), GPIO_INPUT) /* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) /* I2C_CHG_BATT_SCL */ -GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) /* I2C_CHG_BATT_SDA */ -GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SCL */ -GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SDA */ +GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_PWR_CBI_SCL */ +GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_PWR_CBI_SDA */ +GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT) /* I2C_BATT_SCL_3V3 */ +GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT) /* I2C_BATT_SDA_3V3 */ GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) /* I2C_USB_C0_SCL */ -GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) /* I2C_USB_C0_SCL */ +GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) /* I2C_USB_C0_SDA */ +GPIO(I2C_D_SCL, PIN(F, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SCL */ +GPIO(I2C_D_SDA, PIN(F, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SDA */ GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) /* I2C_USB_C1_SCL */ GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */ +GPIO(I2C_F_SCL, PIN(A, 4), GPIO_INPUT) /* I2C_PROG_SCL */ +GPIO(I2C_F_SDA, PIN(A, 5), GPIO_INPUT) /* I2C_PROG_SDA */ /* SPI pins - Alternate function below configures SPI module on these pins */ -/* NC / TP */ - /* Keyboard pins */ /* Subboards HDMI/TYPEC */ GPIO(EC_X_GPIO1, PIN(H, 4), GPIO_OUT_LOW) GPIO(EC_X_GPIO3, PIN(J, 1), GPIO_INPUT) +GPIO(HDMI_PRSNT_ODL, PIN(J, 3), GPIO_INPUT) /* low -> hdmi, other -> usb */ /* Alternate functions GPIO definitions */ ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */ ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C B */ -ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C */ +ALTERNATE(PIN_MASK(F, 0xCC), 1, MODULE_I2C, 0) /* I2C C, D */ ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E */ /* UART */ @@ -119,37 +118,40 @@ ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ ALTERNATE(PIN_MASK(A, 0x07), 1, MODULE_PWM, 0) /* PWM 0~2 */ /* ADC */ -ALTERNATE(PIN_MASK(I, 0x6F), 0, MODULE_ADC, 0) /* ADC 0,1,2,3,5,6 */ +ALTERNATE(PIN_MASK(I, 0b10010111), 0, MODULE_ADC, 0) /* ADC 0,1,2,4,7 */ /* SPI */ -ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ +ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, GPIO_SEL_1P8V) /* SPI */ /* Unimplemented Pins */ -GPIO(SET_VMC_VOLT_AT_1V8, PIN(D, 4), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) -GPIO(PACKET_MODE_EN, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) -/* b/160218054: behavior not defined */ -/* *_ODL pin has external pullup so don't pull it down. */ -GPIO(USB_A0_FAULT_ODL, PIN(A, 7), GPIO_INPUT) -GPIO(CHARGER_PROCHOT_ODL, PIN(C, 3), GPIO_INPUT) -GPIO(PG_MT6315_GPU_ODL, PIN(H, 6), GPIO_INPUT) -GPIO(EN_PP3000_SD_U, PIN(G, 1), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) +GPIO(PACKET_MODE_EN, PIN(D, 4), GPIO_OUT_LOW) +GPIO(PG_PP5000_Z2_OD, PIN(D, 2), GPIO_INPUT) +GPIO(PG_MT6315_PROC_B_ODL, PIN(E, 1), GPIO_INPUT) +GPIO(EC_PEN_CHG_DIS_ODL, PIN(H, 3), GPIO_ODR_HIGH) /* 5V output */ /* reserved for future use */ GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) -/* - * ADC pins don't have internal pull-down capability, - * so we set them as output low. - */ -GPIO(NC_GPI7, PIN(I, 7), GPIO_OUT_LOW) + /* NC pins, enable internal pull-up/down to avoid floating state. */ -GPIO(NC_GPM2, PIN(M, 2), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM3, PIN(M, 3), GPIO_INPUT | GPIO_PULL_DOWN) -GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPA3, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPA6, PIN(A, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPA7, PIN(A, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPC3, PIN(C, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPD7, PIN(D, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPF1, PIN(F, 1), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) +GPIO(NC_GPH0, PIN(H, 0), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPH6, PIN(H, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPI7, PIN(I, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) /* - * These 4 pins don't have internal pull-down capability, + * These pins don't have internal pull-down capability, * so we set them as output low. */ -GPIO(NC_GPG3, PIN(G, 3), GPIO_OUT_LOW) GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) + +/* pins used in power/mt8192, will be removed after mt8186 code ready */ +UNIMPLEMENTED(AP_EC_WATCHDOG_L) +UNIMPLEMENTED(EC_PMIC_WATCHDOG_L) +UNIMPLEMENTED(PMIC_EC_PWRGD) diff --git a/board/krabby/hooks.c b/board/krabby/hooks.c new file mode 100644 index 0000000000..cea6667650 --- /dev/null +++ b/board/krabby/hooks.c @@ -0,0 +1,19 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "gpio.h" +#include "hooks.h" + +static void board_suspend(void) +{ + gpio_set_level(GPIO_EN_5V_USM, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_suspend, HOOK_PRIO_DEFAULT); + +static void board_resume(void) +{ + gpio_set_level(GPIO_EN_5V_USM, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_resume, HOOK_PRIO_DEFAULT); diff --git a/board/krabby/usbc_config.c b/board/krabby/usbc_config.c index d506f094ee..ee5d9483eb 100644 --- a/board/krabby/usbc_config.c +++ b/board/krabby/usbc_config.c @@ -5,6 +5,7 @@ /* Krabby board-specific USB-C configuration */ +#include "driver/tcpm/it83xx_pd.h" #include "driver/usb_mux/ps8743.h" #include "hooks.h" @@ -20,3 +21,20 @@ void board_usb_mux_init(void) } } DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); + +const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) +{ + const static struct cc_para_t + cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + }; + + return &cc_parameter[port]; +} diff --git a/board/kukui/board.h b/board/kukui/board.h index dd031f90f0..1f92e8f429 100644 --- a/board/kukui/board.h +++ b/board/kukui/board.h @@ -31,6 +31,10 @@ #define CONFIG_VOLUME_BUTTONS #define CONFIG_USB_MUX_RUNTIME_CONFIG +#ifdef SECTION_IS_RO +#define CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE +#endif /* SECTION_IS_RO */ + /* Battery */ #ifdef BOARD_KRANE #define BATTERY_DESIRED_CHARGING_CURRENT 3500 /* mA */ diff --git a/board/lalala/board.c b/board/lalala/board.c index a664a9266e..89383ed8eb 100644 --- a/board/lalala/board.c +++ b/board/lalala/board.c @@ -237,31 +237,41 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(73), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(73), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/lindar/board.c b/board/lindar/board.c index 030940cfb1..e1975260df 100644 --- a/board/lindar/board.c +++ b/board/lindar/board.c @@ -262,17 +262,22 @@ const struct fan_t fans[FAN_CH_COUNT] = { * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (100 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(100), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - }, - .temp_fan_off = C_TO_K(30), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + }, \ + .temp_fan_off = C_TO_K(30), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -285,24 +290,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 100c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(100), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - }, - .temp_fan_off = C_TO_K(30), - .temp_fan_max = C_TO_K(60), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + }, \ + .temp_fan_off = C_TO_K(30), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/lingcod/battery.c b/board/lingcod/battery.c deleted file mode 100644 index 7f37c6fe10..0000000000 --- a/board/lingcod/battery.c +++ /dev/null @@ -1,123 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery_fuel_gauge.h" -#include "common.h" -#include "util.h" - -/* - * Battery info for all Volteer battery types. Note that the fields - * start_charging_min/max and charging_min/max are not used for the charger. - * The effective temperature limits are given by discharging_min/max_c. - * - * Fuel Gauge (FG) parameters which are used for determining if the battery - * is connected, the appropriate ship mode (battery cutoff) command, and the - * charge/discharge FETs status. - * - * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery - * register. For some batteries, the charge/discharge FET bits are set when - * charging/discharging is active, in other types, these bits set mean that - * charging/discharging is disabled. Therefore, in addition to the mask for - * these bits, a disconnect value must be specified. Note that for TI fuel - * gauge, the charge/discharge FET status is found in Operation Status (0x54), - * but a read of Manufacturer Access (0x00) will return the lower 16 bits of - * Operation status which contains the FET status bits. - * - * The assumption for battery types supported is that the charge/discharge FET - * status can be read with a sb_read() command and therefore, only the register - * address, mask, and disconnect value need to be provided. - */ -const struct board_batt_params board_battery_info[] = { - [BATTERY_SMP] = { - .fuel_gauge = { - .manuf_name = "SMP", - .device_name = "L19M4PG2", - .ship_mode = { - .reg_addr = 0x34, - .reg_data = { 0x0000, 0x1000 }, - }, - .fet = { - .reg_addr = 0x34, - .reg_mask = 0x0100, - .disconnect_val = 0x0100, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7680, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 332, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, - [BATTERY_LGC] = { - .fuel_gauge = { - .manuf_name = "LGC", - .device_name = "L19L4PG2", - .ship_mode = { - .reg_addr = 0x34, - .reg_data = { 0x0000, 0x1000 }, - }, - .fet = { - .reg_addr = 0x34, - .reg_mask = 0x0100, - .disconnect_val = 0x0100, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7700, /* mV */ - /* - * voltage min value and precharge current value are - * specified by LGC directly and not shown in the SPEC. - */ - .voltage_min = 6000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 73, - }, - }, - [BATTERY_SUNWODA] = { - .fuel_gauge = { - .manuf_name = "SUNWODA", - .device_name = "L19D4PG2", - .ship_mode = { - .reg_addr = 0x34, - .reg_data = { 0x0000, 0x1000 }, - }, - .fet = { - .reg_addr = 0x34, - .reg_mask = 0x0100, - .disconnect_val = 0x0100, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7680, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 333, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_SMP; diff --git a/board/lingcod/board.c b/board/lingcod/board.c deleted file mode 100644 index c294100b02..0000000000 --- a/board/lingcod/board.c +++ /dev/null @@ -1,542 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Malefor board-specific configuration */ -#include "button.h" -#include "cbi_ec_fw_config.h" -#include "common.h" -#include "driver/accel_lis2dh.h" -#include "driver/accelgyro_lsm6dsm.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/ppc/sn5s330.h" -#include "driver/ppc/syv682x.h" -#include "driver/tcpm/tcpci.h" -#include "driver/tcpm/tusb422.h" -#include "driver/retimer/bb_retimer_public.h" -#include "driver/sync.h" -#include "extpower.h" -#include "fan.h" -#include "fan_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "tablet_mode.h" -#include "uart.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" -#include "usbc_ppc.h" -#include "util.h" - -#include "gpio_list.h" /* Must come after other header files. */ - -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args) - -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - /* Increase from 50 us, because KSO_02 passes through the H1. */ - .output_settle_us = 80, - /* Other values should be the same as the default configuration. */ - .debounce_down_us = 9 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ - }, -}; - -/******************************************************************************/ -/* - * FW_CONFIG defaults for Malefor if the CBI data is not initialized. - */ -union volteer_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_NO_A, -}; - -static void board_init(void) -{ - if (ec_cfg_has_tabletmode()) { - /* Enable gpio interrupt for base accelgyro sensor */ - gpio_enable_interrupt(GPIO_EC_IMU_INT_L); - } else { - motion_sensor_count = 0; - /* Device is clamshell only */ - tablet_set_mode(0, TABLET_TRIGGER_LID); - /* Gyro is not present, don't allow line to float */ - gpio_set_flags(GPIO_EC_IMU_INT_L, GPIO_INPUT | GPIO_PULL_DOWN); - } - - /* - * TODO: b/154447182 - Malefor will control power LED and battery LED - * independently, and keep the max brightness of power LED and battery - * LED as 50%. - */ - pwm_enable(PWM_CH_LED4_SIDESEL, 1); - pwm_set_duty(PWM_CH_LED4_SIDESEL, 50); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -int board_is_lid_angle_tablet_mode(void) -{ - return ec_cfg_has_tabletmode(); -} - -/* Enable or disable input devices, based on tablet mode or chipset state */ -__override void lid_angle_peripheral_enable(int enable) -{ - if (ec_cfg_has_tabletmode()) { - if (chipset_in_state(CHIPSET_STATE_ANY_OFF) || - tablet_get_mode()) - enable = 0; - keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE); - } -} - -/******************************************************************************/ -/* Sensors */ -/* Lid and base Sensor mutex */ -static struct mutex g_lid_accel_mutex; -static struct mutex g_base_mutex; - -/* Lid and base accel private data */ -static struct stprivate_data g_lis2dh_data; -static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; - -/* Matrix to rotate lid and base sensor into standard reference frame */ -static const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -static const mat33_fp_t base_standard_ref = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -struct motion_sensor_t motion_sensors[] = { - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LIS2DE, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &lis2dh_drv, - .mutex = &g_lid_accel_mutex, - .drv_data = &g_lis2dh_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = LIS2DH_ADDR1_FLAGS, - .rot_standard_ref = &lid_standard_ref, - .min_frequency = LIS2DH_ODR_MIN_VAL, - .max_frequency = LIS2DH_ODR_MAX_VAL, - .default_range = 2, /* g, to support tablet mode */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - - [BASE_ACCEL] = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LSM6DSM, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &lsm6dsm_drv, - .mutex = &g_base_mutex, - .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, - MOTIONSENSE_TYPE_ACCEL), - .int_signal = GPIO_EC_IMU_INT_L, - .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, - .rot_standard_ref = &base_standard_ref, - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .min_frequency = LSM6DSM_ODR_MIN_VAL, - .max_frequency = LSM6DSM_ODR_MAX_VAL, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 13000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Sensor on for angle detection */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - }, - }, - - [BASE_GYRO] = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LSM6DSM, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &lsm6dsm_drv, - .mutex = &g_base_mutex, - .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, - MOTIONSENSE_TYPE_GYRO), - .int_signal = GPIO_EC_IMU_INT_L, - .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, - .default_range = 1000 | ROUND_UP_FLAG, /* dps */ - .rot_standard_ref = &base_standard_ref, - .min_frequency = LSM6DSM_ODR_MIN_VAL, - .max_frequency = LSM6DSM_ODR_MAX_VAL, - }, -}; -unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -/******************************************************************************/ -/* Physical fans. These are logically separate from pwm_channels. */ - -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = GPIO_EN_PP5000_FAN, -}; - -/* - * Fan specs from datasheet: - * Max speed 5900 rpm (+/- 7%), minimum duty cycle 30%. - * Minimum speed not specified by RPM. Set minimum RPM to max speed (with - * margin) x 30%. - * 5900 x 1.07 x 0.30 = 1894, round up to 1900 - */ -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1900, - .rpm_start = 1900, - .rpm_max = 5900, -}; - -const struct fan_t fans[FAN_CH_COUNT] = { - [FAN_CH_0] = { - .conf = &fan_conf_0, - .rpm = &fan_rpm_0, - }, -}; - -/******************************************************************************/ -/* EC thermal management configuration */ - -/* - * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at - * 130 C. However, sensor is located next to DDR, so we need to use the lower - * DDR temperature limit (85 C) - */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; - -/* - * Inductor limits - used for both charger and PP3300 regulator - * - * Need to use the lower of the charger IC, PP3300 regulator, and the inductors - * - * Charger max recommended temperature 100C, max absolute temperature 125C - * PP3300 regulator: operating range -40 C to 145 C - * - * Inductors: limit of 125c - * PCB: limit is 80c - */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - - -struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -/******************************************************************************/ -/* MFT channels. These are logically separate from pwm_channels. */ -const struct mft_t mft_channels[] = { - [MFT_CH_0] = { - .module = NPCX_MFT_MODULE_1, - .clk_src = TCKC_LFCLK, - .pwm_id = PWM_CH_FAN, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); - -/******************************************************************************/ -/* I2C port map configuration */ -const struct i2c_port_t i2c_ports[] = { - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C0_SENSOR_SCL, - .sda = GPIO_EC_I2C0_SENSOR_SDA, - }, - { - .name = "usb_c0", - .port = I2C_PORT_USB_C0, - .kbps = 1000, - .scl = GPIO_EC_I2C1_USB_C0_SCL, - .sda = GPIO_EC_I2C1_USB_C0_SDA, - }, - { - .name = "usb_c1", - .port = I2C_PORT_USB_C1, - .kbps = 1000, - .scl = GPIO_EC_I2C2_USB_C1_SCL, - .sda = GPIO_EC_I2C2_USB_C1_SDA, - }, - { - .name = "usb_1_mix", - .port = I2C_PORT_USB_1_MIX, - .kbps = 100, - .scl = GPIO_EC_I2C3_USB_1_MIX_SCL, - .sda = GPIO_EC_I2C3_USB_1_MIX_SDA, - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 100, - .scl = GPIO_EC_I2C5_POWER_SCL, - .sda = GPIO_EC_I2C5_POWER_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C7_EEPROM_SCL, - .sda = GPIO_EC_I2C7_EEPROM_SDA, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/******************************************************************************/ -/* PWM configuration */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED4_SIDESEL] = { - .channel = 7, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - /* Run at a higher frequency than the color PWM signals to avoid - * timing-based color shifts. - */ - .freq = 4800, - }, - [PWM_CH_FAN] = { - .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000 - }, - [PWM_CH_KBLIGHT] = { - .channel = 3, - .flags = 0, - /* - * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent - * flicker. Higher frequencies consume similar average power to - * lower PWM frequencies, but higher frequencies record a much - * lower maximum power. - */ - .freq = 2400, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -void board_reset_pd_mcu(void) -{ - /* TODO(b/159024035): Malefor: check USB PD reset operation */ -} - -__override void board_cbi_init(void) -{ - /* TODO(b/159024035): Malefor: check FW_CONFIG fields for USB DB type */ -} - -/******************************************************************************/ -/* USBC PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/******************************************************************************/ -/* PPC support routines */ -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - sn5s330_interrupt(USBC_PORT_C0); - break; - case GPIO_USB_C1_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C1); - default: - break; - } -} - -/******************************************************************************/ -/* BC1.2 charger detect configuration */ -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC TCPC configuration */ -struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC mux configuration - Tiger Lake includes internal mux */ -struct usb_mux usbc1_tcss_usb_mux = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .next_mux = &usbc1_tcss_usb_mux, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); - -struct bb_usb_control bb_controls[] = { - [USBC_PORT_C0] = { - /* USB-C port 0 doesn't have a retimer */ - }, - [USBC_PORT_C1] = { - .usb_ls_en_gpio = GPIO_USB_C1_LS_EN, - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_ODL, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(bb_controls) == USBC_PORT_COUNT); - -static void board_tcpc_init(void) -{ - /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - - /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); - -/******************************************************************************/ -/* TCPC support routines */ -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set - */ - if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -int ppc_get_alert_status(int port) -{ - if (port == USBC_PORT_C0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; -} diff --git a/board/lingcod/board.h b/board/lingcod/board.h deleted file mode 100644 index 8190504939..0000000000 --- a/board/lingcod/board.h +++ /dev/null @@ -1,160 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Baseboard features */ -#include "baseboard.h" - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ - -#define CONFIG_VBOOT_EFS2 - -#define CONFIG_POWER_BUTTON - -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* LED defines */ -#define CONFIG_LED_ONOFF_STATES - -/* Keyboard features */ - -/* Sensors */ -#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT -#define CONFIG_ACCEL_LIS2DE /* Lid accel */ -#define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ - -/* Sensors without hardware FIFO are in forced mode */ -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - BIT(LID_ACCEL) - -#define CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_UPDATE -#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL -#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL - -#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) - -/* USB Type C and USB PD defines */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 - -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ - -/* - * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C - * cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 -/* Enabling USB4 mode */ -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x40 - -/* USB Type A Features */ - -/* USBC PPC*/ -#define CONFIG_USBC_PPC_SN5S330 /* USBC port C0 */ -#define CONFIG_USBC_PPC_SYV682X /* USBC port C1 */ - -/* BC 1.2 */ - -/* Volume Button feature */ - -/* Fan features */ - -/* charger defines */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -/* - * Macros for GPIO signals used in common code that don't match the - * schematic names. Signal names in gpio.inc match the schematic and are - * then redefined here to so it's more clear which signal is being used for - * which purpose. - */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PACKET_MODE_EN GPIO_EC_H1_PACKET_MODE -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_L -#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL -#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL -#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 - -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_EEPROM - -#define I2C_ADDR_EEPROM_FLAGS 0x50 -#define CONFIG_I2C_CONTROLLER - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_SMP, - BATTERY_LGC, - BATTERY_SUNWODA, - BATTERY_TYPE_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED4_SIDESEL = 0, - PWM_CH_FAN, - PWM_CH_KBLIGHT, - PWM_CH_COUNT -}; - -enum sensor_id { - LID_ACCEL = 0, - BASE_ACCEL, - BASE_GYRO, - SENSOR_COUNT, -}; - -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; - -void board_reset_pd_mcu(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/lingcod/build.mk b/board/lingcod/build.mk deleted file mode 100644 index 279b2e559e..0000000000 --- a/board/lingcod/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m6fc -BASEBOARD:=volteer - -board-y=board.o -board-y+=battery.o -board-y+=led.o diff --git a/board/lingcod/ec.tasklist b/board/lingcod/ec.tasklist deleted file mode 100644 index 292de51cdb..0000000000 --- a/board/lingcod/ec.tasklist +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/lingcod/gpio.inc b/board/lingcod/gpio.inc deleted file mode 100644 index 14817a622c..0000000000 --- a/board/lingcod/gpio.inc +++ /dev/null @@ -1,163 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) -#endif -GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(EC_IMU_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) -GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) - -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) - -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) - -/* HDMI interrupts */ - -/* Volume button interrupts */ -GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) - -/* Power Sequencing Signals */ -GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW) -GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */ -/* The EC does not buffer this signal on Volteer. */ -UNIMPLEMENTED(PCH_DSW_PWROK) - -/* Other wake sources */ -/* - * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an - * interrupt handler because it is automatically handled by the PSL. - * - * We need to lock the setting so this gpio can't be reconfigured to overdrive - * the real reset signal. (This is the PSL input pin not the real reset pin). - */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | - GPIO_HIB_WAKE_HIGH | - GPIO_LOCKED) - -/* AP/PCH Signals */ -GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */ -GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) -GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_ODL, PIN(7, 4), GPIO_ODR_HIGH) -GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) -GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -UNIMPLEMENTED(EC_PROCHOT_IN_L) -GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) - -GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) - -/* USB and USBC Signals */ -GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) /* USB_C1 Reset on boards board ID >=1 */ -GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) - -/* Don't have a load switch for retimer */ -UNIMPLEMENTED(USB_C1_LS_EN) - -/* Misc Signals */ -GPIO(EC_H1_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) /* H1 Packet Mode */ - -/* - * eDP backlight - both PCH and EC have enable pins that must be high - * for the backlight to turn on. Default state is high, and can be turned - * off during sleep states. - */ -GPIO(EC_EDP_BL_EN, PIN(D, 3), GPIO_OUT_HIGH) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(EC_I2C0_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C0_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SDA, PIN(B, 2), GPIO_INPUT) - -/* Battery signals */ -GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) - -/* Physical HPD pins are not needed on EC as these are configured by PMC */ -GPIO(USB_C0_DP_HPD, PIN(F, 3), GPIO_INPUT) -GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) - -/* LED */ -GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_HIGH) /* Battery - Green LED */ -GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_HIGH) /* Battery - Red LED */ -GPIO(LED_3_L, PIN(C, 2), GPIO_OUT_HIGH) /* Power - White LED */ - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 */ -ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ - -/* This selects between an LED module on the motherboard and one on the daughter - * board, to be controlled by LED_{1,2,3}_L. PWM allows driving both modules at - * the same time. */ -ALTERNATE(PIN_MASK(6, BIT(0)), 0, MODULE_PWM, 0) /* LED_SIDESEL_4_L */ - -/* Fan signals */ -GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_LOW) -ALTERNATE(PIN_MASK(B, BIT(7)), 0, MODULE_PWM, 0) /* FAN_PWM */ -ALTERNATE(PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0) /* FAN_SPEED_TACH */ - -/* Keyboard pins */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ -GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 */ -ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ -ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ -ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_KB_BL_PWM */ - -/* UART */ -ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0) /* UART from EC to Servo */ - -/* Power Switch Logic (PSL) inputs */ -ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* GPIOD2 = EC_LID_OPEN */ -ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, - GPIO01 = H1_EC_PWR_BTN_ODL - GPIO02 = EC_RST_ODL */ - -/* Temperature sensors */ -ALTERNATE(PIN_MASK(4, BIT(2) | BIT(4) | BIT(5)), 0, MODULE_ADC, 0) /* TEMP_SENSOR1,2,4 */ -ALTERNATE(PIN_MASK(F, BIT(1)), 0, MODULE_ADC, 0) /* TEMP_SENSOR3 */ diff --git a/board/lingcod/led.c b/board/lingcod/led.c deleted file mode 100644 index 0f7d37723b..0000000000 --- a/board/lingcod/led.c +++ /dev/null @@ -1,111 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control for Malefor - */ - -#include "common.h" -#include "led_onoff_states.h" -#include "led_common.h" -#include "gpio.h" - -#define LED_OFF_LVL 1 -#define LED_ON_LVL 0 - -__override const int led_charge_lvl_1 = 5; - -__override const int led_charge_lvl_2 = 97; - -__override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_RED, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_RED, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_GREEN, 2 * LED_ONE_SEC} }, -}; - -__override const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 3 * LED_ONE_SEC}, - {LED_OFF, 0.5 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{LED_OFF, LED_INDEFINITE} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, -}; - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_BATTERY_LED, - EC_LED_ID_POWER_LED -}; - -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -__override void led_set_color_power(enum ec_led_colors color) -{ - if (color == EC_LED_COLOR_WHITE) - gpio_set_level(GPIO_LED_3_L, LED_ON_LVL); - else - /* LED_OFF and unsupported colors */ - gpio_set_level(GPIO_LED_3_L, LED_OFF_LVL); -} - -__override void led_set_color_battery(enum ec_led_colors color) -{ - switch (color) { - case EC_LED_COLOR_RED: - gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); - gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); - break; - case EC_LED_COLOR_AMBER: - gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); - gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); - break; - case EC_LED_COLOR_GREEN: - gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); - gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); - break; - default: /* LED_OFF and other unsupported colors */ - gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); - gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); - break; - } -} - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - brightness_range[EC_LED_COLOR_RED] = 1; - brightness_range[EC_LED_COLOR_AMBER] = 1; - brightness_range[EC_LED_COLOR_GREEN] = 1; - } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = 1; - } -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - if (brightness[EC_LED_COLOR_RED] != 0) - led_set_color_battery(EC_LED_COLOR_RED); - else if (brightness[EC_LED_COLOR_AMBER] != 0) - led_set_color_battery(EC_LED_COLOR_AMBER); - else if (brightness[EC_LED_COLOR_GREEN] != 0) - led_set_color_battery(EC_LED_COLOR_GREEN); - else - led_set_color_battery(LED_OFF); - } else if (led_id == EC_LED_ID_POWER_LED) { - if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_power(EC_LED_COLOR_WHITE); - else - led_set_color_power(LED_OFF); - } - - return EC_SUCCESS; -} diff --git a/board/magolor/board.c b/board/magolor/board.c index 75c965b2e0..3d3765dbe0 100644 --- a/board/magolor/board.c +++ b/board/magolor/board.c @@ -336,31 +336,41 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(73), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(73), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/makomo/board.h b/board/makomo/board.h index 844fd95292..3c620cd823 100644 --- a/board/makomo/board.h +++ b/board/makomo/board.h @@ -90,7 +90,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/malefor/battery.c b/board/malefor/battery.c deleted file mode 100644 index 7f37c6fe10..0000000000 --- a/board/malefor/battery.c +++ /dev/null @@ -1,123 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery_fuel_gauge.h" -#include "common.h" -#include "util.h" - -/* - * Battery info for all Volteer battery types. Note that the fields - * start_charging_min/max and charging_min/max are not used for the charger. - * The effective temperature limits are given by discharging_min/max_c. - * - * Fuel Gauge (FG) parameters which are used for determining if the battery - * is connected, the appropriate ship mode (battery cutoff) command, and the - * charge/discharge FETs status. - * - * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery - * register. For some batteries, the charge/discharge FET bits are set when - * charging/discharging is active, in other types, these bits set mean that - * charging/discharging is disabled. Therefore, in addition to the mask for - * these bits, a disconnect value must be specified. Note that for TI fuel - * gauge, the charge/discharge FET status is found in Operation Status (0x54), - * but a read of Manufacturer Access (0x00) will return the lower 16 bits of - * Operation status which contains the FET status bits. - * - * The assumption for battery types supported is that the charge/discharge FET - * status can be read with a sb_read() command and therefore, only the register - * address, mask, and disconnect value need to be provided. - */ -const struct board_batt_params board_battery_info[] = { - [BATTERY_SMP] = { - .fuel_gauge = { - .manuf_name = "SMP", - .device_name = "L19M4PG2", - .ship_mode = { - .reg_addr = 0x34, - .reg_data = { 0x0000, 0x1000 }, - }, - .fet = { - .reg_addr = 0x34, - .reg_mask = 0x0100, - .disconnect_val = 0x0100, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7680, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 332, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, - [BATTERY_LGC] = { - .fuel_gauge = { - .manuf_name = "LGC", - .device_name = "L19L4PG2", - .ship_mode = { - .reg_addr = 0x34, - .reg_data = { 0x0000, 0x1000 }, - }, - .fet = { - .reg_addr = 0x34, - .reg_mask = 0x0100, - .disconnect_val = 0x0100, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7700, /* mV */ - /* - * voltage min value and precharge current value are - * specified by LGC directly and not shown in the SPEC. - */ - .voltage_min = 6000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 73, - }, - }, - [BATTERY_SUNWODA] = { - .fuel_gauge = { - .manuf_name = "SUNWODA", - .device_name = "L19D4PG2", - .ship_mode = { - .reg_addr = 0x34, - .reg_data = { 0x0000, 0x1000 }, - }, - .fet = { - .reg_addr = 0x34, - .reg_mask = 0x0100, - .disconnect_val = 0x0100, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7680, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 333, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 60, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_SMP; diff --git a/board/malefor/board.c b/board/malefor/board.c deleted file mode 100644 index 663c5bace9..0000000000 --- a/board/malefor/board.c +++ /dev/null @@ -1,595 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Malefor board-specific configuration */ -#include "button.h" -#include "cbi_ec_fw_config.h" -#include "common.h" -#include "driver/accel_lis2dh.h" -#include "driver/accelgyro_lsm6dsm.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/ppc/sn5s330.h" -#include "driver/ppc/syv682x.h" -#include "driver/retimer/bb_retimer_public.h" -#include "driver/sync.h" -#include "driver/tcpm/ps8xxx.h" -#include "driver/tcpm/tcpci.h" -#include "driver/tcpm/tusb422.h" -#include "extpower.h" -#include "fan.h" -#include "fan_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "tablet_mode.h" -#include "uart.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" -#include "usbc_ppc.h" -#include "util.h" - -#include "gpio_list.h" /* Must come after other header files. */ - -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args) - -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - /* Increase from 50 us, because KSO_02 passes through the H1. */ - .output_settle_us = 80, - /* Other values should be the same as the default configuration. */ - .debounce_down_us = 9 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ - }, -}; - -/******************************************************************************/ -/* - * FW_CONFIG defaults for Malefor if the CBI data is not initialized. - */ -union volteer_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_NO_A, -}; - -static void board_init(void) -{ - if (ec_cfg_has_tabletmode()) { - /* Enable gpio interrupt for base accelgyro sensor */ - gpio_enable_interrupt(GPIO_EC_IMU_INT_L); - } else { - motion_sensor_count = 0; - /* Device is clamshell only */ - tablet_set_mode(0, TABLET_TRIGGER_LID); - /* Gyro is not present, don't allow line to float */ - gpio_set_flags(GPIO_EC_IMU_INT_L, GPIO_INPUT | GPIO_PULL_DOWN); - } - - /* - * TODO: b/154447182 - Malefor will control power LED and battery LED - * independently, and keep the max brightness of power LED and battery - * LED as 50%. - */ - pwm_enable(PWM_CH_LED4_SIDESEL, 1); - pwm_set_duty(PWM_CH_LED4_SIDESEL, 50); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -int board_is_lid_angle_tablet_mode(void) -{ - return ec_cfg_has_tabletmode(); -} - -/* Enable or disable input devices, based on tablet mode or chipset state */ -__override void lid_angle_peripheral_enable(int enable) -{ - if (ec_cfg_has_tabletmode()) { - if (chipset_in_state(CHIPSET_STATE_ANY_OFF) || - tablet_get_mode()) - enable = 0; - keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE); - } -} - -/******************************************************************************/ -/* Sensors */ -/* Lid and base Sensor mutex */ -static struct mutex g_lid_accel_mutex; -static struct mutex g_base_mutex; - -/* Lid and base accel private data */ -static struct stprivate_data g_lis2dh_data; -static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; - -/* Matrix to rotate lid and base sensor into standard reference frame */ -static const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -static const mat33_fp_t base_standard_ref = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -struct motion_sensor_t motion_sensors[] = { - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LIS2DE, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &lis2dh_drv, - .mutex = &g_lid_accel_mutex, - .drv_data = &g_lis2dh_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = LIS2DH_ADDR1_FLAGS, - .rot_standard_ref = &lid_standard_ref, - .min_frequency = LIS2DH_ODR_MIN_VAL, - .max_frequency = LIS2DH_ODR_MAX_VAL, - .default_range = 2, /* g, to support tablet mode */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - - [BASE_ACCEL] = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LSM6DSM, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &lsm6dsm_drv, - .mutex = &g_base_mutex, - .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, - MOTIONSENSE_TYPE_ACCEL), - .int_signal = GPIO_EC_IMU_INT_L, - .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, - .rot_standard_ref = &base_standard_ref, - .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .min_frequency = LSM6DSM_ODR_MIN_VAL, - .max_frequency = LSM6DSM_ODR_MAX_VAL, - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 13000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Sensor on for angle detection */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - }, - }, - - [BASE_GYRO] = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_LSM6DSM, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &lsm6dsm_drv, - .mutex = &g_base_mutex, - .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, - MOTIONSENSE_TYPE_GYRO), - .int_signal = GPIO_EC_IMU_INT_L, - .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, - .default_range = 1000 | ROUND_UP_FLAG, /* dps */ - .rot_standard_ref = &base_standard_ref, - .min_frequency = LSM6DSM_ODR_MIN_VAL, - .max_frequency = LSM6DSM_ODR_MAX_VAL, - }, -}; -unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -/******************************************************************************/ -/* Physical fans. These are logically separate from pwm_channels. */ - -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = GPIO_EN_PP5000_FAN, -}; - -/* - * Fan specs from datasheet: - * Max speed 5900 rpm (+/- 7%), minimum duty cycle 30%. - * Minimum speed not specified by RPM. Set minimum RPM to max speed (with - * margin) x 30%. - * 5900 x 1.07 x 0.30 = 1894, round up to 1900 - */ -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1900, - .rpm_start = 1900, - .rpm_max = 5900, -}; - -const struct fan_t fans[FAN_CH_COUNT] = { - [FAN_CH_0] = { - .conf = &fan_conf_0, - .rpm = &fan_rpm_0, - }, -}; - -/******************************************************************************/ -/* EC thermal management configuration */ - -/* - * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at - * 130 C. However, sensor is located next to DDR, so we need to use the lower - * DDR temperature limit (85 C) - */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; - -/* - * Inductor limits - used for both charger and PP3300 regulator - * - * Need to use the lower of the charger IC, PP3300 regulator, and the inductors - * - * Charger max recommended temperature 100C, max absolute temperature 125C - * PP3300 regulator: operating range -40 C to 145 C - * - * Inductors: limit of 125c - * PCB: limit is 80c - */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - - -struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -/******************************************************************************/ -/* MFT channels. These are logically separate from pwm_channels. */ -const struct mft_t mft_channels[] = { - [MFT_CH_0] = { - .module = NPCX_MFT_MODULE_1, - .clk_src = TCKC_LFCLK, - .pwm_id = PWM_CH_FAN, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); - -/******************************************************************************/ -/* I2C port map configuration */ -const struct i2c_port_t i2c_ports[] = { - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C0_SENSOR_SCL, - .sda = GPIO_EC_I2C0_SENSOR_SDA, - }, - { - .name = "usb_c0", - .port = I2C_PORT_USB_C0, - .kbps = 1000, - .scl = GPIO_EC_I2C1_USB_C0_SCL, - .sda = GPIO_EC_I2C1_USB_C0_SDA, - }, - { - .name = "usb_c1", - .port = I2C_PORT_USB_C1, - .kbps = 1000, - .scl = GPIO_EC_I2C2_USB_C1_SCL, - .sda = GPIO_EC_I2C2_USB_C1_SDA, - }, - { - .name = "usb_1_mix", - .port = I2C_PORT_USB_1_MIX, - .kbps = 100, - .scl = GPIO_EC_I2C3_USB_1_MIX_SCL, - .sda = GPIO_EC_I2C3_USB_1_MIX_SDA, - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 100, - .scl = GPIO_EC_I2C5_POWER_SCL, - .sda = GPIO_EC_I2C5_POWER_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C7_EEPROM_SCL, - .sda = GPIO_EC_I2C7_EEPROM_SDA, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/******************************************************************************/ -/* PWM configuration */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED4_SIDESEL] = { - .channel = 7, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - /* Run at a higher frequency than the color PWM signals to avoid - * timing-based color shifts. - */ - .freq = 4800, - }, - [PWM_CH_FAN] = { - .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000 - }, - [PWM_CH_KBLIGHT] = { - .channel = 3, - .flags = 0, - /* - * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent - * flicker. Higher frequencies consume similar average power to - * lower PWM frequencies, but higher frequencies record a much - * lower maximum power. - */ - .freq = 2400, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/* USBC TCPC configuration for port 1 on USB3 board */ -static const struct tcpc_config_t tcpc_config_p1_usb3 = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = PS8751_I2C_ADDR1_FLAGS, - }, - .flags = TCPC_FLAGS_TCPCI_REV2_0 | TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V, - .drv = &ps8xxx_tcpm_drv, -}; - -static const struct usb_mux usbc1_usb3_db_retimer = { - .usb_port = USBC_PORT_C1, - .driver = &tcpci_tcpm_usb_mux_driver, - .hpd_update = &ps8xxx_tcpc_update_hpd_status, - .next_mux = NULL, -}; - -static const struct usb_mux mux_config_p1_usb3 = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - .next_mux = &usbc1_usb3_db_retimer, -}; - -void board_reset_pd_mcu(void) -{ - int val; - - gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0); - msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, - PS8815_PWR_H_RST_H_DELAY_MS)); - gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1); - msleep(PS8815_FW_INIT_DELAY_MS); - - /* - * b/144397088 - * ps8815 firmware 0x01 needs special configuration - */ - - CPRINTS("%s: patching ps8815 registers", __func__); - - if (i2c_read8(I2C_PORT_USB_C1, - PS8751_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS) - CPRINTS("ps8815: reg 0x0f was %02x", val); - - if (i2c_write8(I2C_PORT_USB_C1, - PS8751_I2C_ADDR1_P2_FLAGS, 0x0f, 0x31) == EC_SUCCESS) - CPRINTS("ps8815: reg 0x0f set to 0x31"); - - if (i2c_read8(I2C_PORT_USB_C1, - PS8751_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS) - CPRINTS("ps8815: reg 0x0f now %02x", val); -} - -__override void board_cbi_init(void) -{ - /* Config DB USB3 */ - tcpc_config[USBC_PORT_C1] = tcpc_config_p1_usb3; - usb_muxes[USBC_PORT_C1] = mux_config_p1_usb3; -} - -/******************************************************************************/ -/* USBC PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/******************************************************************************/ -/* PPC support routines */ -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - sn5s330_interrupt(USBC_PORT_C0); - break; - case GPIO_USB_C1_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C1); - default: - break; - } -} - -/******************************************************************************/ -/* BC1.2 charger detect configuration */ -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC TCPC configuration */ -struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC mux configuration - Tiger Lake includes internal mux */ -struct usb_mux usbc1_tcss_usb_mux = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .next_mux = &usbc1_tcss_usb_mux, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); - -struct bb_usb_control bb_controls[] = { - [USBC_PORT_C0] = { - /* USB-C port 0 doesn't have a retimer */ - }, - [USBC_PORT_C1] = { - .usb_ls_en_gpio = GPIO_USB_C1_LS_EN, - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_ODL, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(bb_controls) == USBC_PORT_COUNT); - -static void board_tcpc_init(void) -{ - /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - - /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); - -/******************************************************************************/ -/* TCPC support routines */ -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set - */ - if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -int ppc_get_alert_status(int port) -{ - if (port == USBC_PORT_C0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; -} diff --git a/board/malefor/board.h b/board/malefor/board.h deleted file mode 100644 index 6c4edef5ca..0000000000 --- a/board/malefor/board.h +++ /dev/null @@ -1,161 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Baseboard features */ -#include "baseboard.h" - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ - -#define CONFIG_VBOOT_EFS2 - -#define CONFIG_POWER_BUTTON - -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* LED defines */ -#define CONFIG_LED_ONOFF_STATES - -/* Keyboard features */ - -/* Sensors */ -#define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT -#define CONFIG_ACCEL_LIS2DE /* Lid accel */ -#define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ - -/* Sensors without hardware FIFO are in forced mode */ -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - BIT(LID_ACCEL) - -#define CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_UPDATE -#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL -#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL - -#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) - -/* USB Type C and USB PD defines */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 - -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ - -/* - * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C - * cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 -/* Enabling USB4 mode */ -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x40 - -/* USB Type A Features */ - -/* USBC PPC*/ -#define CONFIG_USBC_PPC_SN5S330 /* USBC port C0 */ -#define CONFIG_USBC_PPC_SYV682X /* USBC port C1 */ - -/* BC 1.2 */ - -/* Volume Button feature */ - -/* Fan features */ - -/* charger defines */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -/* - * Macros for GPIO signals used in common code that don't match the - * schematic names. Signal names in gpio.inc match the schematic and are - * then redefined here to so it's more clear which signal is being used for - * which purpose. - */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PACKET_MODE_EN GPIO_UART2_EC_RX -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SYS_PWROK GPIO_EC_PCH_SYS_PWROK -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_L -#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL -#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL -#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 - -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_EEPROM - -#define I2C_ADDR_EEPROM_FLAGS 0x50 -#define CONFIG_I2C_CONTROLLER - - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_SMP, - BATTERY_LGC, - BATTERY_SUNWODA, - BATTERY_TYPE_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED4_SIDESEL = 0, - PWM_CH_FAN, - PWM_CH_KBLIGHT, - PWM_CH_COUNT -}; - -enum sensor_id { - LID_ACCEL = 0, - BASE_ACCEL, - BASE_GYRO, - SENSOR_COUNT, -}; - -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; - -void board_reset_pd_mcu(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/malefor/build.mk b/board/malefor/build.mk deleted file mode 100644 index 279b2e559e..0000000000 --- a/board/malefor/build.mk +++ /dev/null @@ -1,16 +0,0 @@ -# -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m6fc -BASEBOARD:=volteer - -board-y=board.o -board-y+=battery.o -board-y+=led.o diff --git a/board/malefor/ec.tasklist b/board/malefor/ec.tasklist deleted file mode 100644 index 292de51cdb..0000000000 --- a/board/malefor/ec.tasklist +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/malefor/gpio.inc b/board/malefor/gpio.inc deleted file mode 100644 index 5723a878c7..0000000000 --- a/board/malefor/gpio.inc +++ /dev/null @@ -1,163 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) -#endif -GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(EC_IMU_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) -GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) - -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) - -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) - -/* HDMI interrupts */ - -/* Volume button interrupts */ -GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) - -/* Power Sequencing Signals */ -GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW) -GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */ -/* The EC does not buffer this signal on Volteer. */ -UNIMPLEMENTED(PCH_DSW_PWROK) - -/* Other wake sources */ -/* - * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an - * interrupt handler because it is automatically handled by the PSL. - * - * We need to lock the setting so this gpio can't be reconfigured to overdrive - * the real reset signal. (This is the PSL input pin not the real reset pin). - */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | - GPIO_HIB_WAKE_HIGH | - GPIO_LOCKED) - -/* AP/PCH Signals */ -GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */ -GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) -GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_ODL, PIN(7, 4), GPIO_ODR_HIGH) -GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) -GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -UNIMPLEMENTED(EC_PROCHOT_IN_L) -GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) - -GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) - -/* USB and USBC Signals */ -GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) /* USB_C1 Reset on boards board ID >=1 */ -GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) - -/* Don't have a load switch for retimer */ -UNIMPLEMENTED(USB_C1_LS_EN) - -/* Misc Signals */ -GPIO(UART2_EC_RX, PIN(7, 5), GPIO_OUT_LOW) - -/* - * eDP backlight - both PCH and EC have enable pins that must be high - * for the backlight to turn on. Default state is high, and can be turned - * off during sleep states. - */ -GPIO(EC_EDP_BL_EN, PIN(D, 3), GPIO_OUT_HIGH) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(EC_I2C0_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C0_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SDA, PIN(B, 2), GPIO_INPUT) - -/* Battery signals */ -GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) - -/* Physical HPD pins are not needed on EC as these are configured by PMC */ -GPIO(USB_C0_DP_HPD, PIN(F, 3), GPIO_INPUT) -GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) - -/* LED */ -GPIO(LED_1_L, PIN(C, 4), GPIO_OUT_HIGH) /* Battery - Green LED */ -GPIO(LED_2_L, PIN(C, 3), GPIO_OUT_HIGH) /* Battery - Red LED */ -GPIO(LED_3_L, PIN(C, 2), GPIO_OUT_HIGH) /* Power - White LED */ - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 */ -ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ - -/* This selects between an LED module on the motherboard and one on the daughter - * board, to be controlled by LED_{1,2,3}_L. PWM allows driving both modules at - * the same time. */ -ALTERNATE(PIN_MASK(6, BIT(0)), 0, MODULE_PWM, 0) /* LED_SIDESEL_4_L */ - -/* Fan signals */ -GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_LOW) -ALTERNATE(PIN_MASK(B, BIT(7)), 0, MODULE_PWM, 0) /* FAN_PWM */ -ALTERNATE(PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0) /* FAN_SPEED_TACH */ - -/* Keyboard pins */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ -GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 */ -ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ -ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ -ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_KB_BL_PWM */ - -/* UART */ -ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0) /* UART from EC to Servo */ - -/* Power Switch Logic (PSL) inputs */ -ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* GPIOD2 = EC_LID_OPEN */ -ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, - GPIO01 = H1_EC_PWR_BTN_ODL - GPIO02 = EC_RST_ODL */ - -/* Temperature sensors */ -ALTERNATE(PIN_MASK(4, BIT(2) | BIT(4) | BIT(5)), 0, MODULE_ADC, 0) /* TEMP_SENSOR1,2,4 */ -ALTERNATE(PIN_MASK(F, BIT(1)), 0, MODULE_ADC, 0) /* TEMP_SENSOR3 */ diff --git a/board/malefor/led.c b/board/malefor/led.c deleted file mode 100644 index 0f7d37723b..0000000000 --- a/board/malefor/led.c +++ /dev/null @@ -1,111 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control for Malefor - */ - -#include "common.h" -#include "led_onoff_states.h" -#include "led_common.h" -#include "gpio.h" - -#define LED_OFF_LVL 1 -#define LED_ON_LVL 0 - -__override const int led_charge_lvl_1 = 5; - -__override const int led_charge_lvl_2 = 97; - -__override struct led_descriptor - led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { - [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_RED, LED_INDEFINITE} }, - [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, - [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_GREEN, LED_INDEFINITE} }, - [STATE_DISCHARGE_S0] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S3] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, - [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_RED, 1 * LED_ONE_SEC}, - {LED_OFF, 1 * LED_ONE_SEC} }, - [STATE_FACTORY_TEST] = {{EC_LED_COLOR_RED, 2 * LED_ONE_SEC}, - {EC_LED_COLOR_GREEN, 2 * LED_ONE_SEC} }, -}; - -__override const struct led_descriptor - led_pwr_state_table[PWR_LED_NUM_STATES][LED_NUM_PHASES] = { - [PWR_LED_STATE_ON] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, - [PWR_LED_STATE_SUSPEND_AC] = {{EC_LED_COLOR_WHITE, 3 * LED_ONE_SEC}, - {LED_OFF, 0.5 * LED_ONE_SEC} }, - [PWR_LED_STATE_SUSPEND_NO_AC] = {{LED_OFF, LED_INDEFINITE} }, - [PWR_LED_STATE_OFF] = {{LED_OFF, LED_INDEFINITE} }, -}; - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_BATTERY_LED, - EC_LED_ID_POWER_LED -}; - -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -__override void led_set_color_power(enum ec_led_colors color) -{ - if (color == EC_LED_COLOR_WHITE) - gpio_set_level(GPIO_LED_3_L, LED_ON_LVL); - else - /* LED_OFF and unsupported colors */ - gpio_set_level(GPIO_LED_3_L, LED_OFF_LVL); -} - -__override void led_set_color_battery(enum ec_led_colors color) -{ - switch (color) { - case EC_LED_COLOR_RED: - gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); - gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); - break; - case EC_LED_COLOR_AMBER: - gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); - gpio_set_level(GPIO_LED_2_L, LED_ON_LVL); - break; - case EC_LED_COLOR_GREEN: - gpio_set_level(GPIO_LED_1_L, LED_ON_LVL); - gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); - break; - default: /* LED_OFF and other unsupported colors */ - gpio_set_level(GPIO_LED_1_L, LED_OFF_LVL); - gpio_set_level(GPIO_LED_2_L, LED_OFF_LVL); - break; - } -} - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - brightness_range[EC_LED_COLOR_RED] = 1; - brightness_range[EC_LED_COLOR_AMBER] = 1; - brightness_range[EC_LED_COLOR_GREEN] = 1; - } else if (led_id == EC_LED_ID_POWER_LED) { - brightness_range[EC_LED_COLOR_WHITE] = 1; - } -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - if (led_id == EC_LED_ID_BATTERY_LED) { - if (brightness[EC_LED_COLOR_RED] != 0) - led_set_color_battery(EC_LED_COLOR_RED); - else if (brightness[EC_LED_COLOR_AMBER] != 0) - led_set_color_battery(EC_LED_COLOR_AMBER); - else if (brightness[EC_LED_COLOR_GREEN] != 0) - led_set_color_battery(EC_LED_COLOR_GREEN); - else - led_set_color_battery(LED_OFF); - } else if (led_id == EC_LED_ID_POWER_LED) { - if (brightness[EC_LED_COLOR_WHITE] != 0) - led_set_color_power(EC_LED_COLOR_WHITE); - else - led_set_color_power(LED_OFF); - } - - return EC_SUCCESS; -} diff --git a/board/mchpevb1/board.c b/board/mchpevb1/board.c index 73cec110bb..aa74d07a0d 100644 --- a/board/mchpevb1/board.c +++ b/board/mchpevb1/board.c @@ -975,7 +975,7 @@ DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_spi_disable, MOTION_SENSE_HOOK_PRIO + 1); #ifdef MEC1701_EVB_TACH_TEST /* PWM/TACH test */ -void tach0_isr(void) +static void tach0_isr(void) { MCHP_INT_DISABLE(MCHP_TACH_GIRQ) = MCHP_TACH_GIRQ_BIT(0); MCHP_INT_SOURCE(MCHP_TACH_GIRQ) = MCHP_TACH_GIRQ_BIT(0); diff --git a/board/mchpevb1/board.h b/board/mchpevb1/board.h index de1e7a75e9..e16d0bb10f 100644 --- a/board/mchpevb1/board.h +++ b/board/mchpevb1/board.h @@ -163,7 +163,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/mchpevb1/gpio.inc b/board/mchpevb1/gpio.inc index 8be1099fbd..3949e31843 100644 --- a/board/mchpevb1/gpio.inc +++ b/board/mchpevb1/gpio.inc @@ -27,8 +27,8 @@ #define GPIO_BOTH_EDGES_PU (GPIO_INT_BOTH | GPIO_PULL_UP) -/* Only needed if CONFIG_HOSTCMD_ESPI is not set, using LPC interface to PCH */ -#ifndef CONFIG_HOSTCMD_ESPI +/* Only needed if CONFIG_HOST_INTERFACE_ESPI is not set, using LPC interface to PCH */ +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(064), GPIO_BOTH_EDGES_PU, lpcrst_interrupt) #endif diff --git a/board/metaknight/board.c b/board/metaknight/board.c index 76a962e085..253ce31571 100644 --- a/board/metaknight/board.c +++ b/board/metaknight/board.c @@ -196,31 +196,42 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_memory = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_MEMORY \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_memory = + THERMAL_MEMORY; -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; @@ -737,6 +748,7 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { }, .flags = TCPC_FLAGS_TCPCI_REV2_0, .drv = &raa489000_tcpm_drv, + .alert_signal = GPIO_USB_C0_INT_ODL, }, }; @@ -753,33 +765,22 @@ uint16_t tcpc_get_alert_status(void) { uint16_t status = 0; int regval; + int p; /* - * The interrupt line is shared between the TCPC and BC1.2 detector IC. - * Therefore, go out and actually read the alert registers to report the - * alert status. + * The interrupt line is shared between the TCPC and BC1.2 + * detector IC. Therefore, go out and actually read the alert + * registers to report the alert status. */ - if (!gpio_get_level(GPIO_USB_C0_INT_ODL)) { - if (!tcpc_read16(0, TCPC_REG_ALERT, ®val)) { - /* The TCPCI Rev 1.0 spec says to ignore bits 14:12. */ - if (!(tcpc_config[0].flags & TCPC_FLAGS_TCPCI_REV2_0)) - regval &= ~((1 << 14) | (1 << 13) | (1 << 12)); - - if (regval) - status |= PD_STATUS_TCPC_ALERT_0; - } - } - - if (board_get_usb_pd_port_count() > 1 && - !gpio_get_level(GPIO_SUB_C1_INT_EN_RAILS_ODL)) { - if (!tcpc_read16(1, TCPC_REG_ALERT, ®val)) { - /* TCPCI spec Rev 1.0 says to ignore bits 14:12. */ - if (!(tcpc_config[1].flags & TCPC_FLAGS_TCPCI_REV2_0)) - regval &= ~((1 << 14) | (1 << 13) | (1 << 12)); - - if (regval) - status |= PD_STATUS_TCPC_ALERT_1; - } + for (p = 0; p < board_get_usb_pd_port_count(); p++) { + if (gpio_get_level(tcpc_config[p].alert_signal) || + tcpc_read16(p, TCPC_REG_ALERT, ®val)) + continue; + /* The TCPCI Rev 1.0 spec says to ignore bits 14:12. */ + if (!(tcpc_config[p].flags & TCPC_FLAGS_TCPCI_REV2_0)) + regval &= ~(BIT(14) | BIT(13) | BIT(12)); + if (regval) + status |= (PD_STATUS_TCPC_ALERT_0 << p); } return status; diff --git a/board/moonbuggy/board.c b/board/moonbuggy/board.c index c69acde7e1..0ebf1380cb 100644 --- a/board/moonbuggy/board.c +++ b/board/moonbuggy/board.c @@ -123,10 +123,12 @@ const struct pwm_t pwm_channels[] = { .flags = PWM_CONFIG_OPEN_DRAIN, .freq = 25000}, [PWM_CH_LED_RED] = { .channel = 0, - .flags = PWM_CONFIG_DSLEEP, + .flags = PWM_CONFIG_ACTIVE_LOW | + PWM_CONFIG_DSLEEP, .freq = 2000 }, - [PWM_CH_LED_WHITE] = { .channel = 2, - .flags = PWM_CONFIG_DSLEEP, + [PWM_CH_LED_BLUE] = { .channel = 2, + .flags = PWM_CONFIG_ACTIVE_LOW | + PWM_CONFIG_DSLEEP, .freq = 2000 }, }; @@ -227,23 +229,28 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* Thermal control; drive fan based on temperature sensors. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(89), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(89), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_CORE] = thermal_a, + [TEMP_SENSOR_CORE] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/moonbuggy/board.h b/board/moonbuggy/board.h index a42aab0cbf..6dfaa73d53 100644 --- a/board/moonbuggy/board.h +++ b/board/moonbuggy/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO @@ -147,7 +147,7 @@ enum adc_channel { enum pwm_channel { PWM_CH_FAN, PWM_CH_LED_RED, - PWM_CH_LED_WHITE, + PWM_CH_LED_BLUE, /* Number of PWM channels */ PWM_CH_COUNT }; diff --git a/board/moonbuggy/led.c b/board/moonbuggy/led.c index a9f70d2d40..fc485887f0 100644 --- a/board/moonbuggy/led.c +++ b/board/moonbuggy/led.c @@ -34,7 +34,7 @@ const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); enum led_color { LED_OFF = 0, LED_RED, - LED_WHITE, + LED_BLUE, LED_AMBER, /* Number of colors, not a color itself */ @@ -43,7 +43,7 @@ enum led_color { static int set_color_power(enum led_color color, int duty) { - int white = 0; + int blue = 0; int red = 0; if (duty < 0 || 100 < duty) @@ -52,15 +52,15 @@ static int set_color_power(enum led_color color, int duty) switch (color) { case LED_OFF: break; - case LED_WHITE: - white = 1; + case LED_BLUE: + blue = 1; break; case LED_RED: red = 1; break; case LED_AMBER: red = 1; - white = 1; + blue = 1; break; default: return EC_ERROR_UNKNOWN; @@ -71,10 +71,10 @@ static int set_color_power(enum led_color color, int duty) else pwm_set_duty(PWM_CH_LED_RED, 0); - if (white) - pwm_set_duty(PWM_CH_LED_WHITE, duty); + if (blue) + pwm_set_duty(PWM_CH_LED_BLUE, duty); else - pwm_set_duty(PWM_CH_LED_WHITE, 0); + pwm_set_duty(PWM_CH_LED_BLUE, 0); return EC_SUCCESS; } @@ -142,7 +142,7 @@ static void led_tick(void) static void led_suspend(void) { - CONFIG_TICK(LED_PULSE_TICK_US, LED_WHITE); + CONFIG_TICK(LED_PULSE_TICK_US, LED_BLUE); led_tick(); } DECLARE_DEFERRED(led_suspend); @@ -181,14 +181,14 @@ static void led_resume(void) hook_call_deferred(&led_suspend_data, -1); hook_call_deferred(&led_shutdown_data, -1); if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) - set_color(EC_LED_ID_POWER_LED, LED_WHITE, 100); + set_color(EC_LED_ID_POWER_LED, LED_BLUE, 100); } DECLARE_HOOK(HOOK_CHIPSET_RESUME, led_resume, HOOK_PRIO_DEFAULT); static void led_init(void) { pwm_enable(PWM_CH_LED_RED, 1); - pwm_enable(PWM_CH_LED_WHITE, 1); + pwm_enable(PWM_CH_LED_BLUE, 1); if (chipset_in_state(CHIPSET_STATE_ON)) led_resume(); @@ -237,8 +237,8 @@ static int command_led(int argc, char **argv) set_color(id, LED_OFF, 0); } else if (!strcasecmp(argv[1], "red")) { set_color(id, LED_RED, 100); - } else if (!strcasecmp(argv[1], "white")) { - set_color(id, LED_WHITE, 100); + } else if (!strcasecmp(argv[1], "blue")) { + set_color(id, LED_BLUE, 100); } else if (!strcasecmp(argv[1], "amber")) { set_color(id, LED_AMBER, 100); } else if (!strcasecmp(argv[1], "alert")) { @@ -251,13 +251,13 @@ static int command_led(int argc, char **argv) return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(led, command_led, - "[debug|red|white|amber|off|alert|crit]", + "[debug|red|blue|amber|off|alert|crit]", "Turn on/off LED."); void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) { brightness_range[EC_LED_COLOR_RED] = 100; - brightness_range[EC_LED_COLOR_WHITE] = 100; + brightness_range[EC_LED_COLOR_BLUE] = 100; brightness_range[EC_LED_COLOR_AMBER] = 100; } @@ -265,8 +265,8 @@ int led_set_brightness(enum ec_led_id id, const uint8_t *brightness) { if (brightness[EC_LED_COLOR_RED]) return set_color(id, LED_RED, brightness[EC_LED_COLOR_RED]); - else if (brightness[EC_LED_COLOR_WHITE]) - return set_color(id, LED_WHITE, brightness[EC_LED_COLOR_WHITE]); + else if (brightness[EC_LED_COLOR_BLUE]) + return set_color(id, LED_BLUE, brightness[EC_LED_COLOR_BLUE]); else if (brightness[EC_LED_COLOR_AMBER]) return set_color(id, LED_AMBER, brightness[EC_LED_COLOR_AMBER]); else diff --git a/board/morphius/board.c b/board/morphius/board.c index 48712ffb0c..d9717bbe05 100644 --- a/board/morphius/board.c +++ b/board/morphius/board.c @@ -246,9 +246,9 @@ const struct pi3hdx1204_tuning pi3hdx1204_tuning = { /***************************************************************************** * Base Gyro Sensor dynamic configuration */ -static enum ec_cfg_base_gyro_sensor_type base_gyro_config; +static enum ec_ssfc_base_gyro_sensor base_gyro_config = SSFC_BASE_GYRO_NONE; -enum ec_cfg_base_gyro_sensor_type get_base_gyro_sensor(void) +enum ec_ssfc_base_gyro_sensor get_base_gyro_sensor(void) { switch (get_cbi_ssfc_base_sensor()) { case SSFC_BASE_GYRO_NONE: @@ -263,10 +263,10 @@ static void setup_base_gyro_config(void) base_gyro_config = get_base_gyro_sensor(); switch (base_gyro_config) { - case BASE_GYRO_BMI160: + case SSFC_BASE_GYRO_BMI160: ccprints("BASE GYRO is BMI160"); break; - case BASE_GYRO_ICM426XX: + case SSFC_BASE_GYRO_ICM426XX: motion_sensors[BASE_ACCEL] = icm426xx_base_accel; motion_sensors[BASE_GYRO] = icm426xx_base_gyro; ccprints("BASE GYRO is ICM426XX"); @@ -279,10 +279,10 @@ static void setup_base_gyro_config(void) void motion_interrupt(enum gpio_signal signal) { switch (base_gyro_config) { - case BASE_GYRO_BMI160: + case SSFC_BASE_GYRO_BMI160: bmi160_interrupt(signal); break; - case BASE_GYRO_ICM426XX: + case SSFC_BASE_GYRO_ICM426XX: icm426xx_interrupt(signal); break; default: @@ -383,7 +383,7 @@ static void setup_v0_charger(void) */ DECLARE_HOOK(HOOK_INIT, setup_v0_charger, HOOK_PRIO_INIT_I2C); -enum gpio_signal board_usbc_port_to_hpd_gpio(int port) +int board_usbc_port_to_hpd_gpio_or_ioex(int port) { /* USB-C0 always uses USB_C0_HPD (= DP3_HPD). */ if (port == 0) @@ -581,17 +581,20 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(105), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = C_TO_K(98), - .temp_fan_max = C_TO_K(99), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(105), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/morphius/board.h b/board/morphius/board.h index 603bcec69b..a38fd93fc1 100644 --- a/board/morphius/board.h +++ b/board/morphius/board.h @@ -209,8 +209,15 @@ static inline bool ec_config_has_mst_hub_rtd2141b(void) } void motion_interrupt(enum gpio_signal signal); -enum gpio_signal board_usbc_port_to_hpd_gpio(int port); -#define PORT_TO_HPD(port) board_usbc_port_to_hpd_gpio(port) + +/** + * @warning Callers must use gpio_or_ioex_set_level to handle the return result + * since either type of signal can be returned. + * + * @return GPIO (gpio_signal) or IOEX (ioex_signal) + */ +int board_usbc_port_to_hpd_gpio_or_ioex(int port); +#define PORT_TO_HPD(port) board_usbc_port_to_hpd_gpio_or_ioex(port) extern const struct usb_mux usbc0_pi3dpx1207_usb_retimer; extern const struct usb_mux usbc1_ps8802; diff --git a/board/mrbland/battery.c b/board/mrbland/battery.c index a99d71e7f4..ee58ff70bb 100644 --- a/board/mrbland/battery.c +++ b/board/mrbland/battery.c @@ -60,6 +60,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 60, .discharging_min_c = -20, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, /* Sunwoda L21D2PG1 */ @@ -89,6 +90,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 63, .discharging_min_c = -20, .discharging_max_c = 63, + .vendor_param_start = 0x70, }, }, /* SMP L21M2PG1 */ @@ -118,6 +120,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 60, .discharging_min_c = -20, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, }; diff --git a/board/mrbland/board.c b/board/mrbland/board.c index fc48888a55..d367b82521 100644 --- a/board/mrbland/board.c +++ b/board/mrbland/board.c @@ -626,25 +626,3 @@ uint16_t tcpc_get_alert_status(void) return status; } - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/mrbland/board.h b/board/mrbland/board.h index f4cb398c50..a26a7d1cf7 100644 --- a/board/mrbland/board.h +++ b/board/mrbland/board.h @@ -31,9 +31,6 @@ #define CONFIG_BATTERY_REVIVE_DISCONNECT #define CONFIG_BATTERY_FUEL_GAUGE #define CONFIG_BATTERY_VENDOR_PARAM -#define CONFIG_BATTERY_V2 -#define CONFIG_BATTERY_COUNT 1 -#define CONFIG_HOSTCMD_BATTERY_V2 /* Enable PD3.0 */ #define CONFIG_USB_PD_REV30 @@ -45,6 +42,7 @@ #define CONFIG_USB_PD_TCPM_MULTI_PS8XXX #define CONFIG_USB_PD_TCPM_PS8755 #define CONFIG_USB_PD_TCPM_PS8805 +#define CONFIG_USB_PD_TCPM_PS8805_FORCE_DID #define CONFIG_USBC_PPC_SN5S330 #define CONFIG_USB_PD_PORT_MAX_COUNT 1 diff --git a/board/munna/board.c b/board/munna/board.c index f31c7a7e39..93a7bade4b 100644 --- a/board/munna/board.c +++ b/board/munna/board.c @@ -267,7 +267,7 @@ static void board_spi_enable(void) #ifdef CHIP_FAMILY_STM32L4 /* Set I/O speed before AF configured */ /* EMMC SPI SLAVE: PB13/14/15 */ - /* SENSORS SPI MASTER: PB10, PB12, PC2, PC3 */ + /* SENSORS SPI controller: PB10, PB12, PC2, PC3 */ STM32_GPIO_OSPEEDR(GPIO_B) |= 0xFF300000; STM32_GPIO_OSPEEDR(GPIO_C) |= 0x000000F0; diff --git a/board/munna/board.h b/board/munna/board.h index baf68470e4..96a76b11b5 100644 --- a/board/munna/board.h +++ b/board/munna/board.h @@ -113,7 +113,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/mushu/board.c b/board/mushu/board.c index 353875e9f5..2003f7ef85 100644 --- a/board/mushu/board.c +++ b/board/mushu/board.c @@ -455,35 +455,45 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Hatch. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(0), - .temp_fan_max = C_TO_K(70), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(0), \ + .temp_fan_max = C_TO_K(70), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(0), - .temp_fan_max = C_TO_K(70), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(0), \ + .temp_fan_max = C_TO_K(70), \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/mushu/board.h b/board/mushu/board.h index da4fca7ab9..aadd49a1bd 100644 --- a/board/mushu/board.h +++ b/board/mushu/board.h @@ -16,13 +16,14 @@ #undef CONFIG_CMD_ACCELSPOOF #undef CONFIG_CMD_CHARGER_DUMP #undef CONFIG_CMD_PPC_DUMP +#undef CONFIG_CONSOLE_CMDHELP #define CONFIG_POWER_BUTTON #define CONFIG_KEYBOARD_PROTOCOL_8042 #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_CMD_MFALLOW diff --git a/board/nami/board.c b/board/nami/board.c index c45d11bd25..70e85fd83b 100644 --- a/board/nami/board.c +++ b/board/nami/board.c @@ -366,132 +366,172 @@ const struct temp_sensor_t temp_sensors[TEMP_SENSOR_COUNT] = { struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; /* Nami/Vayne Remote 1, 2 */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(39), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(39), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; /* Sona Remote 1 */ -const static struct ec_thermal_config thermal_b1 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(82), - [EC_TEMP_THRESH_HALT] = C_TO_K(89), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(72), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(38), - .temp_fan_max = C_TO_K(58), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B1 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(82), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(89), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(72), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(38), \ + .temp_fan_max = C_TO_K(58), \ + } +__maybe_unused static const struct ec_thermal_config thermal_b1 = THERMAL_B1; /* Sona Remote 2 */ -const static struct ec_thermal_config thermal_b2 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(84), - [EC_TEMP_THRESH_HALT] = C_TO_K(91), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(74), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B2 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(84), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(91), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(74), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_b2 = THERMAL_B2; /* Pantheon Remote 1 */ -const static struct ec_thermal_config thermal_c1 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(66), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(56), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(38), - .temp_fan_max = C_TO_K(61), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_C1 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(66), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(56), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(38), \ + .temp_fan_max = C_TO_K(61), \ + } +__maybe_unused static const struct ec_thermal_config thermal_c1 = THERMAL_C1; /* Pantheon Remote 2 */ -const static struct ec_thermal_config thermal_c2 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(74), - [EC_TEMP_THRESH_HALT] = C_TO_K(82), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(64), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(38), - .temp_fan_max = C_TO_K(61), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_C2 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(74), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(82), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(64), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(38), \ + .temp_fan_max = C_TO_K(61), \ + } +__maybe_unused static const struct ec_thermal_config thermal_c2 = THERMAL_C2; /* Akali Local */ -const static struct ec_thermal_config thermal_d0 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = C_TO_K(79), - [EC_TEMP_THRESH_HIGH] = 0, - [EC_TEMP_THRESH_HALT] = C_TO_K(81), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = C_TO_K(80), - [EC_TEMP_THRESH_HIGH] = 0, - [EC_TEMP_THRESH_HALT] = C_TO_K(82), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(70), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_D0 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = C_TO_K(79), \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = C_TO_K(81), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = C_TO_K(80), \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = C_TO_K(82), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(70), \ + } +__maybe_unused static const struct ec_thermal_config thermal_d0 = THERMAL_D0; /* Akali Remote 1 */ -const static struct ec_thermal_config thermal_d1 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = C_TO_K(59), - [EC_TEMP_THRESH_HIGH] = 0, - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = C_TO_K(60), - [EC_TEMP_THRESH_HIGH] = 0, - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = 0, - .temp_fan_max = 0, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_D1 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = C_TO_K(59), \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = C_TO_K(60), \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = 0, \ + .temp_fan_max = 0, \ + } +__maybe_unused static const struct ec_thermal_config thermal_d1 = THERMAL_D1; /* Akali Remote 2 */ -const static struct ec_thermal_config thermal_d2 = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = C_TO_K(59), - [EC_TEMP_THRESH_HIGH] = 0, - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = C_TO_K(60), - [EC_TEMP_THRESH_HIGH] = 0, - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = 0, - .temp_fan_max = 0, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_D2 \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = C_TO_K(59), \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = C_TO_K(60), \ + [EC_TEMP_THRESH_HIGH] = 0, \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = 0, \ + .temp_fan_max = 0, \ + } +__maybe_unused static const struct ec_thermal_config thermal_d2 = THERMAL_D2; #define I2C_PMIC_READ(reg, data) \ i2c_read8(I2C_PORT_PMIC, TPS650X30_I2C_ADDR1_FLAGS,\ diff --git a/board/nami/board.h b/board/nami/board.h index 1753ec538f..5952b1a754 100644 --- a/board/nami/board.h +++ b/board/nami/board.h @@ -73,7 +73,7 @@ #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_HOSTCMD_FLASH_SPI_INFO diff --git a/board/nautilus/board.h b/board/nautilus/board.h index 6be7167538..b4a05e46d1 100644 --- a/board/nautilus/board.h +++ b/board/nautilus/board.h @@ -62,7 +62,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/nightfury/board.c b/board/nightfury/board.c index bed17b834c..bab0988c78 100644 --- a/board/nightfury/board.c +++ b/board/nightfury/board.c @@ -379,25 +379,30 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Nightfury. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1] = thermal_a, - [TEMP_SENSOR_2] = thermal_a, - [TEMP_SENSOR_3] = thermal_a, + [TEMP_SENSOR_1] = THERMAL_A, + [TEMP_SENSOR_2] = THERMAL_A, + [TEMP_SENSOR_3] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/nightfury/board.h b/board/nightfury/board.h index 86191e104d..9c4ac02934 100644 --- a/board/nightfury/board.h +++ b/board/nightfury/board.h @@ -20,7 +20,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/nipperkin/board.c b/board/nipperkin/board.c index 2458ab0a2c..8f67dcbf4b 100644 --- a/board/nipperkin/board.c +++ b/board/nipperkin/board.c @@ -12,10 +12,11 @@ #include "chipset.h" #include "common.h" #include "cros_board_info.h" +#include "driver/retimer/pi3hdx1204.h" #include "driver/retimer/ps8811.h" #include "driver/retimer/ps8818.h" #include "driver/temp_sensor/sb_tsi.h" -#include "driver/temp_sensor/tmp112.h" +#include "driver/temp_sensor/pct2075.h" #include "extpower.h" #include "gpio.h" #include "hooks.h" @@ -27,10 +28,12 @@ #include "tablet_mode.h" #include "temp_sensor.h" #include "temp_sensor/thermistor.h" -#include "temp_sensor/tmp112.h" #include "thermal.h" +#include "timer.h" #include "usb_mux.h" +static void hdmi_hpd_interrupt(enum gpio_signal signal); + #include "gpio_list.h" /* Must come after other header files. */ /* @@ -134,13 +137,15 @@ __override int board_c1_ps8818_mux_set(const struct usb_mux *me, static void board_init(void) { + if (get_board_version() > 1) + gpio_enable_interrupt(GPIO_HPD_EC_IN); } DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); static void board_chipset_startup(void) { if (get_board_version() > 1) - tmp112_init(); + pct2075_init(); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); @@ -150,7 +155,7 @@ int board_get_soc_temp_k(int idx, int *temp_k) if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) return EC_ERROR_NOT_POWERED; - return tmp112_get_val_k(idx, temp_k); + return pct2075_get_val_k(idx, temp_k); } int board_get_soc_temp_mk(int *temp_mk) @@ -158,7 +163,7 @@ int board_get_soc_temp_mk(int *temp_mk) if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) return EC_ERROR_NOT_POWERED; - return tmp112_get_val_mk(TMP112_SOC, temp_mk); + return pct2075_get_val_mk(PCT2075_SOC, temp_mk); } int board_get_ambient_temp_mk(int *temp_mk) @@ -166,7 +171,7 @@ int board_get_ambient_temp_mk(int *temp_mk) if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) return EC_ERROR_NOT_POWERED; - return tmp112_get_val_mk(TMP112_AMB, temp_mk); + return pct2075_get_val_mk(PCT2075_AMB, temp_mk); } /* ADC Channels */ @@ -212,18 +217,18 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /* Temp Sensors */ static int board_get_temp(int, int *); -const struct tmp112_sensor_t tmp112_sensors[] = { - { I2C_PORT_SENSOR, TMP112_I2C_ADDR_FLAGS0 }, - { I2C_PORT_SENSOR, TMP112_I2C_ADDR_FLAGS1 }, +const struct pct2075_sensor_t pct2075_sensors[] = { + { I2C_PORT_SENSOR, PCT2075_I2C_ADDR_FLAGS0 }, + { I2C_PORT_SENSOR, PCT2075_I2C_ADDR_FLAGS7 }, }; -BUILD_ASSERT(ARRAY_SIZE(tmp112_sensors) == TMP112_COUNT); +BUILD_ASSERT(ARRAY_SIZE(pct2075_sensors) == PCT2075_COUNT); const struct temp_sensor_t temp_sensors[] = { [TEMP_SENSOR_SOC] = { .name = "SOC", .type = TEMP_SENSOR_TYPE_BOARD, .read = board_get_soc_temp_k, - .idx = TMP112_SOC, + .idx = PCT2075_SOC, }, [TEMP_SENSOR_CHARGER] = { .name = "Charger", @@ -252,8 +257,8 @@ const struct temp_sensor_t temp_sensors[] = { [TEMP_SENSOR_AMBIENT] = { .name = "Ambient", .type = TEMP_SENSOR_TYPE_BOARD, - .read = tmp112_get_val_k, - .idx = TMP112_AMB, + .read = pct2075_get_val_k, + .idx = PCT2075_AMB, }, }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); @@ -267,9 +272,6 @@ struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT] = { .temp_host_release = { [EC_TEMP_THRESH_HIGH] = C_TO_K(80), }, - /* TODO: Setting fan off to 0 so it's allways on */ - .temp_fan_off = C_TO_K(0), - .temp_fan_max = C_TO_K(70), }, [TEMP_SENSOR_CHARGER] = { .temp_host = { @@ -279,8 +281,6 @@ struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT] = { .temp_host_release = { [EC_TEMP_THRESH_HIGH] = C_TO_K(80), }, - .temp_fan_off = 0, - .temp_fan_max = 0, }, [TEMP_SENSOR_MEMORY] = { .temp_host = { @@ -290,8 +290,6 @@ struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT] = { .temp_host_release = { [EC_TEMP_THRESH_HIGH] = C_TO_K(80), }, - .temp_fan_off = 0, - .temp_fan_max = 0, }, [TEMP_SENSOR_CPU] = { .temp_host = { @@ -301,12 +299,6 @@ struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT] = { .temp_host_release = { [EC_TEMP_THRESH_HIGH] = C_TO_K(80), }, - /* - * CPU temp sensor fan thresholds are high because they are a - * backup for the SOC temp sensor fan thresholds. - */ - .temp_fan_off = C_TO_K(60), - .temp_fan_max = C_TO_K(90), }, /* * Note: Leave ambient entries at 0, both as it does not represent a @@ -322,19 +314,35 @@ static int board_get_temp(int idx, int *temp_k) return get_temp_3v3_30k9_47k_4050b(idx, temp_k); } +static int check_hdmi_hpd_status(void) +{ + if (get_board_version() > 1) + return gpio_get_level(GPIO_HPD_EC_IN); + else + return true; +} + /* Called on AP resume to S0 */ static void board_chipset_resume(void) { + ioex_set_level(IOEX_USB_A1_PD_R_L, 1); ioex_set_level(IOEX_HDMI_DATA_EN, 1); ioex_set_level(IOEX_EN_PWR_HDMI, 1); + msleep(PI3HDX1204_POWER_ON_DELAY_MS); + pi3hdx1204_enable(I2C_PORT_TCPC1, + PI3HDX1204_I2C_ADDR_FLAGS, + check_hdmi_hpd_status()); } DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); /* Called on AP suspend */ static void board_chipset_suspend(void) { + pi3hdx1204_enable(I2C_PORT_TCPC1, + PI3HDX1204_I2C_ADDR_FLAGS, 0); ioex_set_level(IOEX_EN_PWR_HDMI, 0); ioex_set_level(IOEX_HDMI_DATA_EN, 0); + ioex_set_level(IOEX_USB_A1_PD_R_L, 0); } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); @@ -442,3 +450,28 @@ board_vivaldi_keybd_config(void) else return &keybd_wo_privacy_wo_kblight; } + +const struct pi3hdx1204_tuning pi3hdx1204_tuning = { + .eq_ch0_ch1_offset = PI3HDX1204_EQ_DB710, + .eq_ch2_ch3_offset = PI3HDX1204_EQ_DB710, + .vod_offset = PI3HDX1204_VOD_115_ALL_CHANNELS, + .de_offset = PI3HDX1204_DE_DB_MINUS5, +}; + +static void hdmi_hpd_handler(void) +{ + int hpd = check_hdmi_hpd_status(); + + ccprints("HDMI HPD %d", hpd); + pi3hdx1204_enable(I2C_PORT_TCPC1, + PI3HDX1204_I2C_ADDR_FLAGS, + chipset_in_or_transitioning_to_state(CHIPSET_STATE_ON) + && hpd); +} +DECLARE_DEFERRED(hdmi_hpd_handler); + +static void hdmi_hpd_interrupt(enum gpio_signal signal) +{ + /* Debounce for 2 msec */ + hook_call_deferred(&hdmi_hpd_handler_data, (2 * MSEC)); +} diff --git a/board/nipperkin/board.h b/board/nipperkin/board.h index 86d0ef9623..6521188c20 100644 --- a/board/nipperkin/board.h +++ b/board/nipperkin/board.h @@ -20,6 +20,11 @@ #define CONFIG_CMD_BUTTON /* USB Type C and USB PD defines */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_CURRENT_MA 5000 +#define PD_MAX_VOLTAGE_MV 20000 +/* Max Power = 100 W */ +#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000) /* USB Type A Features */ @@ -35,6 +40,9 @@ #define CONFIG_LED_COMMON #define CONFIG_LED_ONOFF_STATES +/* Thermal Config */ +#define CONFIG_TEMP_SENSOR_PCT2075 + #ifndef __ASSEMBLER__ #include "gpio_signal.h" @@ -68,6 +76,13 @@ enum temp_sensor_id { TEMP_SENSOR_COUNT }; +/* PCT2075 sensors */ +enum pct2075_sensor { + PCT2075_SOC, + PCT2075_AMB, + PCT2075_COUNT, +}; + #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/nipperkin/gpio.inc b/board/nipperkin/gpio.inc index ec35ce6c2c..bd00c932af 100644 --- a/board/nipperkin/gpio.inc +++ b/board/nipperkin/gpio.inc @@ -18,10 +18,13 @@ GPIO(C1_CHARGE_LED_WHITE_L, PIN(7, 0), GPIO_OUT_HIGH) /* HDMI */ IOEX(EN_PWR_HDMI, EXPIN(USBC_PORT_C0, 0, 3), GPIO_OUT_LOW) IOEX(HDMI_DATA_EN, EXPIN(USBC_PORT_C0, 1, 4), GPIO_OUT_LOW) +GPIO_INT(HPD_EC_IN, PIN(6, 2), GPIO_INT_BOTH, hdmi_hpd_interrupt) + +/* Power Signals */ +IOEX(USB_A1_PD_R_L, EXPIN(USBC_PORT_C1, 1, 7), GPIO_OUT_LOW) /* Test Points */ GPIO(EC_GPIO56, PIN(5, 6), GPIO_INPUT | GPIO_PULL_UP) -GPIO(EC_PS2_RST, PIN(6, 2), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_GPIOB0, PIN(B, 0), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_GPIO81, PIN(8, 1), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_FLPRG2, PIN(8, 6), GPIO_INPUT | GPIO_PULL_UP) diff --git a/board/nocturne/board.h b/board/nocturne/board.h index 70da6ac3ae..7f44e0d48e 100644 --- a/board/nocturne/board.h +++ b/board/nocturne/board.h @@ -30,7 +30,7 @@ /* EC modules */ #define CONFIG_ADC #define CONFIG_BACKLIGHT_LID -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_I2C #define CONFIG_I2C_BUS_MAY_BE_UNPOWERED #define CONFIG_I2C_CONTROLLER diff --git a/board/nocturne_fp/board_rw.c b/board/nocturne_fp/board_rw.c index 0a7b38b97d..abc6bf88d8 100644 --- a/board/nocturne_fp/board_rw.c +++ b/board/nocturne_fp/board_rw.c @@ -86,7 +86,9 @@ static void spi_configure(enum fp_sensor_spi_select spi_select) gpio_config_module(MODULE_SPI_CONTROLLER, 1); } - /* Set all SPI master signal pins to very high speed: pins E2/4/5/6 */ + /* Set all SPI controller signal pins to very high speed: + * pins E2/4/5/6 + */ STM32_GPIO_OSPEEDR(GPIO_E) |= 0x00003f30; /* Enable clocks to SPI4 module (master) */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI4; @@ -125,7 +127,7 @@ void board_init(void) gpio_enable_interrupt(GPIO_SLP_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/npcx7_evb/board.h b/board/npcx7_evb/board.h index 4bad61b152..ab8b850d94 100644 --- a/board/npcx7_evb/board.h +++ b/board/npcx7_evb/board.h @@ -28,7 +28,7 @@ #define CONFIG_SPI #define CONFIG_I2C /* Features of eSPI */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 diff --git a/board/npcx9_evb/board.h b/board/npcx9_evb/board.h index e7e1190480..a0d209c938 100644 --- a/board/npcx9_evb/board.h +++ b/board/npcx9_evb/board.h @@ -13,7 +13,7 @@ #define CONFIG_PWM #define CONFIG_I2C /* Features of eSPI */ -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 diff --git a/board/npcx_evb/board.h b/board/npcx_evb/board.h index fc12b6d80a..5a22435396 100644 --- a/board/npcx_evb/board.h +++ b/board/npcx_evb/board.h @@ -12,7 +12,7 @@ #define CONFIG_ADC #define CONFIG_PWM #define CONFIG_SPI -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_PECI /* Optional features */ diff --git a/board/npcx_evb_arm/board.h b/board/npcx_evb_arm/board.h index c3fd341365..a56cec9783 100644 --- a/board/npcx_evb_arm/board.h +++ b/board/npcx_evb_arm/board.h @@ -11,7 +11,7 @@ /* Optional modules */ #define CONFIG_ADC #define CONFIG_PWM -#define CONFIG_HOSTCMD_SHI /* Used in ARM-based platform for host interface */ +#define CONFIG_HOST_INTERFACE_SHI /* ARM-based platform for host interface */ /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */ diff --git a/board/nucleo-dartmonkey/board.c b/board/nucleo-dartmonkey/board.c index a7851ec00b..ea0d11eaf5 100644 --- a/board/nucleo-dartmonkey/board.c +++ b/board/nucleo-dartmonkey/board.c @@ -76,7 +76,9 @@ static void spi_configure(void) { /* Configure SPI GPIOs */ gpio_config_module(MODULE_SPI_CONTROLLER, 1); - /* Set all SPI master signal pins to very high speed: pins E2/4/5/6 */ + /* Set all SPI controller signal pins to very high speed: + * pins E2/4/5/6 + */ STM32_GPIO_OSPEEDR(GPIO_E) |= 0x00003f30; /* Enable clocks to SPI4 module (master) */ STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI4; @@ -97,7 +99,7 @@ static void board_init(void) gpio_enable_interrupt(GPIO_SLP_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/nucleo-f412zg/board.c b/board/nucleo-f412zg/board.c index 4324101da9..da3b4a3d4d 100644 --- a/board/nucleo-f412zg/board.c +++ b/board/nucleo-f412zg/board.c @@ -60,7 +60,7 @@ static void board_init(void) gpio_enable_interrupt(GPIO_PCH_SLP_S0_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/nucleo-h743zi/board.c b/board/nucleo-h743zi/board.c index f1493658aa..c69a456425 100644 --- a/board/nucleo-h743zi/board.c +++ b/board/nucleo-h743zi/board.c @@ -60,7 +60,7 @@ static void board_init(void) gpio_enable_interrupt(GPIO_PCH_SLP_S0_L); /* - * Enable the SPI slave interface if the PCH is up. + * Enable the SPI peripheral interface if the PCH is up. * Do not use hook_call_deferred(), because ap_deferred() will be * called after tasks with priority higher than HOOK task (very late). */ diff --git a/board/oak/board.h b/board/oak/board.h index e82907a508..2c30e6185e 100644 --- a/board/oak/board.h +++ b/board/oak/board.h @@ -163,7 +163,7 @@ #define I2C_PORT_TCPC 1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* First SPI controller port (SPI2) */ /* Ambient Light Sensor address */ #define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS diff --git a/board/palkia/board.c b/board/palkia/board.c index 7586478724..ebb4239979 100644 --- a/board/palkia/board.c +++ b/board/palkia/board.c @@ -222,20 +222,25 @@ const struct temp_sensor_t temp_sensors[] = { BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* Palkia temperature control thresholds */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(60), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(65), - .temp_fan_max = C_TO_K(80), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(60), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(65), \ + .temp_fan_max = C_TO_K(80), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/palkia/board.h b/board/palkia/board.h index 010bfb908b..510c5aa6da 100644 --- a/board/palkia/board.h +++ b/board/palkia/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/pdeval-stm32f072/build.mk b/board/pdeval-stm32f072/build.mk index ef1346d534..30d5bf8ac8 100644 --- a/board/pdeval-stm32f072/build.mk +++ b/board/pdeval-stm32f072/build.mk @@ -10,4 +10,4 @@ CHIP:=stm32 CHIP_FAMILY:=stm32f0 CHIP_VARIANT:=stm32f07x -board-y=board.o usb_pd_policy.o +board-y=board.o usb_pd_policy.o usb_pd_pdo.o diff --git a/board/pdeval-stm32f072/usb_pd_pdo.c b/board/pdeval-stm32f072/usb_pd_pdo.c new file mode 100644 index 0000000000..442e708923 --- /dev/null +++ b/board/pdeval-stm32f072/usb_pd_pdo.c @@ -0,0 +1,21 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), + PDO_BATT(5000, 21000, 30000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/pdeval-stm32f072/usb_pd_pdo.h b/board/pdeval-stm32f072/usb_pd_pdo.h new file mode 100644 index 0000000000..58fd1f153c --- /dev/null +++ b/board/pdeval-stm32f072/usb_pd_pdo.h @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_PDEVAL_STM32F072_USB_PD_PDO_H +#define __CROS_EC_BOARD_PDEVAL_STM32F072_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[1]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[2]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_PDEVAL_STM32F072_USB_PD_PDO_H */ diff --git a/board/pdeval-stm32f072/usb_pd_policy.c b/board/pdeval-stm32f072/usb_pd_policy.c index 2f7941321b..6fdb894eed 100644 --- a/board/pdeval-stm32f072/usb_pd_policy.c +++ b/board/pdeval-stm32f072/usb_pd_policy.c @@ -15,25 +15,14 @@ #include "util.h" #include "usb_mux.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP) - /* Used to fake VBUS presence since no GPIO is available to read VBUS */ static int vbus_present; -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 900, PDO_FIXED_FLAGS), - PDO_BATT(5000, 21000, 30000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); #if defined(CONFIG_USB_PD_TCPM_MUX) && defined(CONFIG_USB_PD_TCPM_ANX7447) const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { diff --git a/board/pirika/board.c b/board/pirika/board.c index a17d19bf88..098e6baa9b 100644 --- a/board/pirika/board.c +++ b/board/pirika/board.c @@ -690,37 +690,56 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(50), - }, -}; -const static struct ec_thermal_config thermal_vcore = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(53), - }, -}; -const static struct ec_thermal_config thermal_ambient = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(50), - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(50), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_VCORE \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(53), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_vcore = + THERMAL_VCORE; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_AMBIENT \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(50), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_ambient = + THERMAL_AMBIENT; + struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1] = thermal_charger, - [TEMP_SENSOR_2] = thermal_vcore, - [TEMP_SENSOR_3] = thermal_ambient, + [TEMP_SENSOR_1] = THERMAL_CHARGER, + [TEMP_SENSOR_2] = THERMAL_VCORE, + [TEMP_SENSOR_3] = THERMAL_AMBIENT, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/plankton/build.mk b/board/plankton/build.mk index 89a01e629b..662be139c7 100644 --- a/board/plankton/build.mk +++ b/board/plankton/build.mk @@ -11,4 +11,4 @@ CHIP_FAMILY:=stm32f0 CHIP_VARIANT:=stm32f07x board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o diff --git a/board/plankton/usb_pd_pdo.c b/board/plankton/usb_pd_pdo.c new file mode 100644 index 0000000000..f51a40abdc --- /dev/null +++ b/board/plankton/usb_pd_pdo.c @@ -0,0 +1,45 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_DATA_SWAP | PDO_FIXED_UNCONSTRAINED |\ + PDO_FIXED_COMM_CAP) + +/* Source PDOs */ +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), + PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), + PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS), +}; + +/* Fake PDOs : we just want our pre-defined voltages */ +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_FIXED(12000, 500, PDO_FIXED_FLAGS), + PDO_FIXED(20000, 500, PDO_FIXED_FLAGS), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +static const int pd_src_pdo_cnts[] = { + [SRC_CAP_5V] = 1, + [SRC_CAP_12V] = 2, + [SRC_CAP_20V] = 3, +}; + +static int pd_src_pdo_idx; + +void board_set_source_cap(enum board_src_cap cap) +{ + pd_src_pdo_idx = cap; +} + +int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port) +{ + *src_pdo = pd_src_pdo; + return pd_src_pdo_cnts[pd_src_pdo_idx]; +} diff --git a/board/plankton/usb_pd_pdo.h b/board/plankton/usb_pd_pdo.h new file mode 100644 index 0000000000..20e8976348 --- /dev/null +++ b/board/plankton/usb_pd_pdo.h @@ -0,0 +1,19 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_PLANKTON_USB_PD_PDO_H +#define __CROS_EC_BOARD_PLANKTON_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[3]; + +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; + +void board_set_source_cap(enum board_src_cap cap); +int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port); + +#endif /* __CROS_EC_BOARD_PLANKTON_USB_PD_PDO_H */ diff --git a/board/plankton/usb_pd_policy.c b/board/plankton/usb_pd_policy.c index 8cb24372a0..238f2297f5 100644 --- a/board/plankton/usb_pd_policy.c +++ b/board/plankton/usb_pd_policy.c @@ -15,6 +15,7 @@ #include "timer.h" #include "util.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) @@ -23,44 +24,9 @@ /* Acceptable margin between requested VBUS and measured value */ #define MARGIN_MV 400 /* mV */ -#define PDO_FIXED_FLAGS (PDO_FIXED_DATA_SWAP | PDO_FIXED_UNCONSTRAINED |\ - PDO_FIXED_COMM_CAP) - -/* Source PDOs */ -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), - PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), - PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS), -}; -static const int pd_src_pdo_cnts[] = { - [SRC_CAP_5V] = 1, - [SRC_CAP_12V] = 2, - [SRC_CAP_20V] = 3, -}; - -static int pd_src_pdo_idx; - -/* Fake PDOs : we just want our pre-defined voltages */ -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_FIXED(12000, 500, PDO_FIXED_FLAGS), - PDO_FIXED(20000, 500, PDO_FIXED_FLAGS), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - /* Whether alternate mode has been entered or not */ static int alt_mode; -void board_set_source_cap(enum board_src_cap cap) -{ - pd_src_pdo_idx = cap; -} - -int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port) -{ - *src_pdo = pd_src_pdo; - return pd_src_pdo_cnts[pd_src_pdo_idx]; -} void pd_set_input_current_limit(int port, uint32_t max_ma, uint32_t supply_voltage) diff --git a/board/poppy/board.h b/board/poppy/board.h index 98fcfdbfa9..ca287c7c6e 100644 --- a/board/poppy/board.h +++ b/board/poppy/board.h @@ -63,7 +63,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD diff --git a/board/primus/board.h b/board/primus/board.h index c28f409fff..5b87eb6477 100644 --- a/board/primus/board.h +++ b/board/primus/board.h @@ -131,17 +131,30 @@ #define CONFIG_BATTERY_LEVEL_NEAR_FULL 91 #define CONFIG_FANS FAN_CH_COUNT +#define RPM_DEVIATION 1 /* Charger defines */ #define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 #define CONFIG_CHARGE_RAMP_SW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 /* PROCHOT defines */ #define BATT_MAX_CONTINUE_DISCHARGE_WATT 66 +/* Prochot assertion/deassertion ratios*/ +#define PROCHOT_ADAPTER_WATT_RATIO 97 +#define PROCHOT_ASSERTION_BATTERY_RATIO 95 +#define PROCHOT_DEASSERTION_BATTERY_RATIO 85 +#define PROCHOT_ASSERTION_PD_RATIO 105 +#define PROCHOT_DEASSERTION_PD_RATIO 100 +#define PROCHOT_DEASSERTION_PD_BATTERY_RATIO 95 +#define PROCHOT_ASSERTION_ADAPTER_RATIO 105 +#define PROCHOT_DEASSERTION_ADAPTER_RATIO 90 +#define PROCHOT_DEASSERTION_ADAPTER_BATT_RATIO 90 + /* PS2 defines */ #define CONFIG_8042_AUX #define CONFIG_PS2 diff --git a/board/primus/ec.tasklist b/board/primus/ec.tasklist index 83415ffceb..bf2ec04c62 100644 --- a/board/primus/ec.tasklist +++ b/board/primus/ec.tasklist @@ -11,20 +11,21 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) \ - TASK_NOTEST(PROCHOT, prochot_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_NOTEST(PROCHOT, prochot_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_NOTEST(LOGOLED, logoled_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/primus/fans.c b/board/primus/fans.c index d966056331..001c6fde5c 100644 --- a/board/primus/fans.c +++ b/board/primus/fans.c @@ -31,15 +31,12 @@ static const struct fan_conf fan_conf_0 = { }; /* - * TOOD(b/180681346): need to update for real fan - * - * Prototype fan spins at about 7200 RPM at 100% PWM. - * Set minimum at around 30% PWM. + * Set maximum rpm at 4800/ minimum rpm at 1800. */ static const struct fan_rpm fan_rpm_0 = { - .rpm_min = 2200, - .rpm_start = 2200, - .rpm_max = 7200, + .rpm_min = 1800, + .rpm_start = 1800, + .rpm_max = 4800, }; const struct fan_t fans[FAN_CH_COUNT] = { diff --git a/board/primus/sensors.c b/board/primus/sensors.c index d297912772..60cfa1428f 100644 --- a/board/primus/sensors.c +++ b/board/primus/sensors.c @@ -99,29 +99,39 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; -static const struct ec_thermal_config thermal_ssd = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(92), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_SSD \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(92), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_ssd = THERMAL_SSD; /* * TODO(b/195901486): update for Alder Lake/primus @@ -136,26 +146,32 @@ static const struct ec_thermal_config thermal_ssd = { * Inductors: limit of 125c * PCB: limit is 80c */ -static const struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; /* * TODO(b/195901486): Thermal table need to be fine tuned. */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_2_SSD] = thermal_ssd, - [TEMP_SENSOR_3_CHARGER] = thermal_inductor, - [TEMP_SENSOR_4_MEMORY] = thermal_inductor, - [TEMP_SENSOR_5_USBC] = thermal_inductor, + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_SSD] = THERMAL_SSD, + [TEMP_SENSOR_3_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_4_MEMORY] = THERMAL_INDUCTOR, + [TEMP_SENSOR_5_USBC] = THERMAL_INDUCTOR, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/primus/usbc_config.c b/board/primus/usbc_config.c index a2d076ae2d..2207b1b085 100644 --- a/board/primus/usbc_config.c +++ b/board/primus/usbc_config.c @@ -171,20 +171,6 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) return EC_SUCCESS; } -__override int bb_retimer_reset(const struct usb_mux *me) -{ - /* - * TODO(b/200194309): Remove this once transition to - * QS Silicon is complete - */ - bb_retimer_power_enable(me, false); - msleep(5); - bb_retimer_power_enable(me, true); - msleep(25); - - return EC_SUCCESS; -} - void board_reset_pd_mcu(void) { /* Using RT1716, no reset available for TCPC on port 0/ port 2 */ diff --git a/board/puff/board.c b/board/puff/board.c index d25323faba..b30ca74221 100644 --- a/board/puff/board.c +++ b/board/puff/board.c @@ -381,36 +381,46 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* Thermal control; drive fan based on temperature sensors. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - [EC_TEMP_THRESH_HALT] = C_TO_K(78), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(58), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(41), - .temp_fan_max = C_TO_K(72), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(78), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(58), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(41), \ + .temp_fan_max = C_TO_K(72), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_CORE] = thermal_a, + [TEMP_SENSOR_CORE] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/puff/board.h b/board/puff/board.h index 9330d128ef..2fcbea6d61 100644 --- a/board/puff/board.h +++ b/board/puff/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO diff --git a/board/quackingstick/battery.c b/board/quackingstick/battery.c index 46dac64d5e..43cd8b9d8b 100644 --- a/board/quackingstick/battery.c +++ b/board/quackingstick/battery.c @@ -10,7 +10,7 @@ #include "util.h" /* - * Battery info for all coachz battery types. Note that the fields + * Battery info for all quackingstick battery types. Note that the fields * start_charging_min/max and charging_min/max are not used for the charger. * The effective temperature limits are given by discharging_min/max_c. * @@ -33,79 +33,20 @@ */ const struct board_batt_params board_battery_info[] = { - /* COSMX GH02047XL 333-1C-DA-A */ - [BATTERY_GH02047XL_1C] = { + /* COSMX AP21CBI Battery information */ + [BATTERY_AP21CBI] = { .fuel_gauge = { - .manuf_name = "333-1C-DA-A", - .device_name = "GH02047XL", + .manuf_name = "COSMX KT0020B001", + .device_name = "AP21CBI", .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, + .reg_addr = 0x3A, + .reg_data = { 0xC574, 0xC574 }, }, .fet = { - .mfgacc_support = 1, .reg_addr = 0x0, - .reg_mask = 0x0002, + .reg_mask = 0x8000, .disconnect_val = 0x0, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7700, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -10, - .discharging_max_c = 60, - }, - }, - /* COSMX GH02047XL */ - [BATTERY_GH02047XL] = { - .fuel_gauge = { - .manuf_name = "333-AC-DA-A", - .device_name = "GH02047XL", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, - }, - .fet = { - .mfgacc_support = 1, - .reg_addr = 0x0, - .reg_mask = 0x0002, - .disconnect_val = 0x0, - } - }, - .batt_info = { - .voltage_max = 8800, /* mV */ - .voltage_normal = 7700, /* mV */ - .voltage_min = 6000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -10, - .discharging_max_c = 60, - }, - }, - /* COSMX DS02032XL */ - [BATTERY_DS02032XL] = { - .fuel_gauge = { - .manuf_name = "333-AC-13-A", - .device_name = "DS02032XL", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, }, - .fet = { - .mfgacc_support = 1, - .reg_addr = 0x0, - .reg_mask = 0x0002, - .disconnect_val = 0x0, - } }, .batt_info = { .voltage_max = 8800, /* mV */ @@ -113,26 +54,26 @@ const struct board_batt_params board_battery_info[] = { .voltage_min = 6000, /* mV */ .precharge_current = 256, /* mA */ .start_charging_min_c = 0, - .start_charging_max_c = 45, + .start_charging_max_c = 50, .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -10, - .discharging_max_c = 60, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, + .vendor_param_start = 0x70, }, }, - /* SMP DS02032XL */ - [BATTERY_DS02032XL_1C] = { + /* COSMX AP21CBI Battery information */ + [BATTERY_AP21CBI_VER0] = { .fuel_gauge = { - .manuf_name = "333-1C-13-A", - .device_name = "DS02032XL", + .manuf_name = "AP21CBI", + .device_name = "COSMX KT0020B001", .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x0010, 0x0010 }, + .reg_addr = 0x3A, + .reg_data = { 0xC574, 0xC574 }, }, .fet = { - .mfgacc_support = 1, .reg_addr = 0x0, - .reg_mask = 0x0002, + .reg_mask = 0x8000, .disconnect_val = 0x0, } }, @@ -142,14 +83,15 @@ const struct board_batt_params board_battery_info[] = { .voltage_min = 6000, /* mV */ .precharge_current = 256, /* mA */ .start_charging_min_c = 0, - .start_charging_max_c = 45, + .start_charging_max_c = 50, .charging_min_c = 0, - .charging_max_c = 45, - .discharging_min_c = -10, - .discharging_max_c = 60, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, + .vendor_param_start = 0x70, }, }, }; BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_DS02032XL; +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_AP21CBI; diff --git a/board/quackingstick/board.c b/board/quackingstick/board.c index 0e8b745d97..11fbb6cb12 100644 --- a/board/quackingstick/board.c +++ b/board/quackingstick/board.c @@ -13,7 +13,8 @@ #include "extpower.h" #include "driver/accel_bma2x2.h" #include "driver/accelgyro_bmi_common.h" -#include "driver/accelgyro_bmi260.h" +#include "driver/accelgyro_icm_common.h" +#include "driver/accelgyro_icm42607.h" #include "driver/ppc/sn5s330.h" #include "driver/tcpm/ps8xxx.h" #include "driver/tcpm/tcpci.h" @@ -34,6 +35,9 @@ #include "switch.h" #include "tablet_mode.h" #include "task.h" +#include "temp_sensor.h" +#include "temp_sensor/thermistor.h" +#include "thermal.h" #include "usbc_ppc.h" #define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) @@ -152,9 +156,26 @@ const struct adc_t adc_channels[] = { ADC_READ_MAX + 1, 0 }, + [ADC_SYSTHERM2] = { + "SYSTHERM2", + NPCX_ADC_CH6, + ADC_MAX_VOLT, + ADC_READ_MAX + 1, + 0, + }, }; BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); +const struct temp_sensor_t temp_sensors[] = { + [TEMP_SENSOR_SYS2] = { + .name = "SYSTEMP2", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_SYSTHERM2, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + const struct pwm_t pwm_channels[] = { /* TODO(waihong): Assign a proper frequency. */ [PWM_CH_DISPLIGHT] = { .channel = 5, .flags = 0, .freq = 4800 }, @@ -210,9 +231,15 @@ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { static struct mutex g_lid_mutex; static struct bmi_drv_data_t g_bmi160_data; -static struct bmi_drv_data_t g_bmi260_data; +static struct icm_drv_data_t g_icm42607_data; + +enum lid_accelgyro_type { + LID_GYRO_NONE = 0, + LID_GYRO_BMI160 = 1, + LID_GYRO_ICM42607 = 2, +}; -bool is_bmi260_present; +static enum lid_accelgyro_type lid_accelgyro_config; /* Matrix to rotate accelerometer into standard reference frame */ const mat33_fp_t lid_standard_ref = { @@ -266,27 +293,22 @@ struct motion_sensor_t motion_sensors[] = { }, }; -struct motion_sensor_t motion_sensors_260[] = { - /* - * Note: bmi260: supports accelerometer and gyro sensor - * Requirement: accelerometer sensor must init before gyro sensor - * DO NOT change the order of the following table. - */ +struct motion_sensor_t motion_sensors_icm[] = { [LID_ACCEL] = { .name = "Lid Accel", .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI260, + .chip = MOTIONSENSE_CHIP_ICM42607, .type = MOTIONSENSE_TYPE_ACCEL, .location = MOTIONSENSE_LOC_LID, - .drv = &bmi260_drv, + .drv = &icm42607_drv, .mutex = &g_lid_mutex, - .drv_data = &g_bmi260_data, + .drv_data = &g_icm42607_data, .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, - .rot_standard_ref = &lid_standard_ref, + .i2c_spi_addr_flags = ICM42607_ADDR0_FLAGS, + .rot_standard_ref = NULL, .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ - .min_frequency = BMI_ACCEL_MIN_FREQ, - .max_frequency = BMI_ACCEL_MAX_FREQ, + .min_frequency = ICM42607_ACCEL_MIN_FREQ, + .max_frequency = ICM42607_ACCEL_MAX_FREQ, .config = { [SENSOR_CONFIG_EC_S0] = { .odr = 10000 | ROUND_UP_FLAG, @@ -296,18 +318,18 @@ struct motion_sensor_t motion_sensors_260[] = { [LID_GYRO] = { .name = "Gyro", .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI260, + .chip = MOTIONSENSE_CHIP_ICM42607, .type = MOTIONSENSE_TYPE_GYRO, .location = MOTIONSENSE_LOC_LID, - .drv = &bmi260_drv, + .drv = &icm42607_drv, .mutex = &g_lid_mutex, - .drv_data = &g_bmi260_data, + .drv_data = &g_icm42607_data, .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, + .i2c_spi_addr_flags = ICM42607_ADDR0_FLAGS, .default_range = 1000, /* dps */ - .rot_standard_ref = &lid_standard_ref, - .min_frequency = BMI_GYRO_MIN_FREQ, - .max_frequency = BMI_GYRO_MAX_FREQ, + .rot_standard_ref = NULL, + .min_frequency = ICM42607_GYRO_MIN_FREQ, + .max_frequency = ICM42607_GYRO_MAX_FREQ, }, }; @@ -319,17 +341,20 @@ static void board_detect_motionsensor(void) if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) return; + if (lid_accelgyro_config != LID_GYRO_NONE) + return; /* Check base accelgyro chip */ - bmi_read8(motion_sensors[LID_ACCEL].port, - motion_sensors[LID_ACCEL].i2c_spi_addr_flags, - BMI260_CHIP_ID, &val); - if (val == BMI260_CHIP_ID_MAJOR) { - motion_sensors[LID_ACCEL] = motion_sensors_260[LID_ACCEL]; - motion_sensors[LID_GYRO] = motion_sensors_260[LID_GYRO]; - is_bmi260_present = 1; + icm_read8(&motion_sensors_icm[LID_ACCEL], ICM42607_REG_WHO_AM_I, + &val); + if (val == ICM42607_CHIP_ICM42607P) { + motion_sensors[LID_ACCEL] = motion_sensors_icm[LID_ACCEL]; + motion_sensors[LID_GYRO] = motion_sensors_icm[LID_GYRO]; + lid_accelgyro_config = LID_GYRO_ICM42607; + CPRINTS("LID Accelgyro: ICM42607"); } else { - is_bmi260_present = 0; + lid_accelgyro_config = LID_GYRO_BMI160; + CPRINTS("LID Accelgyro: BMI160"); } } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_detect_motionsensor, @@ -338,8 +363,8 @@ DECLARE_HOOK(HOOK_INIT, board_detect_motionsensor, HOOK_PRIO_DEFAULT + 1); void motion_interrupt(enum gpio_signal signal) { - if (is_bmi260_present) - bmi260_interrupt(signal); + if (lid_accelgyro_config == LID_GYRO_ICM42607) + icm42607_interrupt(signal); else bmi160_interrupt(signal); } @@ -591,25 +616,3 @@ uint16_t tcpc_get_alert_status(void) return status; } - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/quackingstick/board.h b/board/quackingstick/board.h index e165164e1d..7ad8cd227c 100644 --- a/board/quackingstick/board.h +++ b/board/quackingstick/board.h @@ -10,14 +10,6 @@ #include "baseboard.h" -/* On-body detection */ -#define CONFIG_BODY_DETECTION -#define CONFIG_BODY_DETECTION_SENSOR LID_ACCEL -#define CONFIG_BODY_DETECTION_VAR_NOISE_FACTOR 150 /* % */ -#define CONFIG_GESTURE_DETECTION -#define CONFIG_GESTURE_DETECTION_MASK BIT(CONFIG_BODY_DETECTION_SENSOR) -#define CONFIG_GESTURE_HOST_DETECTION - #define CONFIG_BUTTON_TRIGGERED_RECOVERY /* Internal SPI flash on NPCX7 */ @@ -46,17 +38,18 @@ #define CONFIG_USB_PD_TCPM_MULTI_PS8XXX #define CONFIG_USB_PD_TCPM_PS8755 #define CONFIG_USB_PD_TCPM_PS8805 +#define CONFIG_USB_PD_TCPM_PS8805_FORCE_DID #define CONFIG_USBC_PPC_SN5S330 #define CONFIG_USB_PD_PORT_MAX_COUNT 1 -/* BMI160 Lid accel/gyro */ +/* Lid accel/gyro */ #define CONFIG_ACCELGYRO_BMI160 #define CONFIG_ACCEL_INTERRUPTS #define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) #define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS -#define CONFIG_ACCELGYRO_BMI260 -#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ +#define CONFIG_ACCELGYRO_ICM42607 +#define CONFIG_ACCELGYRO_ICM42607_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) #define CONFIG_TABLET_MODE @@ -73,6 +66,11 @@ #define GPIO_WP_L GPIO_EC_FLASH_WP_ODL #define GPIO_PMIC_RESIN_L GPIO_PM845_RESIN_L +/* temp */ +#define CONFIG_TEMP_SENSOR +#define CONFIG_THERMISTOR +#define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B + #ifndef __ASSEMBLER__ #include "gpio_signal.h" @@ -83,9 +81,15 @@ enum adc_channel { ADC_AMON_BMON, ADC_PSYS, ADC_BASE_DET, + ADC_SYSTHERM2, ADC_CH_COUNT }; +enum temp_sensor_id { + TEMP_SENSOR_SYS2, + TEMP_SENSOR_COUNT +}; + /* Motion sensors */ enum sensor_id { LID_ACCEL = 0, @@ -100,10 +104,8 @@ enum pwm_channel { /* List of possible batteries */ enum battery_type { - BATTERY_GH02047XL_1C, - BATTERY_GH02047XL, - BATTERY_DS02032XL, - BATTERY_DS02032XL_1C, + BATTERY_AP21CBI, + BATTERY_AP21CBI_VER0, BATTERY_TYPE_COUNT, }; diff --git a/board/quackingstick/gpio.inc b/board/quackingstick/gpio.inc index b45bb6476c..09983989d2 100644 --- a/board/quackingstick/gpio.inc +++ b/board/quackingstick/gpio.inc @@ -89,6 +89,7 @@ GPIO(EDP_BKLTCTL, PIN(B, 7), GPIO_INPUT) /* PWM5 */ GPIO(PPVAR_BOOSTIN_SENSE, PIN(4, 4), GPIO_INPUT) /* ADC1 */ GPIO(CHARGER_IADP, PIN(4, 3), GPIO_INPUT) /* ADC2 */ GPIO(CHARGER_PMON, PIN(4, 2), GPIO_INPUT) /* ADC3 */ +GPIO(SYSTHERM2_CHARGER, PIN(3, 4), GPIO_INPUT) /* ADC6 */ /* I2C */ GPIO(EC_I2C_POWER_SCL, PIN(B, 5), GPIO_INPUT) @@ -165,7 +166,6 @@ UNUSED(PIN(3, 5)) UNUSED(PIN(7, 2)) UNUSED(PIN(8, 1)) UNUSED(PIN(7, 6)) -UNUSED(PIN(3, 4)) UNUSED(PIN(C, 6)) UNUSED(PIN(C, 0)) UNUSED(PIN(A, 3)) @@ -186,6 +186,7 @@ ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1 SCL (GPIO87) ALTERNATE(PIN_MASK(3, 0x48), 1, MODULE_I2C, 0) /* I2C5 (GPIO33/36) */ ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C7 (GPIOB2/B3) - 1.8V */ ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3 (GPIOD0/D1) */ +ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* ADC6 (GPIO34) */ ALTERNATE(PIN_MASK(4, 0x1C), 0, MODULE_ADC, 0) /* ADC1 (GPIO44), ADC2 (GPIO43), ADC3 (GPIO42) */ ALTERNATE(PIN_MASK(4, 0xC0), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SDO (GPIO47), SHI_SDI (GPIO46) */ ALTERNATE(PIN_MASK(5, 0x28), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SCLK (GPIO55), SHI_CS# (GPIO53) */ diff --git a/board/quiche/board.c b/board/quiche/board.c index e49b2e1b1a..76004ee37e 100644 --- a/board/quiche/board.c +++ b/board/quiche/board.c @@ -345,6 +345,30 @@ int dock_get_mf_preference(void) return mf; } +static void board_usb_tc_connect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* + * The EC needs to indicate to the MST hub when the host port is + * attached. GPIO_UFP_PLUG_DET is used for this purpose. + */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 0); +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_tc_connect, HOOK_PRIO_DEFAULT); + +static void board_usb_tc_disconnect(void) +{ + int port = TASK_ID_TO_PD_PORT(task_get_current()); + + /* Only the host port disconnect is relevant */ + if (port == USB_PD_PORT_HOST) + gpio_set_level(GPIO_UFP_PLUG_DET, 1); +} +DECLARE_HOOK(HOOK_USB_PD_DISCONNECT, board_usb_tc_disconnect, \ + HOOK_PRIO_DEFAULT); + #endif /* SECTION_IS_RW */ static void board_init(void) diff --git a/board/rainier/board.h b/board/rainier/board.h index a323a90889..a980afba50 100644 --- a/board/rainier/board.h +++ b/board/rainier/board.h @@ -128,7 +128,7 @@ #define I2C_PORT_TCPC0 1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_MKBP_INPUT_DEVICES #define CONFIG_MKBP_EVENT diff --git a/board/rammus/board.h b/board/rammus/board.h index c084d98fb0..24df8218ca 100644 --- a/board/rammus/board.h +++ b/board/rammus/board.h @@ -58,7 +58,7 @@ #define CONFIG_CHIPSET_SKYLAKE #define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET #define CONFIG_CHIPSET_RESET_HOOK -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_HOSTCMD_ESPI_VW_SLP_S3 #define CONFIG_HOSTCMD_ESPI_VW_SLP_S4 #define CONFIG_HOSTCMD_FLASH_SPI_INFO diff --git a/board/redrix/board.h b/board/redrix/board.h index 3c8eb8ae0a..a4ecc90eed 100644 --- a/board/redrix/board.h +++ b/board/redrix/board.h @@ -19,6 +19,9 @@ */ #define CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP +/* Chipset */ +#define CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Sensors */ #define CONFIG_ACCEL_BMA255 /* Lid accel */ #define CONFIG_ACCELGYRO_LSM6DSM /* Base accel */ @@ -179,10 +182,19 @@ /* Charger defines */ #define CONFIG_CHARGER_BQ25720 +/* + * b/202915015: The IDCHG current limit is set in 512 mA steps. + * The value set here is somewhat specific to the battery pack being + * currently used. The limit here was set based on the battery's + * discharge current limit and what was tested to prevent the AP + * rebooting with low charge level batteries. + */ +#define CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA 8192 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 #define CONFIG_CHARGE_RAMP_HW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 /* Keyboard features */ #define CONFIG_KEYBOARD_FACTORY_TEST diff --git a/board/redrix/ec.tasklist b/board/redrix/ec.tasklist index 937fe97ae0..cfc1fea6ea 100644 --- a/board/redrix/ec.tasklist +++ b/board/redrix/ec.tasklist @@ -11,20 +11,21 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ TASK_ALWAYS(LED, led_task, NULL, TASK_STACK_SIZE) \ TASK_ALWAYS_RW(PCHG, pchg_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/redrix/sensors.c b/board/redrix/sensors.c index f720a7cd32..8a92b8825f 100644 --- a/board/redrix/sensors.c +++ b/board/redrix/sensors.c @@ -284,17 +284,20 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); /* * TODO(b/195673113): Need to update for Alder Lake/redrix */ -static const struct ec_thermal_config thermal_ddr = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_DDR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_ddr = THERMAL_DDR; /* * TODO(b/195673113): Need to update for Alder Lake/redrix @@ -303,53 +306,64 @@ static const struct ec_thermal_config thermal_ddr = { * 130 C. However, sensor is located next to SOC, so we need to use the lower * SOC temperature limit (85 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/195673113): Need to update for Alder Lake/redrix */ -static const struct ec_thermal_config thermal_charger = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; /* * TODO(b/195673113): Need to update for Alder Lake/redrix */ -static const struct ec_thermal_config thermal_regulator = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_REGULATOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_regulator = + THERMAL_REGULATOR; /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR] = thermal_ddr, - [TEMP_SENSOR_2_SOC] = thermal_cpu, - [TEMP_SENSOR_3_CHARGER] = thermal_charger, - [TEMP_SENSOR_4_REGULATOR] = thermal_regulator, + [TEMP_SENSOR_1_DDR] = THERMAL_DDR, + [TEMP_SENSOR_2_SOC] = THERMAL_CPU, + [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, + [TEMP_SENSOR_4_REGULATOR] = THERMAL_REGULATOR, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/redrix/thermal.c b/board/redrix/thermal.c index 39d9a49c3a..d35d81b02d 100644 --- a/board/redrix/thermal.c +++ b/board/redrix/thermal.c @@ -48,37 +48,37 @@ static const struct fan_step fan_table_clamshell[] = { /* level 1 */ .on = {45, 47, 0, -1}, .off = {44, 46, 99, -1}, - .rpm = {3400, 3900}, + .rpm = {4000, 4400}, }, { /* level 2 */ .on = {46, 48, 0, -1}, .off = {45, 47, 99, -1}, - .rpm = {3700, 4200}, + .rpm = {4700, 5000}, }, { /* level 3 */ .on = {47, 49, 0, -1}, .off = {46, 48, 99, -1}, - .rpm = {4100, 4500}, + .rpm = {5000, 5400}, }, { /* level 4 */ .on = {48, 50, 50, -1}, .off = {47, 49, 48, -1}, - .rpm = {4200, 4600}, + .rpm = {5300, 5600}, }, { /* level 5 */ .on = {49, 51, 52, -1}, .off = {48, 50, 50, -1}, - .rpm = {4600, 4900}, + .rpm = {5700, 6000}, }, { /* level 6 */ .on = {100, 100, 100, -1}, .off = {49, 51, 52, -1}, - .rpm = {4900, 5200}, + .rpm = {6200, 6400}, }, }; @@ -93,37 +93,37 @@ static const struct fan_step fan_table_tablet[] = { /* level 1 */ .on = {45, 47, 0, -1}, .off = {44, 46, 99, -1}, - .rpm = {3400, 3900}, + .rpm = {4200, 4400}, }, { /* level 2 */ .on = {46, 48, 0, -1}, .off = {45, 47, 99, -1}, - .rpm = {3700, 4200}, + .rpm = {4700, 4900}, }, { /* level 3 */ .on = {47, 49, 0, -1}, .off = {46, 48, 99, -1}, - .rpm = {4100, 4500}, + .rpm = {5000, 5300}, }, { /* level 4 */ .on = {48, 50, 50, -1}, .off = {47, 49, 48, -1}, - .rpm = {4200, 4600}, + .rpm = {5200, 5500}, }, { /* level 5 */ .on = {49, 51, 52, -1}, .off = {48, 50, 50, -1}, - .rpm = {4600, 4900}, + .rpm = {5700, 5900}, }, { /* level 6 */ .on = {100, 100, 100, -1}, .off = {49, 51, 52, -1}, - .rpm = {4900, 5200}, + .rpm = {6100, 6300}, }, }; diff --git a/board/reef/board.h b/board/reef/board.h index 6b05bbc1ed..00544f7bf9 100644 --- a/board/reef/board.h +++ b/board/reef/board.h @@ -102,7 +102,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/reef/gpio.inc b/board/reef/gpio.inc index 5bf83f88bc..f508d7a84e 100644 --- a/board/reef/gpio.inc +++ b/board/reef/gpio.inc @@ -67,7 +67,8 @@ GPIO(EC_I2C_POWER_SCL, PIN(D, 1), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the + * CONFIG_HOST_INTERFACE_SHI option. */ GPIO(PCH_SMI_L, PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ diff --git a/board/reef_it8320/board.h b/board/reef_it8320/board.h index 3598aee233..cf29faa8f8 100644 --- a/board/reef_it8320/board.h +++ b/board/reef_it8320/board.h @@ -99,7 +99,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/reef_it8320/gpio.inc b/board/reef_it8320/gpio.inc index 9882065d50..ac2fbf486e 100644 --- a/board/reef_it8320/gpio.inc +++ b/board/reef_it8320/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(PCH_SLP_S0_L, PIN(B, 7), GPIO_INT_BOTH, power_signal_interrupt) /* #endif GPIO_INT(SUSPWRDNACK, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) /* SUSPWRNACK */ GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH, lid_interrupt) /* LID_OPEN */ -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) /* PLT_RST_L */ #endif GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ diff --git a/board/reef_mchp/board.h b/board/reef_mchp/board.h index 5e31c5de98..5ae0cdf214 100644 --- a/board/reef_mchp/board.h +++ b/board/reef_mchp/board.h @@ -104,7 +104,7 @@ #define CONFIG_USBC_VCONN_SWAP /* SoC / PCH */ -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_CHIPSET_APOLLOLAKE #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_POWER_BUTTON diff --git a/board/reef_mchp/gpio.inc b/board/reef_mchp/gpio.inc index 0385d82102..3274af3bff 100644 --- a/board/reef_mchp/gpio.inc +++ b/board/reef_mchp/gpio.inc @@ -84,7 +84,8 @@ GPIO(EC_I2C_POWER_SCL, PIN(010), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the + * CONFIG_HOST_INTERFACE_SHI option. */ GPIO(PCH_SMI_L, PIN(0227), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ diff --git a/board/scarlet/board.h b/board/scarlet/board.h index 2880968ddc..5f5e1ef4bb 100644 --- a/board/scarlet/board.h +++ b/board/scarlet/board.h @@ -132,6 +132,11 @@ #define CONFIG_BATTERY_REVIVE_DISCONNECT #define CONFIG_BATTERY_MAX17055 +/* Disable verbose output in EC pd */ +#ifdef SECTION_IS_RO +#define CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE +#endif + /* Battery parameters for max17055 ModelGauge m5 algorithm. */ #define BATTERY_MAX17055_RSENSE 5 /* m-ohm */ #define BATTERY_DESIRED_CHARGING_CURRENT 4000 /* mA */ @@ -181,7 +186,7 @@ #define VIRTUAL_BATTERY_ADDR_FLAGS 0x0B /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_MKBP_INPUT_DEVICES #define CONFIG_MKBP_EVENT diff --git a/board/scout/board.c b/board/scout/board.c index 20abf39c04..d45b627ce1 100644 --- a/board/scout/board.c +++ b/board/scout/board.c @@ -137,13 +137,6 @@ const struct motion_sensor_t *motion_als_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); -static void board_sensors_init(void) -{ - /* Enable interrupt for the TCS3400 color light sensor */ - gpio_enable_interrupt(GPIO_EC_RGB_INT_L); -} -DECLARE_HOOK(HOOK_INIT, board_sensors_init, HOOK_PRIO_INIT_I2C + 1); - static void power_monitor(void); DECLARE_DEFERRED(power_monitor); @@ -346,37 +339,47 @@ BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); /******************************************************************************/ /* Thermal control; drive fan based on temperature sensors. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - [EC_TEMP_THRESH_HALT] = C_TO_K(90), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(89), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(89), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(78), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(78), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_CORE] = thermal_a, - [TEMP_SENSOR_WIFI] = thermal_a, + [TEMP_SENSOR_CORE] = THERMAL_A, + [TEMP_SENSOR_WIFI] = THERMAL_A, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); @@ -413,6 +416,33 @@ static void cbi_init(void) } DECLARE_HOOK(HOOK_INIT, cbi_init, HOOK_PRIO_INIT_I2C + 1); +static void board_sensors_init(void) +{ + /* Enable interrupt for the TCS3400 color light sensor */ + switch (board_version) { + case BOARD_VERSION_PROTO: + case BOARD_VERSION_PRE_EVT: + case BOARD_VERSION_EVT: + /* + * b/203224828: These versions incorrectly use a 1.8V interrupt + * line, which sends a constant interrupt signal and eventually + * triggers a watchdog reset, so we keep it disabled. + */ + gpio_disable_interrupt(GPIO_EC_RGB_INT_L); + CPRINTS("ALS interrupt disabled (detected known-bad hardware)"); + break; + + case BOARD_VERSION_DVT: + case BOARD_VERSION_PVT: + default: + gpio_enable_interrupt(GPIO_EC_RGB_INT_L); + CPRINTS("ALS interrupt enabled"); + break; + } +} +/* Ensure board_sensors_init runs after cbi_init. */ +DECLARE_HOOK(HOOK_INIT, board_sensors_init, HOOK_PRIO_INIT_I2C + 2); + static void board_init(void) { uint8_t *memmap_batt_flags; diff --git a/board/scout/board.h b/board/scout/board.h index 5f8fbcbee9..c90e1acda9 100644 --- a/board/scout/board.h +++ b/board/scout/board.h @@ -38,7 +38,7 @@ #define CONFIG_MKBP_USE_HOST_EVENT #undef CONFIG_KEYBOARD_RUNTIME_KEYS #undef CONFIG_HIBERNATE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #define CONFIG_LED_COMMON #undef CONFIG_LID_SWITCH #define CONFIG_LTO @@ -154,6 +154,14 @@ #include "gpio_signal.h" #include "registers.h" +enum board_version { + BOARD_VERSION_PROTO = 1, + BOARD_VERSION_PRE_EVT = 2, + BOARD_VERSION_EVT = 3, + BOARD_VERSION_DVT = 4, + BOARD_VERSION_PVT = 5, +}; + enum adc_channel { ADC_SNS_PP3300, /* ADC2 */ ADC_SNS_PP1050, /* ADC7 */ diff --git a/board/scout/gpio.inc b/board/scout/gpio.inc index e34fe3dadb..583e4159bd 100644 --- a/board/scout/gpio.inc +++ b/board/scout/gpio.inc @@ -37,7 +37,7 @@ GPIO_INT(PG_PP950_VCCIO_OD, PIN(1, 7), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(IMVP8_VRRDY_OD, PIN(1, 6), GPIO_INT_BOTH, power_signal_interrupt) /* ALS signals */ -GPIO_INT(EC_RGB_INT_L, PIN(9, 7), GPIO_INT_FALLING | GPIO_SEL_1P8V, tcs3400_interrupt) +GPIO_INT(EC_RGB_INT_L, PIN(9, 7), GPIO_INT_FALLING, tcs3400_interrupt) /* * Directly connected recovery button (not available on some boards). */ @@ -114,18 +114,18 @@ GPIO(HDMI_CONN1_CEC_OUT, PIN(9, 5), GPIO_ODR_HIGH) GPIO(HDMI_CONN1_CEC_IN, PIN(D, 3), GPIO_INPUT) /* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(I2C0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C_INA_SCL */ -GPIO(I2C0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_I2C_INA_SDA */ -GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* EC_I2C_USB_C0_TCPPC_SCL */ -GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* EC_I2C_USB_C0_TCPPC_SDA */ -GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_I2C_DDR_SCALER_SCL */ -GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_I2C_DDR_SCALER_SDA */ -GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT) /* EC_I2C_ALS_SCL */ -GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT) /* EC_I2C_ALS_SDA */ -GPIO(I2C5_SCL, PIN(3, 3), GPIO_INPUT) /* EC_I2C_IMVP8_SCL */ -GPIO(I2C5_SDA, PIN(3, 6), GPIO_INPUT) /* EC_I2C_IMVP8_SDA */ -GPIO(I2C7_SCL, PIN(B, 3), GPIO_INPUT) /* EC_I2C_EEPROM_SCL */ -GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT) /* EC_I2C_EEPROM_SDA */ +GPIO(I2C0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C_INA_SCL */ +GPIO(I2C0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_I2C_INA_SDA */ +GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* EC_I2C_USB_C0_TCPPC_SCL */ +GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* EC_I2C_USB_C0_TCPPC_SDA */ +GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_I2C_DDR_SCALER_SCL */ +GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_I2C_DDR_SCALER_SDA */ +GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT | GPIO_SEL_1P8V) /* EC_I2C_ALS_SCL */ +GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT | GPIO_SEL_1P8V) /* EC_I2C_ALS_SDA */ +GPIO(I2C5_SCL, PIN(3, 3), GPIO_INPUT) /* EC_I2C_IMVP8_SCL */ +GPIO(I2C5_SDA, PIN(3, 6), GPIO_INPUT) /* EC_I2C_IMVP8_SDA */ +GPIO(I2C7_SCL, PIN(B, 3), GPIO_INPUT) /* EC_I2C_EEPROM_SCL */ +GPIO(I2C7_SDA, PIN(B, 2), GPIO_INPUT) /* EC_I2C_EEPROM_SDA */ /* Alternate functions GPIO definitions */ ALTERNATE(PIN_MASK(B, 0x30), 0, MODULE_I2C, 0) /* I2C0 */ diff --git a/board/servo_micro/board.h b/board/servo_micro/board.h index 306bc0e5d7..6f4d67424b 100644 --- a/board/servo_micro/board.h +++ b/board/servo_micro/board.h @@ -76,7 +76,7 @@ /* Enable control of SPI over USB */ #define CONFIG_USB_SPI #define CONFIG_SPI_CONTROLLER -#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */ +#define CONFIG_SPI_FLASH_PORT 0 /* First SPI controller port */ /* This is not actually an EC so disable some features. */ #undef CONFIG_WATCHDOG_HELP diff --git a/board/servo_v4/board.h b/board/servo_v4/board.h index f932752ef4..7199a738a3 100644 --- a/board/servo_v4/board.h +++ b/board/servo_v4/board.h @@ -102,6 +102,7 @@ #undef CONFIG_CMD_WAITMS #undef CONFIG_CMD_USART_INFO #undef CONFIG_CMD_CHARGE_SUPPLIER_INFO +#define CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE /* Enable control of I2C over USB */ #define CONFIG_USB_I2C diff --git a/board/servo_v4/build.mk b/board/servo_v4/build.mk index 6336bbfab6..6c39be0475 100644 --- a/board/servo_v4/build.mk +++ b/board/servo_v4/build.mk @@ -14,6 +14,6 @@ CHIP_VARIANT:=stm32f07x test-list-y= board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o usb_pd_pdo.o all_deps=$(patsubst ro,,$(def_all_deps)) diff --git a/board/servo_v4/usb_pd_pdo.c b/board/servo_v4/usb_pd_pdo.c new file mode 100644 index 0000000000..8df0eac2c2 --- /dev/null +++ b/board/servo_v4/usb_pd_pdo.c @@ -0,0 +1,56 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charge_manager.h" +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_config.h" +#include "usb_pd_pdo.h" + +#define CHG_PDO_FIXED_FLAGS (PDO_FIXED_DATA_SWAP) + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, CHG_PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 15000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +/* + * Dynamic PDO that reflects capabilities present on the CHG port. Allow for + * multiple entries so that we can offer greater than 5V charging. The 1st + * entry will be fixed 5V, but its current value may change based on the CHG + * port vbus info. Subsequent entries are used for when offering vbus greater + * than 5V. + */ +const uint16_t pd_src_voltages_mv[] = { + 5000, 9000, 10000, 12000, 15000, 20000, +}; +uint32_t pd_src_chg_pdo[ARRAY_SIZE(pd_src_voltages_mv)]; +uint8_t chg_pdo_cnt; + +int active_charge_port = CHARGE_PORT_NONE; +struct vbus_prop vbus[CONFIG_USB_PD_PORT_MAX_COUNT]; + +int charge_port_is_active(void) +{ + return active_charge_port == CHG && vbus[CHG].mv > 0; +} + +int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port) +{ + int pdo_cnt = 0; + + /* + * If CHG is providing VBUS, then advertise what's available on the CHG + * port, otherwise we provide no power. + */ + if (charge_port_is_active()) { + *src_pdo = pd_src_chg_pdo; + pdo_cnt = chg_pdo_cnt; + } + + return pdo_cnt; +} diff --git a/board/servo_v4/usb_pd_pdo.h b/board/servo_v4/usb_pd_pdo.h new file mode 100644 index 0000000000..bb9d8adca6 --- /dev/null +++ b/board/servo_v4/usb_pd_pdo.h @@ -0,0 +1,30 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_SERVO_V4_USB_PD_PDO_H +#define __CROS_EC_BOARD_SERVO_V4_USB_PD_PDO_H + +#include "compile_time_macros.h" +#include "stdint.h" + +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; + +extern const uint16_t pd_src_voltages_mv[6]; +extern uint32_t pd_src_chg_pdo[ARRAY_SIZE(pd_src_voltages_mv)]; +extern uint8_t chg_pdo_cnt; + +extern int active_charge_port; + +struct vbus_prop { + int mv; + int ma; +}; +extern struct vbus_prop vbus[CONFIG_USB_PD_PORT_MAX_COUNT]; + +int charge_port_is_active(void); +int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port); + +#endif /* __CROS_EC_BOARD_SERVO_V4_USB_PD_PDO_H */ diff --git a/board/servo_v4/usb_pd_policy.c b/board/servo_v4/usb_pd_policy.c index 00eaa1e628..61931cda8b 100644 --- a/board/servo_v4/usb_pd_policy.c +++ b/board/servo_v4/usb_pd_policy.c @@ -25,6 +25,7 @@ #include "usb_mux.h" #include "usb_pd.h" #include "usb_pd_config.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) @@ -33,8 +34,6 @@ #define DUT_PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ PDO_FIXED_COMM_CAP) -#define CHG_PDO_FIXED_FLAGS (PDO_FIXED_DATA_SWAP) - #define VBUS_UNCHANGED(curr, pend, new) (curr == new && pend == new) /* Macros to config the PD role */ @@ -88,32 +87,6 @@ #define DUT_BOTH_CC_PD(r) DUT_BOTH_CC_SET(r, GPIO_OUT_LOW) #define DUT_BOTH_CC_OPEN(r) DUT_BOTH_CC_SET(r, GPIO_INPUT) -/* - * Dynamic PDO that reflects capabilities present on the CHG port. Allow for - * multiple entries so that we can offer greater than 5V charging. The 1st - * entry will be fixed 5V, but its current value may change based on the CHG - * port vbus info. Subsequent entries are used for when offering vbus greater - * than 5V. - */ -static const uint16_t pd_src_voltages_mv[] = { - 5000, 9000, 10000, 12000, 15000, 20000, -}; -static uint32_t pd_src_chg_pdo[ARRAY_SIZE(pd_src_voltages_mv)]; -static uint8_t chg_pdo_cnt; - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, CHG_PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 15000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - -struct vbus_prop { - int mv; - int ma; -}; -static struct vbus_prop vbus[CONFIG_USB_PD_PORT_MAX_COUNT]; -static int active_charge_port = CHARGE_PORT_NONE; static enum charge_supplier active_charge_supplier; static uint8_t vbus_rp = TYPEC_RP_RESERVED; @@ -172,11 +145,6 @@ static uint32_t max_supported_voltage(void) user_limited_max_mv; } -static int charge_port_is_active(void) -{ - return active_charge_port == CHG && vbus[CHG].mv > 0; -} - static int is_charge_through_allowed(void) { return charge_port_is_active() && cc_config & CC_ALLOW_SRC; @@ -606,22 +574,6 @@ int board_select_rp_value(int port, int rp) return EC_SUCCESS; } -int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port) -{ - int pdo_cnt = 0; - - /* - * If CHG is providing VBUS, then advertise what's available on the CHG - * port, otherwise we provide no power. - */ - if (charge_port_is_active()) { - *src_pdo = pd_src_chg_pdo; - pdo_cnt = chg_pdo_cnt; - } - - return pdo_cnt; -} - __override void pd_transition_voltage(int idx) { timestamp_t deadline; diff --git a/board/servo_v4p1/board.c b/board/servo_v4p1/board.c index d8616ce340..385d46ef55 100644 --- a/board/servo_v4p1/board.c +++ b/board/servo_v4p1/board.c @@ -65,6 +65,26 @@ static void tca_evt(enum gpio_signal signal) irq_ioexpanders(); } +/* + * TUSB1064 set mux board tuning. + * Adds in board specific gain and DP lane count configuration + */ +static int board_tusb1064_dp_rx_eq_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + int rv = EC_SUCCESS; + + /* + * Apply 10dB gain. Note, this value is selected to match the gain that + * would be set by default if the 2 GPIO gain set pins are left + * floating. + */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + rv = tusb1064_set_dp_rx_eq(me, TUSB1064_DP_EQ_RX_10_0_DB); + + return rv; +} + const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { [CHG] = { /* CHG port connected directly to USB 3.0 hub, no mux */ }, [DUT] = { /* DUT port with UFP mux */ @@ -72,6 +92,7 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_port = I2C_PORT_MASTER, .i2c_addr_flags = TUSB1064_I2C_ADDR10_FLAGS, .driver = &tusb1064_usb_mux_driver, + .board_set = &board_tusb1064_dp_rx_eq_set, } }; @@ -525,13 +546,13 @@ struct ioexpander_config_t ioex_config[] = { .drv = &tca64xxa_ioexpander_drv, .i2c_host_port = TCA6416A_PORT, .i2c_addr_flags = TCA6416A_ADDR, - .flags = TCA64XXA_FLAG_VER_TCA6416A + .flags = IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6416A }, [1] = { .drv = &tca64xxa_ioexpander_drv, .i2c_host_port = TCA6424A_PORT, .i2c_addr_flags = TCA6424A_ADDR, - .flags = TCA64XXA_FLAG_VER_TCA6424A + .flags = IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6424A } }; diff --git a/board/stern/board.h b/board/stern/board.h index 5bf23a6733..f682f2bb2b 100644 --- a/board/stern/board.h +++ b/board/stern/board.h @@ -85,7 +85,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/stryke/board.c b/board/stryke/board.c index 3275ff7fa9..525de7f69f 100644 --- a/board/stryke/board.c +++ b/board/stryke/board.c @@ -328,20 +328,25 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * for Stryke. They matter when the EC is controlling the fan as opposed to DPTF * control. */ -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/stryke/board.h b/board/stryke/board.h index d84a09fe36..9708f70518 100644 --- a/board/stryke/board.h +++ b/board/stryke/board.h @@ -16,7 +16,7 @@ #define CONFIG_LED_COMMON #define CONFIG_LOW_POWER_IDLE -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/taeko/board.c b/board/taeko/board.c index d7fe4e4399..c3b496d9ce 100644 --- a/board/taeko/board.c +++ b/board/taeko/board.c @@ -52,11 +52,10 @@ __override void board_cbi_init(void) static void board_chipset_resume(void) { /* Allow keyboard backlight to be enabled */ - - if (ec_cfg_has_keyboard_backlight() == 1) - gpio_set_level(GPIO_EC_KB_BL_EN_L, 1); - else + if (ec_cfg_has_keyboard_backlight() == 1) { + /* GPIO_EC_KB_BL_EN_L is low active pin */ gpio_set_level(GPIO_EC_KB_BL_EN_L, 0); + } } DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); @@ -64,11 +63,10 @@ DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); static void board_chipset_suspend(void) { /* Turn off the keyboard backlight if it's on. */ - - if (ec_cfg_has_keyboard_backlight() == 1) - gpio_set_level(GPIO_EC_KB_BL_EN_L, 0); - else + if (ec_cfg_has_keyboard_backlight() == 1) { + /* GPIO_EC_KB_BL_EN_L is low active pin */ gpio_set_level(GPIO_EC_KB_BL_EN_L, 1); + } } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); diff --git a/board/taeko/board.h b/board/taeko/board.h index 4ad7119e8c..66905bb82d 100644 --- a/board/taeko/board.h +++ b/board/taeko/board.h @@ -34,9 +34,18 @@ /* Sensors */ #define CONFIG_DYNAMIC_MOTION_SENSOR_COUNT + +/* Change Request (b/199529373) + * GYRO sensor change from ST LSM6DSOETR3TR to ST LSM6DS3TR-C + * LSM6DSOETR3TR base accel/gyro if board id = 0 + * LSM6DS3TR-C Base accel/gyro if board id > 0 + */ #define CONFIG_ACCELGYRO_LSM6DSO /* Base accel */ #define CONFIG_ACCEL_LSM6DSO_INT_EVENT \ TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) +#define CONFIG_ACCELGYRO_LSM6DSM +#define CONFIG_ACCEL_LSM6DSM_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) /* Enable sensor fifo, must also define the _SIZE and _THRES */ #define CONFIG_ACCEL_FIFO @@ -78,7 +87,7 @@ #define CONFIG_IO_EXPANDER_PORT_COUNT 1 #define CONFIG_USB_PD_TCPM_PS8815 - +#define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID #define CONFIG_USBC_PPC_SYV682X #define CONFIG_USBC_PPC_NX20P3483 @@ -91,7 +100,7 @@ * Passive USB-C cables only support up to 60W. */ #define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 +#define PD_MAX_POWER_MW 45000 #define PD_MAX_CURRENT_MA 3000 #define PD_MAX_VOLTAGE_MV 20000 @@ -161,10 +170,11 @@ /* Charger defines */ #define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 #define CONFIG_CHARGE_RAMP_SW -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 #ifndef __ASSEMBLER__ diff --git a/board/taeko/ec.tasklist b/board/taeko/ec.tasklist index 290c17c748..6d995d6b44 100644 --- a/board/taeko/ec.tasklist +++ b/board/taeko/ec.tasklist @@ -11,19 +11,20 @@ */ #define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/taeko/fw_config.h b/board/taeko/fw_config.h index 3632dd82a9..f53bf312af 100644 --- a/board/taeko/fw_config.h +++ b/board/taeko/fw_config.h @@ -35,16 +35,16 @@ union taeko_cbi_fw_config { uint32_t sd_db : 2; enum ec_cfg_keyboard_backlight_type kb_bl : 1; uint32_t audio : 3; + uint32_t reserved_1 : 6; /* b/194515356 - Fw config structure + * b/203630618 - Move tablet mode to bit14 * bit8-9: kb_layout * bit10-11: wifi_sar_id, * bit12: nvme * bit13: emmc - * bit14: fan */ - uint32_t reserved_1 : 7; enum ec_cfg_tabletmode_type tabletmode : 1; - uint32_t reserved_2 : 16; + uint32_t reserved_2 : 17; }; uint32_t raw_value; }; diff --git a/board/taeko/keyboard.c b/board/taeko/keyboard.c index a9f033130d..11d0e4ead8 100644 --- a/board/taeko/keyboard.c +++ b/board/taeko/keyboard.c @@ -4,7 +4,7 @@ */ #include "common.h" - +#include "ec_commands.h" #include "keyboard_scan.h" #include "timer.h" @@ -23,3 +23,26 @@ __override struct keyboard_scan_config keyscan_config = { 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ }, }; + +static const struct ec_response_keybd_config taeko_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config +*board_vivaldi_keybd_config(void) +{ + return &taeko_kb; +} diff --git a/board/taeko/sensors.c b/board/taeko/sensors.c index 979cdbb4c2..2643da35aa 100644 --- a/board/taeko/sensors.c +++ b/board/taeko/sensors.c @@ -9,6 +9,7 @@ #include "driver/accel_bma422.h" #include "driver/accel_bma4xx.h" #include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_lsm6dsm.h" #include "driver/accelgyro_lsm6dso.h" #include "fw_config.h" #include "hooks.h" @@ -62,24 +63,22 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); K_MUTEX_DEFINE(g_lid_accel_mutex); K_MUTEX_DEFINE(g_base_accel_mutex); static struct stprivate_data g_lis2dw12_data; -static struct lsm6dso_data lsm6dso_data; static struct accelgyro_saved_data_t g_bma422_data; +static struct lsm6dso_data lsm6dso_data; +static struct lsm6dsm_data lsm6dsm_data = LSM6DSM_DATA; -/* TODO(b/201504044): calibrate the orientation matrix on later board stage */ -#if 0 +/* (b/201504044): calibrate the orientation matrix on later board stage */ static const mat33_fp_t lid_standard_ref = { { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} }; static const mat33_fp_t base_standard_ref = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(-1)}, + { 0, FLOAT_TO_FP(-1), 0} }; -#endif - struct motion_sensor_t bma422_lid_accel = { .name = "Lid Accel - BMA", @@ -92,7 +91,7 @@ struct motion_sensor_t bma422_lid_accel = { .drv_data = &g_bma422_data, .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = BMA4_I2C_ADDR_PRIMARY, /* 0x18 */ - .rot_standard_ref = NULL, /* identity matrix */ + .rot_standard_ref = &lid_standard_ref, /* identity matrix */ .default_range = 2, /* g, enough for laptop. */ .min_frequency = BMA4_ACCEL_MIN_FREQ, .max_frequency = BMA4_ACCEL_MAX_FREQ, @@ -110,6 +109,57 @@ struct motion_sensor_t bma422_lid_accel = { }, }; +struct motion_sensor_t lsm6dsm_base_accel = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_accel_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, + MOTIONSENSE_TYPE_ACCEL), + .int_signal = GPIO_EC_IMU_INT_R_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, +}; + +struct motion_sensor_t lsm6dsm_base_gyro = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSM, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dsm_drv, + .mutex = &g_base_accel_mutex, + .drv_data = LSM6DSM_ST_DATA(lsm6dsm_data, MOTIONSENSE_TYPE_GYRO), + .int_signal = GPIO_EC_IMU_INT_R_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSM_ADDR0_FLAGS, + .default_range = 1000 | ROUND_UP_FLAG, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = LSM6DSM_ODR_MIN_VAL, + .max_frequency = LSM6DSM_ODR_MAX_VAL, +}; + struct motion_sensor_t motion_sensors[] = { [LID_ACCEL] = { .name = "Lid Accel - ST", @@ -124,7 +174,7 @@ struct motion_sensor_t motion_sensors[] = { .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LIS2DW12_ADDR1, /* 0x19 */ .flags = MOTIONSENSE_FLAG_INT_SIGNAL, - .rot_standard_ref = NULL, /* identity matrix */ + .rot_standard_ref = &lid_standard_ref, /* identity matrix */ .default_range = 2, /* g */ .min_frequency = LIS2DW12_ODR_MIN_VAL, .max_frequency = LIS2DW12_ODR_MAX_VAL, @@ -153,7 +203,7 @@ struct motion_sensor_t motion_sensors[] = { .flags = MOTIONSENSE_FLAG_INT_SIGNAL, .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .default_range = 4, /* g */ .min_frequency = LSM6DSO_ODR_MIN_VAL, .max_frequency = LSM6DSO_ODR_MAX_VAL, @@ -183,7 +233,7 @@ struct motion_sensor_t motion_sensors[] = { .port = I2C_PORT_SENSOR, .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, .default_range = 1000 | ROUND_UP_FLAG, /* dps */ - .rot_standard_ref = NULL, + .rot_standard_ref = &base_standard_ref, .min_frequency = LSM6DSO_ODR_MIN_VAL, .max_frequency = LSM6DSO_ODR_MAX_VAL, }, @@ -252,13 +302,23 @@ static void baseboard_sensors_init(void) * Dynamic motion sensor count * All board supports tablet mode if board id > 0 */ - if (get_board_id() > 0 || ec_cfg_has_tabletmode()) { + if (ec_cfg_has_tabletmode()) { /* * GPIO_EC_ACCEL_INT_R_L * The interrupt of lid accel is disabled by default. * We'll enable it later if lid accel is LIS2DW12. */ + /* Change Request (b/199529373) + * GYRO sensor change from ST LSM6DSOETR3TR to ST LSM6DS3TR-C + * LSM6DSOETR3TR base accel/gyro if board id = 0 + * LSM6DS3TR-C Base accel/gyro if board id > 0 + */ + if (get_board_id() > 0) { + motion_sensors[BASE_ACCEL] = lsm6dsm_base_accel; + motion_sensors[BASE_GYRO] = lsm6dsm_base_gyro; + } + /* Enable gpio interrupt for base accelgyro sensor */ gpio_enable_interrupt(GPIO_EC_IMU_INT_R_L); } else { @@ -328,17 +388,22 @@ BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (100 C) */ -static const struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(100), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * TODO(b/201021109): update for Alder Lake/brya @@ -353,24 +418,29 @@ static const struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 100c */ -static const struct ec_thermal_config thermal_fan = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(100), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(85), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(60), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_FAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_fan = THERMAL_FAN; /* this should really be "const" */ struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_2_FAN] = thermal_fan, - [TEMP_SENSOR_3_CHARGER] = thermal_fan, - [TEMP_SENSOR_4_CPUCHOKE] = thermal_fan, + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_FAN] = THERMAL_FAN, + [TEMP_SENSOR_3_CHARGER] = THERMAL_FAN, + [TEMP_SENSOR_4_CPUCHOKE] = THERMAL_FAN, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/terrador/board.c b/board/terrador/board.c index 5adc65fc70..d6378d6aaa 100644 --- a/board/terrador/board.c +++ b/board/terrador/board.c @@ -170,17 +170,22 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -193,24 +198,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/terrador/board.h b/board/terrador/board.h index 32a70d3f48..94466e7bd1 100644 --- a/board/terrador/board.h +++ b/board/terrador/board.h @@ -13,6 +13,7 @@ /* Free flash space */ #define CONFIG_USB_PD_DEBUG_LEVEL 2 +#undef CONFIG_CONSOLE_CMDHELP /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ diff --git a/board/tglrvp_ish/board.h b/board/tglrvp_ish/board.h index 03044a5bb8..12f4b5992a 100644 --- a/board/tglrvp_ish/board.h +++ b/board/tglrvp_ish/board.h @@ -35,7 +35,7 @@ #define CONFIG_ACCEL_FORCE_MODE_MASK BIT(BASE_ACCEL) /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI /* I2C ports */ #define I2C_PORT_SENSOR ISH_I2C1 diff --git a/board/tglrvpu_ite/gpio.inc b/board/tglrvpu_ite/gpio.inc index e0bce1ddd8..b84c92aac6 100644 --- a/board/tglrvpu_ite/gpio.inc +++ b/board/tglrvpu_ite/gpio.inc @@ -37,7 +37,7 @@ GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UAR GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* enable 1.8v input of EC's espi_reset pin, and then this pin takes effect. */ GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, espi_reset_pin_asserted_interrupt) /* eSPI_reset# */ #endif @@ -75,7 +75,7 @@ GPIO(EC_PCH_DSW_PWROK, PIN(L, 6), GPIO_OUT_LOW) /* Host communication GPIOs */ GPIO(PCH_WAKE_L, PIN(J, 0), GPIO_ODR_HIGH) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO(PCH_PLTRST_L, PIN(E, 3), GPIO_INPUT | GPIO_PULL_UP) #endif @@ -165,7 +165,7 @@ GPIO(NC_USB_C1_RETIMER_ALRT, PIN(G, 0), GPIO_INPUT) /* Used if Base EC is present */ GPIO(NC_EC_BASE_DET, PIN(I, 3), GPIO_INPUT) -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI GPIO_INT(ESPI_RESET_L, PIN(D, 2), GPIO_INPUT) #endif diff --git a/board/todor/board.c b/board/todor/board.c deleted file mode 100644 index c4e2395adc..0000000000 --- a/board/todor/board.c +++ /dev/null @@ -1,440 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board-specific configuration */ -#include "button.h" -#include "common.h" -#include "accelgyro.h" -#include "cbi_ec_fw_config.h" -#include "driver/accel_bma2x2.h" -#include "driver/accelgyro_bmi260.h" -#include "driver/als_tcs3400.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/ppc/syv682x.h" -#include "driver/tcpm/tcpci.h" -#include "driver/tcpm/tusb422.h" -#include "driver/retimer/bb_retimer_public.h" -#include "driver/sync.h" -#include "extpower.h" -#include "fan.h" -#include "fan_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "tablet_mode.h" -#include "throttle_ap.h" -#include "uart.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usb_pd_tbt.h" -#include "usb_pd_tcpm.h" -#include "usbc_ppc.h" -#include "util.h" - -#include "gpio_list.h" /* Must come after other header files. */ - -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) - -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - /* Increase from 50 us, because KSO_02 passes through the H1. */ - .output_settle_us = 80, - /* Other values should be the same as the default configuration. */ - .debounce_down_us = 9 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ - }, -}; - -/******************************************************************************/ -/* - * FW_CONFIG defaults for Todor if the CBI data is not initialized. - */ -union volteer_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_PASSIVE, -}; - -static void board_init(void) -{ - -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) -{ - /* Routing length exceeds 205mm prior to connection to re-timer */ - if (port == USBC_PORT_C1) - return TBT_SS_U32_GEN1_GEN2; - - /* - * Thunderbolt-compatible mode not supported - * - * TODO (b/147726366): All the USB-C ports need to support same speed. - * Need to fix once USB-C feature set is known for Volteer. - */ - return TBT_SS_RES_0; -} - -__override bool board_is_tbt_usb4_port(int port) -{ - /* - * On Proto-1 only Port 1 supports TBT & USB4 - * - * TODO (b/147732807): All the USB-C ports need to support same - * features. Need to fix once USB-C feature set is known for Volteer. - */ - return port == USBC_PORT_C1; -} - -/******************************************************************************/ -/* I2C port map configuration */ -const struct i2c_port_t i2c_ports[] = { - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C0_SENSOR_SCL, - .sda = GPIO_EC_I2C0_SENSOR_SDA, - }, - { - .name = "usb_c0", - .port = I2C_PORT_USB_C0, - .kbps = 1000, - .scl = GPIO_EC_I2C1_USB_C0_SCL, - .sda = GPIO_EC_I2C1_USB_C0_SDA, - }, - { - .name = "usb_c1", - .port = I2C_PORT_USB_C1, - .kbps = 1000, - .scl = GPIO_EC_I2C2_USB_C1_SCL, - .sda = GPIO_EC_I2C2_USB_C1_SDA, - }, - { - .name = "usb_0_mix", - .port = I2C_PORT_USB_0_MIX, - .kbps = 100, - .scl = GPIO_EC_I2C3_USB_0_MIX_SCL, - .sda = GPIO_EC_I2C3_USB_0_MIX_SDA, - }, - { - .name = "usb_1_mix", - .port = I2C_PORT_USB_1_MIX, - .kbps = 100, - .scl = GPIO_EC_I2C4_USB_1_MIX_SCL, - .sda = GPIO_EC_I2C4_USB_1_MIX_SDA, - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 100, - .scl = GPIO_EC_I2C5_POWER_SCL, - .sda = GPIO_EC_I2C5_POWER_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C7_EEPROM_SCL, - .sda = GPIO_EC_I2C7_EEPROM_SDA, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/******************************************************************************/ -/* PWM configuration */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1_BLUE] = { - .channel = 2, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED2_GREEN] = { - .channel = 0, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED3_RED] = { - .channel = 1, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_KBLIGHT] = { - .channel = 3, - .flags = 0, - /* - * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent - * flicker. Higher frequencies consume similar average power to - * lower PWM frequencies, but higher frequencies record a much - * lower maximum power. - */ - .freq = 2400, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -/******************************************************************************/ -/* EC thermal management configuration */ - -/* - * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at - * 130 C. However, sensor is located next to DDR, so we need to use the lower - * DDR temperature limit (85 C) - */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; - -/* - * Inductor limits - used for both charger and PP3300 regulator - * - * Need to use the lower of the charger IC, PP3300 regulator, and the inductors - * - * Charger max recommended temperature 100C, max absolute temperature 125C - * PP3300 regulator: operating range -40 C to 145 C - * - * Inductors: limit of 125c - * PCB: limit is 80c - */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - - -struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -/******************************************************************************/ - -static void kb_backlight_enable(void) -{ - gpio_set_level(GPIO_EC_KB_BL_EN, 1); -} -DECLARE_HOOK(HOOK_CHIPSET_RESUME, kb_backlight_enable, HOOK_PRIO_DEFAULT); - -static void kb_backlight_disable(void) -{ - gpio_set_level(GPIO_EC_KB_BL_EN, 0); -} -DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, kb_backlight_disable, HOOK_PRIO_DEFAULT); - -void board_reset_pd_mcu(void) -{ - /* TODO(b/159025015): Terrador: check USB PD reset operation */ -} - -/* USBC mux configuration - Tiger Lake includes internal mux */ -struct usb_mux usbc0_usb4_mb_retimer = { - .usb_port = USBC_PORT_C0, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_0_MIX, - .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, -}; -/***************************************************************************** - * USB-C MUX/Retimer dynamic configuration. - */ -static void setup_mux(void) -{ - CPRINTS("C0 supports bb-retimer"); - /* USB-C port 0 have a retimer */ - usb_muxes[USBC_PORT_C0].next_mux = &usbc0_usb4_mb_retimer; -} - -__override void board_cbi_init(void) -{ - /* - * TODO(b/159025015): Terrador: check FW_CONFIG fields for USB DB type - */ - setup_mux(); - /* Reassign USB_C0_RT_RST_ODL */ - bb_controls[USBC_PORT_C0].usb_ls_en_gpio = GPIO_USB_C0_LS_EN; - bb_controls[USBC_PORT_C0].retimer_rst_gpio = GPIO_USB_C0_RT_RST_ODL; - -} - -/******************************************************************************/ -/* USBC PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/******************************************************************************/ -/* PPC support routines */ -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C0); - break; - case GPIO_USB_C1_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C1); - default: - break; - } -} - -/******************************************************************************/ -/* BC1.2 charger detect configuration */ -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC TCPC configuration */ -struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC mux configuration - Tiger Lake includes internal mux */ -struct usb_mux usbc1_tcss_usb_mux = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; - -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .next_mux = &usbc1_tcss_usb_mux, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); - -struct bb_usb_control bb_controls[] = { - [USBC_PORT_C0] = { - /* USB-C port 0 doesn't have a retimer */ - }, - [USBC_PORT_C1] = { - .usb_ls_en_gpio = GPIO_USB_C1_LS_EN, - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_ODL, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(bb_controls) == USBC_PORT_COUNT); - -static void board_tcpc_init(void) -{ - /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - - /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); - -/******************************************************************************/ -/* TCPC support routines */ -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set - */ - if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -int ppc_get_alert_status(int port) -{ - if (port == USBC_PORT_C0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; -} diff --git a/board/todor/board.h b/board/todor/board.h deleted file mode 100644 index 0076f37307..0000000000 --- a/board/todor/board.h +++ /dev/null @@ -1,180 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Baseboard features */ -#include "baseboard.h" - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ - -#define CONFIG_VBOOT_EFS2 - -#define CONFIG_POWER_BUTTON - -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* LED defines */ -#define CONFIG_LED_PWM -/* Although there are 2 LEDs, they are both controlled by the same lines. */ -#define CONFIG_LED_PWM_COUNT 1 - -/* Keyboard features */ - -/* Sensors */ -/* BMA253 accelerometer in base */ -#define CONFIG_ACCEL_BMA255 - -/* BMI260 accel/gyro in base */ -#define CONFIG_ACCELGYRO_BMI260 -#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) - -/* TCS3400 ALS */ -#define CONFIG_ALS -#define ALS_COUNT 1 -#define CONFIG_ALS_TCS3400 -#define CONFIG_ALS_TCS3400_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) - -/* Sensors without hardware FIFO are in forced mode */ -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - (BIT(LID_ACCEL) | BIT(CLEAR_ALS)) - -#define CONFIG_LID_ANGLE -#define CONFIG_LID_ANGLE_UPDATE -#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL -#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL - -/* USB Type C and USB PD defines */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 - -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ - -/* - * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C - * cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* Enabling Thunderbolt-compatible mode */ -#define CONFIG_USB_PD_TBT_COMPAT_MODE - -/* Enabling USB4 mode */ -#define CONFIG_USB_PD_USB4 -#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x40 -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x40 - -/* USB Type A Features */ - -/* USBC PPC*/ -#define CONFIG_USBC_PPC_SYV682X /* USBC port C0/C1 */ - -/* BC 1.2 */ - -/* Volume Button feature */ - -/* Fan features */ -#undef CONFIG_FANS - -/* charger defines */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -/* - * Macros for GPIO signals used in common code that don't match the - * schematic names. Signal names in gpio.inc match the schematic and are - * then redefined here to so it's more clear which signal is being used for - * which purpose. - */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PACKET_MODE_EN GPIO_UART2_EC_RX -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_L -#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL -#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL -#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define I2C_PORT_ACCEL I2C_PORT_SENSOR -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_0_MIX NPCX_I2C_PORT3_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT4_1 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 - -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_EEPROM - -#define I2C_ADDR_EEPROM_FLAGS 0x50 -#define CONFIG_I2C_CONTROLLER - - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_LGC011, - BATTERY_LGC_AP18C8K, - BATTERY_TYPE_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED1_BLUE = 0, - PWM_CH_LED2_GREEN, - PWM_CH_LED3_RED, - PWM_CH_KBLIGHT, - PWM_CH_COUNT -}; - -enum sensor_id { - LID_ACCEL = 0, - BASE_ACCEL, - BASE_GYRO, - CLEAR_ALS, - RGB_ALS, - SENSOR_COUNT, -}; - -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; - -void board_reset_pd_mcu(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/todor/build.mk b/board/todor/build.mk deleted file mode 100644 index b78172d3cf..0000000000 --- a/board/todor/build.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m6fc -BASEBOARD:=volteer - -board-y=board.o -board-y+=battery.o -board-y+=led.o -board-y+=sensors.o diff --git a/board/todor/ec.tasklist b/board/todor/ec.tasklist deleted file mode 100644 index 292de51cdb..0000000000 --- a/board/todor/ec.tasklist +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/todor/gpio.inc b/board/todor/gpio.inc deleted file mode 100644 index 270ce49a3d..0000000000 --- a/board/todor/gpio.inc +++ /dev/null @@ -1,170 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) -#endif -GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(EC_IMU_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi260_interrupt) -GPIO_INT(EC_ALS_RGB_INT_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) -GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) - -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) - -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) - -/* HDMI interrupts */ - -/* Volume button interrupts */ -GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) - -/* Power Sequencing Signals */ -GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW) -GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */ -/* The EC does not buffer this signal on Volteer. */ -UNIMPLEMENTED(PCH_DSW_PWROK) - -/* Other wake sources */ -/* - * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an - * interrupt handler because it is automatically handled by the PSL. - * - * We need to lock the setting so this gpio can't be reconfigured to overdrive - * the real reset signal. (This is the PSL input pin not the real reset pin). - */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | - GPIO_HIB_WAKE_HIGH | - GPIO_LOCKED) - -/* AP/PCH Signals */ -GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */ -GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) -GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_ODL, PIN(7, 4), GPIO_ODR_HIGH) -GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) -GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) -GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) - -GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) - -/* USB and USBC Signals */ - -/* - * USB_C1 moved from GPIO32 to GPIO83 on boards with board ID >=1. - * GPIO83/EN_PP1800_A is DNS on board ID 0 and GPIO32 is N/C on board ID >=1 - * so it's safe to define GPIOs compatible with both designs. - * TODO (b/149858568): remove board ID=0 support. - */ -GPIO(USB_C0_RT_RST_ODL, PIN(6, 1), GPIO_ODR_LOW) /* USB_C0 Reset */ -GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) /* USB_C1 Reset */ -GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) -GPIO(USB_C0_FRS_EN, PIN(6, 0), GPIO_OUT_LOW) -GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) - -/* Don't have a load switch for retimer */ -UNIMPLEMENTED(USB_C0_LS_EN) -UNIMPLEMENTED(USB_C1_LS_EN) - -/* Misc Signals */ -GPIO(UART2_EC_RX, PIN(7, 5), GPIO_OUT_LOW) /* H1 Packet Mode */ -GPIO(EC_KB_BL_EN, PIN(8, 6), GPIO_OUT_LOW) /* Keyboard backlight enable*/ -GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) /* Case Closed Debug Mode */ - -/* - * eDP backlight - both PCH and EC have enable pins that must be high - * for the backlight to turn on. Default state is high, and can be turned - * off during sleep states. - */ -GPIO(EC_EDP_BL_EN, PIN(D, 3), GPIO_OUT_HIGH) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(EC_I2C0_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C0_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_0_MIX_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_0_MIX_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C4_USB_1_MIX_SCL, PIN(F, 3), GPIO_INPUT) -GPIO(EC_I2C4_USB_1_MIX_SDA, PIN(F, 2), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SDA, PIN(B, 2), GPIO_INPUT) - -/* Battery signals */ -GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) - -/* Physical HPD pins are not needed on EC as these are configured by PMC */ -GPIO(USB_C0_DP_HPD, PIN(B, 7), GPIO_INPUT) -GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 */ -ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE(PIN_MASK(F, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C4 */ -ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ - -/* This selects between an LED module on the motherboard and one on the daughter - * board, to be controlled by LED_{1,2,3}_L. PWM allows driving both modules at - * the same time. */ -ALTERNATE(PIN_MASK(C, BIT(2) | BIT(3) | BIT(4)), 0, MODULE_PWM, 0) /* LED_{3,2,1}_L */ - -/* Keyboard pins */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ -GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 */ -ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ -ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ -ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_KB_BL_PWM */ - -/* UART */ -ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0) /* UART from EC to Servo */ - -/* Power Switch Logic (PSL) inputs */ -ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* GPIOD2 = EC_LID_OPEN */ -ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, - GPIO01 = H1_EC_PWR_BTN_ODL - GPIO02 = EC_RST_ODL */ - -/* Temperature sensors */ -ALTERNATE(PIN_MASK(4, BIT(2) | BIT(4) | BIT(5)), 0, MODULE_ADC, 0) /* TEMP_SENSOR1,2,4 */ -ALTERNATE(PIN_MASK(F, BIT(1)), 0, MODULE_ADC, 0) /* TEMP_SENSOR3 */ diff --git a/board/todor/led.c b/board/todor/led.c deleted file mode 100644 index 31d1c6fe20..0000000000 --- a/board/todor/led.c +++ /dev/null @@ -1,77 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control for Volteer - */ - -#include "common.h" -#include "ec_commands.h" -#include "led_common.h" -#include "led_pwm.h" -#include "pwm.h" - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_POWER_LED, -}; -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -struct pwm_led_color_map led_color_map[] = { - /* Red, Green, Blue */ - [EC_LED_COLOR_RED] = { 100, 0, 0 }, - [EC_LED_COLOR_GREEN] = { 0, 100, 0 }, - [EC_LED_COLOR_BLUE] = { 0, 0, 100 }, - /* The green LED seems to be brighter than the others, so turn down - * green from its natural level for these secondary colors. - */ - [EC_LED_COLOR_YELLOW] = { 100, 70, 0 }, - [EC_LED_COLOR_WHITE] = { 100, 70, 100 }, - [EC_LED_COLOR_AMBER] = { 100, 20, 0 }, -}; - -struct pwm_led pwm_leds[] = { - /* 2 RGB diffusers controlled by 1 set of 3 channels. */ - [PWM_LED0] = { - .ch0 = PWM_CH_LED3_RED, - .ch1 = PWM_CH_LED2_GREEN, - .ch2 = PWM_CH_LED1_BLUE, - .enable = &pwm_enable, - .set_duty = &pwm_set_duty, - }, -}; - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - brightness_range[EC_LED_COLOR_RED] = 255; - brightness_range[EC_LED_COLOR_GREEN] = 255; - brightness_range[EC_LED_COLOR_BLUE] = 255; -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - enum pwm_led_id pwm_id; - - /* Convert ec_led_id to pwm_led_id. */ - if (led_id == EC_LED_ID_POWER_LED) - pwm_id = PWM_LED0; - else - return EC_ERROR_UNKNOWN; - - if (brightness[EC_LED_COLOR_RED]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_RED); - else if (brightness[EC_LED_COLOR_GREEN]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN); - else if (brightness[EC_LED_COLOR_BLUE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_BLUE); - else if (brightness[EC_LED_COLOR_YELLOW]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_YELLOW); - else if (brightness[EC_LED_COLOR_WHITE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); - else if (brightness[EC_LED_COLOR_AMBER]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); - else - /* Otherwise, the "color" is "off". */ - set_pwm_led_color(pwm_id, -1); - - return EC_SUCCESS; -} diff --git a/board/todor/sensors.c b/board/todor/sensors.c deleted file mode 100644 index 9997591cb6..0000000000 --- a/board/todor/sensors.c +++ /dev/null @@ -1,226 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer family-specific sensor configuration */ -#include "common.h" -#include "accelgyro.h" -#include "driver/accel_bma2x2.h" -#include "driver/accelgyro_bmi_common.h" -#include "driver/accelgyro_bmi260.h" -#include "driver/als_tcs3400.h" -#include "driver/sync.h" -#include "keyboard_scan.h" -#include "hooks.h" -#include "i2c.h" -#include "task.h" -#include "tablet_mode.h" -#include "util.h" - -/******************************************************************************/ -/* Sensors */ -static struct mutex g_lid_accel_mutex; -static struct mutex g_base_mutex; - -/* BMA253 private data */ -static struct accelgyro_saved_data_t g_bma253_data; - -/* BMI260 private data */ -static struct bmi_drv_data_t g_bmi260_data; - -/* TCS3400 private data */ -static struct als_drv_data_t g_tcs3400_data = { - .als_cal.scale = 1, - .als_cal.uscale = 0, - .als_cal.offset = 0, - .als_cal.channel_scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc from VPD */ - .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */ - }, -}; - -/* - * TODO: b/146166425 need to calibrate ALS/RGB sensor. At default settings, - * shining phone flashlight on sensor pegs all readings at 0xFFFF. - */ -static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = { - .calibration.rgb_cal[X] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - } - }, - .calibration.rgb_cal[Y] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - }, - }, - .calibration.rgb_cal[Z] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - } - }, - .calibration.irt = INT_TO_FP(1), - .saturation.again = TCS_DEFAULT_AGAIN, - .saturation.atime = TCS_DEFAULT_ATIME, -}; - -/* Rotation matrix for the lid accelerometer */ -static const mat33_fp_t lid_standard_ref = { - { FLOAT_TO_FP(1), 0, 0}, - { 0, FLOAT_TO_FP(-1), 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -const mat33_fp_t base_standard_ref = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(1)} -}; - -struct motion_sensor_t motion_sensors[] = { - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMA255, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &bma2x2_accel_drv, - .mutex = &g_lid_accel_mutex, - .drv_data = &g_bma253_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS, - .rot_standard_ref = &lid_standard_ref, - .min_frequency = BMA255_ACCEL_MIN_FREQ, - .max_frequency = BMA255_ACCEL_MAX_FREQ, - .default_range = 2, /* g, to support tablet mode */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - [BASE_ACCEL] = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI260, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi260_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi260_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_ACCEL_MIN_FREQ, - .max_frequency = BMI_ACCEL_MAX_FREQ, - .default_range = 4, /* g */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - }, - }, - - [BASE_GYRO] = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI260, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi260_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi260_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, - .default_range = 1000, /* dps */ - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_GYRO_MIN_FREQ, - .max_frequency = BMI_GYRO_MAX_FREQ, - }, - [CLEAR_ALS] = { - .name = "Clear Light", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_TCS3400, - .type = MOTIONSENSE_TYPE_LIGHT, - .location = MOTIONSENSE_LOC_BASE, - .drv = &tcs3400_drv, - .drv_data = &g_tcs3400_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1x, uscale = 0 */ - .min_frequency = TCS3400_LIGHT_MIN_FREQ, - .max_frequency = TCS3400_LIGHT_MAX_FREQ, - .config = { - /* Run ALS sensor in S0 */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 1000, - }, - }, - }, - - [RGB_ALS] = { - /* - * RGB channels read by CLEAR_ALS and so the i2c port and - * address do not need to be defined for RGB_ALS. - */ - .name = "RGB Light", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_TCS3400, - .type = MOTIONSENSE_TYPE_LIGHT_RGB, - .location = MOTIONSENSE_LOC_BASE, - .drv = &tcs3400_rgb_drv, - .drv_data = &g_tcs3400_rgb_data, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1x, uscale = 0 */ - }, -}; -unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */ -const struct motion_sensor_t *motion_als_sensors[] = { - &motion_sensors[CLEAR_ALS], -}; -BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); - -static void baseboard_sensors_init(void) -{ - /* Note - BMA253 interrupt unused by EC */ - - /* Enable interrupt for the TCS3400 color light sensor */ - gpio_enable_interrupt(GPIO_EC_ALS_RGB_INT_L); - /* Enable interrupt for the BMI260 accel/gyro sensor */ - gpio_enable_interrupt(GPIO_EC_IMU_INT_L); -} -DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_DEFAULT); diff --git a/board/todor/vif_override.xml b/board/todor/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/todor/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/trembyle/board.c b/board/trembyle/board.c index 89a62f3411..3e6a561dc6 100644 --- a/board/trembyle/board.c +++ b/board/trembyle/board.c @@ -447,29 +447,40 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_thermistor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(92), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(58), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_THERMISTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(92), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(58), \ + } +__maybe_unused static const struct ec_thermal_config thermal_thermistor = + THERMAL_THERMISTOR; -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - [EC_TEMP_THRESH_HALT] = C_TO_K(92), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(80), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(58), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(92), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(58), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/trondo/battery.c b/board/trondo/battery.c deleted file mode 100644 index 9b356a8efd..0000000000 --- a/board/trondo/battery.c +++ /dev/null @@ -1,68 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery pack vendor provided charging profile - */ - -#include "battery_fuel_gauge.h" -#include "common.h" -#include "util.h" - -/* - * Battery info for all Volteer battery types. Note that the fields - * start_charging_min/max and charging_min/max are not used for the charger. - * The effective temperature limits are given by discharging_min/max_c. - * - * Fuel Gauge (FG) parameters which are used for determining if the battery - * is connected, the appropriate ship mode (battery cutoff) command, and the - * charge/discharge FETs status. - * - * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery - * register. For some batteries, the charge/discharge FET bits are set when - * charging/discharging is active, in other types, these bits set mean that - * charging/discharging is disabled. Therefore, in addition to the mask for - * these bits, a disconnect value must be specified. Note that for TI fuel - * gauge, the charge/discharge FET status is found in Operation Status (0x54), - * but a read of Manufacturer Access (0x00) will return the lower 16 bits of - * Operation status which contains the FET status bits. - * - * The assumption for battery types supported is that the charge/discharge FET - * status can be read with a sb_read() command and therefore, only the register - * address, mask, and disconnect value need to be provided. - */ -const struct board_batt_params board_battery_info[] = { - /* LGC\011 L17L3PB0 Battery Information */ - /* - * Battery info provided by ODM on b/143477210, comment #11 - */ - [BATTERY_LGC011] = { - .fuel_gauge = { - .manuf_name = "LGC", - .ship_mode = { - .reg_addr = 0x00, - .reg_data = { 0x10, 0x10 }, - }, - .fet = { - .reg_addr = 0x0, - .reg_mask = 0x6000, - .disconnect_val = 0x6000, - } - }, - .batt_info = { - .voltage_max = TARGET_WITH_MARGIN(13200, 5), - .voltage_normal = 11550, /* mV */ - .voltage_min = 9000, /* mV */ - .precharge_current = 256, /* mA */ - .start_charging_min_c = 0, - .start_charging_max_c = 45, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = 0, - .discharging_max_c = 75, - }, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); - -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_LGC011; diff --git a/board/trondo/board.c b/board/trondo/board.c deleted file mode 100644 index 0493c603e0..0000000000 --- a/board/trondo/board.c +++ /dev/null @@ -1,450 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board-specific configuration */ -#include "button.h" -#include "common.h" -#include "accelgyro.h" -#include "cbi_ec_fw_config.h" -#include "driver/accel_bma2x2.h" -#include "driver/accelgyro_bmi260.h" -#include "driver/als_tcs3400.h" -#include "driver/bc12/pi3usb9201.h" -#include "driver/ppc/sn5s330.h" -#include "driver/ppc/syv682x.h" -#include "driver/tcpm/tcpci.h" -#include "driver/tcpm/tusb422.h" -#include "driver/retimer/bb_retimer_public.h" -#include "driver/sync.h" -#include "extpower.h" -#include "fan.h" -#include "fan_chip.h" -#include "gpio.h" -#include "hooks.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "power.h" -#include "power_button.h" -#include "pwm.h" -#include "pwm_chip.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "tablet_mode.h" -#include "throttle_ap.h" -#include "uart.h" -#include "usb_mux.h" -#include "usb_pd.h" -#include "usb_pd_tbt.h" -#include "usb_pd_tcpm.h" -#include "usbc_ppc.h" -#include "util.h" - -#include "gpio_list.h" /* Must come after other header files. */ - -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) - -/* Keyboard scan setting */ -__override struct keyboard_scan_config keyscan_config = { - /* Increase from 50 us, because KSO_02 passes through the H1. */ - .output_settle_us = 80, - /* Other values should be the same as the default configuration. */ - .debounce_down_us = 9 * MSEC, - .debounce_up_us = 30 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ - }, -}; - -/******************************************************************************/ -/* - * FW_CONFIG defaults for Trondo if the CBI data is not initialized. - */ -union volteer_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_PASSIVE, -}; - -static void board_init(void) -{ - /* Illuminate motherboard and daughter board LEDs equally to start. */ - pwm_enable(PWM_CH_LED4_SIDESEL, 1); - pwm_set_duty(PWM_CH_LED4_SIDESEL, 50); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) -{ - /* Routing length exceeds 205mm prior to connection to re-timer */ - if (port == USBC_PORT_C1) - return TBT_SS_U32_GEN1_GEN2; - - /* - * Thunderbolt-compatible mode not supported - * - * TODO (b/147726366): All the USB-C ports need to support same speed. - * Need to fix once USB-C feature set is known for Volteer. - */ - return TBT_SS_RES_0; -} - -__override bool board_is_tbt_usb4_port(int port) -{ - /* - * On Proto-1 only Port 1 supports TBT & USB4 - * - * TODO (b/147732807): All the USB-C ports need to support same - * features. Need to fix once USB-C feature set is known for Volteer. - */ - return port == USBC_PORT_C1; -} - -/******************************************************************************/ -/* Physical fans. These are logically separate from pwm_channels. */ - -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = MFT_CH_0, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = GPIO_EN_PP5000_FAN, -}; - -/* - * Fan specs from datasheet: - * Max speed 5900 rpm (+/- 7%), minimum duty cycle 30%. - * Minimum speed not specified by RPM. Set minimum RPM to max speed (with - * margin) x 30%. - * 5900 x 1.07 x 0.30 = 1894, round up to 1900 - */ -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1900, - .rpm_start = 1900, - .rpm_max = 5900, -}; - -const struct fan_t fans[FAN_CH_COUNT] = { - [FAN_CH_0] = { - .conf = &fan_conf_0, - .rpm = &fan_rpm_0, - }, -}; - -/******************************************************************************/ -/* EC thermal management configuration */ - -/* - * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at - * 130 C. However, sensor is located next to DDR, so we need to use the lower - * DDR temperature limit (85 C) - */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; - -/* - * Inductor limits - used for both charger and PP3300 regulator - * - * Need to use the lower of the charger IC, PP3300 regulator, and the inductors - * - * Charger max recommended temperature 100C, max absolute temperature 125C - * PP3300 regulator: operating range -40 C to 145 C - * - * Inductors: limit of 125c - * PCB: limit is 80c - */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - - -struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, -}; -BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); - -/******************************************************************************/ -/* MFT channels. These are logically separate from pwm_channels. */ -const struct mft_t mft_channels[] = { - [MFT_CH_0] = { - .module = NPCX_MFT_MODULE_1, - .clk_src = TCKC_LFCLK, - .pwm_id = PWM_CH_FAN, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); - -/******************************************************************************/ -/* I2C port map configuration */ -const struct i2c_port_t i2c_ports[] = { - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C0_SENSOR_SCL, - .sda = GPIO_EC_I2C0_SENSOR_SDA, - }, - { - .name = "usb_c0", - .port = I2C_PORT_USB_C0, - .kbps = 1000, - .scl = GPIO_EC_I2C1_USB_C0_SCL, - .sda = GPIO_EC_I2C1_USB_C0_SDA, - }, - { - .name = "usb_c1", - .port = I2C_PORT_USB_C1, - .kbps = 1000, - .scl = GPIO_EC_I2C2_USB_C1_SCL, - .sda = GPIO_EC_I2C2_USB_C1_SDA, - }, - { - .name = "usb_1_mix", - .port = I2C_PORT_USB_1_MIX, - .kbps = 100, - .scl = GPIO_EC_I2C3_USB_1_MIX_SCL, - .sda = GPIO_EC_I2C3_USB_1_MIX_SDA, - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 100, - .scl = GPIO_EC_I2C5_POWER_SCL, - .sda = GPIO_EC_I2C5_POWER_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C7_EEPROM_SCL, - .sda = GPIO_EC_I2C7_EEPROM_SDA, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/******************************************************************************/ -/* PWM configuration */ -const struct pwm_t pwm_channels[] = { - [PWM_CH_LED1_BLUE] = { - .channel = 2, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED2_GREEN] = { - .channel = 0, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED3_RED] = { - .channel = 1, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - .freq = 2400, - }, - [PWM_CH_LED4_SIDESEL] = { - .channel = 7, - .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, - /* Run at a higher frequency than the color PWM signals to avoid - * timing-based color shifts. - */ - .freq = 4800, - }, - [PWM_CH_FAN] = { - .channel = 5, - .flags = PWM_CONFIG_OPEN_DRAIN, - .freq = 25000 - }, - [PWM_CH_KBLIGHT] = { - .channel = 3, - .flags = 0, - /* - * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent - * flicker. Higher frequencies consume similar average power to - * lower PWM frequencies, but higher frequencies record a much - * lower maximum power. - */ - .freq = 2400, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); - -void board_reset_pd_mcu(void) -{ - /* TODO(b/159025023): Trondo: check USB PD reset operation */ -} - -__override void board_cbi_init(void) -{ - /* TODO(b/159025023): Trondo: check FW_CONFIG fields for USB DB type */ -} - -/******************************************************************************/ -/* USBC PPC configuration */ -struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -/******************************************************************************/ -/* PPC support routines */ -void ppc_interrupt(enum gpio_signal signal) -{ - switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - sn5s330_interrupt(USBC_PORT_C0); - break; - case GPIO_USB_C1_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C1); - default: - break; - } -} - -/******************************************************************************/ -/* BC1.2 charger detect configuration */ -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - [USBC_PORT_C1] = { - .i2c_port = I2C_PORT_USB_C1, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC TCPC configuration */ -struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, - [USBC_PORT_C1] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C1, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, - }, - .drv = &tusb422_tcpm_drv, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); -BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); - -/******************************************************************************/ -/* USBC mux configuration - Tiger Lake includes internal mux */ -struct usb_mux usbc1_tcss_usb_mux = { - .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, -}; -struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - }, - [USBC_PORT_C1] = { - .usb_port = USBC_PORT_C1, - .next_mux = &usbc1_tcss_usb_mux, - .driver = &bb_usb_retimer, - .hpd_update = bb_retimer_hpd_update, - .i2c_port = I2C_PORT_USB_1_MIX, - .i2c_addr_flags = USBC_PORT_C1_BB_RETIMER_I2C_ADDR, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); - -struct bb_usb_control bb_controls[] = { - [USBC_PORT_C0] = { - /* USB-C port 0 doesn't have a retimer */ - }, - [USBC_PORT_C1] = { - .usb_ls_en_gpio = GPIO_USB_C1_LS_EN, - .retimer_rst_gpio = GPIO_USB_C1_RT_RST_ODL, - }, -}; -BUILD_ASSERT(ARRAY_SIZE(bb_controls) == USBC_PORT_COUNT); - -static void board_tcpc_init(void) -{ - /* Don't reset TCPCs after initial reset */ - if (!system_jumped_late()) - board_reset_pd_mcu(); - - /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - - /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - - /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); -} -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); - -/******************************************************************************/ -/* TCPC support routines */ -uint16_t tcpc_get_alert_status(void) -{ - uint16_t status = 0; - - /* - * Check which port has the ALERT line set - */ - if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_0; - if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) - status |= PD_STATUS_TCPC_ALERT_1; - - return status; -} - -int ppc_get_alert_status(int port) -{ - if (port == USBC_PORT_C0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; -} diff --git a/board/trondo/board.h b/board/trondo/board.h deleted file mode 100644 index f76762a64e..0000000000 --- a/board/trondo/board.h +++ /dev/null @@ -1,180 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer board configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* Baseboard features */ -#include "baseboard.h" - -/* Optional features */ -#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ - -/* Reduce flash usage */ -#undef CONFIG_CONSOLE_CMDHELP -#define CONFIG_USB_PD_DEBUG_LEVEL 2 - -#define CONFIG_POWER_BUTTON - -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 - -/* LED defines */ -#define CONFIG_LED_PWM -/* Although there are 2 LEDs, they are both controlled by the same lines. */ -#define CONFIG_LED_PWM_COUNT 1 - -/* Keyboard features */ - -/* Sensors */ -/* BMA253 accelerometer in base */ -#define CONFIG_ACCEL_BMA255 - -/* BMI260 accel/gyro in base */ -#define CONFIG_ACCELGYRO_BMI260 -#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) - -/* TCS3400 ALS */ -#define CONFIG_ALS -#define ALS_COUNT 1 -#define CONFIG_ALS_TCS3400 -#define CONFIG_ALS_TCS3400_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) - -/* Sensors without hardware FIFO are in forced mode */ -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - (BIT(LID_ACCEL) | BIT(CLEAR_ALS)) - -/* USB Type C and USB PD defines */ -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 - -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ - -/* - * SN5S30 PPC supports up to 24V VBUS source and sink, however passive USB-C - * cables only support up to 60W. - */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -/* Enabling Thunderbolt-compatible mode */ -#define CONFIG_USB_PD_TBT_COMPAT_MODE - -/* Enabling USB4 mode */ -#define CONFIG_USB_PD_USB4 -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x40 - -/* USB Type A Features */ - -/* USBC PPC*/ -#define CONFIG_USBC_PPC_SN5S330 /* USBC port C0 */ -#define CONFIG_USBC_PPC_SYV682X /* USBC port C1 */ - -/* BC 1.2 */ - -/* Volume Button feature */ -/* - * TODO (b/149858568): remove CONFIG_BUTTONS_RUNTIME_CONFIG once board ID=0 - * support is stripped. - */ -#define CONFIG_BUTTONS_RUNTIME_CONFIG - -/* Fan features */ - -/* charger defines */ -#define CONFIG_CHARGER_SENSE_RESISTOR 10 -#define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 - -/* - * Macros for GPIO signals used in common code that don't match the - * schematic names. Signal names in gpio.inc match the schematic and are - * then redefined here to so it's more clear which signal is being used for - * which purpose. - */ -#define GPIO_AC_PRESENT GPIO_ACOK_OD -#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV -#define GPIO_PCH_WAKE_L GPIO_EC_PCH_WAKE_ODL -#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL -#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_ODL -#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST -#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L -#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L -#define GPIO_PG_EC_DSW_PWROK GPIO_DSW_PWROK -#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL -#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL -#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL -#define GPIO_WP_L GPIO_EC_WP_L -#define GPIO_USB_C1_BC12_INT_ODL GPIO_USB_C1_MIX_INT_ODL -#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL -#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL -#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L - -/* I2C Bus Configuration */ -#define CONFIG_I2C -#define I2C_PORT_ACCEL I2C_PORT_SENSOR -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 - -#define I2C_PORT_BATTERY I2C_PORT_POWER -#define I2C_PORT_CHARGER I2C_PORT_EEPROM - -#define I2C_ADDR_EEPROM_FLAGS 0x50 -#define CONFIG_I2C_CONTROLLER - - -#ifndef __ASSEMBLER__ - -#include "gpio_signal.h" -#include "registers.h" - -enum battery_type { - BATTERY_LGC011, - BATTERY_TYPE_COUNT, -}; - -enum pwm_channel { - PWM_CH_LED1_BLUE = 0, - PWM_CH_LED2_GREEN, - PWM_CH_LED3_RED, - PWM_CH_LED4_SIDESEL, - PWM_CH_FAN, - PWM_CH_KBLIGHT, - PWM_CH_COUNT -}; - -enum sensor_id { - LID_ACCEL = 0, - BASE_ACCEL, - BASE_GYRO, - CLEAR_ALS, - RGB_ALS, - SENSOR_COUNT, -}; - -enum usbc_port { - USBC_PORT_C0 = 0, - USBC_PORT_C1, - USBC_PORT_COUNT -}; - -void board_reset_pd_mcu(void); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/trondo/build.mk b/board/trondo/build.mk deleted file mode 100644 index b78172d3cf..0000000000 --- a/board/trondo/build.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -*- makefile -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build -# - -CHIP:=npcx -CHIP_FAMILY:=npcx7 -CHIP_VARIANT:=npcx7m6fc -BASEBOARD:=volteer - -board-y=board.o -board-y+=battery.o -board-y+=led.o -board-y+=sensors.o diff --git a/board/trondo/ec.tasklist b/board/trondo/ec.tasklist deleted file mode 100644 index 292de51cdb..0000000000 --- a/board/trondo/ec.tasklist +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * See CONFIG_TASK_LIST in config.h for details. - */ - -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE) diff --git a/board/trondo/gpio.inc b/board/trondo/gpio.inc deleted file mode 100644 index dbf50c7608..0000000000 --- a/board/trondo/gpio.inc +++ /dev/null @@ -1,160 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -/* Wake Source interrupts */ -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) - -/* Power sequencing interrupts */ -GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) -#endif -GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) - -/* Sensor Interrupts */ -GPIO_INT(EC_IMU_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi260_interrupt) -GPIO_INT(EC_ALS_RGB_INT_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) -GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) - -/* USB-C interrupts */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) - -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) - -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) - -/* HDMI interrupts */ - -/* Volume button interrupts */ -GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) -GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) - -/* Power Sequencing Signals */ -GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000_A, PIN(A, 4), GPIO_OUT_LOW) -GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 */ -/* The EC does not buffer this signal on Volteer. */ -UNIMPLEMENTED(PCH_DSW_PWROK) - -/* Other wake sources */ -/* - * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an - * interrupt handler because it is automatically handled by the PSL. - * - * We need to lock the setting so this gpio can't be reconfigured to overdrive - * the real reset signal. (This is the PSL input pin not the real reset pin). - */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | - GPIO_HIB_WAKE_HIGH | - GPIO_LOCKED) - -/* AP/PCH Signals */ -GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_RSMRST_ODL, PIN(A, 6), GPIO_ODR_LOW) /* TODO - b/140950085 - implement TGL sequencing requirement */ -GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) -GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_ODL, PIN(7, 4), GPIO_ODR_HIGH) -GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) -GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) -GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) -GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) - -GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) - -/* USB and USBC Signals */ -GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) -GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) - -/* Don't have a load switch for retimer */ -UNIMPLEMENTED(USB_C1_LS_EN) - -/* Misc Signals */ -GPIO(EC_H1_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) /* H1 Packet Mode */ - -/* - * eDP backlight - both PCH and EC have enable pins that must be high - * for the backlight to turn on. Default state is high, and can be turned - * off during sleep states. - */ -GPIO(EC_EDP_BL_EN, PIN(D, 3), GPIO_OUT_HIGH) - -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(EC_I2C0_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C0_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SDA, PIN(B, 2), GPIO_INPUT) - -/* Battery signals */ -GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) - -/* Physical HPD pins are not needed on EC as these are configured by PMC */ -GPIO(USB_C0_DP_HPD, PIN(F, 3), GPIO_INPUT) -GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 */ -ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ - -/* This selects between an LED module on the motherboard and one on the daughter - * board, to be controlled by LED_{1,2,3}_L. PWM allows driving both modules at - * the same time. */ -ALTERNATE(PIN_MASK(6, BIT(0)), 0, MODULE_PWM, 0) /* LED_SIDESEL_4_L */ -ALTERNATE(PIN_MASK(C, BIT(2) | BIT(3) | BIT(4)), 0, MODULE_PWM, 0) /* LED_{3,2,1}_L */ - -/* Fan signals */ -GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_LOW) -ALTERNATE(PIN_MASK(B, BIT(7)), 0, MODULE_PWM, 0) /* FAN_PWM */ -ALTERNATE(PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0) /* FAN_SPEED_TACH */ - -/* Keyboard pins */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ -GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) /* KSO_02 */ -ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ -ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ -ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* EC_KB_BL_PWM */ - -/* UART */ -ALTERNATE(PIN_MASK(6, BIT(5) | BIT(4)), 0, MODULE_UART, 0) /* UART from EC to Servo */ - -/* Power Switch Logic (PSL) inputs */ -ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* GPIOD2 = EC_LID_OPEN */ -ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, - GPIO01 = H1_EC_PWR_BTN_ODL - GPIO02 = EC_RST_ODL */ - -/* Temperature sensors */ -ALTERNATE(PIN_MASK(4, BIT(2) | BIT(4) | BIT(5)), 0, MODULE_ADC, 0) /* TEMP_SENSOR1,2,4 */ -ALTERNATE(PIN_MASK(F, BIT(1)), 0, MODULE_ADC, 0) /* TEMP_SENSOR3 */ diff --git a/board/trondo/led.c b/board/trondo/led.c deleted file mode 100644 index 981469af53..0000000000 --- a/board/trondo/led.c +++ /dev/null @@ -1,103 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Power and battery LED control for Volteer - */ - -#include "charge_manager.h" -#include "common.h" -#include "ec_commands.h" -#include "hooks.h" -#include "led_common.h" -#include "led_pwm.h" -#include "pwm.h" - -const enum ec_led_id supported_led_ids[] = { - EC_LED_ID_POWER_LED, -}; -const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); - -struct pwm_led_color_map led_color_map[] = { - /* Red, Green, Blue */ - [EC_LED_COLOR_RED] = { 100, 0, 0 }, - [EC_LED_COLOR_GREEN] = { 0, 100, 0 }, - [EC_LED_COLOR_BLUE] = { 0, 0, 100 }, - /* The green LED seems to be brighter than the others, so turn down - * green from its natural level for these secondary colors. - */ - [EC_LED_COLOR_YELLOW] = { 100, 70, 0 }, - [EC_LED_COLOR_WHITE] = { 100, 70, 100 }, - [EC_LED_COLOR_AMBER] = { 100, 20, 0 }, -}; - -struct pwm_led pwm_leds[] = { - /* 2 RGB diffusers controlled by 1 set of 3 channels. */ - [PWM_LED0] = { - .ch0 = PWM_CH_LED3_RED, - .ch1 = PWM_CH_LED2_GREEN, - .ch2 = PWM_CH_LED1_BLUE, - .enable = &pwm_enable, - .set_duty = &pwm_set_duty, - }, -}; - -void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) -{ - brightness_range[EC_LED_COLOR_RED] = 255; - brightness_range[EC_LED_COLOR_GREEN] = 255; - brightness_range[EC_LED_COLOR_BLUE] = 255; -} - -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) -{ - enum pwm_led_id pwm_id; - - /* Convert ec_led_id to pwm_led_id. */ - if (led_id == EC_LED_ID_POWER_LED) - pwm_id = PWM_LED0; - else - return EC_ERROR_UNKNOWN; - - if (brightness[EC_LED_COLOR_RED]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_RED); - else if (brightness[EC_LED_COLOR_GREEN]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_GREEN); - else if (brightness[EC_LED_COLOR_BLUE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_BLUE); - else if (brightness[EC_LED_COLOR_YELLOW]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_YELLOW); - else if (brightness[EC_LED_COLOR_WHITE]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); - else if (brightness[EC_LED_COLOR_AMBER]) - set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); - else - /* Otherwise, the "color" is "off". */ - set_pwm_led_color(pwm_id, -1); - - return EC_SUCCESS; -} - -/* Illuminates the LED on the side of the active charging port. If not charging, - * illuminates both LEDs. - */ -static void led_set_charge_port_tick(void) -{ - int port; - int side_select_duty; - - port = charge_manager_get_active_charge_port(); - switch (port) { - case 0: - side_select_duty = 100; - break; - case 1: - side_select_duty = 0; - break; - default: - side_select_duty = 50; - } - - pwm_set_duty(PWM_CH_LED4_SIDESEL, side_select_duty); -} -DECLARE_HOOK(HOOK_TICK, led_set_charge_port_tick, HOOK_PRIO_DEFAULT); diff --git a/board/trondo/sensors.c b/board/trondo/sensors.c deleted file mode 100644 index e9169abaae..0000000000 --- a/board/trondo/sensors.c +++ /dev/null @@ -1,229 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Volteer family-specific sensor configuration */ -#include "common.h" -#include "accelgyro.h" -#include "driver/accel_bma2x2.h" -#include "driver/accelgyro_bmi_common.h" -#include "driver/accelgyro_bmi260.h" -#include "driver/als_tcs3400.h" -#include "driver/sync.h" -#include "keyboard_scan.h" -#include "hooks.h" -#include "i2c.h" -#include "task.h" -#include "util.h" - -/******************************************************************************/ -/* Sensors */ -static struct mutex g_lid_accel_mutex; -static struct mutex g_base_mutex; - -/* BMA253 private data */ -static struct accelgyro_saved_data_t g_bma253_data; - -/* BMI260 private data */ -static struct bmi_drv_data_t g_bmi260_data; - -/* TCS3400 private data */ -static struct als_drv_data_t g_tcs3400_data = { - .als_cal.scale = 1, - .als_cal.uscale = 0, - .als_cal.offset = 0, - .als_cal.channel_scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc from VPD */ - .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */ - }, -}; - -/* - * TODO: b/146166425 need to calibrate ALS/RGB sensor. At default settings, - * shining phone flashlight on sensor pegs all readings at 0xFFFF. - */ -static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = { - .calibration.rgb_cal[X] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - } - }, - .calibration.rgb_cal[Y] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - }, - }, - .calibration.rgb_cal[Z] = { - .offset = 0, - .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), - .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), - .scale = { - .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */ - .cover_scale = ALS_CHANNEL_SCALE(1.0) - } - }, - .calibration.irt = INT_TO_FP(1), - .saturation.again = TCS_DEFAULT_AGAIN, - .saturation.atime = TCS_DEFAULT_ATIME, -}; - -/* Rotation matrix for the lid accelerometer */ -/* TODO: b/146144170 - the accelerometer is on the motherboard for proto1 - * for testing. Once the sensor moves to the lid, the rotation matrix needs - * to be updated for correct behavior. - */ -static const mat33_fp_t lid_standard_ref = { - { 0, FLOAT_TO_FP(-1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(-1)} -}; - -const mat33_fp_t base_standard_ref = { - { 0, FLOAT_TO_FP(1), 0}, - { FLOAT_TO_FP(-1), 0, 0}, - { 0, 0, FLOAT_TO_FP(1)} -}; - -struct motion_sensor_t motion_sensors[] = { - [LID_ACCEL] = { - .name = "Lid Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMA255, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_LID, - .drv = &bma2x2_accel_drv, - .mutex = &g_lid_accel_mutex, - .drv_data = &g_bma253_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS, - .rot_standard_ref = &lid_standard_ref, - .min_frequency = BMA255_ACCEL_MIN_FREQ, - .max_frequency = BMA255_ACCEL_MAX_FREQ, - .default_range = 2, /* g, to support tablet mode */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - }, - }, - }, - [BASE_ACCEL] = { - .name = "Base Accel", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI260, - .type = MOTIONSENSE_TYPE_ACCEL, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi260_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi260_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_ACCEL_MIN_FREQ, - .max_frequency = BMI_ACCEL_MAX_FREQ, - .default_range = 4, /* g */ - .config = { - /* EC use accel for angle detection */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - /* Sensor on in S3 */ - [SENSOR_CONFIG_EC_S3] = { - .odr = 10000 | ROUND_UP_FLAG, - .ec_rate = 100 * MSEC, - }, - }, - }, - - [BASE_GYRO] = { - .name = "Base Gyro", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_BMI260, - .type = MOTIONSENSE_TYPE_GYRO, - .location = MOTIONSENSE_LOC_BASE, - .drv = &bmi260_drv, - .mutex = &g_base_mutex, - .drv_data = &g_bmi260_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = BMI260_ADDR0_FLAGS, - .default_range = 1000, /* dps */ - .rot_standard_ref = &base_standard_ref, - .min_frequency = BMI_GYRO_MIN_FREQ, - .max_frequency = BMI_GYRO_MAX_FREQ, - }, - [CLEAR_ALS] = { - .name = "Clear Light", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_TCS3400, - .type = MOTIONSENSE_TYPE_LIGHT, - .location = MOTIONSENSE_LOC_BASE, - .drv = &tcs3400_drv, - .drv_data = &g_tcs3400_data, - .port = I2C_PORT_SENSOR, - .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1x, uscale = 0 */ - .min_frequency = TCS3400_LIGHT_MIN_FREQ, - .max_frequency = TCS3400_LIGHT_MAX_FREQ, - .config = { - /* Run ALS sensor in S0 */ - [SENSOR_CONFIG_EC_S0] = { - .odr = 1000, - }, - }, - }, - - [RGB_ALS] = { - /* - * RGB channels read by CLEAR_ALS and so the i2c port and - * address do not need to be defined for RGB_ALS. - */ - .name = "RGB Light", - .active_mask = SENSOR_ACTIVE_S0_S3, - .chip = MOTIONSENSE_CHIP_TCS3400, - .type = MOTIONSENSE_TYPE_LIGHT_RGB, - .location = MOTIONSENSE_LOC_BASE, - .drv = &tcs3400_rgb_drv, - .drv_data = &g_tcs3400_rgb_data, - .rot_standard_ref = NULL, - .default_range = 0x10000, /* scale = 1x, uscale = 0 */ - }, -}; -unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); - -/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */ -const struct motion_sensor_t *motion_als_sensors[] = { - &motion_sensors[CLEAR_ALS], -}; -BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); - -static void baseboard_sensors_init(void) -{ - /* Note - BMA253 interrupt unused by EC */ - - /* Enable interrupt for the TCS3400 color light sensor */ - gpio_enable_interrupt(GPIO_EC_ALS_RGB_INT_L); - /* Enable interrupt for the BMI260 accel/gyro sensor */ - gpio_enable_interrupt(GPIO_EC_IMU_INT_L); -} -DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_DEFAULT); diff --git a/board/trondo/vif_override.xml b/board/trondo/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/trondo/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> diff --git a/board/twinkie/build.mk b/board/twinkie/build.mk index 6fc2067d8f..3ced5f2966 100644 --- a/board/twinkie/build.mk +++ b/board/twinkie/build.mk @@ -10,5 +10,5 @@ CHIP:=stm32 CHIP_FAMILY:=stm32f0 CHIP_VARIANT:=stm32f07x -board-y=board.o usb_pd_policy.o injector.o simpletrace.o +board-y=board.o usb_pd_policy.o injector.o simpletrace.o usb_pd_pdo.o board-$(HAS_TASK_SNIFFER)+=sniffer.o diff --git a/board/twinkie/injector.c b/board/twinkie/injector.c index cae1d3557f..ef5bfb3e32 100644 --- a/board/twinkie/injector.c +++ b/board/twinkie/injector.c @@ -67,7 +67,7 @@ static const struct res_cfg { #ifdef HAS_TASK_SNIFFER /* we don't have the default DMA handlers */ -void dma_event_interrupt_channel_3(void) +static void dma_event_interrupt_channel_3(void) { if (STM32_DMA1_REGS->isr & STM32_DMA_ISR_TCIF(STM32_DMAC_CH3)) { dma_clear_isr(STM32_DMAC_CH3); diff --git a/board/twinkie/simpletrace.c b/board/twinkie/simpletrace.c index 9f151f761f..811bd428fd 100644 --- a/board/twinkie/simpletrace.c +++ b/board/twinkie/simpletrace.c @@ -160,11 +160,12 @@ static void print_error(enum pd_rx_errors err) ccprintf("ERR %d\n", err); } +#ifdef HAS_TASK_SNIFFER /* keep track of RX edge timing in order to trigger receive */ static timestamp_t rx_edge_ts[2][PD_RX_TRANSITION_COUNT]; static int rx_edge_ts_idx[2]; -void rx_event(void) +static void rx_event(void) { int pending, i; int next_idx; @@ -209,7 +210,6 @@ void rx_event(void) } } } -#ifdef HAS_TASK_SNIFFER DECLARE_IRQ(STM32_IRQ_COMP, rx_event, 1); #endif diff --git a/board/twinkie/sniffer.c b/board/twinkie/sniffer.c index 00effb8539..a567b5d725 100644 --- a/board/twinkie/sniffer.c +++ b/board/twinkie/sniffer.c @@ -206,7 +206,7 @@ void tim_rx2_handler(uint32_t stat) led_set_activity(1); } -void tim_dma_handler(void) +static void tim_dma_handler(void) { stm32_dma_regs_t *dma = STM32_DMA1_REGS; uint32_t stat = dma->isr & (STM32_DMA_ISR_HTIF(DMAC_TIM_RX1) diff --git a/board/twinkie/usb_pd_pdo.c b/board/twinkie/usb_pd_pdo.c new file mode 100644 index 0000000000..120c13125b --- /dev/null +++ b/board/twinkie/usb_pd_pdo.c @@ -0,0 +1,24 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | PDO_FIXED_DATA_SWAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), + PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), + PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 15000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); diff --git a/board/twinkie/usb_pd_pdo.h b/board/twinkie/usb_pd_pdo.h new file mode 100644 index 0000000000..377ccce1b5 --- /dev/null +++ b/board/twinkie/usb_pd_pdo.h @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_TWINKIE_USB_PD_PDO_H +#define __CROS_EC_BOARD_TWINKIE_USB_PD_PDO_H + +#include "stdint.h" + +extern const uint32_t pd_src_pdo[3]; +extern const int pd_src_pdo_cnt; + +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; + +#endif /* __CROS_EC_BOARD_TWINKIE_USB_PD_PDO_H */ diff --git a/board/twinkie/usb_pd_policy.c b/board/twinkie/usb_pd_policy.c index 62ecd6e0db..a8f76b40e5 100644 --- a/board/twinkie/usb_pd_policy.c +++ b/board/twinkie/usb_pd_policy.c @@ -13,26 +13,11 @@ #include "timer.h" #include "util.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) -#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | PDO_FIXED_DATA_SWAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), - PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), - PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 15000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - void pd_set_input_current_limit(int port, uint32_t max_ma, uint32_t supply_voltage) { diff --git a/board/todor/battery.c b/board/vell/battery.c index d129ede528..1f0239a013 100644 --- a/board/todor/battery.c +++ b/board/vell/battery.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -6,11 +6,12 @@ */ #include "battery_fuel_gauge.h" +#include "cbi.h" #include "common.h" -#include "util.h" - +#include "compile_time_macros.h" +#include "gpio.h" /* - * Battery info for all Volteer battery types. Note that the fields + * Battery info for all Vell battery types. Note that the fields * start_charging_min/max and charging_min/max are not used for the charger. * The effective temperature limits are given by discharging_min/max_c. * @@ -32,7 +33,37 @@ * address, mask, and disconnect value need to be provided. */ const struct board_batt_params board_battery_info[] = { - /* LGC\011 L17L3PB0 Battery Information */ + /* POW-TECH GQA05 Battery Information */ + [BATTERY_POWER_TECH] = { + /* BQ40Z50 Fuel Gauge */ + .fuel_gauge = { + .manuf_name = "POW-TECH", + .device_name = "BATGQA05L22", + .ship_mode = { + .reg_addr = 0x00, + .reg_data = { 0x0010, 0x0010 }, + }, + .fet = { + .mfgacc_support = 1, + .reg_addr = 0x00, + .reg_mask = 0x2000, /* XDSG */ + .disconnect_val = 0x2000, + } + }, + .batt_info = { + .voltage_max = TARGET_WITH_MARGIN(13050, 5), + .voltage_normal = 11400, /* mV */ + .voltage_min = 9000, /* mV */ + .precharge_current = 280, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 45, + .discharging_min_c = -10, + .discharging_max_c = 60, + }, + }, + /* LGC L17L3PB0 Battery Information */ /* * Battery info provided by ODM on b/143477210, comment #11 */ @@ -41,7 +72,7 @@ const struct board_batt_params board_battery_info[] = { .manuf_name = "LGC", .ship_mode = { .reg_addr = 0x00, - .reg_data = { 0x10, 0x10 }, + .reg_data = { 0x0010, 0x0010 }, }, .fet = { .reg_addr = 0x0, @@ -62,35 +93,13 @@ const struct board_batt_params board_battery_info[] = { .discharging_max_c = 75, }, }, - /* LGC AP18C8K Battery Information */ - [BATTERY_LGC_AP18C8K] = { - .fuel_gauge = { - .manuf_name = "LGC KT0030G020", - .device_name = "AP18C8K", - .ship_mode = { - .reg_addr = 0x3A, - .reg_data = { 0xC574, 0xC574 }, - }, - .fet = { - .reg_addr = 0x43, - .reg_mask = 0x0001, - .disconnect_val = 0x0, - }, - }, - .batt_info = { - .voltage_max = 13050, - .voltage_normal = 11250, - .voltage_min = 9000, - .precharge_current = 256, - .start_charging_min_c = 0, - .start_charging_max_c = 50, - .charging_min_c = 0, - .charging_max_c = 60, - .discharging_min_c = -20, - .discharging_max_c = 75, - }, - }, }; BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); -const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_LGC011; +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_POWER_TECH; + +enum battery_present battery_hw_present(void) +{ + /* The GPIO is low when the battery is physically present */ + return gpio_get_level(GPIO_EC_BATT_PRES_ODL) ? BP_NO : BP_YES; +} diff --git a/board/vell/board.c b/board/vell/board.c new file mode 100644 index 0000000000..cb060442a2 --- /dev/null +++ b/board/vell/board.c @@ -0,0 +1,52 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery.h" +#include "button.h" +#include "charge_ramp.h" +#include "charger.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "gpio.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_lsm6dso.h" +#include "driver/als_tcs3400.h" +#include "fw_config.h" +#include "hooks.h" +#include "lid_switch.h" +#include "power_button.h" +#include "power.h" +#include "registers.h" +#include "switch.h" +#include "tablet_mode.h" +#include "throttle_ap.h" +#include "usbc_config.h" + +#include "gpio_list.h" /* Must come after other header files. */ + +/* Console output macros */ +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) + +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + /* Allow keyboard backlight to be enabled */ + + gpio_set_level(GPIO_EC_KB_BL_EN_L, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + /* Turn off the keyboard backlight if it's on. */ + + gpio_set_level(GPIO_EC_KB_BL_EN_L, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); diff --git a/board/vell/board.h b/board/vell/board.h new file mode 100644 index 0000000000..6b99df2569 --- /dev/null +++ b/board/vell/board.h @@ -0,0 +1,279 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Vell board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +#include "compile_time_macros.h" + +/* + * Early brya boards are not set up for vivaldi + */ +#undef CONFIG_KEYBOARD_VIVALDI + +/* Baseboard features */ +#include "baseboard.h" + +/* + * This will happen automatically on NPCX9 ES2 and later. Do not remove + * until we can confirm all earlier chips are out of service. + */ +#define CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP + +/* LED */ +#define CONFIG_LED_PWM +#define CONFIG_LED_PWM_COUNT 2 +#undef CONFIG_LED_PWM_NEAR_FULL_COLOR +#undef CONFIG_LED_PWM_SOC_ON_COLOR +#undef CONFIG_LED_PWM_SOC_SUSPEND_COLOR +#undef CONFIG_LED_PWM_LOW_BATT_COLOR +#define CONFIG_LED_PWM_NEAR_FULL_COLOR EC_LED_COLOR_WHITE +#define CONFIG_LED_PWM_SOC_ON_COLOR EC_LED_COLOR_WHITE +#define CONFIG_LED_PWM_SOC_SUSPEND_COLOR EC_LED_COLOR_WHITE +#define CONFIG_LED_PWM_LOW_BATT_COLOR EC_LED_COLOR_AMBER + +/* Sensors */ +#define CONFIG_ACCELGYRO_LSM6DSO /* Base accel */ +#define CONFIG_ACCEL_LSM6DSO_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +/* TCS3400 ALS */ +#define CONFIG_ALS +#define ALS_COUNT 1 +#define CONFIG_ALS_TCS3400 +#define CONFIG_ALS_TCS3400_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) + +/* Enable sensor fifo, must also define the _SIZE and _THRES */ +#define CONFIG_ACCEL_FIFO +/* FIFO size is in power of 2. */ +#define CONFIG_ACCEL_FIFO_SIZE 256 +/* Depends on how fast the AP boots and typical ODRs */ +#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) + +/* Sensors without hardware FIFO are in forced mode */ +#define CONFIG_ACCEL_FORCE_MODE_MASK \ + (BIT(LID_ACCEL) | BIT(CLEAR_ALS)) + +/* Lid accel */ +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_UPDATE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL +#define CONFIG_ACCEL_LIS2DWL +#define CONFIG_ACCEL_LIS2DW_AS_BASE +#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) + +#define CONFIG_ACCEL_INTERRUPTS + +/* Sensor console commands */ +#define CONFIG_CMD_ACCELS +#define CONFIG_CMD_ACCEL_INFO + +/* USB Type A Features */ +#define USB_PORT_COUNT 1 +#define CONFIG_USB_PORT_POWER_DUMB + +/* USB Type C and USB PD defines */ +#define CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY + +#define CONFIG_IO_EXPANDER +#define CONFIG_IO_EXPANDER_NCT38XX +#define CONFIG_IO_EXPANDER_PORT_COUNT 4 + +#define CONFIG_USB_PD_TCPM_PS8815 +#define CONFIG_USB_PD_TCPM_PS8815_FORCE_DID +#define CONFIG_USBC_RETIMER_INTEL_BB + +/* I2C speed console command */ +#define CONFIG_CMD_I2C_SPEED + +/* I2C control host command */ +#define CONFIG_HOSTCMD_I2C_CONTROL + +#define CONFIG_USBC_PPC_SYV682X +#define CONFIG_USBC_PPC_NX20P3483 + +/* TODO: b/177608416 - measure and check these values on brya */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +/* + * Passive USB-C cables only support up to 60W. + */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 + +/* + * Macros for GPIO signals used in common code that don't match the + * schematic names. Signal names in gpio.inc match the schematic and are + * then redefined here to so it's more clear which signal is being used for + * which purpose. + */ +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL +#define GPIO_EC_INT_L GPIO_EC_PCH_INT_ODL +#define GPIO_ENABLE_BACKLIGHT GPIO_EC_EN_EDP_BL +#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW +#define GPIO_KBD_KSO2 GPIO_EC_KSO_02_INV +#define GPIO_PACKET_MODE_EN GPIO_EC_GSC_PACKET_MODE +#define GPIO_PCH_PWRBTN_L GPIO_EC_PCH_PWR_BTN_ODL +#define GPIO_PCH_RSMRST_L GPIO_EC_PCH_RSMRST_L +#define GPIO_PCH_RTCRST GPIO_EC_PCH_RTCRST +#define GPIO_PCH_SLP_S0_L GPIO_SYS_SLP_S0IX_L +#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +/* + * GPIO_EC_PCH_INT_ODL is used for MKBP events as well as a PCH wakeup + * signal. + */ +#define GPIO_PCH_WAKE_L GPIO_EC_PCH_INT_ODL +#define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_SEQ_EC_ALL_SYS_PG +#define GPIO_PG_EC_DSW_PWROK GPIO_SEQ_EC_DSW_PWROK +#define GPIO_PG_EC_RSMRST_ODL GPIO_SEQ_EC_RSMRST_ODL +#define GPIO_POWER_BUTTON_L GPIO_GSC_EC_PWR_BTN_ODL +#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL +#define GPIO_VOLUME_DOWN_L GPIO_EC_VOLDN_BTN_ODL +#define GPIO_VOLUME_UP_L GPIO_EC_VOLUP_BTN_ODL +#define GPIO_WP_L GPIO_EC_WP_ODL + +/* System has back-lit keyboard */ +#define CONFIG_PWM_KBLIGHT + +/* I2C Bus Configuration */ + +#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 + +#define I2C_PORT_USB_C0_C2_TCPC NPCX_I2C_PORT1_0 +#define I2C_PORT_USB_C1_TCPC NPCX_I2C_PORT4_1 + +#define I2C_PORT_USB_C0_C2_PPC NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C1_PPC NPCX_I2C_PORT6_1 + +#define I2C_PORT_USB_C0_C2_BC12 NPCX_I2C_PORT2_0 +#define I2C_PORT_USB_C1_BC12 NPCX_I2C_PORT6_1 + +#define I2C_PORT_USB_C0_C2_MUX NPCX_I2C_PORT3_0 +#define I2C_PORT_USB_C1_MUX NPCX_I2C_PORT6_1 + +#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0 +#define I2C_PORT_CHARGER NPCX_I2C_PORT7_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 + +#define I2C_ADDR_EEPROM_FLAGS 0x50 + +/* + * see b/174768555#comment22 + */ +#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56 +#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x57 + +/* Enabling Thunderbolt-compatible mode */ +#define CONFIG_USB_PD_TBT_COMPAT_MODE + +/* Enabling USB4 mode */ +#define CONFIG_USB_PD_USB4 + +/* Retimer */ +#define CONFIG_USBC_RETIMER_FW_UPDATE + +/* Thermal features */ +#define CONFIG_THERMISTOR +#define CONFIG_TEMP_SENSOR +#define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_SEQ_EC_DSW_PWROK +#define CONFIG_STEINHART_HART_3V3_30K9_47K_4050B + +#define CONFIG_FANS FAN_CH_COUNT + +/* Charger defines */ +#define CONFIG_CHARGER_BQ25720 +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV 70 +#define CONFIG_CHARGE_RAMP_SW +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC 10 +#define CONFIG_CHARGER_BQ25710_PSYS_SENSING + +/* + * Older boards have a different ADC assignment. + */ + +#define CONFIG_ADC_CHANNELS_RUNTIME_CONFIG + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" /* needed by registers.h */ +#include "registers.h" +#include "usbc_config.h" + +enum adc_channel { + ADC_TEMP_SENSOR_1_DDR_SOC, + ADC_TEMP_SENSOR_2_AMBIENT, + ADC_TEMP_SENSOR_3_CHARGER, + ADC_TEMP_SENSOR_4_WWAN, + ADC_CH_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_1_DDR_SOC, + TEMP_SENSOR_2_AMBIENT, + TEMP_SENSOR_3_CHARGER, + TEMP_SENSOR_4_WWAN, + TEMP_SENSOR_COUNT +}; + +enum sensor_id { + LID_ACCEL = 0, + BASE_ACCEL, + BASE_GYRO, + CLEAR_ALS, + RGB_ALS, + SENSOR_COUNT +}; + +enum ioex_port { + IOEX_C0_NCT38XX = 0, + IOEX_C2_NCT38XX, + IOEX_ID_1_C0_NCT38XX, + IOEX_ID_1_C2_NCT38XX, + IOEX_PORT_COUNT +}; + +enum battery_type { + BATTERY_POWER_TECH, + BATTERY_LGC011, + BATTERY_TYPE_COUNT +}; + +enum pwm_channel { + PWM_CH_LED2 = 0, /* PWM0 (white charger) */ + PWM_CH_LED3, /* PWM1 (orange on DB) */ + PWM_CH_LED1, /* PWM2 (orange charger) */ + PWM_CH_KBLIGHT, /* PWM3 */ + PWM_CH_FAN, /* PWM5 */ + PWM_CH_LED4, /* PWM7 (white on DB) */ + PWM_CH_COUNT +}; + +enum fan_channel { + FAN_CH_0 = 0, + FAN_CH_COUNT +}; + +enum mft_channel { + MFT_CH_0 = 0, + MFT_CH_COUNT +}; + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/vell/build.mk b/board/vell/build.mk new file mode 100644 index 0000000000..df453187bf --- /dev/null +++ b/board/vell/build.mk @@ -0,0 +1,25 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Brya board specific files build +# + +CHIP:=npcx +CHIP_FAMILY:=npcx9 +CHIP_VARIANT:=npcx9m3f +BASEBOARD:=brya + +board-y= +board-y+=battery.o +board-y+=board.o +board-y+=charger.o +board-y+=fans.o +board-y+=fw_config.o +board-y+=i2c.o +board-y+=keyboard.o +board-y+=led.o +board-y+=pwm.o +board-y+=sensors.o +board-y+=usbc_config.o diff --git a/board/vell/charger.c b/board/vell/charger.c new file mode 100644 index 0000000000..04be67147d --- /dev/null +++ b/board/vell/charger.c @@ -0,0 +1,90 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "compile_time_macros.h" +#include "console.h" +#include "driver/charger/bq25710.h" +#include "usbc_ppc.h" +#include "usb_pd.h" +#include "util.h" + + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* Charger Chip Configuration */ +const struct charger_config_t chg_chips[] = { + { + .i2c_port = I2C_PORT_CHARGER, + .i2c_addr_flags = BQ25710_SMBUS_ADDR1_FLAGS, + .drv = &bq25710_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(chg_chips) == CHARGER_NUM); + +int board_set_active_charge_port(int port) +{ + int is_valid_port = board_is_usb_pd_port_present(port); + int i; + + if (port == CHARGE_PORT_NONE) { + CPRINTSUSB("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } else if (!is_valid_port) { + return EC_ERROR_INVAL; + } + + /* Check if the port is sourcing VBUS. */ + if (ppc_is_sourcing_vbus(port)) { + CPRINTFUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTSUSB("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTSUSB("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +__overridable void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), + charge_mv); +} diff --git a/board/vell/ec.tasklist b/board/vell/ec.tasklist new file mode 100644 index 0000000000..12b87cfab4 --- /dev/null +++ b/board/vell/ec.tasklist @@ -0,0 +1,32 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * See CONFIG_TASK_LIST in config.h for details. + * + * USB_CHG_Px tasks must be contiguous (see USB_CHG_PORT_TO_TASK_ID(x)). + * PD_Cx tasks must be contiguous (see PD_PORT_TO_TASK_ID(x)) + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, HOOKS_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHG_RAMP, chg_ramp_task, NULL, BASEBOARD_CHG_RAMP_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P2, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, BASEBOARD_CHARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, BASEBOARD_CHIPSET_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_MUX, usb_mux_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, CONSOLE_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, BASEBOARD_POWERBTN_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C2, pd_task, NULL, BASEBOARD_PD_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_shared_alert_task, (BIT(2) | BIT(0)), BASEBOARD_PD_INT_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, BASEBOARD_PD_INT_TASK_STACK_SIZE) diff --git a/board/vell/fans.c b/board/vell/fans.c new file mode 100644 index 0000000000..021f0de8e2 --- /dev/null +++ b/board/vell/fans.c @@ -0,0 +1,89 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Physical fans. These are logically separate from pwm_channels. */ + +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "fan_chip.h" +#include "fan.h" +#include "hooks.h" +#include "pwm.h" + +/* MFT channels. These are logically separate from pwm_channels. */ +const struct mft_t mft_channels[] = { + [MFT_CH_0] = { + .module = NPCX_MFT_MODULE_1, + .clk_src = TCKC_LFCLK, + .pwm_id = PWM_CH_FAN, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); + +static const struct fan_conf fan_conf_0 = { + .flags = FAN_USE_RPM_MODE, + .ch = MFT_CH_0, /* Use MFT id to control fan */ + .pgood_gpio = -1, + .enable_gpio = GPIO_EN_PP5000_FAN, +}; + +/* + * TOOD(b/181271666): thermistor placement and calibration + * + * Prototype fan spins at about 4200 RPM at 100% PWM, this + * is specific to board ID 2 and might also apears in later + * boards as well. + */ +static const struct fan_rpm fan_rpm_0 = { + .rpm_min = 2200, + .rpm_start = 2200, + .rpm_max = 4200, +}; + +const struct fan_t fans[FAN_CH_COUNT] = { + [FAN_CH_0] = { + .conf = &fan_conf_0, + .rpm = &fan_rpm_0, + }, +}; + +#ifndef CONFIG_FANS + +/* + * TODO(b/181271666): use static fan speeds until fan and sensors are + * tuned. for now, use: + * + * AP off: 33% + * AP on: 100% + */ + +static void fan_slow(void) +{ + const int duty_pct = 33; + + ccprints("%s: speed %d%%", __func__, duty_pct); + + pwm_enable(PWM_CH_FAN, 1); + pwm_set_duty(PWM_CH_FAN, duty_pct); +} + +static void fan_max(void) +{ + const int duty_pct = 100; + + ccprints("%s: speed %d%%", __func__, duty_pct); + + pwm_enable(PWM_CH_FAN, 1); + pwm_set_duty(PWM_CH_FAN, duty_pct); +} + +DECLARE_HOOK(HOOK_INIT, fan_slow, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, fan_slow, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, fan_slow, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_CHIPSET_RESET, fan_max, HOOK_PRIO_FIRST); +DECLARE_HOOK(HOOK_CHIPSET_RESUME, fan_max, HOOK_PRIO_DEFAULT); + +#endif /* CONFIG_FANS */ diff --git a/board/vell/fw_config.c b/board/vell/fw_config.c new file mode 100644 index 0000000000..9c28c3ca58 --- /dev/null +++ b/board/vell/fw_config.c @@ -0,0 +1,61 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "cbi.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "cros_board_info.h" +#include "fw_config.h" + +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) + +static union brya_cbi_fw_config fw_config; +BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); + +/* + * FW_CONFIG defaults for brya if the CBI.FW_CONFIG data is not + * initialized. + */ +static const union brya_cbi_fw_config fw_config_defaults = { + .usb_db = DB_USB3_PS8815, + .kb_bl = KEYBOARD_BACKLIGHT_ENABLED, +}; + +/**************************************************************************** + * Brya FW_CONFIG access + */ +void board_init_fw_config(void) +{ + if (cbi_get_fw_config(&fw_config.raw_value)) { + CPRINTS("CBI: Read FW_CONFIG failed, using board defaults"); + fw_config = fw_config_defaults; + } + + if (get_board_id() == 0) { + /* + * Early boards have a zero'd out FW_CONFIG, so replace + * it with a sensible default value. If DB_USB_ABSENT2 + * was used as an alternate encoding of DB_USB_ABSENT to + * avoid the zero check, then fix it. + */ + if (fw_config.raw_value == 0) { + CPRINTS("CBI: FW_CONFIG is zero, using board defaults"); + fw_config = fw_config_defaults; + } else if (fw_config.usb_db == DB_USB_ABSENT2) { + fw_config.usb_db = DB_USB_ABSENT; + } + } +} + +union brya_cbi_fw_config get_fw_config(void) +{ + return fw_config; +} + +enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) +{ + return fw_config.usb_db; +} diff --git a/board/vell/fw_config.h b/board/vell/fw_config.h new file mode 100644 index 0000000000..6e4eb3ef58 --- /dev/null +++ b/board/vell/fw_config.h @@ -0,0 +1,54 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __BOARD_BRYA_FW_CONFIG_H_ +#define __BOARD_BRYA_FW_CONFIG_H_ + +#include <stdint.h> + +/**************************************************************************** + * CBI FW_CONFIG layout for Brya board. + * + * Source of truth is the project/brya/brya/config.star configuration file. + */ + +enum ec_cfg_usb_db_type { + DB_USB_ABSENT = 0, + DB_USB3_PS8815 = 1, + DB_USB_ABSENT2 = 15 +}; + +enum ec_cfg_keyboard_backlight_type { + KEYBOARD_BACKLIGHT_DISABLED = 0, + KEYBOARD_BACKLIGHT_ENABLED = 1 +}; + +union brya_cbi_fw_config { + struct { + enum ec_cfg_usb_db_type usb_db : 4; + uint32_t sd_db : 2; + uint32_t lte_db : 1; + enum ec_cfg_keyboard_backlight_type kb_bl : 1; + uint32_t audio : 3; + uint32_t reserved_1 : 21; + }; + uint32_t raw_value; +}; + +/** + * Read the cached FW_CONFIG. Guaranteed to have valid values. + * + * @return the FW_CONFIG for the board. + */ +union brya_cbi_fw_config get_fw_config(void); + +/** + * Get the USB daughter board type from FW_CONFIG. + * + * @return the USB daughter board type. + */ +enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void); + +#endif /* __BOARD_BRYA_FW_CONFIG_H_ */ diff --git a/board/kano/generated-gpio.inc b/board/vell/gpio.inc index d65d64feca..27f57f392a 100644 --- a/board/kano/generated-gpio.inc +++ b/board/vell/gpio.inc @@ -1,10 +1,17 @@ -/* - * This file was auto-generated. +/* -*- mode:c -*- + * + * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. */ +#define MODULE_KB MODULE_KEYBOARD_SCAN + /* INTERRUPT GPIOs: */ GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) -GPIO_INT(EC_IMU_INT_R_L, PIN(5, 6), GPIO_SEL_1P8V | GPIO_INT_FALLING, motion_interrupt) +GPIO_INT(EC_ACCEL_INT_R_L, PIN(8, 1), GPIO_SEL_1P8V | GPIO_INT_FALLING, lis2dw12_interrupt) +GPIO_INT(EC_ALS_RGB_INT_R_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) +GPIO_INT(EC_IMU_INT_R_L, PIN(5, 6), GPIO_SEL_1P8V | GPIO_INT_FALLING, lsm6dso_interrupt) GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) GPIO_INT(EC_VOLDN_BTN_ODL, PIN(9, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) GPIO_INT(EC_VOLUP_BTN_ODL, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) @@ -25,6 +32,9 @@ GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_in GPIO_INT(USB_C1_BC12_INT_ODL, PIN(5, 0), GPIO_INT_FALLING, bc12_interrupt) GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt) GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt) /* USED GPIOs: */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) @@ -65,7 +75,9 @@ GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW) GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) +GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) +GPIO(USB_C1_RST_ODL, PIN(9, 6), GPIO_ODR_LOW) GPIO(USB_C1_RT_INT_ODL, PIN(A, 0), GPIO_INPUT) GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) @@ -85,13 +97,15 @@ ALTERNATE(PIN_MASK(F, 0x0c), 0, MODULE_I2C, 0) /* GPIOF3/I2C4_SCL1 /* PWM alternate functions */ ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* GPIO40/TA1 */ +ALTERNATE(PIN_MASK(6, 0x01), 0, MODULE_PWM, 0) /* GPIO60/PWM7 */ ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* GPIO80/PWM3 */ ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */ -ALTERNATE(PIN_MASK(C, 0x18), 0, MODULE_PWM, 0) /* GPIOC4/PWM2, GPIOC3/PWM0 */ +ALTERNATE(PIN_MASK(C, 0x1c), 0, MODULE_PWM, 0) /* GPIOC4/PWM2, GPIOC3/PWM0, GPIOC2/PWM1/I2C6_SCL0 */ /* ADC alternate functions */ ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */ +ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */ /* KB alternate functions */ ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ @@ -113,3 +127,23 @@ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ UNUSED(PIN(6, 6)) /* GPIO66 */ /* Pre-configured PSL balls: J8 K6 */ + +/* + * The NPCX keyboard driver does not use named GPIOs to access + * keyboard scan pins, so we do not list them in *gpio.inc. However, when + * KEYBOARD_COL2_INVERTED is defined, this name is required. + */ +GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) + +/* IO expander configuration */ +/* GPIO02_P2 to PU */ +/* GPIO03_P2 to PU */ +IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_LOW) +IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW) + +IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) +IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 3), GPIO_ODR_HIGH) +IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH) +IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_LOW) +/* GPIO07_P2 to PU */ diff --git a/board/vell/i2c.c b/board/vell/i2c.c new file mode 100644 index 0000000000..3db2e0c17b --- /dev/null +++ b/board/vell/i2c.c @@ -0,0 +1,98 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "compile_time_macros.h" +#include "hooks.h" +#include "i2c.h" + +#define BOARD_ID_FAST_PLUS_CAPABLE 2 + +/* I2C port map configuration */ +const struct i2c_port_t i2c_ports[] = { + { + /* I2C0 */ + .name = "sensor", + .port = I2C_PORT_SENSOR, + .kbps = 400, + .scl = GPIO_EC_I2C_SENSOR_SCL, + .sda = GPIO_EC_I2C_SENSOR_SDA, + }, + { + /* I2C1 */ + .name = "tcpc0,2", + .port = I2C_PORT_USB_C0_C2_TCPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_C2_TCPC_SCL, + .sda = GPIO_EC_I2C_USB_C0_C2_TCPC_SDA, + }, + { + /* I2C2 */ + .name = "ppc0,2", + .port = I2C_PORT_USB_C0_C2_PPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SCL, + .sda = GPIO_EC_I2C_USB_C0_C2_PPC_BC_SDA, + }, + { + /* I2C3 */ + .name = "retimer0,2", + .port = I2C_PORT_USB_C0_C2_MUX, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C0_C2_RT_SCL, + .sda = GPIO_EC_I2C_USB_C0_C2_RT_SDA, + }, + { + /* I2C4 C1 TCPC */ + .name = "tcpc1", + .port = I2C_PORT_USB_C1_TCPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_TCPC_SCL, + .sda = GPIO_EC_I2C_USB_C1_TCPC_SDA, + .flags = I2C_PORT_FLAG_DYNAMIC_SPEED, + }, + { + /* I2C5 */ + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_EC_I2C_BAT_SCL, + .sda = GPIO_EC_I2C_BAT_SDA, + }, + { + /* I2C6 */ + .name = "ppc1", + .port = I2C_PORT_USB_C1_PPC, + .kbps = 1000, + .scl = GPIO_EC_I2C_USB_C1_MIX_SCL, + .sda = GPIO_EC_I2C_USB_C1_MIX_SDA, + .flags = I2C_PORT_FLAG_DYNAMIC_SPEED, + }, + { + /* I2C7 */ + .name = "eeprom", + .port = I2C_PORT_EEPROM, + .kbps = 400, + .scl = GPIO_EC_I2C_MISC_SCL_R, + .sda = GPIO_EC_I2C_MISC_SDA_R, + }, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* + * I2C controllers are initialized in main.c. This sets the speed much + * later, but before I2C peripherals are initialized. + */ +static void set_board_legacy_i2c_speeds(void) +{ + if (get_board_id() >= BOARD_ID_FAST_PLUS_CAPABLE) + return; + + ccprints("setting USB DB I2C buses to 400 kHz\n"); + + i2c_set_freq(I2C_PORT_USB_C1_TCPC, I2C_FREQ_400KHZ); + i2c_set_freq(I2C_PORT_USB_C1_PPC, I2C_FREQ_400KHZ); +} +DECLARE_HOOK(HOOK_INIT, set_board_legacy_i2c_speeds, HOOK_PRIO_INIT_I2C - 1); diff --git a/board/vell/keyboard.c b/board/vell/keyboard.c new file mode 100644 index 0000000000..a9f033130d --- /dev/null +++ b/board/vell/keyboard.c @@ -0,0 +1,25 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "keyboard_scan.h" +#include "timer.h" + +/* Keyboard scan setting */ +__override struct keyboard_scan_config keyscan_config = { + /* Increase from 50 us, because KSO_02 passes through the H1. */ + .output_settle_us = 80, + /* Other values should be the same as the default configuration. */ + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + }, +}; diff --git a/board/vell/led.c b/board/vell/led.c new file mode 100644 index 0000000000..68945ec79e --- /dev/null +++ b/board/vell/led.c @@ -0,0 +1,93 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Brya specific PWM LED settings: there are 2 LEDs on each side of the board, + * each one can be controlled separately. The LED colors are white or amber, + * and the default behavior is tied to the charging process: both sides are + * amber while charging the battery and white when the battery is charged. + */ + +#include <stdint.h> + +#include "common.h" +#include "compile_time_macros.h" +#include "ec_commands.h" +#include "led_pwm.h" +#include "pwm.h" +#include "util.h" + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_LEFT_LED, + EC_LED_ID_RIGHT_LED, +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +/* + * We only have a white and an amber LED, so setting any other color results in + * both LEDs being off. + */ +struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT] = { + /* Amber, White */ + [EC_LED_COLOR_RED] = { 0, 0 }, + [EC_LED_COLOR_GREEN] = { 0, 0 }, + [EC_LED_COLOR_BLUE] = { 0, 0 }, + [EC_LED_COLOR_YELLOW] = { 0, 0 }, + [EC_LED_COLOR_WHITE] = { 0, 100 }, + [EC_LED_COLOR_AMBER] = { 100, 0 }, +}; + +/* Two logical LEDs with amber and white channels. */ +struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT] = { + { + .ch0 = PWM_CH_LED1, + .ch1 = PWM_CH_LED2, + .ch2 = PWM_LED_NO_CHANNEL, + .enable = &pwm_enable, + .set_duty = &pwm_set_duty, + }, + { + .ch0 = PWM_CH_LED3, + .ch1 = PWM_CH_LED4, + .ch2 = PWM_LED_NO_CHANNEL, + .enable = &pwm_enable, + .set_duty = &pwm_set_duty, + }, +}; + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + memset(brightness_range, '\0', + sizeof(*brightness_range) * EC_LED_COLOR_COUNT); + brightness_range[EC_LED_COLOR_AMBER] = 100; + brightness_range[EC_LED_COLOR_WHITE] = 100; +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + enum pwm_led_id pwm_id; + + /* Convert ec_led_id to pwm_led_id. */ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + pwm_id = PWM_LED0; + break; + case EC_LED_ID_RIGHT_LED: + pwm_id = PWM_LED1; + break; + default: + return EC_ERROR_UNKNOWN; + } + + if (brightness[EC_LED_COLOR_WHITE]) + set_pwm_led_color(pwm_id, EC_LED_COLOR_WHITE); + else if (brightness[EC_LED_COLOR_AMBER]) + set_pwm_led_color(pwm_id, EC_LED_COLOR_AMBER); + else + /* Otherwise, the "color" is "off". */ + set_pwm_led_color(pwm_id, -1); + + return EC_SUCCESS; +} diff --git a/board/vell/pwm.c b/board/vell/pwm.c new file mode 100644 index 0000000000..6e662f8e7d --- /dev/null +++ b/board/vell/pwm.c @@ -0,0 +1,71 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" + +#include "compile_time_macros.h" +#include "hooks.h" +#include "pwm.h" +#include "pwm_chip.h" + +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED2] = { + .channel = 0, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, + [PWM_CH_LED3] = { + .channel = 1, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, + [PWM_CH_LED1] = { + .channel = 2, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, + [PWM_CH_KBLIGHT] = { + .channel = 3, + .flags = 0, + /* + * Set PWM frequency to multiple of 50 Hz and 60 Hz to prevent + * flicker. Higher frequencies consume similar average power to + * lower PWM frequencies, but higher frequencies record a much + * lower maximum power. + */ + .freq = 2400, + }, + [PWM_CH_FAN] = { + .channel = 5, + .flags = PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_DSLEEP, + .freq = 1000 + }, + [PWM_CH_LED4] = { + .channel = 7, + .flags = PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP, + .freq = 4800, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +static void board_pwm_init(void) +{ + /* + * Turn on all the LED at 50%. + * Turn on the fan at 100%. + */ + pwm_enable(PWM_CH_LED1, 1); + pwm_set_duty(PWM_CH_LED1, 50); + pwm_enable(PWM_CH_LED2, 1); + pwm_set_duty(PWM_CH_LED2, 50); + pwm_enable(PWM_CH_LED3, 1); + pwm_set_duty(PWM_CH_LED3, 50); + pwm_enable(PWM_CH_LED4, 1); + pwm_set_duty(PWM_CH_LED4, 50); + + pwm_enable(PWM_CH_KBLIGHT, 1); + pwm_set_duty(PWM_CH_KBLIGHT, 50); +} +DECLARE_HOOK(HOOK_INIT, board_pwm_init, HOOK_PRIO_DEFAULT); diff --git a/board/vell/sensors.c b/board/vell/sensors.c new file mode 100644 index 0000000000..0a4b0198bd --- /dev/null +++ b/board/vell/sensors.c @@ -0,0 +1,418 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "common.h" +#include "accelgyro.h" +#include "adc.h" +#include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_lsm6dso.h" +#include "driver/als_tcs3400_public.h" +#include "hooks.h" +#include "motion_sense.h" +#include "temp_sensor.h" +#include "thermal.h" +#include "temp_sensor/thermistor.h" + +/* ADC configuration */ +struct adc_t adc_channels[] = { + [ADC_TEMP_SENSOR_1_DDR_SOC] = { + .name = "TEMP_DDR_SOC", + .input_ch = NPCX_ADC_CH0, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_TEMP_SENSOR_2_AMBIENT] = { + .name = "TEMP_AMBIENT", + .input_ch = NPCX_ADC_CH1, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_TEMP_SENSOR_3_CHARGER] = { + .name = "TEMP_CHARGER", + .input_ch = NPCX_ADC_CH6, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, + [ADC_TEMP_SENSOR_4_WWAN] = { + .name = "TEMP_WWAN", + .input_ch = NPCX_ADC_CH7, + .factor_mul = ADC_MAX_VOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +K_MUTEX_DEFINE(g_lid_accel_mutex); +K_MUTEX_DEFINE(g_base_accel_mutex); +static struct stprivate_data g_lis2dw12_data; +static struct lsm6dso_data lsm6dso_data; + +/* TODO(b/184779333): calibrate the orientation matrix on later board stage */ +static const mat33_fp_t lid_standard_ref = { + { 0, FLOAT_TO_FP(1), 0}, + { FLOAT_TO_FP(1), 0, 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +/* TODO(b/184779743): verify orientation matrix */ +static const mat33_fp_t base_standard_ref = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +/* TCS3400 private data */ +static struct als_drv_data_t g_tcs3400_data = { + .als_cal.scale = 1, + .als_cal.uscale = 0, + .als_cal.offset = 0, + .als_cal.channel_scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc from VPD */ + .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */ + }, +}; + +/* + * TODO: b/184702900 need to calibrate ALS/RGB sensor. At default settings, + * shining phone flashlight on sensor pegs all readings at 0xFFFF. + */ +static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = { + .calibration.rgb_cal[X] = { + .offset = 0, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0), + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + } + }, + .calibration.rgb_cal[Y] = { + .offset = 0, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0), + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + }, + }, + .calibration.rgb_cal[Z] = { + .offset = 0, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(1.0), + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + } + }, + .calibration.irt = INT_TO_FP(1), + .saturation.again = TCS_DEFAULT_AGAIN, + .saturation.atime = TCS_DEFAULT_ATIME, +}; + +struct motion_sensor_t motion_sensors[] = { + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LIS2DW12, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &lis2dw12_drv, + .mutex = &g_lid_accel_mutex, + .drv_data = &g_lis2dw12_data, + .int_signal = GPIO_EC_ACCEL_INT_R_L, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LIS2DW12_ADDR0, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .rot_standard_ref = &lid_standard_ref, /* identity matrix */ + .default_range = 2, /* g */ + .min_frequency = LIS2DW12_ODR_MIN_VAL, + .max_frequency = LIS2DW12_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSO, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dso_drv, + .mutex = &g_base_accel_mutex, + .drv_data = LSM6DSO_ST_DATA(lsm6dso_data, + MOTIONSENSE_TYPE_ACCEL), + .int_signal = GPIO_EC_IMU_INT_R_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g */ + .min_frequency = LSM6DSO_ODR_MIN_VAL, + .max_frequency = LSM6DSO_ODR_MAX_VAL, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 13000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LSM6DSO, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &lsm6dso_drv, + .mutex = &g_base_accel_mutex, + .drv_data = LSM6DSO_ST_DATA(lsm6dso_data, + MOTIONSENSE_TYPE_GYRO), + .int_signal = GPIO_EC_IMU_INT_R_L, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = LSM6DSO_ADDR0_FLAGS, + .default_range = 1000 | ROUND_UP_FLAG, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = LSM6DSO_ODR_MIN_VAL, + .max_frequency = LSM6DSO_ODR_MAX_VAL, + }, + + [CLEAR_ALS] = { + .name = "Clear Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_TCS3400, + .type = MOTIONSENSE_TYPE_LIGHT, + .location = MOTIONSENSE_LOC_CAMERA, + .drv = &tcs3400_drv, + .drv_data = &g_tcs3400_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1x, uscale = 0 */ + .min_frequency = TCS3400_LIGHT_MIN_FREQ, + .max_frequency = TCS3400_LIGHT_MAX_FREQ, + .config = { + /* Run ALS sensor in S0 */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 1000, + }, + }, + }, + + [RGB_ALS] = { + /* + * RGB channels read by CLEAR_ALS and so the i2c port and + * address do not need to be defined for RGB_ALS. + */ + .name = "RGB Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_TCS3400, + .type = MOTIONSENSE_TYPE_LIGHT_RGB, + .location = MOTIONSENSE_LOC_CAMERA, + .drv = &tcs3400_rgb_drv, + .drv_data = &g_tcs3400_rgb_data, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1x, uscale = 0 */ + }, +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +/* ALS instances when LPC mapping is needed. Each entry directs to a sensor. */ +const struct motion_sensor_t *motion_als_sensors[] = { + &motion_sensors[CLEAR_ALS], +}; +BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); + +static void baseboard_sensors_init(void) +{ + /* Enable gpio interrupt for lid accel sensor */ + gpio_enable_interrupt(GPIO_EC_ACCEL_INT_R_L); + /* Enable interrupt for the TCS3400 color light sensor */ + gpio_enable_interrupt(GPIO_EC_ALS_RGB_INT_R_L); + /* Enable gpio interrupt for base accelgyro sensor */ + gpio_enable_interrupt(GPIO_EC_IMU_INT_R_L); +} +DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_INIT_I2C + 1); + +/* Temperature sensor configuration */ +const struct temp_sensor_t temp_sensors[] = { + [TEMP_SENSOR_1_DDR_SOC] = { + .name = "DDR and SOC", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_1_DDR_SOC, + }, + [TEMP_SENSOR_2_AMBIENT] = { + .name = "Ambient", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_2_AMBIENT, + }, + [TEMP_SENSOR_3_CHARGER] = { + .name = "Charger", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_3_CHARGER, + }, + [TEMP_SENSOR_4_WWAN] = { + .name = "WWAN", + .type = TEMP_SENSOR_TYPE_BOARD, + .read = get_temp_3v3_30k9_47k_4050b, + .idx = ADC_TEMP_SENSOR_4_WWAN, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* + * TODO(b/180681346): update for Alder Lake/brya + * + * Alder Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at + * 130 C. However, sensor is located next to DDR, so we need to use the lower + * DDR temperature limit (85 C) + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; + +/* + * TODO(b/180681346): update for Alder Lake/brya + * + * Inductor limits - used for both charger and PP3300 regulator + * + * Need to use the lower of the charger IC, PP3300 regulator, and the inductors + * + * Charger max recommended temperature 100C, max absolute temperature 125C + * PP3300 regulator: operating range -40 C to 145 C + * + * Inductors: limit of 125c + * PCB: limit is 80c + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_AMBIENT \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(85), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(90), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(80), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_ambient = + THERMAL_AMBIENT; + +/* + * Inductor limits - used for both charger and PP3300 regulator + * + * Need to use the lower of the charger IC, PP3300 regulator, and the inductors + * + * Charger max recommended temperature 125C, max absolute temperature 150C + * PP3300 regulator: operating range -40 C to 125 C + * + * Inductors: limit of 125c + * PCB: limit is 80c + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CHARGER \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(105), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(120), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(65), \ + } +__maybe_unused static const struct ec_thermal_config thermal_charger = + THERMAL_CHARGER; + +/* + * TODO(b/180681346): update for brya WWAN module + */ +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_WWAN \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(130), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(130), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(100), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(60), \ + } +__maybe_unused static const struct ec_thermal_config thermal_wwan = + THERMAL_WWAN; + +struct ec_thermal_config thermal_params[] = { + [TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_2_AMBIENT] = THERMAL_AMBIENT, + [TEMP_SENSOR_3_CHARGER] = THERMAL_CHARGER, + [TEMP_SENSOR_4_WWAN] = THERMAL_WWAN, +}; +BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); + +static void board_thermals_init(void) +{ + if (get_board_id() == 1) { + /* + * Board ID 1 only has 3 sensors and the AMBIENT sensor + * ADC pins have been reassigned, so we're down to 2 + * sensors that can easily be configured. So, alias the + * AMBIENT sensor ADC channel to the unimplemented ADC + * slots. + */ + adc_channels[ADC_TEMP_SENSOR_3_CHARGER].input_ch = NPCX_ADC_CH1; + adc_channels[ADC_TEMP_SENSOR_4_WWAN].input_ch = NPCX_ADC_CH1; + } +} + +DECLARE_HOOK(HOOK_INIT, board_thermals_init, HOOK_PRIO_INIT_CHIPSET); diff --git a/board/vell/usbc_config.c b/board/vell/usbc_config.c new file mode 100644 index 0000000000..ba50928dd2 --- /dev/null +++ b/board/vell/usbc_config.c @@ -0,0 +1,449 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <stdint.h> +#include <stdbool.h> + +#include "cbi.h" +#include "charger.h" +#include "charge_ramp.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "driver/bc12/pi3usb9201_public.h" +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/syv682x_public.h" +#include "driver/retimer/bb_retimer_public.h" +#include "driver/tcpm/nct38xx.h" +#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/tcpci.h" +#include "ec_commands.h" +#include "fw_config.h" +#include "gpio.h" +#include "gpio_signal.h" +#include "hooks.h" +#include "ioexpander.h" +#include "system.h" +#include "task.h" +#include "task_id.h" +#include "timer.h" +#include "usbc_config.h" +#include "usbc_ppc.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +/* USBC TCPC configuration */ +const struct tcpc_config_t tcpc_config[] = { + [USBC_PORT_C0] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C0_C2_TCPC, + .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_NO_DEBUG_ACC_CONTROL, + }, + [USBC_PORT_C1] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C1_TCPC, + .addr_flags = PS8751_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V | + TCPC_FLAGS_CONTROL_VCONN, + }, + [USBC_PORT_C2] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C0_C2_TCPC, + .addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); +BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); + +/******************************************************************************/ +/* USB-A charging control */ + +const int usb_port_enable[USB_PORT_COUNT] = { + GPIO_EN_PP5000_USBA_R, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); + +/******************************************************************************/ + +/* USBC PPC configuration */ +struct ppc_config_t ppc_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0_C2_PPC, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + }, + [USBC_PORT_C1] = { + /* Compatible with Silicon Mitus SM536A0 */ + .i2c_port = I2C_PORT_USB_C1_PPC, + .i2c_addr_flags = NX20P3483_ADDR2_FLAGS, + .drv = &nx20p348x_drv, + }, + [USBC_PORT_C2] = { + .i2c_port = I2C_PORT_USB_C0_C2_PPC, + /* + * b/179987870 + * schematics I2C map says ADDR3 + */ + .i2c_addr_flags = SYV682X_ADDR2_FLAGS, + .drv = &syv682x_drv, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); + +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* USBC mux configuration - Alder Lake includes internal mux */ +static const struct usb_mux usbc0_tcss_usb_mux = { + .usb_port = USBC_PORT_C0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; +static const struct usb_mux usbc2_tcss_usb_mux = { + .usb_port = USBC_PORT_C2, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; + +/* + * USB3 DB mux configuration - the top level mux still needs to be set + * to the virtual_usb_mux_driver so the AP gets notified of mux changes + * and updates the TCSS configuration on state changes. + */ +static const struct usb_mux usbc1_usb3_db_retimer = { + .usb_port = USBC_PORT_C1, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, +}; + +const struct usb_mux usb_muxes[] = { + [USBC_PORT_C0] = { + .usb_port = USBC_PORT_C0, + .driver = &bb_usb_retimer, + .hpd_update = bb_retimer_hpd_update, + .i2c_port = I2C_PORT_USB_C0_C2_MUX, + .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc0_tcss_usb_mux, + }, + [USBC_PORT_C1] = { + /* PS8815 DB */ + .usb_port = USBC_PORT_C1, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, + .next_mux = &usbc1_usb3_db_retimer, + }, + [USBC_PORT_C2] = { + .usb_port = USBC_PORT_C2, + .driver = &bb_usb_retimer, + .hpd_update = bb_retimer_hpd_update, + .i2c_port = I2C_PORT_USB_C0_C2_MUX, + .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc2_tcss_usb_mux, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); + +/* BC1.2 charger detect configuration */ +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_USB_C0_C2_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_USB_C1_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + [USBC_PORT_C2] = { + .i2c_port = I2C_PORT_USB_C0_C2_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); + +/* + * USB C0 and C2 uses burnside bridge chips and have their reset + * controlled by their respective TCPC chips acting as GPIO expanders. + * + * ioex_init() is normally called before we take the TCPCs out of + * reset, so we need to start in disabled mode, then explicitly + * call ioex_init(). + */ + +struct ioexpander_config_t ioex_config[] = { + [IOEX_C0_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, + [IOEX_C2_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, + [IOEX_ID_1_C0_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, + [IOEX_ID_1_C2_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, + .drv = &nct38xx_ioexpander_drv, + .flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); + +#ifdef CONFIG_CHARGE_RAMP_SW + +/* + * TODO(b/181508008): tune this threshold + */ + +#define BC12_MIN_VOLTAGE 4400 + +/** + * Return true if VBUS is too low + */ +int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) +{ + int voltage; + + if (charger_get_vbus_voltage(port, &voltage)) + voltage = 0; + + if (voltage == 0) { + CPRINTS("%s: must be disconnected", __func__); + return 1; + } + + if (voltage < BC12_MIN_VOLTAGE) { + CPRINTS("%s: port %d: vbus %d lower than %d", __func__, + port, voltage, BC12_MIN_VOLTAGE); + return 1; + } + + return 0; +} + +#endif /* CONFIG_CHARGE_RAMP_SW */ + +__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) +{ + enum ioex_signal rst_signal; + + if (me->usb_port == USBC_PORT_C0) + rst_signal = IOEX_USB_C0_RT_RST_ODL; + else if (me->usb_port == USBC_PORT_C2) + rst_signal = IOEX_USB_C2_RT_RST_ODL; + else + return EC_ERROR_INVAL; + + /* + * We do not have a load switch for the burnside bridge chips, + * so we only need to sequence reset. + */ + + if (enable) { + /* + * Tpw, minimum time from VCC to RESET_N de-assertion is 100us. + * For boards that don't provide a load switch control, the + * retimer_init() function ensures power is up before calling + * this function. + */ + ioex_set_level(rst_signal, 1); + /* + * Allow 1ms time for the retimer to power up lc_domain + * which powers I2C controller within retimer + */ + msleep(1); + } else { + ioex_set_level(rst_signal, 0); + msleep(1); + } + return EC_SUCCESS; +} + +void board_reset_pd_mcu(void) +{ + /* + * TODO(b/203371200): figure out correct timing + */ + + gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 0); + gpio_set_level(GPIO_USB_C1_RST_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + + /* + * delay for power-on to reset-off and min. assertion time + */ + + msleep(20); + + gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 1); + gpio_set_level(GPIO_USB_C1_RST_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + + /* wait for chips to come up */ + + msleep(50); +} + +static void enable_ioex(int ioex) +{ + ioex_init(ioex); +} + +static void board_tcpc_init(void) +{ + /* Don't reset TCPCs after initial reset */ + if (!system_jumped_late()) { + board_reset_pd_mcu(); + + /* + * These IO expander pins are implemented using the + * C0/C2 TCPC, so they must be set up after the TCPC has + * been taken out of reset. + */ + enable_ioex(IOEX_C0_NCT38XX); + enable_ioex(IOEX_C2_NCT38XX); + } + + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL); + + /* Enable TCPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL); + + /* Enable BC1.2 interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); + + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0) + status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2; + + if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0) + status |= PD_STATUS_TCPC_ALERT_1; + + return status; +} + +int ppc_get_alert_status(int port) +{ + if (port == USBC_PORT_C0) + return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; + else if (port == USBC_PORT_C1) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + else if (port == USBC_PORT_C2) + return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0; + return 0; +} + +void tcpc_alert_event(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_C2_TCPC_INT_ODL: + schedule_deferred_pd_interrupt(USBC_PORT_C0); + break; + case GPIO_USB_C1_TCPC_INT_ODL: + schedule_deferred_pd_interrupt(USBC_PORT_C1); + break; + default: + break; + } +} + +void bc12_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); + break; + case GPIO_USB_C1_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); + break; + case GPIO_USB_C2_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12); + break; + default: + break; + } +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C0); + break; + case GPIO_USB_C1_PPC_INT_ODL: + nx20p348x_interrupt(USBC_PORT_C1); + break; + case GPIO_USB_C2_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C2); + break; + default: + break; + } +} + +void retimer_interrupt(enum gpio_signal signal) +{ + /* + * TODO(b/179513527): add USB-C support + */ +} + +__override bool board_is_dts_port(int port) +{ + return port == USBC_PORT_C0; +} + +__override bool board_is_tbt_usb4_port(int port) +{ + if (port == USBC_PORT_C0 || port == USBC_PORT_C2) + return true; + + return false; +} + +__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) +{ + if (!board_is_tbt_usb4_port(port)) + return TBT_SS_RES_0; + + return TBT_SS_TBT_GEN3; +} diff --git a/board/vell/usbc_config.h b/board/vell/usbc_config.h new file mode 100644 index 0000000000..f21e2c17dc --- /dev/null +++ b/board/vell/usbc_config.h @@ -0,0 +1,20 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Vell board-specific USB-C configuration */ + +#ifndef __CROS_EC_USBC_CONFIG_H +#define __CROS_EC_USBC_CONFIG_H + +#define CONFIG_USB_PD_PORT_MAX_COUNT 3 + +enum usbc_port { + USBC_PORT_C0 = 0, + USBC_PORT_C1, + USBC_PORT_C2, + USBC_PORT_COUNT +}; + +#endif /* __CROS_EC_USBC_CONFIG_H */ diff --git a/board/malefor/vif_override.xml b/board/vell/vif_override.xml index 32736caf64..32736caf64 100644 --- a/board/malefor/vif_override.xml +++ b/board/vell/vif_override.xml diff --git a/board/voema/board.c b/board/voema/board.c index ef428089a4..3fd41081de 100644 --- a/board/voema/board.c +++ b/board/voema/board.c @@ -121,15 +121,20 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -142,22 +147,27 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/voema/board.h b/board/voema/board.h index 3ae8c6e038..2f1326ee7a 100644 --- a/board/voema/board.h +++ b/board/voema/board.h @@ -11,13 +11,11 @@ /* Baseboard features */ #include "baseboard.h" -#ifdef BOARD_VOEMA /* * The RAM and flash size combination on the the NPCX797FC does not leave * any unused flash space that can be used to store the .init_rom section. */ #undef CONFIG_CHIP_INIT_ROM_REGION -#endif #define CONFIG_VBOOT_EFS2 @@ -53,12 +51,7 @@ TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) /* Sensors without hardware FIFO are in forced mode */ -#ifdef BOARD_VOEMA_NPCX796FC -#define CONFIG_ACCEL_FORCE_MODE_MASK \ - (BIT(LID_ACCEL) | BIT(CLEAR_ALS) | BIT(BASE_ACCEL)) -#else #define CONFIG_ACCEL_FORCE_MODE_MASK (board_accel_force_mode_mask()) -#endif #define CONFIG_LID_ANGLE #define CONFIG_LID_ANGLE_UPDATE @@ -190,10 +183,8 @@ enum usbc_port { }; void board_reset_pd_mcu(void); -#ifndef BOARD_VOEMA_NPCX796FC void motion_interrupt(enum gpio_signal signal); int board_accel_force_mode_mask(void); -#endif #endif /* !__ASSEMBLER__ */ diff --git a/board/voema/build.mk b/board/voema/build.mk index 0a0929babc..d7d771ebab 100644 --- a/board/voema/build.mk +++ b/board/voema/build.mk @@ -8,13 +8,7 @@ CHIP:=npcx CHIP_FAMILY:=npcx7 -# Limited boards with 796 variant and will use 797 moving forward. Set the -# modify the variant type to match. -ifeq ($(BOARD),voema_npcx796fc) -CHIP_VARIANT:=npcx7m6fc -else CHIP_VARIANT:=npcx7m7fc -endif BASEBOARD:=volteer diff --git a/board/voema/gpio.inc b/board/voema/gpio.inc index 4273fb8974..7506ccdbd1 100644 --- a/board/voema/gpio.inc +++ b/board/voema/gpio.inc @@ -26,11 +26,7 @@ GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) /* Sensor Interrupts */ GPIO_INT(EC_ALS_RGB_INT_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) -#ifndef BOARD_VOEMA_NPCX796FC GPIO_INT(EC_MB_ACCEL_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, motion_interrupt) -#else -GPIO(EC_MB_ACCEL_INT_L, PIN(5, 6), GPIO_INPUT | GPIO_PULL_UP) -#endif GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) /* diff --git a/board/voema/sensors.c b/board/voema/sensors.c index 005bad5af8..071dc5247b 100644 --- a/board/voema/sensors.c +++ b/board/voema/sensors.c @@ -286,8 +286,7 @@ static void baseboard_sensors_init(void) * TODO: If a SSFC for the base sensor is added, add the check * here. */ - if (IS_ENABLED(BOARD_VOEMA) && get_cbi_ssfc_base_sensor() == - SSFC_SENSOR_BASE_ICM426XX) { + if (get_cbi_ssfc_base_sensor() == SSFC_SENSOR_BASE_ICM426XX) { gpio_enable_interrupt(GPIO_EC_MB_ACCEL_INT_L); motion_sensors[BASE_ACCEL] = icm_base_accel; motion_sensors[BASE_GYRO] = icm_base_gyro; @@ -303,7 +302,6 @@ static void baseboard_sensors_init(void) } DECLARE_HOOK(HOOK_INIT, baseboard_sensors_init, HOOK_PRIO_DEFAULT); -#ifndef BOARD_VOEMA_NPCX796FC void motion_interrupt(enum gpio_signal signal) { icm426xx_interrupt(signal); @@ -316,4 +314,3 @@ int board_accel_force_mode_mask(void) else return (BIT(LID_ACCEL) | BIT(CLEAR_ALS)); } -#endif diff --git a/board/voema_npcx796fc b/board/voema_npcx796fc deleted file mode 120000 index 172bf9e9be..0000000000 --- a/board/voema_npcx796fc +++ /dev/null @@ -1 +0,0 @@ -voema
\ No newline at end of file diff --git a/board/volet/board.c b/board/volet/board.c index a47bd3d8c6..66772a7656 100644 --- a/board/volet/board.c +++ b/board/volet/board.c @@ -181,23 +181,28 @@ const struct fan_t fans[FAN_CH_COUNT] = { * Reference that temperature and fan settings * are derived from data in b/167523658#39 */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(90), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(90), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_cpu, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_cpu, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_CPU, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_CPU, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/volteer/board.c b/board/volteer/board.c index 8c1be1bf64..22c1eea0a4 100644 --- a/board/volteer/board.c +++ b/board/volteer/board.c @@ -96,17 +96,22 @@ const struct fan_t fans[FAN_CH_COUNT] = { * 130 C. However, sensor is located next to DDR, so we need to use the lower * DDR temperature limit (85 C) */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(35), - .temp_fan_max = C_TO_K(50), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(35), \ + .temp_fan_max = C_TO_K(50), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; /* * Inductor limits - used for both charger and PP3300 regulator @@ -119,24 +124,29 @@ const static struct ec_thermal_config thermal_cpu = { * Inductors: limit of 125c * PCB: limit is 80c */ -const static struct ec_thermal_config thermal_inductor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(80), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - }, - .temp_fan_off = C_TO_K(40), - .temp_fan_max = C_TO_K(55), -}; - +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_INDUCTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(80), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + }, \ + .temp_fan_off = C_TO_K(40), \ + .temp_fan_max = C_TO_K(55), \ + } +__maybe_unused static const struct ec_thermal_config thermal_inductor = + THERMAL_INDUCTOR; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_inductor, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_inductor, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_INDUCTOR, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_INDUCTOR, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/volteer/board.h b/board/volteer/board.h index 6a186bd894..2d941549c5 100644 --- a/board/volteer/board.h +++ b/board/volteer/board.h @@ -11,14 +11,6 @@ /* Baseboard features */ #include "baseboard.h" -/* - * Create an EC build that requires AP-driven mode entry to facilitate debugging - * b/177105656. - */ -#ifdef BOARD_VOLTEER_APMODEENTRY -#define CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY -#endif - #ifdef BOARD_VOLTEER_NPCX797FC /* * The RAM and flash size combination on the the NPCX797FC does not leave diff --git a/board/volteer/usbc_config.c b/board/volteer/usbc_config.c index 0adfe98107..e03ef0e203 100644 --- a/board/volteer/usbc_config.c +++ b/board/volteer/usbc_config.c @@ -340,12 +340,15 @@ static void board_tcpc_init(void) gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); +#ifndef CONFIG_ZEPHYR /* Enable BC1.2 interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); +#endif /* !CONFIG_ZEPHYR */ } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); +#ifndef CONFIG_ZEPHYR /******************************************************************************/ /* BC1.2 charger detect configuration */ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { @@ -359,6 +362,7 @@ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { }, }; BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); +#endif /* !CONFIG_ZEPHYR */ /******************************************************************************/ /* TCPC support routines */ diff --git a/board/volteer_apmodeentry b/board/volteer_apmodeentry deleted file mode 120000 index f2f3e1d253..0000000000 --- a/board/volteer_apmodeentry +++ /dev/null @@ -1 +0,0 @@ -volteer
\ No newline at end of file diff --git a/board/volteer_ish/board.h b/board/volteer_ish/board.h index 097ee25750..527432285c 100644 --- a/board/volteer_ish/board.h +++ b/board/volteer_ish/board.h @@ -35,7 +35,7 @@ #define CONFIG_ACCEL_BMA255 /* Host command over HECI */ -#define CONFIG_HOSTCMD_HECI +#define CONFIG_HOST_INTERFACE_HECI #define CONFIG_MKBP_EVENT #define CONFIG_MKBP_USE_HECI diff --git a/board/voxel/board.c b/board/voxel/board.c index 830300620f..c57d03b9d3 100644 --- a/board/voxel/board.c +++ b/board/voxel/board.c @@ -180,23 +180,28 @@ const struct fan_t fans[FAN_CH_COUNT] = { * Reference that temperature and fan settings * are derived from data in b/167523658#39 */ -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(75), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(68), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(90), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(75), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(68), \ + }, \ + .temp_fan_off = C_TO_K(25), \ + .temp_fan_max = C_TO_K(90), \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[] = { - [TEMP_SENSOR_1_CHARGER] = thermal_cpu, - [TEMP_SENSOR_2_PP3300_REGULATOR] = thermal_cpu, - [TEMP_SENSOR_3_DDR_SOC] = thermal_cpu, - [TEMP_SENSOR_4_FAN] = thermal_cpu, + [TEMP_SENSOR_1_CHARGER] = THERMAL_CPU, + [TEMP_SENSOR_2_PP3300_REGULATOR] = THERMAL_CPU, + [TEMP_SENSOR_3_DDR_SOC] = THERMAL_CPU, + [TEMP_SENSOR_4_FAN] = THERMAL_CPU, }; BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); diff --git a/board/waddledoo2/board.c b/board/waddledoo2/board.c index e2d3bd8249..7a00064898 100644 --- a/board/waddledoo2/board.c +++ b/board/waddledoo2/board.c @@ -237,31 +237,41 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_a = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(70), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_A \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_a = THERMAL_A; -const static struct ec_thermal_config thermal_b = { - .temp_host = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(73), - [EC_TEMP_THRESH_HALT] = C_TO_K(85), - }, - .temp_host_release = { - [EC_TEMP_THRESH_WARN] = 0, - [EC_TEMP_THRESH_HIGH] = C_TO_K(65), - [EC_TEMP_THRESH_HALT] = 0, - }, -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_B \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(73), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(85), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_WARN] = 0, \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \ + [EC_TEMP_THRESH_HALT] = 0, \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_b = THERMAL_B; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; diff --git a/board/willow/board.h b/board/willow/board.h index a6907b9a9e..9ec0b9483b 100644 --- a/board/willow/board.h +++ b/board/willow/board.h @@ -81,7 +81,7 @@ #define IT8801_KEYBOARD_PWM_I2C_ADDR_FLAGS IT8801_I2C_ADDR1 /* Enable Accel over SPI */ -#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */ +#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI controller port (SPI2) */ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_EVENT diff --git a/board/woomax/board.c b/board/woomax/board.c index 7770804402..e45fd91623 100644 --- a/board/woomax/board.c +++ b/board/woomax/board.c @@ -755,29 +755,36 @@ const struct temp_sensor_t temp_sensors[] = { }; BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); -const static struct ec_thermal_config thermal_thermistor = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(95), - [EC_TEMP_THRESH_HALT] = C_TO_K(100), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(58), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_THERMISTOR \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(95), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_thermistor = + THERMAL_THERMISTOR; -const static struct ec_thermal_config thermal_cpu = { - .temp_host = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(95), - [EC_TEMP_THRESH_HALT] = C_TO_K(100), - }, - .temp_host_release = { - [EC_TEMP_THRESH_HIGH] = C_TO_K(90), - }, - .temp_fan_off = C_TO_K(25), - .temp_fan_max = C_TO_K(58), -}; +/* + * TODO(b/202062363): Remove when clang is fixed. + */ +#define THERMAL_CPU \ + { \ + .temp_host = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(95), \ + [EC_TEMP_THRESH_HALT] = C_TO_K(100), \ + }, \ + .temp_host_release = { \ + [EC_TEMP_THRESH_HIGH] = C_TO_K(90), \ + }, \ + } +__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU; struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT]; @@ -839,7 +846,7 @@ void hdmi_hpd_interrupt(enum gpio_signal signal) hook_call_deferred(&hdmi_hpd_handler_data, (2 * MSEC)); } -enum gpio_signal board_usbc_port_to_hpd_gpio(int port) +int board_usbc_port_to_hpd_gpio_or_ioex(int port) { /* USB-C0 always uses USB_C0_HPD */ if (port == 0) diff --git a/board/woomax/board.h b/board/woomax/board.h index d81c82f181..f5289f2bd1 100644 --- a/board/woomax/board.h +++ b/board/woomax/board.h @@ -194,15 +194,19 @@ static inline bool ec_config_has_mst_hub_rtd2141b(void) HAS_MST_HUB_RTD2141B); } -/* +/** + * @warning Callers must use gpio_or_ioex_set_level to handle the return result + * since either type of signal can be returned. + * * USB-C0 always uses USB_C0_HPD (= DP3_HPD). * USB-C1 OPT1 DB uses DP2_HPD. * USB-C1 OPT3 DB uses DP1_HPD via RTD2141B MST hub to drive AP * HPD, EC drives MST hub HPD input from USB-PD messages. + * + * @return GPIO (gpio_signal) or IOEX (ioex_signal) */ - -enum gpio_signal board_usbc_port_to_hpd_gpio(int port); -#define PORT_TO_HPD(port) board_usbc_port_to_hpd_gpio(port) +int board_usbc_port_to_hpd_gpio_or_ioex(int port); +#define PORT_TO_HPD(port) board_usbc_port_to_hpd_gpio_or_ioex(port) extern const struct usb_mux usbc0_pi3dpx1207_usb_retimer; extern const struct usb_mux usbc1_ps8802; diff --git a/board/wormdingler/battery.c b/board/wormdingler/battery.c index c76bb48031..bb444e59ee 100644 --- a/board/wormdingler/battery.c +++ b/board/wormdingler/battery.c @@ -60,6 +60,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 63, .discharging_min_c = -20, .discharging_max_c = 63, + .vendor_param_start = 0x70, }, }, /* BYD L21B2PG2 */ @@ -89,6 +90,7 @@ const struct board_batt_params board_battery_info[] = { .charging_max_c = 60, .discharging_min_c = -20, .discharging_max_c = 60, + .vendor_param_start = 0x70, }, }, }; diff --git a/board/wormdingler/board.c b/board/wormdingler/board.c index 796409cb80..d8bc04e4fd 100644 --- a/board/wormdingler/board.c +++ b/board/wormdingler/board.c @@ -668,25 +668,3 @@ uint16_t tcpc_get_alert_status(void) return status; } - -int battery_get_vendor_param(uint32_t param, uint32_t *value) -{ - int rv; - uint8_t data[16] = {}; - - /* only allow reading 0x70~0x7F, 16 byte data */ - if (param < 0x70 || param >= 0x80) - return EC_ERROR_ACCESS_DENIED; - - rv = sb_read_string(0x70, data, sizeof(data)); - if (rv) - return rv; - - *value = data[param - 0x70]; - return EC_SUCCESS; -} - -int battery_set_vendor_param(uint32_t param, uint32_t value) -{ - return EC_ERROR_UNIMPLEMENTED; -} diff --git a/board/wormdingler/board.h b/board/wormdingler/board.h index af0b5ee80d..83f0e98365 100644 --- a/board/wormdingler/board.h +++ b/board/wormdingler/board.h @@ -31,9 +31,6 @@ #define CONFIG_BATTERY_REVIVE_DISCONNECT #define CONFIG_BATTERY_FUEL_GAUGE #define CONFIG_BATTERY_VENDOR_PARAM -#define CONFIG_BATTERY_V2 -#define CONFIG_BATTERY_COUNT 1 -#define CONFIG_HOSTCMD_BATTERY_V2 /* Enable PD3.0 */ #define CONFIG_USB_PD_REV30 @@ -45,6 +42,7 @@ #define CONFIG_USB_PD_TCPM_MULTI_PS8XXX #define CONFIG_USB_PD_TCPM_PS8755 #define CONFIG_USB_PD_TCPM_PS8805 +#define CONFIG_USB_PD_TCPM_PS8805_FORCE_DID #define CONFIG_USBC_PPC_SN5S330 #define CONFIG_USB_PD_PORT_MAX_COUNT 2 diff --git a/board/zinger/board.c b/board/zinger/board.c index 540e615071..38b0227bdf 100644 --- a/board/zinger/board.c +++ b/board/zinger/board.c @@ -25,7 +25,7 @@ static uint32_t * const rw_rst = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE+CONFIG_RW_MEM_OFF+4); /* External interrupt EXTINT7 for external comparator on PA7 */ -void pd_rx_interrupt(void) +static void pd_rx_interrupt(void) { /* trigger reception handling */ pd_rx_handler(); diff --git a/board/zinger/board.h b/board/zinger/board.h index 82fb29f29e..7919c083d4 100644 --- a/board/zinger/board.h +++ b/board/zinger/board.h @@ -73,8 +73,8 @@ #undef CONFIG_WATCHDOG_PERIOD_MS #define CONFIG_WATCHDOG_PERIOD_MS 2300 -/* debug printf flash footprinf is about 1400 bytes */ -#define CONFIG_DEBUG_PRINTF +/* debug printf flash footprint is about 1400 bytes */ +#undef CONFIG_DEBUG_PRINTF #define UARTN CONFIG_UART_CONSOLE #define UARTN_BASE STM32_USART_BASE(CONFIG_UART_CONSOLE) diff --git a/board/zinger/build.mk b/board/zinger/build.mk index 566cf34ce0..c85eb9df4b 100644 --- a/board/zinger/build.mk +++ b/board/zinger/build.mk @@ -10,4 +10,4 @@ CHIP:=stm32 CHIP_FAMILY:=stm32f0 CHIP_VARIANT:=stm32f03x -board-y=board.o hardware.o runtime.o usb_pd_policy.o +board-y=board.o hardware.o runtime.o usb_pd_policy.o usb_pd_pdo.o diff --git a/board/zinger/runtime.c b/board/zinger/runtime.c index cb27cc0f03..0b6f1995f5 100644 --- a/board/zinger/runtime.c +++ b/board/zinger/runtime.c @@ -74,7 +74,7 @@ uint32_t task_set_event(task_id_t tskid, uint32_t event) return 0; } -void tim2_interrupt(void) +static void tim2_interrupt(void) { uint32_t stat = STM32_TIM_SR(2); diff --git a/board/zinger/usb_pd_pdo.c b/board/zinger/usb_pd_pdo.c new file mode 100644 index 0000000000..13f8407d6d --- /dev/null +++ b/board/zinger/usb_pd_pdo.c @@ -0,0 +1,17 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "compile_time_macros.h" +#include "usb_pd.h" +#include "usb_pd_pdo.h" + +/* Power Delivery Objects */ +const uint32_t pd_src_pdo[] = { + [PDO_IDX_5V] = PDO_FIXED(5000, RATED_CURRENT, PDO_FIXED_FLAGS), + [PDO_IDX_12V] = PDO_FIXED(12000, RATED_CURRENT, PDO_FIXED_FLAGS), + [PDO_IDX_20V] = PDO_FIXED(20000, RATED_CURRENT, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); +BUILD_ASSERT(ARRAY_SIZE(pd_src_pdo) == PDO_IDX_COUNT); diff --git a/board/zinger/usb_pd_pdo.h b/board/zinger/usb_pd_pdo.h new file mode 100644 index 0000000000..07b7129202 --- /dev/null +++ b/board/zinger/usb_pd_pdo.h @@ -0,0 +1,30 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_BOARD_ZINGER_USB_PD_PDO_H +#define __CROS_EC_BOARD_ZINGER_USB_PD_PDO_H + +/* Max current */ +#if defined(BOARD_ZINGER) +#define RATED_CURRENT 3000 +#elif defined(BOARD_MINIMUFFIN) +#define RATED_CURRENT 2250 +#endif + +/* Voltage indexes for the PDOs */ +enum volt_idx { + PDO_IDX_5V = 0, + PDO_IDX_12V = 1, + PDO_IDX_20V = 2, + + PDO_IDX_COUNT +}; + +#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | PDO_FIXED_DATA_SWAP) + +extern const uint32_t pd_src_pdo[3]; +extern const int pd_src_pdo_cnt; + +#endif /* __CROS_EC_BOARD_ZINGER_USB_PD_PDO_H */ diff --git a/board/zinger/usb_pd_policy.c b/board/zinger/usb_pd_policy.c index f47789e063..08314e7aa6 100644 --- a/board/zinger/usb_pd_policy.c +++ b/board/zinger/usb_pd_policy.c @@ -15,6 +15,7 @@ #include "timer.h" #include "util.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" /* ------------------------- Power supply control ------------------------ */ @@ -88,13 +89,6 @@ static timestamp_t fault_deadline; /* convert raw ADC value to mV */ #define ADC_TO_VOLT_MV(vbus) ((vbus)*VOLT_DIV*VDDA_MV/ADC_SCALE) -/* Max current */ -#if defined(BOARD_ZINGER) -#define RATED_CURRENT 3000 -#elif defined(BOARD_MINIMUFFIN) -#define RATED_CURRENT 2250 -#endif - /* Max current : 20% over rated current */ #define MAX_CURRENT VBUS_MA(RATED_CURRENT * 6/5) /* Fast short circuit protection : 50% over rated current */ @@ -154,26 +148,6 @@ static void discharge_voltage(int target_volt) /* ----------------------- USB Power delivery policy ---------------------- */ -#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | PDO_FIXED_DATA_SWAP) - -/* Voltage indexes for the PDOs */ -enum volt_idx { - PDO_IDX_5V = 0, - PDO_IDX_12V = 1, - PDO_IDX_20V = 2, - - PDO_IDX_COUNT -}; - -/* Power Delivery Objects */ -const uint32_t pd_src_pdo[] = { - [PDO_IDX_5V] = PDO_FIXED(5000, RATED_CURRENT, PDO_FIXED_FLAGS), - [PDO_IDX_12V] = PDO_FIXED(12000, RATED_CURRENT, PDO_FIXED_FLAGS), - [PDO_IDX_20V] = PDO_FIXED(20000, RATED_CURRENT, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); -BUILD_ASSERT(ARRAY_SIZE(pd_src_pdo) == PDO_IDX_COUNT); - /* PDO voltages (should match the table above) */ static const struct { enum volt select; /* GPIO configuration to select the voltage */ @@ -419,7 +393,7 @@ int pd_board_checks(void) } -void pd_adc_interrupt(void) +static void pd_adc_interrupt(void) { /* Clear flags */ STM32_ADC_ISR = 0x8e; diff --git a/builtin/limits.h b/builtin/limits.h index 5cbfa3e6d1..e5deb70291 100644 --- a/builtin/limits.h +++ b/builtin/limits.h @@ -6,6 +6,8 @@ #ifndef __CROS_EC_LIMITS_H_ #define __CROS_EC_LIMITS_H_ +#define CHAR_BIT 8 + #define ULONG_MAX 0xffffffffu #endif /* __CROS_EC_LIMITS_H_ */ diff --git a/chip/ish/build.mk b/chip/ish/build.mk index 9f220abd21..8072a20791 100644 --- a/chip/ish/build.mk +++ b/chip/ish/build.mk @@ -20,8 +20,8 @@ endif chip-y+=clock.o gpio.o system.o hwtimer.o uart.o flash.o ish_persistent_data.o chip-$(CONFIG_I2C)+=i2c.o chip-$(CONFIG_WATCHDOG)+=watchdog.o -chip-$(CONFIG_HOSTCMD_HECI)+=host_command_heci.o -chip-$(CONFIG_HOSTCMD_HECI)+=heci.o system_state_subsys.o ipc_heci.o +chip-$(CONFIG_HOST_INTERFACE_HECI)+=host_command_heci.o +chip-$(CONFIG_HOST_INTERFACE_HECI)+=heci.o system_state_subsys.o ipc_heci.o chip-$(CONFIG_HID_HECI)+=hid_subsys.o chip-$(CONFIG_HID_HECI)+=heci.o system_state_subsys.o ipc_heci.o chip-$(CONFIG_DMA_PAGING)+=dma.o diff --git a/chip/ish/uart.c b/chip/ish/uart.c index d958dc94c5..71d8a41397 100644 --- a/chip/ish/uart.c +++ b/chip/ish/uart.c @@ -122,7 +122,7 @@ int uart_read_char(void) return RBR(ISH_DEBUG_UART); } -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Read input FIFO until empty, then fill output FIFO */ uart_process_input(); diff --git a/chip/it83xx/build.mk b/chip/it83xx/build.mk index bbff9f009b..cffd7c68f8 100644 --- a/chip/it83xx/build.mk +++ b/chip/it83xx/build.mk @@ -29,7 +29,7 @@ chip-$(CONFIG_PWM)+=pwm.o chip-$(CONFIG_ADC)+=adc.o chip-$(CONFIG_DAC)+=dac.o chip-$(CONFIG_HOSTCMD_X86)+=lpc.o ec2i.o -chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o +chip-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o chip-$(CONFIG_SPI_CONTROLLER)+=spi_master.o chip-$(CONFIG_SPI)+=spi.o chip-$(CONFIG_PECI)+=peci.o diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 41f800721a..72cfa3e2b4 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -232,7 +232,7 @@ static void clock_set_pll(enum pll_freq_idx idx) ext_timer_ms(LOW_POWER_EXT_TIMER, EXT_PSR_32P768K_HZ, 1, 1, 5, 1, 0); task_clear_pending_irq(et_ctrl_regs[LOW_POWER_EXT_TIMER].irq); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* * Workaround for (b:70537592): * We have to set chip select pin as input mode in order to @@ -249,7 +249,7 @@ static void clock_set_pll(enum pll_freq_idx idx) #endif /* Update PLL settings. */ clock_pll_changed(); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #ifdef IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED /* Enable eSPI pad after changing PLL sequence. */ espi_enable_pad(1); @@ -301,7 +301,8 @@ void clock_init(void) */ IT83XX_GCTRL_RSTS = (IT83XX_GCTRL_RSTS & 0x3F) + 0x40; -#if defined(IT83XX_ESPI_RESET_MODULE_BY_FW) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(IT83XX_ESPI_RESET_MODULE_BY_FW) && \ + defined(CONFIG_HOST_INTERFACE_ESPI) /* * Because we don't support eSPI HW reset function (b/111480168) on DX * version, so we have to reset eSPI configurations during init to @@ -539,7 +540,7 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds) /* EC sleep */ ec_sleep = 1; #if defined(IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED) && \ -defined(CONFIG_HOSTCMD_ESPI) +defined(CONFIG_HOST_INTERFACE_ESPI) /* Disable eSPI pad. */ espi_enable_pad(0); #endif @@ -565,7 +566,7 @@ void clock_sleep_mode_wakeup_isr(void) /* trigger a reboot if wake up EC from sleep mode (system hibernate) */ if (clock_ec_wake_from_sleep()) { #if defined(IT83XX_ESPI_INHIBIT_CS_BY_PAD_DISABLED) && \ -defined(CONFIG_HOSTCMD_ESPI) +defined(CONFIG_HOST_INTERFACE_ESPI) /* * Enable eSPI pad. * We will not need to enable eSPI pad here if Dx is able to diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h index a5b4096c8b..d06aa8d204 100644 --- a/chip/it83xx/config_chip_it8xxx2.h +++ b/chip/it83xx/config_chip_it8xxx2.h @@ -82,15 +82,23 @@ #elif defined(CHIP_VARIANT_IT81302AX_1024) \ || defined(CHIP_VARIANT_IT81202AX_1024) \ || defined(CHIP_VARIANT_IT81302BX_1024) \ +|| defined(CHIP_VARIANT_IT81302BX_512) \ || defined(CHIP_VARIANT_IT81202BX_1024) -#define CONFIG_FLASH_SIZE_BYTES 0x00100000 + +#if defined(CHIP_VARIANT_IT81302BX_512) +#define CONFIG_FLASH_SIZE_BYTES 0x00080000 +#define CONFIG_RAM_BASE 0x80080000 +#else +#define CONFIG_FLASH_SIZE_BYTES 0x00100000 #define CONFIG_RAM_BASE 0x80100000 +/* Set ILM (instruction local memory) size up to 1M bytes */ +#define IT83XX_CHIP_FLASH_SIZE_1MB +#endif + #define CONFIG_RAM_SIZE 0x0000f000 /* Embedded flash is KGD */ #define IT83XX_CHIP_FLASH_IS_KGD -/* Set ILM (instruction local memory) size up to 1M bytes */ -#define IT83XX_CHIP_FLASH_SIZE_1MB /* chip id is 3 bytes */ #define IT83XX_CHIP_ID_3BYTES /* diff --git a/chip/it83xx/ec2i.c b/chip/it83xx/ec2i.c index be02a8f813..5542d455a9 100644 --- a/chip/it83xx/ec2i.c +++ b/chip/it83xx/ec2i.c @@ -20,7 +20,7 @@ static const struct ec2i_t keyboard_settings[] = { /* Set IRQ=01h for logical device */ {HOST_INDEX_IRQNUMX, 0x01}, /* Configure IRQTP for KBC. */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* * Interrupt request type select (IRQTP) for KBC. * bit 1, 0: IRQ request is buffered and applied to SERIRQ diff --git a/chip/it83xx/intc.c b/chip/it83xx/intc.c index 80abfaad63..45fff30c1e 100644 --- a/chip/it83xx/intc.c +++ b/chip/it83xx/intc.c @@ -19,7 +19,7 @@ int __ram_code intc_get_ec_int(void) return ec_int; } -void intc_cpu_int_group_5(void) +static void intc_cpu_int_group_5(void) { /* Determine interrupt number. */ int intc_group_5 = intc_get_ec_int(); @@ -40,7 +40,7 @@ void intc_cpu_int_group_5(void) } DECLARE_IRQ(CPU_INT_GROUP_5, intc_cpu_int_group_5, 2); -void intc_cpu_int_group_4(void) +static void intc_cpu_int_group_4(void) { /* Determine interrupt number. */ int intc_group_4 = intc_get_ec_int(); @@ -73,7 +73,7 @@ void intc_cpu_int_group_4(void) } DECLARE_IRQ(CPU_INT_GROUP_4, intc_cpu_int_group_4, 2); -void intc_cpu_int_group_12(void) +static void intc_cpu_int_group_12(void) { /* Determine interrupt number. */ int intc_group_12 = intc_get_ec_int(); @@ -84,7 +84,7 @@ void intc_cpu_int_group_12(void) peci_interrupt(); break; #endif -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI case IT83XX_IRQ_ESPI: espi_interrupt(); break; @@ -118,7 +118,7 @@ void intc_cpu_int_group_12(void) } DECLARE_IRQ(CPU_INT_GROUP_12, intc_cpu_int_group_12, 2); -void intc_cpu_int_group_7(void) +static void intc_cpu_int_group_7(void) { /* Determine interrupt number. */ int intc_group_7 = intc_get_ec_int(); @@ -140,7 +140,7 @@ void intc_cpu_int_group_7(void) } DECLARE_IRQ(CPU_INT_GROUP_7, intc_cpu_int_group_7, 2); -void intc_cpu_int_group_6(void) +static void intc_cpu_int_group_6(void) { /* Determine interrupt number. */ int intc_group_6 = intc_get_ec_int(); diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c index 867d9e024f..8a90bd426d 100644 --- a/chip/it83xx/lpc.c +++ b/chip/it83xx/lpc.c @@ -136,7 +136,7 @@ static void keyboard_irq_assert(void) */ static void lpc_generate_smi(void) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_set_wire(VW_SMI_L, 0); udelay(65); espi_vw_set_wire(VW_SMI_L, 1); @@ -149,7 +149,7 @@ static void lpc_generate_smi(void) static void lpc_generate_sci(void) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_set_wire(VW_SCI_L, 0); udelay(65); espi_vw_set_wire(VW_SCI_L, 1); @@ -377,7 +377,7 @@ void lpc_clear_acpi_status_mask(uint8_t mask) pm_set_status(LPC_ACPI_CMD, mask, 0); } -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI int lpc_get_pltrst_asserted(void) { return !gpio_get_level(GPIO_PCH_PLTRST_L); @@ -688,7 +688,7 @@ static void lpc_init(void) */ IT83XX_GCTRL_SPCTRL1 |= 0xC2; -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI gpio_enable_interrupt(GPIO_PCH_PLTRST_L); #endif @@ -711,7 +711,7 @@ static void lpc_init(void) task_clear_pending_irq(IT83XX_IRQ_PMC3_IN); task_enable_irq(IT83XX_IRQ_PMC3_IN); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_init(); #endif /* Sufficiently initialized */ @@ -726,7 +726,7 @@ static void lpc_init(void) */ DECLARE_HOOK(HOOK_INIT, lpc_init, HOOK_PRIO_INIT_LPC); -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI void lpcrst_interrupt(enum gpio_signal signal) { if (lpc_get_pltrst_asserted()) diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 34a2ddd6ae..39aba42315 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -1456,7 +1456,7 @@ enum bram_indices { BRAM_IDX_EC_LOG_STATUS = 0xc, /* offset 0x0d ~ 0x1f are reserved for future use. */ -#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) || defined(CONFIG_HOST_INTERFACE_ESPI) /* * offset 0x20 ~ 0x7b are reserved for future use. * (apply to x86 platform) @@ -1508,7 +1508,7 @@ enum bram_ec_logs_status { * And they will be used to save panic data if the GPG1 reset mechanism * is enabled. */ -#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) || defined(CONFIG_HOST_INTERFACE_ESPI) /* offset 0x80 ~ 0xbf */ #define IT83XX_BRAM_BANK1(i) REG8(IT83XX_BRAM_BASE + 0x80 + i) #else diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index 16871e5826..ae7fd627bf 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -50,7 +50,7 @@ static void clear_reset_flags(void) } DECLARE_HOOK(HOOK_INIT, clear_reset_flags, HOOK_PRIO_LAST); -#if !defined(CONFIG_HOSTCMD_LPC) && !defined(CONFIG_HOSTCMD_ESPI) +#if !defined(CONFIG_HOST_INTERFACE_LPC) && !defined(CONFIG_HOST_INTERFACE_ESPI) static void system_save_panic_data_to_bram(void) { uint8_t *ptr = (uint8_t *)PANIC_DATA_PTR; diff --git a/chip/lm4/adc.c b/chip/lm4/adc.c index 13b5ebdebd..9c52cbbdd7 100644 --- a/chip/lm4/adc.c +++ b/chip/lm4/adc.c @@ -191,10 +191,10 @@ static void handle_interrupt(int ss) task_set_event(id, TASK_EVENT_ADC_DONE); } -void ss0_interrupt(void) { handle_interrupt(0); } -void ss1_interrupt(void) { handle_interrupt(1); } -void ss2_interrupt(void) { handle_interrupt(2); } -void ss3_interrupt(void) { handle_interrupt(3); } +static void ss0_interrupt(void) { handle_interrupt(0); } +static void ss1_interrupt(void) { handle_interrupt(1); } +static void ss2_interrupt(void) { handle_interrupt(2); } +static void ss3_interrupt(void) { handle_interrupt(3); } DECLARE_IRQ(LM4_IRQ_ADC0_SS0, ss0_interrupt, 2); DECLARE_IRQ(LM4_IRQ_ADC0_SS1, ss1_interrupt, 2); diff --git a/chip/lm4/build.mk b/chip/lm4/build.mk index 26419d3a04..c1d7787bf3 100644 --- a/chip/lm4/build.mk +++ b/chip/lm4/build.mk @@ -20,7 +20,7 @@ chip-$(CONFIG_EEPROM)+=eeprom.o chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o -chip-$(CONFIG_HOSTCMD_LPC)+=lpc.o +chip-$(CONFIG_HOST_INTERFACE_LPC)+=lpc.o chip-$(CONFIG_PECI)+=peci.o # pwm functions are implemented with the fan functions chip-$(CONFIG_PWM)+=pwm.o fan.o diff --git a/chip/lm4/config_chip.h b/chip/lm4/config_chip.h index 4e442004c9..8e1ea51785 100644 --- a/chip/lm4/config_chip.h +++ b/chip/lm4/config_chip.h @@ -93,7 +93,7 @@ /* Optional features present on this chip */ #define CONFIG_ADC #define CONFIG_HOSTCMD_ALIGNED -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_PECI #define CONFIG_RTC #define CONFIG_SWITCH diff --git a/chip/lm4/gpio.c b/chip/lm4/gpio.c index 841bfdb214..fab3c97f59 100644 --- a/chip/lm4/gpio.c +++ b/chip/lm4/gpio.c @@ -331,7 +331,7 @@ static void gpio_interrupt(int port, uint32_t mis) * the port, then call the main handler above. */ #define GPIO_IRQ_FUNC(irqfunc, gpiobase) \ - void irqfunc(void) \ + static void irqfunc(void) \ { \ uint32_t mis = LM4_GPIO_MIS(gpiobase); \ LM4_GPIO_ICR(gpiobase) = mis; \ diff --git a/chip/lm4/hwtimer.c b/chip/lm4/hwtimer.c index 44e1c2fb27..5fb2366f7d 100644 --- a/chip/lm4/hwtimer.c +++ b/chip/lm4/hwtimer.c @@ -42,7 +42,7 @@ void __hw_clock_source_set(uint32_t ts) LM4_TIMER_TAV(6) = 0xffffffff - ts; } -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { uint32_t status = LM4_TIMER_RIS(6); diff --git a/chip/lm4/i2c.c b/chip/lm4/i2c.c index 56084c38e6..69c76b9eb7 100644 --- a/chip/lm4/i2c.c +++ b/chip/lm4/i2c.c @@ -398,12 +398,12 @@ static void handle_interrupt(int port) task_set_event(id, TASK_EVENT_I2C_IDLE); } -void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) { handle_interrupt(3); } -void i2c4_interrupt(void) { handle_interrupt(4); } -void i2c5_interrupt(void) { handle_interrupt(5); } +static void i2c0_interrupt(void) { handle_interrupt(0); } +static void i2c1_interrupt(void) { handle_interrupt(1); } +static void i2c2_interrupt(void) { handle_interrupt(2); } +static void i2c3_interrupt(void) { handle_interrupt(3); } +static void i2c4_interrupt(void) { handle_interrupt(4); } +static void i2c5_interrupt(void) { handle_interrupt(5); } DECLARE_IRQ(LM4_IRQ_I2C0, i2c0_interrupt, 2); DECLARE_IRQ(LM4_IRQ_I2C1, i2c1_interrupt, 2); diff --git a/chip/lm4/keyboard_raw.c b/chip/lm4/keyboard_raw.c index 81af0efdde..526a6bad20 100644 --- a/chip/lm4/keyboard_raw.c +++ b/chip/lm4/keyboard_raw.c @@ -108,7 +108,7 @@ void keyboard_raw_enable_interrupt(int enable) /** * Interrupt handler for the entire GPIO bank of keyboard rows. */ -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear all pending keyboard interrupts */ LM4_GPIO_ICR(KB_SCAN_ROW_GPIO) = 0xff; diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c index 6e3c39220d..3f1b7b0b44 100644 --- a/chip/lm4/lpc.c +++ b/chip/lm4/lpc.c @@ -542,7 +542,7 @@ DECLARE_DEFERRED(lpc_chipset_reset); /** * LPC interrupt handler */ -void lpc_interrupt(void) +static void lpc_interrupt(void) { uint32_t mis = LM4_LPC_LPCMIS; uint32_t st; diff --git a/chip/lm4/system.c b/chip/lm4/system.c index 56bd1a82fd..e4480de01d 100644 --- a/chip/lm4/system.c +++ b/chip/lm4/system.c @@ -334,7 +334,7 @@ void system_reset_rtc_alarm(void) /** * Hibernate module interrupt */ -void __hibernate_irq(void) +static void __hibernate_irq(void) { system_reset_rtc_alarm(); } diff --git a/chip/lm4/uart.c b/chip/lm4/uart.c index 7ccea9eb75..83136d0b46 100644 --- a/chip/lm4/uart.c +++ b/chip/lm4/uart.c @@ -101,7 +101,7 @@ static void uart_clear_rx_fifo(int channel) /** * Interrupt handler for UART0 */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Clear transmit and receive interrupt status */ LM4_UART_ICR(0) = 0x70; @@ -118,12 +118,12 @@ DECLARE_IRQ(LM4_IRQ_UART0, uart_ec_interrupt, 1); /** * Interrupt handler for Host UART */ -void uart_host_interrupt(void) +static void uart_host_interrupt(void) { /* Clear transmit and receive interrupt status */ LM4_UART_ICR(CONFIG_UART_HOST) = 0x70; -#ifdef CONFIG_HOSTCMD_LPC +#ifdef CONFIG_HOST_INTERFACE_LPC /* * If we have space in our FIFO and a character is pending in LPC, * handle that character. diff --git a/chip/max32660/gpio_chip.c b/chip/max32660/gpio_chip.c index 5fe38cd657..1ef73890ec 100644 --- a/chip/max32660/gpio_chip.c +++ b/chip/max32660/gpio_chip.c @@ -228,7 +228,7 @@ static void gpio_interrupt(int port, uint32_t mis) * interrupt handler and clear the GPIO hardware interrupt status. */ #define GPIO_IRQ_FUNC(irqfunc, gpiobase) \ - void irqfunc(void) \ + static void irqfunc(void) \ { \ mxc_gpio_regs_t *gpio = MXC_GPIO_GET_GPIO(gpiobase); \ uint32_t mis = gpio->int_stat; \ diff --git a/chip/max32660/i2c_chip.c b/chip/max32660/i2c_chip.c index f28e85f0ca..f60764662d 100644 --- a/chip/max32660/i2c_chip.c +++ b/chip/max32660/i2c_chip.c @@ -410,7 +410,7 @@ void i2c_slave_service(i2c_req_t *req) /** * I2C0_IRQHandler() - Async Handler for I2C Slave driver. */ -void I2C0_IRQHandler(void) +static void I2C0_IRQHandler(void) { i2c_slave_handler(i2c_bus_ports[0]); } @@ -418,7 +418,7 @@ void I2C0_IRQHandler(void) /** * I2C1_IRQHandler() - Async Handler for I2C Slave driver. */ -void I2C1_IRQHandler(void) +static void I2C1_IRQHandler(void) { i2c_slave_handler(i2c_bus_ports[1]); } diff --git a/chip/max32660/uart_chip.c b/chip/max32660/uart_chip.c index c30a6ebd45..4b254dbf8b 100644 --- a/chip/max32660/uart_chip.c +++ b/chip/max32660/uart_chip.c @@ -221,7 +221,7 @@ int uart_read_char(void) /** * Interrupt handlers for UART */ -void uart_rxtx_interrupt(void) +static void uart_rxtx_interrupt(void) { /* Process the Console Input */ uart_process_input(); diff --git a/chip/mchp/adc.c b/chip/mchp/adc.c index d40a8a9d1c..9de5476077 100644 --- a/chip/mchp/adc.c +++ b/chip/mchp/adc.c @@ -139,7 +139,7 @@ static void adc_init(void) } DECLARE_HOOK(HOOK_INIT, adc_init, HOOK_PRIO_INIT_ADC); -void adc_interrupt(void) +static void adc_interrupt(void) { MCHP_INT_DISABLE(MCHP_ADC_GIRQ) = MCHP_ADC_GIRQ_SINGLE_BIT; diff --git a/chip/mchp/build.mk b/chip/mchp/build.mk index 155fbf385f..226fe23363 100644 --- a/chip/mchp/build.mk +++ b/chip/mchp/build.mk @@ -32,7 +32,7 @@ endif chip-y=clock.o gpio.o hwtimer.o system.o uart.o port80.o tfdp.o chip-$(CONFIG_ADC)+=adc.o chip-$(CONFIG_DMA)+=dma.o -chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o +chip-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o diff --git a/chip/mchp/clock.c b/chip/mchp/clock.c index 362025ee1c..7a3914194b 100644 --- a/chip/mchp/clock.c +++ b/chip/mchp/clock.c @@ -395,7 +395,7 @@ static void prepare_for_deep_sleep(void) #endif -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_INT_SOURCE(22) = MCHP_INT22_WAKE_ONLY_ESPI; MCHP_INT_ENABLE(22) = MCHP_INT22_WAKE_ONLY_ESPI; #else @@ -475,7 +475,7 @@ static void resume_from_deep_sleep(void) */ MCHP_PCR_SLP_EN3 |= (MCHP_PCR_SLP_EN3_HTMR0); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #ifdef CONFIG_POWER_S0IX MCHP_INT_DISABLE(22) = MCHP_INT22_WAKE_ONLY_ESPI; MCHP_INT_SOURCE(22) = MCHP_INT22_WAKE_ONLY_ESPI; diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c index 8a38a82688..778990b852 100644 --- a/chip/mchp/espi.c +++ b/chip/mchp/espi.c @@ -1074,7 +1074,7 @@ const FPVW girq25_vw_handlers[MCHP_GIRQ25_NUM_M2S] = { }; /* Interrupt handler for eSPI virtual wires in MSVW00 - MSVW01 */ -void espi_mswv1_interrupt(void) +static void espi_mswv1_interrupt(void) { uint32_t d, girq24_result, bpos; @@ -1095,7 +1095,7 @@ DECLARE_IRQ(MCHP_IRQ_GIRQ24, espi_mswv1_interrupt, 2); /* Interrupt handler for eSPI virtual wires in MSVW07 - MSVW10 */ -void espi_msvw2_interrupt(void) +static void espi_msvw2_interrupt(void) { uint32_t d, girq25_result, bpos; @@ -1156,7 +1156,7 @@ DECLARE_IRQ(MCHP_IRQ_GIRQ25, espi_msvw2_interrupt, 2); * equivalent to eSPI Platform Reset. * */ -void espi_reset_isr(void) +static void espi_reset_isr(void) { uint8_t erst; @@ -1198,7 +1198,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_RESET, espi_reset_isr, 3); * eSPI Virtual Wire channel enable handler * Must disable once VW Enable is set by eSPI Master */ -void espi_vw_en_isr(void) +static void espi_vw_en_isr(void) { MCHP_INT_DISABLE(MCHP_ESPI_GIRQ) = MCHP_ESPI_VW_EN_GIRQ_BIT; MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) = MCHP_ESPI_VW_EN_GIRQ_BIT; @@ -1218,7 +1218,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_VW_EN, espi_vw_en_isr, 2); /* * eSPI OOB TX and OOB channel enable change interrupt handler */ -void espi_oob_tx_isr(void) +static void espi_oob_tx_isr(void) { uint32_t sts; @@ -1245,7 +1245,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_OOB_UP, espi_oob_tx_isr, 2); /* eSPI OOB RX interrupt handler */ -void espi_oob_rx_isr(void) +static void espi_oob_rx_isr(void) { uint32_t sts; @@ -1262,7 +1262,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_OOB_DN, espi_oob_rx_isr, 2); * eSPI Flash Channel enable change and data transfer * interrupt handler */ -void espi_fc_isr(void) +static void espi_fc_isr(void) { uint32_t sts; @@ -1290,7 +1290,7 @@ DECLARE_IRQ(MCHP_IRQ_ESPI_FC, espi_fc_isr, 2); /* eSPI Peripheral Channel interrupt handler */ -void espi_pc_isr(void) +static void espi_pc_isr(void) { uint32_t sts; @@ -1386,7 +1386,7 @@ void espi_init(void) (CONFIG_HOSTCMD_ESPI_EC_MODE << MCHP_ESPI_CAP1_IO_BITPOS); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_VW; #else MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_PIN; diff --git a/chip/mchp/gpio.c b/chip/mchp/gpio.c index 28cb987e23..5794229b34 100644 --- a/chip/mchp/gpio.c +++ b/chip/mchp/gpio.c @@ -470,7 +470,7 @@ static void gpio_interrupt(int girq, int port) } #define GPIO_IRQ_FUNC(irqfunc, girq, port)\ - void irqfunc(void) \ + static void irqfunc(void) \ { \ gpio_interrupt(girq, port);\ } diff --git a/chip/mchp/hwtimer.c b/chip/mchp/hwtimer.c index e84f278f4a..05ff69e7d9 100644 --- a/chip/mchp/hwtimer.c +++ b/chip/mchp/hwtimer.c @@ -56,9 +56,9 @@ static void __hw_clock_source_irq(int timer_id) process_timers(timer_id == 0); } -void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } +static void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } DECLARE_IRQ(MCHP_IRQ_TIMER32_0, __hw_clock_source_irq_0, 1); -void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } +static void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } DECLARE_IRQ(MCHP_IRQ_TIMER32_1, __hw_clock_source_irq_1, 1); static void configure_timer(int timer_id) diff --git a/chip/mchp/i2c.c b/chip/mchp/i2c.c index 9891f4d41e..2aaef83dfe 100644 --- a/chip/mchp/i2c.c +++ b/chip/mchp/i2c.c @@ -1042,41 +1042,41 @@ static void handle_interrupt(int controller) task_set_event(id, TASK_EVENT_I2C_IDLE); } -void i2c0_interrupt(void) +static void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) +static void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) +static void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) +static void i2c3_interrupt(void) { handle_interrupt(3); } #if defined(CHIP_FAMILY_MEC172X) -void i2c4_interrupt(void) +static void i2c4_interrupt(void) { handle_interrupt(4); } #elif defined(CHIP_FAMILY_MEC152X) -void i2c4_interrupt(void) +static void i2c4_interrupt(void) { handle_interrupt(4); } -void i2c5_interrupt(void) +static void i2c5_interrupt(void) { handle_interrupt(5); } -void i2c6_interrupt(void) +static void i2c6_interrupt(void) { handle_interrupt(6); } -void i2c7_interrupt(void) +static void i2c7_interrupt(void) { handle_interrupt(7); } diff --git a/chip/mchp/keyboard_raw.c b/chip/mchp/keyboard_raw.c index 946ea1ca90..f10cac38b6 100644 --- a/chip/mchp/keyboard_raw.c +++ b/chip/mchp/keyboard_raw.c @@ -86,7 +86,7 @@ void keyboard_raw_enable_interrupt(int enable) } } -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear interrupt status bits */ MCHP_KS_KSI_STATUS = 0xff; diff --git a/chip/mchp/lpc.c b/chip/mchp/lpc.c index da4f8202e4..9e64281276 100644 --- a/chip/mchp/lpc.c +++ b/chip/mchp/lpc.c @@ -88,7 +88,7 @@ static void keyboard_irq_assert(void) static void lpc_generate_smi(void) { CPUTS("LPC Pulse SMI"); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* eSPI: pulse SMI# Virtual Wire low */ espi_vw_pulse_wire(VW_SMI_L, 0); #else @@ -106,7 +106,7 @@ static void lpc_generate_sci(void) udelay(65); gpio_set_level(CONFIG_SCI_GPIO, 1); #else -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_pulse_wire(VW_SCI_L, 0); #else MCHP_ACPI_PM_STS |= 1; @@ -129,7 +129,7 @@ static void lpc_update_wake(host_event_t wake_events) */ wake_events &= ~EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_vw_set_wire(VW_WAKE_L, !wake_events); #else /* Signal is asserted low when wake events is non-zero */ @@ -304,7 +304,7 @@ const int acpi_ec_nvic_ibf[] = { }; BUILD_ASSERT(ARRAY_SIZE(acpi_ec_nvic_ibf) == MCHP_ACPI_EC_INSTANCES); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI const int acpi_ec_espi_bar_id[] = { MCHP_ESPI_IO_BAR_ID_ACPI_EC0, MCHP_ESPI_IO_BAR_ID_ACPI_EC1, @@ -326,7 +326,7 @@ void chip_acpi_ec_config(int instance, uint32_t io_base, uint8_t mask) MCHP_PCR_SLP_DIS_DEV(acpi_ec_pcr_slp[instance]); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(acpi_ec_espi_bar_id[instance]) = mask; MCHP_ESPI_IO_BAR(acpi_ec_espi_bar_id[instance]) = @@ -350,7 +350,7 @@ void chip_8042_config(uint32_t io_base) { MCHP_PCR_SLP_DIS_DEV(MCHP_PCR_8042); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(MCHP_ESPI_IO_BAR_ID_8042) = 0x04; MCHP_ESPI_IO_BAR(MCHP_ESPI_IO_BAR_ID_8042) = (io_base << 16) + 0x01ul; @@ -372,7 +372,7 @@ void chip_8042_config(uint32_t io_base) #ifndef CONFIG_KEYBOARD_IRQ_GPIO /* Set up SERIRQ for keyboard */ MCHP_8042_KB_CTRL |= BIT(5); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* Delivery 8042 keyboard interrupt as IRQ1 using eSPI SERIRQ */ MCHP_ESPI_IO_SERIRQ_REG(MCHP_ESPI_SIRQ_8042_KB) = 1; #else @@ -392,7 +392,7 @@ void chip_8042_config(uint32_t io_base) */ void chip_emi0_config(uint32_t io_base) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(MCHP_ESPI_IO_BAR_ID_EMI0) = 0x0F; MCHP_ESPI_IO_BAR(MCHP_ESPI_IO_BAR_ID_EMI0) = (io_base << 16) + 0x01ul; @@ -442,7 +442,7 @@ void chip_port80_config(uint32_t io_base) MCHP_P80_CFG(0) = MCHP_P80_FLUSH_FIFO_WO + MCHP_P80_RESET_TIMESTAMP_WO; -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI MCHP_ESPI_IO_BAR_CTL_MASK(MCHP_ESPI_IO_BAR_P80_0) = 0x00; MCHP_ESPI_IO_BAR(MCHP_ESPI_IO_BAR_P80_0) = (io_base << 16) + 0x01ul; @@ -484,7 +484,7 @@ static void chip_lpc_iobar_debug(void) * For eSPI PLATFORM_RESET# virtual wire is used as LRESET# * */ -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI static void setup_lpc(void) { MCHP_LPC_CFG_BAR |= (1ul << 15); @@ -545,7 +545,7 @@ static void lpc_init(void) MCHP_PCR_SLP_EN2_ACPI_EC0 + MCHP_PCR_SLP_EN2_MIF8042); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI espi_init(); @@ -621,7 +621,7 @@ void lpc_set_init_done(int val) */ void lpcrst_interrupt(enum gpio_signal signal) { -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* Initialize LPC module when LRESET# is de-asserted */ if (!lpc_get_pltrst_asserted()) { setup_lpc(); @@ -646,7 +646,7 @@ void lpcrst_interrupt(enum gpio_signal signal) * or logging of EMI host communication? We don't observe * this ISR so Host is not writing to MCHP_EMI_H2E_MBX(0). */ -void emi0_interrupt(void) +static void emi0_interrupt(void) { uint8_t h2e; @@ -726,7 +726,7 @@ static int acpi_ec0_custom(int is_cmd, uint8_t value, } #endif -void acpi_0_interrupt(void) +static void acpi_0_interrupt(void) { uint8_t value, result, is_cmd; @@ -771,7 +771,7 @@ DECLARE_IRQ(MCHP_IRQ_ACPIEC0_IBF, acpi_0_interrupt, 1); * Used to handle custom ACPI EC0 command requiring * two byte response. */ -void acpi_0_obe_isr(void) +static void acpi_0_obe_isr(void) { uint8_t sts, data; @@ -796,7 +796,7 @@ void acpi_0_obe_isr(void) DECLARE_IRQ(MCHP_IRQ_ACPIEC0_OBE, acpi_0_obe_isr, 1); #endif -void acpi_1_interrupt(void) +static void acpi_1_interrupt(void) { uint8_t st = MCHP_ACPI_EC_STATUS(1); @@ -854,7 +854,7 @@ DECLARE_IRQ(MCHP_IRQ_ACPIEC1_IBF, acpi_1_interrupt, 1); * Reading data out of input buffer clears read-only status * in 8042EM. Next, we must clear aggregator status. */ -void kb_ibf_interrupt(void) +static void kb_ibf_interrupt(void) { if (lpc_keyboard_input_pending()) keyboard_host_write(MCHP_8042_H2E, @@ -872,7 +872,7 @@ DECLARE_IRQ(MCHP_IRQ_8042EM_IBF, kb_ibf_interrupt, 1); * aggregator. Clear aggregator 8042EM OBE R/WC status bit before * invoking task. */ -void kb_obe_interrupt(void) +static void kb_obe_interrupt(void) { MCHP_INT_SOURCE(MCHP_8042_GIRQ) = MCHP_8042_OBE_GIRQ_BIT; task_wake(TASK_ID_KEYPROTO); @@ -941,10 +941,10 @@ void lpc_clear_acpi_status_mask(uint8_t mask) */ int lpc_get_pltrst_asserted(void) { -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* * eSPI PLTRST# a VWire or side-band signal - * Controlled by CONFIG_HOSTCMD_ESPI + * Controlled by CONFIG_HOST_INTERFACE_ESPI */ return !espi_vw_get_wire(VW_PLTRST_L); #else diff --git a/chip/mchp/lpc_chip.h b/chip/mchp/lpc_chip.h index dcb5577fc1..434b307968 100644 --- a/chip/mchp/lpc_chip.h +++ b/chip/mchp/lpc_chip.h @@ -8,7 +8,7 @@ #ifndef __CROS_EC_LPC_CHIP_H #define __CROS_EC_LPC_CHIP_H -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #include "espi.h" @@ -37,7 +37,7 @@ void lpc_set_init_done(int val); void lpc_mem_mapped_init(void); -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI void lpcrst_interrupt(enum gpio_signal signal); #endif diff --git a/chip/mchp/port80.c b/chip/mchp/port80.c index 08cb5b97cd..a32dc1b9c2 100644 --- a/chip/mchp/port80.c +++ b/chip/mchp/port80.c @@ -30,7 +30,7 @@ * NOTE: The overrun bit could be used to set a flag indicating EC could * not keep up with the host. */ -void port_80_interrupt(void) +static void port_80_interrupt(void) { int d = MCHP_BDP0_DATTR; @@ -61,7 +61,7 @@ DECLARE_IRQ(MCHP_IRQ_BDP0, port_80_interrupt, 3); * to I/O 80h and 90h. LSB to 0x80 and MSB to 0x90. * */ -void port_80_interrupt(void) +static void port_80_interrupt(void) { int d; diff --git a/chip/mchp/system.c b/chip/mchp/system.c index 356313fcd2..72c96bef8f 100644 --- a/chip/mchp/system.c +++ b/chip/mchp/system.c @@ -178,7 +178,7 @@ void system_pre_init(void) MCHP_EC_AHB_ERR_EN = 0; /* enable capture of address on error */ /* Manual voltage selection only required for MEC170x and MEC152x */ - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) vtr3_voltage_select(1); else vtr3_voltage_select(0); @@ -427,7 +427,7 @@ int system_get_scratchpad(uint32_t *value) * defined for MEC170x and the IS_ENABLED() macro causes the * compiler to evaluate both true and false code paths. */ -#if defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_ESPI) static void disable_host_ifc_clocks(void) { MCHP_ESPI_ACTIVATE &= ~0x01; @@ -564,7 +564,7 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) ; } -void htimer_interrupt(void) +static void htimer_interrupt(void) { /* Time to wake up */ } diff --git a/chip/mchp/uart.c b/chip/mchp/uart.c index 56c99646a4..c274519b94 100644 --- a/chip/mchp/uart.c +++ b/chip/mchp/uart.c @@ -151,7 +151,7 @@ void uart_enable_interrupt(void) * Interrupt handler for UART. * Lower priority below other critical ISR's. */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Read input FIFO until empty, then fill output FIFO */ uart_process_input(); diff --git a/chip/mec1322/adc.c b/chip/mec1322/adc.c index 95fe99f891..9c83173777 100644 --- a/chip/mec1322/adc.c +++ b/chip/mec1322/adc.c @@ -69,7 +69,7 @@ static void adc_init(void) } DECLARE_HOOK(HOOK_INIT, adc_init, HOOK_PRIO_INIT_ADC); -void adc_interrupt(void) +static void adc_interrupt(void) { /* Clear interrupt status bit */ MEC1322_ADC_CTRL |= BIT(7); diff --git a/chip/mec1322/build.mk b/chip/mec1322/build.mk index 2b0c9cc229..dd0ef8cd90 100644 --- a/chip/mec1322/build.mk +++ b/chip/mec1322/build.mk @@ -22,7 +22,7 @@ chip-$(CONFIG_ADC)+=adc.o chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o -chip-$(CONFIG_HOSTCMD_LPC)+=lpc.o +chip-$(CONFIG_HOST_INTERFACE_LPC)+=lpc.o chip-$(CONFIG_PWM)+=pwm.o chip-$(CONFIG_WATCHDOG)+=watchdog.o ifndef CONFIG_KEYBOARD_NOT_RAW diff --git a/chip/mec1322/config_chip.h b/chip/mec1322/config_chip.h index 414fb492bf..951de3fb4f 100644 --- a/chip/mec1322/config_chip.h +++ b/chip/mec1322/config_chip.h @@ -103,7 +103,7 @@ #define CONFIG_MPU #endif #define CONFIG_DMA -#define CONFIG_HOSTCMD_LPC +#define CONFIG_HOST_INTERFACE_LPC #define CONFIG_SPI #define CONFIG_SWITCH diff --git a/chip/mec1322/gpio.c b/chip/mec1322/gpio.c index 331022c87c..6435f4fe9d 100644 --- a/chip/mec1322/gpio.c +++ b/chip/mec1322/gpio.c @@ -267,7 +267,7 @@ static void gpio_interrupt(int girq, int port_offset) } #define GPIO_IRQ_FUNC(irqfunc, girq, port_offset) \ - void irqfunc(void) \ + static void irqfunc(void) \ { \ gpio_interrupt(girq, port_offset); \ } diff --git a/chip/mec1322/hwtimer.c b/chip/mec1322/hwtimer.c index a5c5858620..b0405ec321 100644 --- a/chip/mec1322/hwtimer.c +++ b/chip/mec1322/hwtimer.c @@ -50,9 +50,9 @@ static void __hw_clock_source_irq(int timer_id) process_timers(timer_id == 0); } -void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } +static void __hw_clock_source_irq_0(void) { __hw_clock_source_irq(0); } DECLARE_IRQ(MEC1322_IRQ_TIMER32_0, __hw_clock_source_irq_0, 1); -void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } +static void __hw_clock_source_irq_1(void) { __hw_clock_source_irq(1); } DECLARE_IRQ(MEC1322_IRQ_TIMER32_1, __hw_clock_source_irq_1, 1); static void configure_timer(int timer_id) diff --git a/chip/mec1322/i2c.c b/chip/mec1322/i2c.c index aecc8abd9b..f5bb97e95b 100644 --- a/chip/mec1322/i2c.c +++ b/chip/mec1322/i2c.c @@ -520,10 +520,10 @@ static void handle_interrupt(int controller) task_set_event(id, TASK_EVENT_I2C_IDLE); } -void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) { handle_interrupt(3); } +static void i2c0_interrupt(void) { handle_interrupt(0); } +static void i2c1_interrupt(void) { handle_interrupt(1); } +static void i2c2_interrupt(void) { handle_interrupt(2); } +static void i2c3_interrupt(void) { handle_interrupt(3); } DECLARE_IRQ(MEC1322_IRQ_I2C_0, i2c0_interrupt, 2); DECLARE_IRQ(MEC1322_IRQ_I2C_1, i2c1_interrupt, 2); diff --git a/chip/mec1322/keyboard_raw.c b/chip/mec1322/keyboard_raw.c index 2c62ada9ac..0f3381d79e 100644 --- a/chip/mec1322/keyboard_raw.c +++ b/chip/mec1322/keyboard_raw.c @@ -72,7 +72,7 @@ void keyboard_raw_enable_interrupt(int enable) } } -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear interrupt status bits */ MEC1322_KS_KSI_STATUS = 0xff; diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index 020cd0e23e..4bc5c1a42c 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -292,7 +292,7 @@ static void lpc_chipset_reset(void) DECLARE_DEFERRED(lpc_chipset_reset); #endif -void girq19_interrupt(void) +static void girq19_interrupt(void) { /* Check interrupt result for LRESET# trigger */ if (MEC1322_INT_RESULT(19) & BIT(1)) { @@ -318,7 +318,7 @@ void girq19_interrupt(void) } DECLARE_IRQ(MEC1322_IRQ_GIRQ19, girq19_interrupt, 1); -void emi_interrupt(void) +static void emi_interrupt(void) { port_80_write(MEC1322_EMI_H2E_MBX); } @@ -345,7 +345,7 @@ int port_80_read(void) return data; } -void acpi_0_interrupt(void) +static void acpi_0_interrupt(void) { uint8_t value, result, is_cmd; diff --git a/chip/mec1322/port80.c b/chip/mec1322/port80.c index df4583ed8b..e2f02c81e5 100644 --- a/chip/mec1322/port80.c +++ b/chip/mec1322/port80.c @@ -84,7 +84,7 @@ static void port_80_interrupt_init(void) } DECLARE_HOOK(HOOK_INIT, port_80_interrupt_init, HOOK_PRIO_DEFAULT); -void port_80_interrupt(void) +static void port_80_interrupt(void) { int data; diff --git a/chip/mec1322/system.c b/chip/mec1322/system.c index 6e482d3a78..b672f72d2d 100644 --- a/chip/mec1322/system.c +++ b/chip/mec1322/system.c @@ -368,7 +368,7 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) ; } -void htimer_interrupt(void) +static void htimer_interrupt(void) { /* Time to wake up */ } diff --git a/chip/mec1322/uart.c b/chip/mec1322/uart.c index 2c607d0b72..9118168dcd 100644 --- a/chip/mec1322/uart.c +++ b/chip/mec1322/uart.c @@ -103,7 +103,7 @@ static void uart_clear_rx_fifo(int channel) /** * Interrupt handler for UART */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { /* Read input FIFO until empty, then fill output FIFO */ uart_process_input(); diff --git a/chip/mt_scp/mt8183/clock.c b/chip/mt_scp/mt8183/clock.c index 066e269579..1af0a3b893 100644 --- a/chip/mt_scp/mt8183/clock.c +++ b/chip/mt_scp/mt8183/clock.c @@ -339,7 +339,7 @@ void scp_enable_clock(void) } DECLARE_IRQ(SCP_IRQ_CLOCK, clock_control_irq, 3); -void clock_control_irq(void) +static void clock_control_irq(void) { /* Read ack CLK_IRQ */ (SCP_CLK_IRQ_ACK); @@ -347,7 +347,7 @@ void clock_control_irq(void) } DECLARE_IRQ(SCP_IRQ_CLOCK2, clock_fast_wakeup_irq, 3); -void clock_fast_wakeup_irq(void) +static void clock_fast_wakeup_irq(void) { /* Ack fast wakeup */ SCP_SLEEP_IRQ2 = 1; diff --git a/chip/mt_scp/mt8183/gpio.c b/chip/mt_scp/mt8183/gpio.c index a4896aae72..2bd4bfbb02 100644 --- a/chip/mt_scp/mt8183/gpio.c +++ b/chip/mt_scp/mt8183/gpio.c @@ -155,7 +155,7 @@ void gpio_init(void) DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); /* Interrupt handler */ -void __keep gpio_interrupt(void) +static void __attribute__((used)) gpio_interrupt(void) { int bit, port; uint32_t pending; diff --git a/chip/mt_scp/mt8183/hrtimer.c b/chip/mt_scp/mt8183/hrtimer.c index 92887af2a7..89e0c1658b 100644 --- a/chip/mt_scp/mt8183/hrtimer.c +++ b/chip/mt_scp/mt8183/hrtimer.c @@ -243,7 +243,10 @@ static void __hw_clock_source_irq(int n) #define DECLARE_TIMER_IRQ(n) \ DECLARE_IRQ(IRQ_TIMER(n), __hw_clock_source_irq_##n, 2); \ - void __hw_clock_source_irq_##n(void) { __hw_clock_source_irq(n); } + static void __hw_clock_source_irq_##n(void) \ + { \ + __hw_clock_source_irq(n); \ + } DECLARE_TIMER_IRQ(0); DECLARE_TIMER_IRQ(1); diff --git a/chip/mt_scp/mt8183/ipi.c b/chip/mt_scp/mt8183/ipi.c index 8e13781db3..8b695d57e0 100644 --- a/chip/mt_scp/mt8183/ipi.c +++ b/chip/mt_scp/mt8183/ipi.c @@ -382,7 +382,7 @@ static void ipi_init(void) DECLARE_HOOK(HOOK_INIT, ipi_init, HOOK_PRIO_DEFAULT); DECLARE_IRQ(SCP_IRQ_IPC0, ipc_handler, 4); -void ipc_handler(void) +static void ipc_handler(void) { /* TODO(b/117917141): We only support IPC_ID(0) for now. */ if (SCP_GIPC_IN & SCP_GIPC_IN_CLEAR_IPCN(0)) { diff --git a/chip/mt_scp/mt8183/ipi_chip.h b/chip/mt_scp/mt8183/ipi_chip.h index 758047951f..03b5572497 100644 --- a/chip/mt_scp/mt8183/ipi_chip.h +++ b/chip/mt_scp/mt8183/ipi_chip.h @@ -71,11 +71,6 @@ struct rpmsg_ns_msg { }; /* - * IPC Handler. - */ -void ipc_handler(void); - -/* * An IPC IRQ could be shared across many IPI handlers. * Those handlers would usually operate on disabling or enabling the IPC IRQ. * This may disorder the actual timing to on/off the IRQ when there are many diff --git a/chip/mt_scp/mt8183/uart.c b/chip/mt_scp/mt8183/uart.c index 7907f9537d..b5f3da7d5c 100644 --- a/chip/mt_scp/mt8183/uart.c +++ b/chip/mt_scp/mt8183/uart.c @@ -94,7 +94,7 @@ void uart_process(void) #if (UARTN < SCP_UART_COUNT) DECLARE_IRQ(UART_IRQ(UARTN), uart_interrupt, 2); -void uart_interrupt(void) +static void uart_interrupt(void) { uint8_t ier; @@ -106,7 +106,7 @@ void uart_interrupt(void) } DECLARE_IRQ(UART_RX_IRQ(UARTN), uart_rx_interrupt, 2); -void uart_rx_interrupt(void) +static void uart_rx_interrupt(void) { uint8_t ier; diff --git a/chip/mt_scp/mt8195/clock.c b/chip/mt_scp/mt8195/clock.c index c6bf3cbc79..1ad1706e6a 100644 --- a/chip/mt_scp/mt8195/clock.c +++ b/chip/mt_scp/mt8195/clock.c @@ -15,6 +15,7 @@ #include "ec_commands.h" #include "power.h" #include "registers.h" +#include "scp_watchdog.h" #include "timer.h" #define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ##args) @@ -377,10 +378,12 @@ power_chipset_handle_host_sleep_event(enum host_sleep_event state, { if (state == HOST_SLEEP_EVENT_S3_SUSPEND) { CPRINTS("AP suspend"); - clock_select_clock(SCP_CLK_32K); + disable_watchdog(); + clock_select_clock(SCP_CLK_SYSTEM); } else if (state == HOST_SLEEP_EVENT_S3_RESUME) { - CPRINTS("AP resume"); clock_select_clock(SCP_CLK_ULPOSC2_HIGH_SPEED); + enable_watchdog(); + CPRINTS("AP resume"); } } diff --git a/chip/mt_scp/rv32i_common/registers.h b/chip/mt_scp/rv32i_common/registers.h index adbef5f98b..afe706948e 100644 --- a/chip/mt_scp/rv32i_common/registers.h +++ b/chip/mt_scp/rv32i_common/registers.h @@ -140,6 +140,9 @@ #define WDT_EN BIT(31) #define SCP_CORE0_WDT_KICK REG32(SCP_REG_BASE + 0x30038) #define SCP_CORE0_WDT_CUR_VAL REG32(SCP_REG_BASE + 0x3003C) +#define SCP_CORE0_MON_PC_LATCH REG32(SCP_REG_BASE + 0x300D0) +#define SCP_CORE0_MON_LR_LATCH REG32(SCP_REG_BASE + 0x300D4) +#define SCP_CORE0_MON_SP_LATCH REG32(SCP_REG_BASE + 0x300D8) /* INTC */ #define SCP_INTC_WORD(irq) ((irq) >> 5) /* word length = 2^5 */ diff --git a/zephyr/projects/corsola/krabby/include/pwm_map.h b/chip/mt_scp/rv32i_common/scp_watchdog.h index 5cf7377f52..0277aeaec7 100644 --- a/zephyr/projects/corsola/krabby/include/pwm_map.h +++ b/chip/mt_scp/rv32i_common/scp_watchdog.h @@ -1,15 +1,15 @@ + /* Copyright 2021 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -#ifndef __ZEPHYR_CHROME_PWM_MAP_H -#define __ZEPHYR_CHROME_PWM_MAP_H - -#include <devicetree.h> +#ifndef __SCP_WATCHDOG_H +#define __SCP_WATCHDOG_H -#include "config.h" +#include "watchdog.h" -#include "pwm/pwm.h" +void disable_watchdog(void); +void enable_watchdog(void); -#endif /* __ZEPHYR_CHROME_PWM_MAP_H */ +#endif /* __SCP_WATCHDOG_H */ diff --git a/chip/mt_scp/rv32i_common/watchdog.c b/chip/mt_scp/rv32i_common/watchdog.c index 72ca5edad8..05acf6ea29 100644 --- a/chip/mt_scp/rv32i_common/watchdog.c +++ b/chip/mt_scp/rv32i_common/watchdog.c @@ -8,6 +8,7 @@ #include "common.h" #include "hooks.h" #include "registers.h" +#include "scp_watchdog.h" #include "watchdog.h" void watchdog_reload(void) @@ -16,7 +17,15 @@ void watchdog_reload(void) } DECLARE_HOOK(HOOK_TICK, watchdog_reload, HOOK_PRIO_DEFAULT); -int watchdog_init(void) +void disable_watchdog(void) +{ + /* disable watchdog */ + SCP_CORE0_WDT_CFG &= ~WDT_EN; + /* clear watchdog irq */ + SCP_CORE0_WDT_IRQ |= BIT(0); +} + +void enable_watchdog(void) { const uint32_t timeout = WDT_PERIOD(CONFIG_WATCHDOG_PERIOD_MS); @@ -28,6 +37,11 @@ int watchdog_init(void) SCP_CORE0_WDT_CFG = WDT_EN | timeout; /* reload watchdog */ watchdog_reload(); +} + +int watchdog_init(void) +{ + enable_watchdog(); return EC_SUCCESS; } diff --git a/chip/npcx/adc.c b/chip/npcx/adc.c index ea16589d9b..5935472108 100644 --- a/chip/npcx/adc.c +++ b/chip/npcx/adc.c @@ -318,7 +318,7 @@ void npcx_adc_register_thresh_irq(int threshold_idx, * @return none * @notes Only handle SW-triggered conversion in npcx chip */ -void adc_interrupt(void) +static void adc_interrupt(void) { int i; uint16_t thrcts; diff --git a/chip/npcx/build.mk b/chip/npcx/build.mk index 1de37f6b0a..246ab84f34 100644 --- a/chip/npcx/build.mk +++ b/chip/npcx/build.mk @@ -11,6 +11,9 @@ CORE:=cortex-m # Allow the full Cortex-M4 instruction set CFLAGS_CPU+=-march=armv7e-m -mcpu=cortex-m4 +# Disable overlapping section warning that linker emits due to NPCX_RO_HEADER. +LDFLAGS_EXTRA+=-Wl,--no-check-sections + # Assign default CHIP_FAMILY as npcx5 for old boards used npcx5 series ifeq ($(CHIP_FAMILY),) CHIP_FAMILY:=npcx5 @@ -30,9 +33,9 @@ chip-$(CONFIG_FANS)+=fan.o chip-$(CONFIG_FLASH_PHYSICAL)+=flash.o chip-$(CONFIG_I2C)+=i2c.o i2c-$(CHIP_FAMILY).o chip-$(CONFIG_HOSTCMD_X86)+=lpc.o -chip-$(CONFIG_HOSTCMD_ESPI)+=espi.o +chip-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o chip-$(CONFIG_PECI)+=peci.o -chip-$(CONFIG_HOSTCMD_SHI)+=shi.o +chip-$(CONFIG_HOST_INTERFACE_SHI)+=shi.o chip-$(CONFIG_CEC)+=cec.o # pwm functions are implemented with the fan functions chip-$(CONFIG_PWM)+=pwm.o diff --git a/chip/npcx/cec.c b/chip/npcx/cec.c index ebaefa551a..e7cd0ae7b9 100644 --- a/chip/npcx/cec.c +++ b/chip/npcx/cec.c @@ -35,6 +35,8 @@ /* Notification from interrupt to CEC task that data has been received */ #define TASK_EVENT_RECEIVED_DATA TASK_EVENT_CUSTOM_BIT(0) +#define TASK_EVENT_OKAY TASK_EVENT_CUSTOM_BIT(1) +#define TASK_EVENT_FAILED TASK_EVENT_CUSTOM_BIT(2) /* CEC broadcast address. Also the highest possible CEC address */ #define CEC_BROADCAST_ADDR 15 @@ -592,7 +594,8 @@ static void cec_event_timeout(void) cec_tx.len = 0; cec_tx.resends = 0; enter_state(CEC_STATE_IDLE); - send_mkbp_event(EC_MKBP_CEC_SEND_OK); + task_set_event(TASK_ID_CEC, + TASK_EVENT_OKAY); } } else { if (cec_tx.resends < CEC_MAX_RESENDS) { @@ -604,7 +607,8 @@ static void cec_event_timeout(void) cec_tx.len = 0; cec_tx.resends = 0; enter_state(CEC_STATE_IDLE); - send_mkbp_event(EC_MKBP_CEC_SEND_FAILED); + task_set_event(TASK_ID_CEC, + TASK_EVENT_FAILED); } } break; @@ -783,7 +787,7 @@ static void cec_event_tx(void) enter_state(CEC_STATE_INITIATOR_FREE_TIME); } -void cec_isr(void) +static void cec_isr(void) { int mdl = NPCX_MFT_MODULE_1; uint8_t events; @@ -1036,5 +1040,12 @@ void cec_task(void *unused) if (rv == EC_SUCCESS) mkbp_send_event(EC_MKBP_EVENT_CEC_MESSAGE); } + if (events & TASK_EVENT_OKAY) { + send_mkbp_event(EC_MKBP_CEC_SEND_OK); + CPRINTS("SEND OKAY"); + } else if (events & TASK_EVENT_FAILED) { + send_mkbp_event(EC_MKBP_CEC_SEND_FAILED); + CPRINTS("SEND FAILED"); + } } } diff --git a/chip/npcx/clock.c b/chip/npcx/clock.c index ad611973be..ab3bd7f119 100644 --- a/chip/npcx/clock.c +++ b/chip/npcx/clock.c @@ -422,7 +422,7 @@ void __idle(void) * CSAE bit is set. Please notice this symptom only * occurs at npcx5. */ -#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOST_INTERFACE_ESPI) /* Enable Host access wakeup */ SET_BIT(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 6); #endif diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index c8976afed0..6541ddeaae 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -502,7 +502,7 @@ void espi_espirst_handler(void) } /* Handle eSPI virtual wire interrupt 1 */ -void __espi_wk2a_interrupt(void) +static void __espi_wk2a_interrupt(void) { uint8_t pending_bits = NPCX_WKPND(MIWU_TABLE_2, MIWU_GROUP_1); @@ -524,7 +524,7 @@ void __espi_wk2a_interrupt(void) DECLARE_IRQ(NPCX_IRQ_WKINTA_2, __espi_wk2a_interrupt, 3); /* Handle eSPI virtual wire interrupt 2 */ -void __espi_wk2b_interrupt(void) +static void __espi_wk2b_interrupt(void) { uint8_t pending_bits = NPCX_WKPND(MIWU_TABLE_2, MIWU_GROUP_2); @@ -540,7 +540,7 @@ void __espi_wk2b_interrupt(void) DECLARE_IRQ(NPCX_IRQ_WKINTB_2, __espi_wk2b_interrupt, 3); /* Interrupt handler for eSPI status changed */ -void espi_interrupt(void) +static void espi_interrupt(void) { int chan; uint32_t mask, status; diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c index 507b83714c..768c2ced29 100644 --- a/chip/npcx/flash.c +++ b/chip/npcx/flash.c @@ -21,7 +21,6 @@ static int all_protected; /* Has all-flash protection been requested? */ static int addr_prot_start; static int addr_prot_length; -static uint8_t flag_prot_inconsistent; /* SR regs aren't readable when UMA lock is on, so save a copy */ static uint8_t saved_sr1; @@ -145,12 +144,13 @@ static void flash_set_address(uint32_t dest_addr) NPCX_UMA_AB0 = addr[0]; } -static uint8_t flash_get_status1(void) +static void flash_get_status(uint8_t *sr1, uint8_t *sr2) { - uint8_t ret; - - if (all_protected) - return saved_sr1; + if (all_protected) { + *sr1 = saved_sr1; + *sr2 = saved_sr2; + return; + } /* Lock physical flash operations */ crec_flash_lock_mapped_storage(1); @@ -159,40 +159,55 @@ static uint8_t flash_get_status1(void) TRISTATE_FLASH(0); /* Read status register1 */ flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_RD_1BYTE); + *sr1 = NPCX_UMA_DB0; + /* Read status register2 */ + flash_execute_cmd(CMD_READ_STATUS_REG2, MASK_CMD_RD_1BYTE); + *sr2 = NPCX_UMA_DB0; /* Enable tri-state */ TRISTATE_FLASH(1); - ret = NPCX_UMA_DB0; - /* Unlock physical flash operations */ crec_flash_lock_mapped_storage(0); - - return ret; } -static uint8_t flash_get_status2(void) +static void flash_set_status(uint8_t sr1, uint8_t sr2) { - uint8_t ret; - - if (all_protected) - return saved_sr2; - /* Lock physical flash operations */ crec_flash_lock_mapped_storage(1); /* Disable tri-state */ TRISTATE_FLASH(0); - /* Read status register2 */ - flash_execute_cmd(CMD_READ_STATUS_REG2, MASK_CMD_RD_1BYTE); + /* Enable write */ + flash_write_enable(); + + NPCX_UMA_DB0 = sr1; + NPCX_UMA_DB1 = sr2; + + /* Write status register 1/2 */ + flash_execute_cmd(CMD_WRITE_STATUS_REG, MASK_CMD_WR_2BYTE); /* Enable tri-state */ TRISTATE_FLASH(1); - ret = NPCX_UMA_DB0; - /* Unlock physical flash operations */ crec_flash_lock_mapped_storage(0); +} - return ret; +static void flash_set_quad_enable(int enable) +{ + uint8_t sr1, sr2; + + flash_get_status(&sr1, &sr2); + + /* If QE is the same value, return directly. */ + if (!!(sr2 & SPI_FLASH_SR2_QE) == enable) + return; + + if (enable) + sr2 |= SPI_FLASH_SR2_QE; + else + sr2 &= ~SPI_FLASH_SR2_QE; + + flash_set_status(sr1, sr2); } #ifdef NPCX_INT_FLASH_SUPPORT @@ -264,8 +279,7 @@ static void flash_uma_lock(int enable) * Store SR1 / SR2 for later use since we're about to lock * out all access (including read access) to these regs. */ - saved_sr1 = flash_get_status1(); - saved_sr2 = flash_get_status2(); + flash_get_status(&saved_sr1, &saved_sr2); } all_protected = enable; @@ -300,25 +314,7 @@ static int flash_set_status_for_prot(int reg1, int reg2) flash_protect_int_flash(!gpio_get_level(GPIO_WP_L)); #endif /*_CONFIG_WP_ACTIVE_HIGH_*/ #endif - - /* Lock physical flash operations */ - crec_flash_lock_mapped_storage(1); - - /* Disable tri-state */ - TRISTATE_FLASH(0); - /* Enable write */ - flash_write_enable(); - - NPCX_UMA_DB0 = reg1; - NPCX_UMA_DB1 = reg2; - - /* Write status register 1/2 */ - flash_execute_cmd(CMD_WRITE_STATUS_REG, MASK_CMD_WR_2BYTE); - /* Enable tri-state */ - TRISTATE_FLASH(1); - - /* Unlock physical flash operations */ - crec_flash_lock_mapped_storage(0); + flash_set_status(reg1, reg2); spi_flash_reg_to_protect(reg1, reg2, &addr_prot_start, &addr_prot_length); @@ -358,14 +354,12 @@ static int flash_check_prot_reg(unsigned int offset, unsigned int bytes) #endif /* CONFIG_WP_ACTIVE_HIGH */ #endif - sr1 = flash_get_status1(); - sr2 = flash_get_status2(); - /* Invalid value */ if (offset + bytes > CONFIG_FLASH_SIZE_BYTES) return EC_ERROR_INVAL; /* Compute current protect range */ + flash_get_status(&sr1, &sr2); rv = spi_flash_reg_to_protect(sr1, sr2, &start, &len); if (rv) return rv; @@ -382,14 +376,14 @@ static int flash_write_prot_reg(unsigned int offset, unsigned int bytes, int hw_protect) { int rv; - uint8_t sr1 = flash_get_status1(); - uint8_t sr2 = flash_get_status2(); + uint8_t sr1, sr2; /* Invalid values */ if (offset + bytes > CONFIG_FLASH_SIZE_BYTES) return EC_ERROR_INVAL; /* Compute desired protect range */ + flash_get_status(&sr1, &sr2); rv = spi_flash_protect_to_reg(offset, bytes, &sr1, &sr2); if (rv) return rv; @@ -606,17 +600,27 @@ int crec_flash_physical_get_protect(int bank) uint32_t crec_flash_physical_get_protect_flags(void) { uint32_t flags = 0; + uint8_t sr1, sr2; + unsigned int start, len; + int rv; /* Check if WP region is protected in status register */ - if (flash_check_prot_reg(WP_BANK_OFFSET*CONFIG_FLASH_BANK_SIZE, - WP_BANK_COUNT*CONFIG_FLASH_BANK_SIZE)) + rv = flash_check_prot_reg(WP_BANK_OFFSET * CONFIG_FLASH_BANK_SIZE, + WP_BANK_COUNT * CONFIG_FLASH_BANK_SIZE); + if (rv == EC_ERROR_ACCESS_DENIED) flags |= EC_FLASH_PROTECT_RO_AT_BOOT; + else if (rv) + return EC_FLASH_PROTECT_ERROR_UNKNOWN; /* - * TODO: If status register protects a range, but SRP0 is not set, - * flags should indicate EC_FLASH_PROTECT_ERROR_INCONSISTENT. + * If the status register protects a range, but SRP0 is not set, or QE + * is set, flags should indicate EC_FLASH_PROTECT_ERROR_INCONSISTENT. */ - if (flag_prot_inconsistent) + flash_get_status(&sr1, &sr2); + rv = spi_flash_reg_to_protect(sr1, sr2, &start, &len); + if (rv) + return EC_FLASH_PROTECT_ERROR_UNKNOWN; + if (len && (!(sr1 & SPI_FLASH_SR1_SRP0) || (sr2 & SPI_FLASH_SR2_QE))) flags |= EC_FLASH_PROTECT_ERROR_INCONSISTENT; /* Read all-protected state from our shadow copy */ @@ -697,18 +701,6 @@ uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags) int crec_flash_pre_init(void) { - /* - * Protect status registers of internal spi-flash if WP# is active - * during ec initialization. - */ -#ifdef NPCX_INT_FLASH_SUPPORT -#ifdef CONFIG_WP_ACTIVE_HIGH - flash_protect_int_flash(gpio_get_level(GPIO_WP)); -#else - flash_protect_int_flash(!gpio_get_level(GPIO_WP_L)); -#endif /*CONFIG_WP_ACTIVE_HIGH */ -#endif - #if !defined(NPCX_INT_FLASH_SUPPORT) /* Enable FIU interface */ flash_pinmux(1); @@ -721,6 +713,23 @@ int crec_flash_pre_init(void) /* Initialize UMA to unlocked */ flash_uma_lock(0); + + /* + * Disable flash quad enable to avoid /WP pin function is not + * available. */ + flash_set_quad_enable(0); + + /* + * Protect status registers of internal spi-flash if WP# is active + * during ec initialization. + */ +#ifdef NPCX_INT_FLASH_SUPPORT +#ifdef CONFIG_WP_ACTIVE_HIGH + flash_protect_int_flash(gpio_get_level(GPIO_WP)); +#else + flash_protect_int_flash(!gpio_get_level(GPIO_WP_L)); +#endif /*CONFIG_WP_ACTIVE_HIGH */ +#endif return EC_SUCCESS; } @@ -745,8 +754,7 @@ static enum ec_status flash_command_spi_info(struct host_cmd_handler_args *args) flash_get_jedec_id(r->jedec); r->reserved0 = 0; flash_get_mfr_dev_id(r->mfr_dev_id); - r->sr1 = flash_get_status1(); - r->sr2 = flash_get_status2(); + flash_get_status(&r->sr1, &r->sr2); args->response_size = sizeof(*r); return EC_RES_SUCCESS; @@ -817,9 +825,10 @@ DECLARE_CONSOLE_COMMAND(flash_tristate, command_flash_tristate, static int command_flash_chip(int argc, char **argv) { uint8_t jedec_id[3]; + uint8_t sr1, sr2; - ccprintf("Status 1: 0x%02x, Status 2: 0x%02x\n", flash_get_status1(), - flash_get_status2()); + flash_get_status(&sr1, &sr2); + ccprintf("Status 1: 0x%02x, Status 2: 0x%02x\n", sr1, sr2); flash_get_jedec_id(jedec_id); ccprintf("Manufacturer: 0x%02x, DID: 0x%02x%02x\n", jedec_id[0], diff --git a/chip/npcx/gpio-npcx5.c b/chip/npcx/gpio-npcx5.c index e1d13c98d1..9412aa9d9f 100644 --- a/chip/npcx/gpio-npcx5.c +++ b/chip/npcx/gpio-npcx5.c @@ -49,13 +49,13 @@ DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); */ #define GPIO_IRQ_FUNC(_irq_func, wui_int) \ -void _irq_func(void) \ +static void _irq_func(void) \ { \ gpio_interrupt(wui_int); \ } /* If we need to handle the other type interrupts except GPIO, add code here */ -void __gpio_wk0efgh_interrupt(void) +static void __gpio_wk0efgh_interrupt(void) { if (IS_ENABLED(CONFIG_HOSTCMD_X86)) { /* Pending bit 7 or 6 or 5? */ @@ -67,7 +67,7 @@ void __gpio_wk0efgh_interrupt(void) SET_BIT(NPCX_WKPCL(MIWU_TABLE_0, MIWU_GROUP_5), 6); return; } - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { if (IS_BIT_SET(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 5) && IS_BIT_SET(NPCX_WKPND(MIWU_TABLE_0, MIWU_GROUP_5), 5)) { @@ -97,7 +97,7 @@ static void set_rtc_host_event(void) DECLARE_DEFERRED(set_rtc_host_event); #endif -void __gpio_rtc_interrupt(void) +static void __gpio_rtc_interrupt(void) { /* Check pending bit 7 */ #ifdef CONFIG_HOSTCMD_RTC @@ -130,7 +130,7 @@ void __gpio_rtc_interrupt(void) gpio_interrupt(WUI_INT(MIWU_TABLE_0, MIWU_GROUP_4)); } -void __gpio_wk1h_interrupt(void) +static void __gpio_wk1h_interrupt(void) { #if defined(CHIP_FAMILY_NPCX7) && defined(CONFIG_LOW_POWER_IDLE) && \ (CONFIG_CONSOLE_UART == 0) @@ -179,7 +179,7 @@ DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, __gpio_wk1c_interrupt, 3); #endif DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 3); DECLARE_IRQ(NPCX_IRQ_WKINTE_1, __gpio_wk1e_interrupt, 3); -#ifdef CONFIG_HOSTCMD_SHI +#ifdef CONFIG_HOST_INTERFACE_SHI /* * HACK: Make CS GPIO P2 to improve SHI reliability. * TODO: Increase CS-assertion-to-transaction-start delay on host to diff --git a/chip/npcx/gpio-npcx9.c b/chip/npcx/gpio-npcx9.c index f0ed529808..31ed4e62ac 100644 --- a/chip/npcx/gpio-npcx9.c +++ b/chip/npcx/gpio-npcx9.c @@ -52,13 +52,13 @@ DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); */ #define GPIO_IRQ_FUNC(_irq_func, wui_int) \ -void _irq_func(void) \ +static void _irq_func(void) \ { \ gpio_interrupt(wui_int); \ } /* If we need to handle the other type interrupts except GPIO, add code here */ -void __gpio_host_interrupt(void) +static void __gpio_host_interrupt(void) { if (IS_ENABLED(CONFIG_HOSTCMD_X86)) { /* Pending bit 7 or 6 or 5? */ @@ -70,7 +70,7 @@ void __gpio_host_interrupt(void) SET_BIT(NPCX_WKPCL(MIWU_TABLE_0, MIWU_GROUP_5), 6); return; } - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { if (IS_BIT_SET(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 5) && IS_BIT_SET(NPCX_WKPND(MIWU_TABLE_0, MIWU_GROUP_5), 5)) { @@ -97,7 +97,7 @@ static void set_rtc_host_event(void) DECLARE_DEFERRED(set_rtc_host_event); #endif -void __gpio_rtc_interrupt(void) +static void __gpio_rtc_interrupt(void) { /* Check pending bit 7 */ #ifdef CONFIG_HOSTCMD_RTC @@ -110,7 +110,7 @@ void __gpio_rtc_interrupt(void) #endif gpio_interrupt(WUI_INT(MIWU_TABLE_0, MIWU_GROUP_4)); } -void __gpio_cr_sin2_interrupt(void) +static void __gpio_cr_sin2_interrupt(void) { #if defined(CONFIG_LOW_POWER_IDLE) && (CONFIG_CONSOLE_UART == 1) /* Handle the interrupt from UART wakeup event */ @@ -133,7 +133,7 @@ void __gpio_cr_sin2_interrupt(void) } -void __gpio_wk1h_interrupt(void) +static void __gpio_wk1h_interrupt(void) { #if defined(CONFIG_LOW_POWER_IDLE) && (CONFIG_CONSOLE_UART == 0) /* Handle the interrupt from UART wakeup event */ @@ -154,7 +154,7 @@ void __gpio_wk1h_interrupt(void) gpio_interrupt(WUI_INT(MIWU_TABLE_1, MIWU_GROUP_8)); } -void __gpio_lct_interrupt(void) +static void __gpio_lct_interrupt(void) { if (NPCX_WKPND(MIWU_TABLE_2, MIWU_GROUP_6) & LCT_WUI_MASK) { NPCX_WKPCL(MIWU_TABLE_2, MIWU_GROUP_6) |= LCT_WUI_MASK; @@ -195,7 +195,7 @@ DECLARE_IRQ(NPCX_IRQ_KSI_WKINTC_1, __gpio_wk1c_interrupt, 3); #endif DECLARE_IRQ(NPCX_IRQ_WKINTD_1, __gpio_wk1d_interrupt, 3); DECLARE_IRQ(NPCX_IRQ_WKINTE_1, __gpio_wk1e_interrupt, 3); -#ifdef CONFIG_HOSTCMD_SHI +#ifdef CONFIG_HOST_INTERFACE_SHI /* * HACK: Make CS GPIO P2 to improve SHI reliability. * TODO: Increase CS-assertion-to-transaction-start delay on host to diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c index e740f0aa9f..5f1e3c78b6 100644 --- a/chip/npcx/gpio.c +++ b/chip/npcx/gpio.c @@ -560,7 +560,7 @@ void gpio_pre_init(void) #endif /* Pin_Mux for LPC & SHI */ -#ifdef CONFIG_HOSTCMD_SHI +#ifdef CONFIG_HOST_INTERFACE_SHI /* Switching to eSPI mode for SHI interface */ NPCX_DEVCNT |= 0x08; /* Alternate Intel bus interface LPC/eSPI to GPIOs first */ diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c index 92f9843d09..b479f237c0 100644 --- a/chip/npcx/hwtimer.c +++ b/chip/npcx/hwtimer.c @@ -166,7 +166,7 @@ void __hw_clock_event_clear(void) } /* Irq for hwtimer event */ -void __hw_clock_event_irq(void) +static void __hw_clock_event_irq(void) { /* ITIM event module disable */ CLEAR_BIT(NPCX_ITCTS(ITIM_EVENT_NO), NPCX_ITCTS_ITEN); @@ -246,7 +246,7 @@ void __hw_clock_source_set(uint32_t ts) } /* Irq for hwtimer tick */ -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { /* Is timeout trigger trigger? */ if (IS_BIT_SET(NPCX_ITCTS(ITIM_SYSTEM_NO), NPCX_ITCTS_TO_STS)) { diff --git a/chip/npcx/i2c.c b/chip/npcx/i2c.c index 26935f778f..a7c389f1b3 100644 --- a/chip/npcx/i2c.c +++ b/chip/npcx/i2c.c @@ -858,15 +858,15 @@ void handle_interrupt(int controller) i2c_controller_int_handler(controller); } -void i2c0_interrupt(void) { handle_interrupt(0); } -void i2c1_interrupt(void) { handle_interrupt(1); } -void i2c2_interrupt(void) { handle_interrupt(2); } -void i2c3_interrupt(void) { handle_interrupt(3); } +static void i2c0_interrupt(void) { handle_interrupt(0); } +static void i2c1_interrupt(void) { handle_interrupt(1); } +static void i2c2_interrupt(void) { handle_interrupt(2); } +static void i2c3_interrupt(void) { handle_interrupt(3); } #if NPCX_FAMILY_VERSION >= NPCX_FAMILY_NPCX7 -void i2c4_interrupt(void) { handle_interrupt(4); } -void i2c5_interrupt(void) { handle_interrupt(5); } -void i2c6_interrupt(void) { handle_interrupt(6); } -void i2c7_interrupt(void) { handle_interrupt(7); } +static void i2c4_interrupt(void) { handle_interrupt(4); } +static void i2c5_interrupt(void) { handle_interrupt(5); } +static void i2c6_interrupt(void) { handle_interrupt(6); } +static void i2c7_interrupt(void) { handle_interrupt(7); } #endif DECLARE_IRQ(NPCX_IRQ_SMB1, i2c0_interrupt, 4); diff --git a/chip/npcx/keyboard_raw.c b/chip/npcx/keyboard_raw.c index 8dc11c03ac..4d0f76c994 100644 --- a/chip/npcx/keyboard_raw.c +++ b/chip/npcx/keyboard_raw.c @@ -152,7 +152,7 @@ void keyboard_raw_enable_interrupt(int enable) /* * Interrupt handler for the entire GPIO bank of keyboard rows. */ -void keyboard_raw_interrupt(void) +static void keyboard_raw_interrupt(void) { /* Clear pending input sources used by scanner */ NPCX_WKPCL(MIWU_TABLE_WKKEY, MIWU_GROUP_WKKEY) = 0xFF; diff --git a/chip/npcx/lpc.c b/chip/npcx/lpc.c index 4eee50d714..c80bf2960b 100644 --- a/chip/npcx/lpc.c +++ b/chip/npcx/lpc.c @@ -86,7 +86,7 @@ static void lpc_task_enable_irq(void) #endif task_enable_irq(NPCX_IRQ_PM_CHAN_IBF); task_enable_irq(NPCX_IRQ_PORT80); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI task_enable_irq(NPCX_IRQ_ESPI); /* Virtual Wire: SLP_S3/4/5, SUS_STAT, PLTRST, OOB_RST_WARN */ task_enable_irq(NPCX_IRQ_WKINTA_2); @@ -105,7 +105,7 @@ static void lpc_task_disable_irq(void) #endif task_disable_irq(NPCX_IRQ_PM_CHAN_IBF); task_disable_irq(NPCX_IRQ_PORT80); -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI task_disable_irq(NPCX_IRQ_ESPI); /* Virtual Wire: SLP_S3/4/5, SUS_STAT, PLTRST, OOB_RST_WARN */ task_disable_irq(NPCX_IRQ_WKINTA_2); @@ -137,7 +137,7 @@ static void lpc_generate_smi(void) udelay(65); /* Set signal high, now that we've generated the edge */ gpio_set_level(GPIO_PCH_SMI_L, 1); -#elif defined(CONFIG_HOSTCMD_ESPI) +#elif defined(CONFIG_HOST_INTERFACE_ESPI) /* * Don't use SET_BIT/CLEAR_BIT macro to toggle SMIB/SCIB to generate * virtual wire. Use NPCX_VW_SMI/NPCX_VW_SCI macro instead. @@ -183,7 +183,7 @@ static void lpc_generate_sci(void) udelay(65); /* Set signal high, now that we've generated the edge */ gpio_set_level(CONFIG_SCI_GPIO, 1); -#elif defined(CONFIG_HOSTCMD_ESPI) +#elif defined(CONFIG_HOST_INTERFACE_ESPI) /* * Don't use SET_BIT/CLEAR_BIT macro to toggle SMIB/SCIB to generate * virtual wire. Use NPCX_VW_SMI/NPCX_VW_SCI macro instead. @@ -519,7 +519,7 @@ static void handle_host_write(int is_cmd) /* Interrupt handlers */ #ifdef HAS_TASK_KEYPROTO /* KB controller input buffer full ISR */ -void lpc_kbc_ibf_interrupt(void) +static void lpc_kbc_ibf_interrupt(void) { uint8_t status; uint8_t ibf; @@ -543,7 +543,7 @@ void lpc_kbc_ibf_interrupt(void) DECLARE_IRQ(NPCX_IRQ_KBC_IBF, lpc_kbc_ibf_interrupt, 4); /* KB controller output buffer empty ISR */ -void lpc_kbc_obe_interrupt(void) +static void lpc_kbc_obe_interrupt(void) { /* Disable KBC OBE interrupt */ CLEAR_BIT(NPCX_HICTRL, NPCX_HICTRL_OBECIE); @@ -559,7 +559,7 @@ DECLARE_IRQ(NPCX_IRQ_KBC_OBE, lpc_kbc_obe_interrupt, 4); #endif /* PM channel input buffer full ISR */ -void lpc_pmc_ibf_interrupt(void) +static void lpc_pmc_ibf_interrupt(void) { /* Channel-1 for ACPI usage*/ /* Channel-2 for Host Command usage , so the argument data had been @@ -572,12 +572,12 @@ void lpc_pmc_ibf_interrupt(void) DECLARE_IRQ(NPCX_IRQ_PM_CHAN_IBF, lpc_pmc_ibf_interrupt, 4); /* PM channel output buffer empty ISR */ -void lpc_pmc_obe_interrupt(void) +static void lpc_pmc_obe_interrupt(void) { } DECLARE_IRQ(NPCX_IRQ_PM_CHAN_OBE, lpc_pmc_obe_interrupt, 4); -void lpc_port80_interrupt(void) +static void lpc_port80_interrupt(void) { uint8_t i; uint8_t count = 0; @@ -698,7 +698,7 @@ void host_register_init(void) * EC hardware will put those 4 bytes of Port80 code to DP80BUF FIFO. * This is only supported when CHIP_FAMILY >= NPCX9. */ - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) sib_write_reg(SIO_OFFSET, 0xFD, 0x0F); /* enable SHM */ sib_write_reg(SIO_OFFSET, 0x30, 0x01); @@ -721,7 +721,7 @@ int lpc_get_pltrst_asserted(void) return IS_BIT_SET(NPCX_MSWCTL1, NPCX_MSWCTL1_PLTRST_ACT); } -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* Initialize host settings by interrupt */ void lpc_lreset_pltrst_handler(void) { @@ -771,7 +771,7 @@ static void lpc_init(void) * In npcx9, the booter will not do this anymore. The HIF_TYP_SEL * field should be set by firmware. */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI /* Initialize eSPI module */ NPCX_DEVCNT |= 0x08; espi_init(); @@ -787,7 +787,7 @@ static void lpc_init(void) /* Clear Host Access Hold state */ NPCX_SMC_CTL = 0xC0; -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* * Set alternative pin from GPIO to CLKRUN no matter SERIRQ is under * continuous or quiet mode. @@ -800,7 +800,7 @@ static void lpc_init(void) * valid if CONFIG_SCI_GPIO isn't defined. eSPI sends SMI/SCI through VW * automatically by toggling them, too. It's unnecessary to set pin mux. */ -#if !defined(CONFIG_SCI_GPIO) && !defined(CONFIG_HOSTCMD_ESPI) +#if !defined(CONFIG_SCI_GPIO) && !defined(CONFIG_HOST_INTERFACE_ESPI) SET_BIT(NPCX_DEVALT(1), NPCX_DEVALT1_EC_SCI_SL); SET_BIT(NPCX_DEVALT(1), NPCX_DEVALT1_SMI_SL); #endif @@ -876,7 +876,7 @@ static void lpc_init(void) * Init PORT80 * Enable Port80, Enable Port80 function & Interrupt & Read auto */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI NPCX_DP80CTL = 0x2b; #else NPCX_DP80CTL = 0x29; @@ -926,7 +926,7 @@ static void lpc_init(void) /* initial IO port address via SIB-write modules */ host_register_init(); #else -#ifndef CONFIG_HOSTCMD_ESPI +#ifndef CONFIG_HOST_INTERFACE_ESPI /* * Initialize LRESET# interrupt only in case of LPC. For eSPI, there is * no dedicated GPIO pin for LRESET/PLTRST. PLTRST is indicated as a VW diff --git a/chip/npcx/peci.c b/chip/npcx/peci.c index badfbd87d9..6f82b932b0 100644 --- a/chip/npcx/peci.c +++ b/chip/npcx/peci.c @@ -269,7 +269,7 @@ static void peci_init(void) DECLARE_HOOK(HOOK_INIT, peci_init, HOOK_PRIO_DEFAULT); /* If received a PECI DONE interrupt, post the event to PECI task */ -void peci_done_interrupt(void){ +static void peci_done_interrupt(void){ if (peci_pending_task_id != NULL_PENDING_TASK_ID) task_set_event(peci_pending_task_id, TASK_EVENT_PECI_DONE); peci_sts = NPCX_PECI_CTL_STS & 0x18; diff --git a/chip/npcx/ps2.c b/chip/npcx/ps2.c index 7b8086cbcd..13a1ff6d57 100644 --- a/chip/npcx/ps2.c +++ b/chip/npcx/ps2.c @@ -247,7 +247,7 @@ static int ps2_is_rx_error(uint8_t ch) return 0; } -void ps2_int_handler(void) +static void ps2_int_handler(void) { uint8_t active_ch; diff --git a/chip/npcx/shi.c b/chip/npcx/shi.c index f8aefa1629..8ce7d21a4a 100644 --- a/chip/npcx/shi.c +++ b/chip/npcx/shi.c @@ -651,7 +651,7 @@ static void shi_handle_cs_assert(void) } /* This routine handles all interrupts of this module */ -void shi_int_handler(void) +static void shi_int_handler(void) { uint8_t stat_reg; #ifdef NPCX_SHI_V2 diff --git a/chip/npcx/shi_chip.h b/chip/npcx/shi_chip.h index c14aec196e..3fd73e8119 100644 --- a/chip/npcx/shi_chip.h +++ b/chip/npcx/shi_chip.h @@ -5,10 +5,9 @@ /* NPCX-specific SHI module for Chrome EC */ -#ifndef SHI_CHIP_H_ -#define SHI_CHIP_H_ +#ifndef __CROS_EC_SHI_CHIP_H_ +#define __CROS_EC_SHI_CHIP_H_ -#ifdef CONFIG_HOSTCMD_SHI /** * Called when the NSS level changes, signalling the start of a SHI * transaction. @@ -19,6 +18,5 @@ void shi_cs_event(enum gpio_signal signal); #ifdef NPCX_SHI_V2 void shi_cs_gpio_int(enum gpio_signal signal); #endif -#endif -#endif /* SHI_CHIP_H_ */ +#endif /* __CROS_EC_SHI_CHIP_H_ */ diff --git a/chip/npcx/sib.c b/chip/npcx/sib.c index b62946fc96..424048518e 100644 --- a/chip/npcx/sib.c +++ b/chip/npcx/sib.c @@ -19,7 +19,7 @@ * For eSPI - it is 200 us. * For LPC - it is 5 us. */ -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI #define HOST_TRANSACTION_TIMEOUT_US 200 #else #define HOST_TRANSACTION_TIMEOUT_US 5 diff --git a/chip/npcx/spiflashfw/npcx_monitor.ld b/chip/npcx/spiflashfw/npcx_monitor.ld index 03e38b0609..ae7760c519 100644 --- a/chip/npcx/spiflashfw/npcx_monitor.ld +++ b/chip/npcx/spiflashfw/npcx_monitor.ld @@ -49,4 +49,5 @@ SECTIONS */ _sidata = _etext; + /DISCARD/ : { *(.ARM.*) } } diff --git a/chip/npcx/system.c b/chip/npcx/system.c index ac7056330f..97fcd01c41 100644 --- a/chip/npcx/system.c +++ b/chip/npcx/system.c @@ -872,7 +872,7 @@ void system_pre_init(void) BIT(NPCX_PWDWN_CTL6_ITIM6_PD) | #endif BIT(NPCX_PWDWN_CTL6_ITIM4_PD); /* Skip ITIM5_PD */ -#if !defined(CONFIG_HOSTCMD_ESPI) +#if !defined(CONFIG_HOST_INTERFACE_ESPI) pwdwn6 |= 1 << NPCX_PWDWN_CTL6_ESPI_PD; #endif NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = pwdwn6; diff --git a/chip/npcx/uart.c b/chip/npcx/uart.c index efe991ec0b..c158049e6a 100644 --- a/chip/npcx/uart.c +++ b/chip/npcx/uart.c @@ -197,7 +197,7 @@ int uart_read_char(void) } /* Interrupt handler for Console UART */ -void uart_ec_interrupt(void) +static void uart_ec_interrupt(void) { #ifdef CONFIG_UART_PAD_SWITCH if (pad == UART_ALTERNATE_PAD) { diff --git a/chip/npcx/wov.c b/chip/npcx/wov.c index c4f68f5369..5c3e915200 100644 --- a/chip/npcx/wov.c +++ b/chip/npcx/wov.c @@ -579,7 +579,7 @@ static void wov_under_over_error_handler(int *count, uint32_t *last_time) * * @return None */ -void wov_interrupt_handler(void) +static void wov_interrupt_handler(void) { uint32_t wov_status; uint32_t wov_inten; diff --git a/chip/nrf51/gpio.c b/chip/nrf51/gpio.c index 53694b5a74..02f8dc8b50 100644 --- a/chip/nrf51/gpio.c +++ b/chip/nrf51/gpio.c @@ -284,7 +284,7 @@ int gpio_disable_interrupt(enum gpio_signal signal) /* * Clear interrupt and run handler. */ -void gpio_interrupt(void) +static void gpio_interrupt(void) { const struct gpio_info *g; int i; diff --git a/chip/nrf51/hwtimer.c b/chip/nrf51/hwtimer.c index 2f44df905c..06b8210623 100644 --- a/chip/nrf51/hwtimer.c +++ b/chip/nrf51/hwtimer.c @@ -116,7 +116,7 @@ void __hw_clock_source_set(uint32_t ts) /* Interrupt handler for timer */ -void timer_irq(void) +static void timer_irq(void) { int overflow = 0; diff --git a/chip/nrf51/uart.c b/chip/nrf51/uart.c index 1f546a2b79..2a5802bf13 100644 --- a/chip/nrf51/uart.c +++ b/chip/nrf51/uart.c @@ -81,7 +81,7 @@ int uart_read_char(void) } /* Interrupt handler for console USART */ -void uart_interrupt(void) +static void uart_interrupt(void) { #ifndef CONFIG_UART_RX_DMA /* diff --git a/chip/stm32/clock-f.c b/chip/stm32/clock-f.c index 1a77d8ad60..0ae4440d78 100644 --- a/chip/stm32/clock-f.c +++ b/chip/stm32/clock-f.c @@ -322,7 +322,7 @@ DECLARE_DEFERRED(set_rtc_host_event); #endif test_mockable -void __rtc_alarm_irq(void) +void rtc_alarm_irq(void) { struct rtc_time_reg rtc; reset_rtc_alarm(&rtc); @@ -335,6 +335,11 @@ void __rtc_alarm_irq(void) } #endif } + +static void __rtc_alarm_irq(void) +{ + rtc_alarm_irq(); +} DECLARE_IRQ(STM32_IRQ_RTC_ALARM, __rtc_alarm_irq, 1); __attribute__((weak)) diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c index ba233dbd76..72f904c4ed 100644 --- a/chip/stm32/clock-stm32h7.c +++ b/chip/stm32/clock-stm32h7.c @@ -436,7 +436,7 @@ void clock_refresh_console_in_use(void) { } -void lptim_interrupt(void) +static void lptim_interrupt(void) { STM32_LPTIM_ICR(1) = STM32_LPTIM_INT_CMPM; } diff --git a/chip/stm32/clock-stm32l4.c b/chip/stm32/clock-stm32l4.c index 4624013a16..b07b5fb2d4 100644 --- a/chip/stm32/clock-stm32l4.c +++ b/chip/stm32/clock-stm32l4.c @@ -968,7 +968,7 @@ static void set_rtc_host_event(void) DECLARE_DEFERRED(set_rtc_host_event); #endif -test_mockable +test_mockable_static void __rtc_alarm_irq(void) { struct rtc_time_reg rtc; diff --git a/chip/stm32/dma-stm32f4.c b/chip/stm32/dma-stm32f4.c index c721065fd3..3374cff7fc 100644 --- a/chip/stm32/dma-stm32f4.c +++ b/chip/stm32/dma-stm32f4.c @@ -303,7 +303,7 @@ void dma_clear_isr(enum dma_channel stream) #define STM32_DMA_IDX(dma, x) CONCAT4(STM32_DMA, dma, _STREAM, x) #define STM32_DMA_FCT(dma, x) CONCAT4(dma_, dma, _event_interrupt_stream_, x) #define DECLARE_DMA_IRQ(dma, x) \ - void STM32_DMA_FCT(dma, x)(void) \ + static void STM32_DMA_FCT(dma, x)(void) \ { \ dma_clear_isr(STM32_DMA_IDX(dma, x)); \ if (dma_irq[STM32_DMA_IDX(dma, x)].cb != NULL) \ diff --git a/chip/stm32/dma.c b/chip/stm32/dma.c index 55317ba003..ae5a83789d 100644 --- a/chip/stm32/dma.c +++ b/chip/stm32/dma.c @@ -332,7 +332,7 @@ void dma_clear_isr(enum dma_channel channel) #ifdef CONFIG_DMA_DEFAULT_HANDLERS #ifdef CHIP_FAMILY_STM32F0 -void dma_event_interrupt_channel_1(void) +static void dma_event_interrupt_channel_1(void) { if (STM32_DMA1_REGS->isr & STM32_DMA_ISR_TCIF(STM32_DMAC_CH1)) { dma_clear_isr(STM32_DMAC_CH1); @@ -343,7 +343,7 @@ void dma_event_interrupt_channel_1(void) } DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_1, dma_event_interrupt_channel_1, 1); -void dma_event_interrupt_channel_2_3(void) +static void dma_event_interrupt_channel_2_3(void) { int i; @@ -357,7 +357,7 @@ void dma_event_interrupt_channel_2_3(void) } DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_2_3, dma_event_interrupt_channel_2_3, 1); -void dma_event_interrupt_channel_4_7(void) +static void dma_event_interrupt_channel_4_7(void) { int i; const unsigned int max_chan = MIN(STM32_DMAC_CH7, STM32_DMAC_COUNT); @@ -375,7 +375,7 @@ DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_4_7, dma_event_interrupt_channel_4_7, 1); #else /* !CHIP_FAMILY_STM32F0 */ #define DECLARE_DMA_IRQ(x) \ - void CONCAT2(dma_event_interrupt_channel_, x)(void) \ + static void CONCAT2(dma_event_interrupt_channel_, x)(void) \ { \ dma_clear_isr(CONCAT2(STM32_DMAC_CH, x)); \ if (dma_irq[CONCAT2(STM32_DMAC_CH, x)].cb != NULL) \ diff --git a/chip/stm32/gpio-stm32f3.c b/chip/stm32/gpio-stm32f3.c index a8deff59bf..f3a1b0068b 100644 --- a/chip/stm32/gpio-stm32f3.c +++ b/chip/stm32/gpio-stm32f3.c @@ -41,12 +41,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32f4.c b/chip/stm32/gpio-stm32f4.c index bf55799fe2..1ccdadd472 100644 --- a/chip/stm32/gpio-stm32f4.c +++ b/chip/stm32/gpio-stm32f4.c @@ -56,12 +56,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32g4.c b/chip/stm32/gpio-stm32g4.c index bb20ac8877..e77adc0ba6 100644 --- a/chip/stm32/gpio-stm32g4.c +++ b/chip/stm32/gpio-stm32g4.c @@ -56,12 +56,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32h7.c b/chip/stm32/gpio-stm32h7.c index e501251de9..2cb723f076 100644 --- a/chip/stm32/gpio-stm32h7.c +++ b/chip/stm32/gpio-stm32h7.c @@ -37,12 +37,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32l.c b/chip/stm32/gpio-stm32l.c index 77b432e081..607a1a391f 100644 --- a/chip/stm32/gpio-stm32l.c +++ b/chip/stm32/gpio-stm32l.c @@ -41,12 +41,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32l4.c b/chip/stm32/gpio-stm32l4.c index c4ccd5f01a..f4ec6f4412 100644 --- a/chip/stm32/gpio-stm32l4.c +++ b/chip/stm32/gpio-stm32l4.c @@ -42,12 +42,17 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio-stm32l5.c b/chip/stm32/gpio-stm32l5.c index 2449fb1644..9943edd55b 100644 --- a/chip/stm32/gpio-stm32l5.c +++ b/chip/stm32/gpio-stm32l5.c @@ -49,21 +49,26 @@ static void gpio_init(void) } DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); -DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI5, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI6, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI7, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI8, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI9, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI10, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI11, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI12, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI13, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI14, gpio_interrupt, 1); -DECLARE_IRQ(STM32_IRQ_EXTI15, gpio_interrupt, 1); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} + +DECLARE_IRQ(STM32_IRQ_EXTI0, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI5, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI6, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI7, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI8, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI10, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI11, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI12, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI13, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI14, _gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15, _gpio_interrupt, 1); #include "gpio-f0-l.c" diff --git a/chip/stm32/gpio.c b/chip/stm32/gpio.c index ccfd3399e2..20d9223351 100644 --- a/chip/stm32/gpio.c +++ b/chip/stm32/gpio.c @@ -171,7 +171,11 @@ void __keep gpio_interrupt(void) } } #ifdef CHIP_FAMILY_STM32F0 -DECLARE_IRQ(STM32_IRQ_EXTI0_1, gpio_interrupt, STM32_IRQ_EXT0_1_PRIORITY); -DECLARE_IRQ(STM32_IRQ_EXTI2_3, gpio_interrupt, STM32_IRQ_EXT2_3_PRIORITY); -DECLARE_IRQ(STM32_IRQ_EXTI4_15, gpio_interrupt, STM32_IRQ_EXTI4_15_PRIORITY); +static void _gpio_interrupt(void) +{ + gpio_interrupt(); +} +DECLARE_IRQ(STM32_IRQ_EXTI0_1, _gpio_interrupt, STM32_IRQ_EXT0_1_PRIORITY); +DECLARE_IRQ(STM32_IRQ_EXTI2_3, _gpio_interrupt, STM32_IRQ_EXT2_3_PRIORITY); +DECLARE_IRQ(STM32_IRQ_EXTI4_15, _gpio_interrupt, STM32_IRQ_EXTI4_15_PRIORITY); #endif diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c index 953110017f..c215484a22 100644 --- a/chip/stm32/hwtimer.c +++ b/chip/stm32/hwtimer.c @@ -213,7 +213,7 @@ void __hw_clock_source_set(uint32_t ts) STM32_TIM_CNT(TIM_CLOCK_LSB) = ts & 0xffff; } -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { uint32_t stat_tim_msb = STM32_TIM_SR(TIM_CLOCK_MSB); diff --git a/chip/stm32/hwtimer32.c b/chip/stm32/hwtimer32.c index 963fa44e51..61ba07cc56 100644 --- a/chip/stm32/hwtimer32.c +++ b/chip/stm32/hwtimer32.c @@ -49,7 +49,7 @@ void __hw_clock_source_set(uint32_t ts) STM32_TIM32_CNT(TIM_CLOCK32) = ts; } -void __hw_clock_source_irq(void) +static void __hw_clock_source_irq(void) { uint32_t stat_tim = STM32_TIM_SR(TIM_CLOCK32); diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c index dacaa80257..f78a450a4e 100644 --- a/chip/stm32/i2c-stm32f0.c +++ b/chip/stm32/i2c-stm32f0.c @@ -439,7 +439,7 @@ static void i2c_event_handler(int port) } } } -void i2c2_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } +static void i2c2_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } DECLARE_IRQ(IRQ_PERIPHERAL, i2c2_event_interrupt, 2); #endif diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c index c1f19704b5..840c151c62 100644 --- a/chip/stm32/i2c-stm32f4.c +++ b/chip/stm32/i2c-stm32f4.c @@ -975,7 +975,7 @@ static void i2c_event_handler(int port) if (!(i2c_cr1 & STM32_I2C_CR1_PE)) STM32_I2C_CR1(port) |= STM32_I2C_CR1_PE; } -void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } +static void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } DECLARE_IRQ(IRQ_PERIPHERAL_EV, i2c_event_interrupt, 2); DECLARE_IRQ(IRQ_PERIPHERAL_ER, i2c_event_interrupt, 2); #endif diff --git a/chip/stm32/i2c-stm32l4.c b/chip/stm32/i2c-stm32l4.c index 5997ed5b70..2afcd1ce9c 100644 --- a/chip/stm32/i2c-stm32l4.c +++ b/chip/stm32/i2c-stm32l4.c @@ -299,7 +299,7 @@ static void i2c_event_handler(int port) } } -void i2c_event_interrupt(void) +static void i2c_event_interrupt(void) { i2c_event_handler(I2C_PORT_EC); } diff --git a/chip/stm32/system.c b/chip/stm32/system.c index 03e9a74ac4..0b0f7f3759 100644 --- a/chip/stm32/system.c +++ b/chip/stm32/system.c @@ -253,7 +253,7 @@ static void configure_pvd(void) STM32_PWR_CR |= STM32_PWR_PVDE; } -void pvd_interrupt(void) +static void pvd_interrupt(void) { /* Clear Pending Register */ STM32_EXTI_PR = EXTI_PVD_EVENT; diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 0632fc6687..bafca58c46 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -161,7 +161,7 @@ int uart_read_char(void) } /* Interrupt handler for console USART */ -void uart_interrupt(void) +static void uart_interrupt(void) { #ifndef CONFIG_UART_TX_DMA /* diff --git a/chip/stm32/ucpd-stm32gx.c b/chip/stm32/ucpd-stm32gx.c index ce5b82fff8..d8c41c8f28 100644 --- a/chip/stm32/ucpd-stm32gx.c +++ b/chip/stm32/ucpd-stm32gx.c @@ -1248,7 +1248,7 @@ enum ec_error_list stm32gx_ucpd_set_bist_test_mode(const int port, return EC_SUCCESS; } -void stm32gx_ucpd1_irq(void) +static void stm32gx_ucpd1_irq(void) { /* STM32_IRQ_UCPD indicates this is from UCPD1, so port = 0 */ int port = 0; diff --git a/chip/stm32/usart-stm32f0.c b/chip/stm32/usart-stm32f0.c index 908542146f..b4e7c924a8 100644 --- a/chip/stm32/usart-stm32f0.c +++ b/chip/stm32/usart-stm32f0.c @@ -99,7 +99,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -117,7 +117,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -148,7 +148,7 @@ struct usart_hw_config const usart4_hw = { #endif #if defined(CONFIG_STREAM_USART3) || defined(CONFIG_STREAM_USART4) -void usart3_4_interrupt(void) +static void usart3_4_interrupt(void) { /* * This interrupt handler could be called with one of these configs diff --git a/chip/stm32/usart-stm32f3.c b/chip/stm32/usart-stm32f3.c index 42a0cf310e..18452cb3fb 100644 --- a/chip/stm32/usart-stm32f3.c +++ b/chip/stm32/usart-stm32f3.c @@ -73,7 +73,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -91,7 +91,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -111,7 +111,7 @@ struct usart_hw_config const usart3_hw = { #endif #if defined(CONFIG_STREAM_USART3) -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usart-stm32f4.c b/chip/stm32/usart-stm32f4.c index a554da147a..2c9e4b1f4a 100644 --- a/chip/stm32/usart-stm32f4.c +++ b/chip/stm32/usart-stm32f4.c @@ -66,7 +66,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -84,7 +84,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -104,7 +104,7 @@ struct usart_hw_config const usart3_hw = { #endif #if defined(CONFIG_STREAM_USART3) -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usart-stm32l.c b/chip/stm32/usart-stm32l.c index 2b7406a0a4..8d23524bb0 100644 --- a/chip/stm32/usart-stm32l.c +++ b/chip/stm32/usart-stm32l.c @@ -87,7 +87,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -105,7 +105,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -123,7 +123,7 @@ struct usart_hw_config const usart3_hw = { .ops = &usart_variant_hw_ops, }; -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usart-stm32l5.c b/chip/stm32/usart-stm32l5.c index 0245718e21..c6d81bf3e4 100644 --- a/chip/stm32/usart-stm32l5.c +++ b/chip/stm32/usart-stm32l5.c @@ -87,7 +87,7 @@ struct usart_hw_config const usart1_hw = { .ops = &usart_variant_hw_ops, }; -void usart1_interrupt(void) +static void usart1_interrupt(void) { usart_interrupt(configs[0]); } @@ -105,7 +105,7 @@ struct usart_hw_config const usart2_hw = { .ops = &usart_variant_hw_ops, }; -void usart2_interrupt(void) +static void usart2_interrupt(void) { usart_interrupt(configs[1]); } @@ -123,7 +123,7 @@ struct usart_hw_config const usart3_hw = { .ops = &usart_variant_hw_ops, }; -void usart3_interrupt(void) +static void usart3_interrupt(void) { usart_interrupt(configs[2]); } diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c index 1c41a68df1..dde84efaea 100644 --- a/chip/stm32/usb.c +++ b/chip/stm32/usb.c @@ -684,7 +684,7 @@ static void usb_interrupt_handle_wake(uint16_t status) } #endif /* CONFIG_USB_SUSPEND && CONFIG_USB_REMOTE_WAKEUP */ -void usb_interrupt(void) +static void usb_interrupt(void) { uint16_t status = STM32_USB_ISTR; diff --git a/chip/stm32/usb_dwc.c b/chip/stm32/usb_dwc.c index f4ee89f1f0..0028806432 100644 --- a/chip/stm32/usb_dwc.c +++ b/chip/stm32/usb_dwc.c @@ -999,7 +999,7 @@ static void usb_enumdone(void) } -void usb_interrupt(void) +static void usb_interrupt(void) { uint32_t status = GR_USB_GINTSTS & GR_USB_GINTMSK; uint32_t oepint = status & GINTSTS(OEPINT); diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 90506d8975..21484b1a88 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -507,7 +507,11 @@ defined(CONFIG_USB_PD_LOW_POWER_IDLE_WHEN_CONNECTED) } } #ifdef CONFIG_USB_PD_RX_COMP_IRQ -DECLARE_IRQ(STM32_IRQ_COMP, pd_rx_handler, 1); +static void _pd_rx_handler(void) +{ + pd_rx_handler(); +} +DECLARE_IRQ(STM32_IRQ_COMP, _pd_rx_handler, 1); #endif /* --- release hardware --- */ diff --git a/chip/stm32/usb_spi.c b/chip/stm32/usb_spi.c index 54caae015e..86254ddaac 100644 --- a/chip/stm32/usb_spi.c +++ b/chip/stm32/usb_spi.c @@ -273,8 +273,8 @@ static void usb_spi_process_rx_packet(struct usb_spi_config const *config, } else if (write_count > USB_SPI_MAX_WRITE_COUNT) { setup_transfer_response(config, USB_SPI_WRITE_COUNT_INVALID); +#ifdef CONFIG_SPI_HALFDUPLEX } else if (read_count == USB_SPI_FULL_DUPLEX_ENABLED) { -#ifndef CONFIG_SPI_HALFDUPLEX /* Full duplex mode is not supported on this device. */ setup_transfer_response(config, USB_SPI_UNSUPPORTED_FULL_DUPLEX); diff --git a/common/acpi.c b/common/acpi.c index d697eb7cd9..6717732e06 100644 --- a/common/acpi.c +++ b/common/acpi.c @@ -133,6 +133,10 @@ static int acpi_read(uint8_t addr) uint8_t *memmap_addr = (uint8_t *)(lpc_get_memmap_range() + addr - EC_ACPI_MEM_MAPPED_BEGIN); +#ifdef __clang__ +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wtautological-constant-out-of-range-compare" +#endif /* __clang__ */ /* Check for out-of-range read. */ if (addr < EC_ACPI_MEM_MAPPED_BEGIN || addr >= EC_ACPI_MEM_MAPPED_BEGIN + EC_ACPI_MEM_MAPPED_SIZE) { @@ -140,6 +144,10 @@ static int acpi_read(uint8_t addr) acpi_addr); return 0xff; } +#ifdef __clang__ +#pragma clang diagnostic pop +#endif /* __clang__ */ + /* Read from cache if enabled (burst mode). */ if (acpi_read_cache.enabled) { diff --git a/common/battery.c b/common/battery.c index 6791e4d3a2..01478d5b52 100644 --- a/common/battery.c +++ b/common/battery.c @@ -29,15 +29,6 @@ const static int batt_host_full_factor = CONFIG_BATT_HOST_FULL_FACTOR; const static int batt_host_shutdown_pct = CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE; -#ifdef CONFIG_BATTERY_V2 -/* - * Store battery information in these 2 structures. Main (lid) battery is always - * at index 0, and secondary (base) battery at index 1. - */ -struct ec_response_battery_static_info_v1 battery_static[CONFIG_BATTERY_COUNT]; -struct ec_response_battery_dynamic_info battery_dynamic[CONFIG_BATTERY_COUNT]; -#endif - #ifdef CONFIG_BATTERY_CUT_OFF #ifndef CONFIG_BATTERY_CUTOFF_DELAY_US @@ -404,6 +395,38 @@ int battery_is_cut_off(void) #endif /* CONFIG_BATTERY_CUT_OFF */ #ifdef CONFIG_BATTERY_VENDOR_PARAM +__overridable int battery_get_vendor_param(uint32_t param, uint32_t *value) +{ + const struct battery_info *bi = battery_get_info(); + struct battery_static_info *bs = &battery_static[BATT_IDX_MAIN]; + uint8_t *data = bs->vendor_param; + int rv; + + if (param < bi->vendor_param_start) + return EC_ERROR_ACCESS_DENIED; + + /* Skip read if cache is valid. */ + if (!data[0]) { + rv = sb_read_string(bi->vendor_param_start, data, + sizeof(bs->vendor_param)); + if (rv) { + data[0] = 0; + return rv; + } + } + + if (param > bi->vendor_param_start + strlen(data)) + return EC_ERROR_INVAL; + + *value = data[param - bi->vendor_param_start]; + return EC_SUCCESS; +} + +__overridable int battery_set_vendor_param(uint32_t param, uint32_t value) +{ + return EC_ERROR_UNIMPLEMENTED; +} + static int console_command_battery_vendor_param(int argc, char **argv) { uint32_t param; @@ -469,151 +492,6 @@ DECLARE_HOST_COMMAND(EC_CMD_BATTERY_VENDOR_PARAM, EC_VER_MASK(0)); #endif /* CONFIG_BATTERY_VENDOR_PARAM */ -#ifdef CONFIG_BATTERY_V2 -#ifdef CONFIG_HOSTCMD_BATTERY_V2 -static void battery_update(enum battery_index i); -static enum ec_status -host_command_battery_get_static(struct host_cmd_handler_args *args) -{ - const struct ec_params_battery_static_info *p = args->params; - struct ec_response_battery_static_info_v1 *bat; - - if (p->index < 0 || p->index >= CONFIG_BATTERY_COUNT) - return EC_RES_INVALID_PARAM; - bat = &battery_static[p->index]; - - battery_update(p->index); - if (args->version == 0) { - struct ec_response_battery_static_info *r = args->response; - - args->response_size = sizeof(*r); - r->design_capacity = bat->design_capacity; - r->design_voltage = bat->design_voltage; - r->cycle_count = bat->cycle_count; - - /* Truncate strings to reduced v0 size */ - memcpy(&r->manufacturer, &bat->manufacturer_ext, - sizeof(r->manufacturer)); - r->manufacturer[sizeof(r->manufacturer) - 1] = 0; - memcpy(&r->model, &bat->model_ext, sizeof(r->model)); - r->model[sizeof(r->model) - 1] = 0; - memcpy(&r->serial, &bat->serial_ext, sizeof(r->serial)); - r->serial[sizeof(r->serial) - 1] = 0; - memcpy(&r->type, &bat->type_ext, sizeof(r->type)); - r->type[sizeof(r->type) - 1] = 0; - } else { - /* v1 command stores the same data internally */ - struct ec_response_battery_static_info_v1 *r = args->response; - - args->response_size = sizeof(*r); - memcpy(r, bat, sizeof(*r)); - } - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_BATTERY_GET_STATIC, - host_command_battery_get_static, - EC_VER_MASK(0) | EC_VER_MASK(1)); - -static enum ec_status -host_command_battery_get_dynamic(struct host_cmd_handler_args *args) -{ - const struct ec_params_battery_dynamic_info *p = args->params; - struct ec_response_battery_dynamic_info *r = args->response; - - if (p->index < 0 || p->index >= CONFIG_BATTERY_COUNT) - return EC_RES_INVALID_PARAM; - - args->response_size = sizeof(*r); - memcpy(r, &battery_dynamic[p->index], sizeof(*r)); - - return EC_RES_SUCCESS; -} -DECLARE_HOST_COMMAND(EC_CMD_BATTERY_GET_DYNAMIC, - host_command_battery_get_dynamic, - EC_VER_MASK(0)); -#endif /* CONFIG_HOSTCMD_BATTERY_V2 */ - -#ifdef HAS_TASK_HOSTCMD -static void battery_update(enum battery_index i) -{ - char *batt_str; - int *memmap_dcap = (int *)host_get_memmap(EC_MEMMAP_BATT_DCAP); - int *memmap_dvlt = (int *)host_get_memmap(EC_MEMMAP_BATT_DVLT); - int *memmap_ccnt = (int *)host_get_memmap(EC_MEMMAP_BATT_CCNT); - int *memmap_volt = (int *)host_get_memmap(EC_MEMMAP_BATT_VOLT); - int *memmap_rate = (int *)host_get_memmap(EC_MEMMAP_BATT_RATE); - int *memmap_cap = (int *)host_get_memmap(EC_MEMMAP_BATT_CAP); - int *memmap_lfcc = (int *)host_get_memmap(EC_MEMMAP_BATT_LFCC); - uint8_t *memmap_flags = host_get_memmap(EC_MEMMAP_BATT_FLAG); - - /* Smart battery serial number is 16 bits */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_SERIAL); - memcpy(batt_str, battery_static[i].serial_ext, EC_MEMMAP_TEXT_MAX); - batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; - - /* Design Capacity of Full */ - *memmap_dcap = battery_static[i].design_capacity; - - /* Design Voltage */ - *memmap_dvlt = battery_static[i].design_voltage; - - /* Cycle Count */ - *memmap_ccnt = battery_static[i].cycle_count; - - /* Battery Manufacturer string */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MFGR); - memcpy(batt_str, battery_static[i].manufacturer_ext, - EC_MEMMAP_TEXT_MAX); - batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; - - /* Battery Model string */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MODEL); - memcpy(batt_str, battery_static[i].model_ext, EC_MEMMAP_TEXT_MAX); - batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; - - /* Battery Type string */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_TYPE); - memcpy(batt_str, battery_static[i].type_ext, EC_MEMMAP_TEXT_MAX); - batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; - - *memmap_volt = battery_dynamic[i].actual_voltage; - *memmap_rate = battery_dynamic[i].actual_current; - *memmap_cap = battery_dynamic[i].remaining_capacity; - *memmap_lfcc = battery_dynamic[i].full_capacity; - *memmap_flags = battery_dynamic[i].flags; -} - -void battery_memmap_refresh(enum battery_index index) -{ - if (*host_get_memmap(EC_MEMMAP_BATT_INDEX) == index) - battery_update(index); -} - -void battery_memmap_set_index(enum battery_index index) -{ - if (*host_get_memmap(EC_MEMMAP_BATT_INDEX) == index) - return; - - *host_get_memmap(EC_MEMMAP_BATT_INDEX) = BATT_IDX_INVALID; - if (index < 0 || index >= CONFIG_BATTERY_COUNT) - return; - - battery_update(index); - *host_get_memmap(EC_MEMMAP_BATT_INDEX) = index; -} - -static void battery_init(void) -{ - *host_get_memmap(EC_MEMMAP_BATT_INDEX) = BATT_IDX_INVALID; - *host_get_memmap(EC_MEMMAP_BATT_COUNT) = CONFIG_BATTERY_COUNT; - *host_get_memmap(EC_MEMMAP_BATTERY_VERSION) = 2; - - battery_memmap_set_index(BATT_IDX_MAIN); -} -DECLARE_HOOK(HOOK_INIT, battery_init, HOOK_PRIO_DEFAULT); -#endif /* HAS_TASK_HOSTCMD */ -#endif /* CONFIG_BATTERY_V2 */ void battery_compensate_params(struct batt_params *batt) { diff --git a/common/battery_v1.c b/common/battery_v1.c new file mode 100644 index 0000000000..3b18f43ee5 --- /dev/null +++ b/common/battery_v1.c @@ -0,0 +1,172 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery V1 APIs. + */ + +#include "battery.h" +#include "charge_state.h" +#include "common.h" +#include "console.h" +#include "extpower.h" +#include "host_command.h" +#include "math_util.h" +#include "printf.h" +#include "util.h" + +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) + +/* Returns zero if every item was updated. */ +int update_static_battery_info(void) +{ + char *batt_str; + int batt_serial; + uint8_t batt_flags = 0; + /* + * The return values have type enum ec_error_list, but EC_SUCCESS is + * zero. We'll just look for any failures so we can try them all again. + */ + int rv; + + /* Smart battery serial number is 16 bits */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_SERIAL); + memset(batt_str, 0, EC_MEMMAP_TEXT_MAX); + rv = battery_serial_number(&batt_serial); + if (!rv) + snprintf(batt_str, EC_MEMMAP_TEXT_MAX, "%04X", batt_serial); + + /* Design Capacity of Full */ + rv |= battery_design_capacity( + (int *)host_get_memmap(EC_MEMMAP_BATT_DCAP)); + + /* Design Voltage */ + rv |= battery_design_voltage( + (int *)host_get_memmap(EC_MEMMAP_BATT_DVLT)); + + /* Last Full Charge Capacity (this is only mostly static) */ + rv |= battery_full_charge_capacity( + (int *)host_get_memmap(EC_MEMMAP_BATT_LFCC)); + + /* Cycle Count */ + rv |= battery_cycle_count((int *)host_get_memmap(EC_MEMMAP_BATT_CCNT)); + + /* Battery Manufacturer string */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MFGR); + memset(batt_str, 0, EC_MEMMAP_TEXT_MAX); + rv |= battery_manufacturer_name(batt_str, EC_MEMMAP_TEXT_MAX); + + /* Battery Model string */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MODEL); + memset(batt_str, 0, EC_MEMMAP_TEXT_MAX); + rv |= battery_device_name(batt_str, EC_MEMMAP_TEXT_MAX); + + /* Battery Type string */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_TYPE); + rv |= battery_device_chemistry(batt_str, EC_MEMMAP_TEXT_MAX); + + /* Zero the dynamic entries. They'll come next. */ + *(int *)host_get_memmap(EC_MEMMAP_BATT_VOLT) = 0; + *(int *)host_get_memmap(EC_MEMMAP_BATT_RATE) = 0; + *(int *)host_get_memmap(EC_MEMMAP_BATT_CAP) = 0; + *(int *)host_get_memmap(EC_MEMMAP_BATT_LFCC) = 0; + if (extpower_is_present()) + batt_flags |= EC_BATT_FLAG_AC_PRESENT; + *host_get_memmap(EC_MEMMAP_BATT_FLAG) = batt_flags; + + if (rv) + charge_problem(PR_STATIC_UPDATE, rv); + else + /* No errors seen. Battery data is now present */ + *host_get_memmap(EC_MEMMAP_BATTERY_VERSION) = 1; + + return rv; +} + +void update_dynamic_battery_info(void) +{ + /* The memmap address is constant. We should fix these calls somehow. */ + int *memmap_volt = (int *)host_get_memmap(EC_MEMMAP_BATT_VOLT); + int *memmap_rate = (int *)host_get_memmap(EC_MEMMAP_BATT_RATE); + int *memmap_cap = (int *)host_get_memmap(EC_MEMMAP_BATT_CAP); + int *memmap_lfcc = (int *)host_get_memmap(EC_MEMMAP_BATT_LFCC); + uint8_t *memmap_flags = host_get_memmap(EC_MEMMAP_BATT_FLAG); + uint8_t tmp; + int send_batt_status_event = 0; + int send_batt_info_event = 0; + static int batt_present; + struct charge_state_data *curr; + + curr = charge_get_status(); + tmp = 0; + if (curr->ac) + tmp |= EC_BATT_FLAG_AC_PRESENT; + + if (curr->batt.is_present == BP_YES) { + tmp |= EC_BATT_FLAG_BATT_PRESENT; + batt_present = 1; + /* Tell the AP to read battery info if it is newly present. */ + if (!(*memmap_flags & EC_BATT_FLAG_BATT_PRESENT)) + send_batt_info_event++; + } else { + /* + * Require two consecutive updates with BP_NOT_SURE + * before reporting it gone to the host. + */ + if (batt_present) + tmp |= EC_BATT_FLAG_BATT_PRESENT; + else if (*memmap_flags & EC_BATT_FLAG_BATT_PRESENT) + send_batt_info_event++; + batt_present = 0; + } + + if (curr->batt.flags & EC_BATT_FLAG_INVALID_DATA) + tmp |= EC_BATT_FLAG_INVALID_DATA; + + if (!(curr->batt.flags & BATT_FLAG_BAD_VOLTAGE)) + *memmap_volt = curr->batt.voltage; + + if (!(curr->batt.flags & BATT_FLAG_BAD_CURRENT)) + *memmap_rate = ABS(curr->batt.current); + + if (!(curr->batt.flags & BATT_FLAG_BAD_REMAINING_CAPACITY)) { + /* + * If we're running off the battery, it must have some charge. + * Don't report zero charge, as that has special meaning + * to Chrome OS powerd. + */ + if (curr->batt.remaining_capacity == 0 && !curr->batt_is_charging) + *memmap_cap = 1; + else + *memmap_cap = curr->batt.remaining_capacity; + } + + if (!(curr->batt.flags & BATT_FLAG_BAD_FULL_CAPACITY) && + (curr->batt.full_capacity <= (*memmap_lfcc - LFCC_EVENT_THRESH) || + curr->batt.full_capacity >= (*memmap_lfcc + LFCC_EVENT_THRESH))) { + *memmap_lfcc = curr->batt.full_capacity; + /* Poke the AP if the full_capacity changes. */ + send_batt_info_event++; + } + + if (curr->batt.is_present == BP_YES && + !(curr->batt.flags & BATT_FLAG_BAD_STATE_OF_CHARGE) && + curr->batt.state_of_charge <= BATTERY_LEVEL_CRITICAL) + tmp |= EC_BATT_FLAG_LEVEL_CRITICAL; + + tmp |= curr->batt_is_charging ? EC_BATT_FLAG_CHARGING : + EC_BATT_FLAG_DISCHARGING; + + /* Tell the AP to re-read battery status if charge state changes */ + if (*memmap_flags != tmp) + send_batt_status_event++; + + /* Update flags before sending host events. */ + *memmap_flags = tmp; + + if (send_batt_info_event) + host_set_single_event(EC_HOST_EVENT_BATTERY); + if (send_batt_status_event) + host_set_single_event(EC_HOST_EVENT_BATTERY_STATUS); +} diff --git a/common/battery_v2.c b/common/battery_v2.c new file mode 100644 index 0000000000..20947aac37 --- /dev/null +++ b/common/battery_v2.c @@ -0,0 +1,382 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery V2 APIs. + */ + +#include "battery.h" +#include "charge_state.h" +#include "common.h" +#include "console.h" +#include "hooks.h" +#include "host_command.h" +#include "printf.h" +#include "util.h" + +#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args) + +/* + * Store battery information in these 2 structures. Main (lid) battery is always + * at index 0, and secondary (base) battery at index 1. + */ +struct battery_static_info battery_static[CONFIG_BATTERY_COUNT]; +struct ec_response_battery_dynamic_info battery_dynamic[CONFIG_BATTERY_COUNT]; + +#ifdef HAS_TASK_HOSTCMD +static void battery_update(enum battery_index i) +{ + char *batt_str; + int *memmap_dcap = (int *)host_get_memmap(EC_MEMMAP_BATT_DCAP); + int *memmap_dvlt = (int *)host_get_memmap(EC_MEMMAP_BATT_DVLT); + int *memmap_ccnt = (int *)host_get_memmap(EC_MEMMAP_BATT_CCNT); + int *memmap_volt = (int *)host_get_memmap(EC_MEMMAP_BATT_VOLT); + int *memmap_rate = (int *)host_get_memmap(EC_MEMMAP_BATT_RATE); + int *memmap_cap = (int *)host_get_memmap(EC_MEMMAP_BATT_CAP); + int *memmap_lfcc = (int *)host_get_memmap(EC_MEMMAP_BATT_LFCC); + uint8_t *memmap_flags = host_get_memmap(EC_MEMMAP_BATT_FLAG); + + /* Smart battery serial number is 16 bits */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_SERIAL); + memcpy(batt_str, battery_static[i].serial_ext, EC_MEMMAP_TEXT_MAX); + batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; + + /* Design Capacity of Full */ + *memmap_dcap = battery_static[i].design_capacity; + + /* Design Voltage */ + *memmap_dvlt = battery_static[i].design_voltage; + + /* Cycle Count */ + *memmap_ccnt = battery_static[i].cycle_count; + + /* Battery Manufacturer string */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MFGR); + memcpy(batt_str, battery_static[i].manufacturer_ext, + EC_MEMMAP_TEXT_MAX); + batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; + + /* Battery Model string */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MODEL); + memcpy(batt_str, battery_static[i].model_ext, EC_MEMMAP_TEXT_MAX); + batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; + + /* Battery Type string */ + batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_TYPE); + memcpy(batt_str, battery_static[i].type_ext, EC_MEMMAP_TEXT_MAX); + batt_str[EC_MEMMAP_TEXT_MAX - 1] = 0; + + *memmap_volt = battery_dynamic[i].actual_voltage; + *memmap_rate = battery_dynamic[i].actual_current; + *memmap_cap = battery_dynamic[i].remaining_capacity; + *memmap_lfcc = battery_dynamic[i].full_capacity; + *memmap_flags = battery_dynamic[i].flags; +} + +#ifdef CONFIG_HOSTCMD_BATTERY_V2 +static enum ec_status +host_command_battery_get_static(struct host_cmd_handler_args *args) +{ + const struct ec_params_battery_static_info *p = args->params; + const struct battery_static_info *bs; + + if (p->index < 0 || p->index >= CONFIG_BATTERY_COUNT) + return EC_RES_INVALID_PARAM; + bs = &battery_static[p->index]; + + battery_update(p->index); + if (args->version == 0) { + struct ec_response_battery_static_info *r = args->response; + + r->design_capacity = bs->design_capacity; + r->design_voltage = bs->design_voltage; + r->cycle_count = bs->cycle_count; + + /* Truncate strings to reduced v0 size */ + memcpy(&r->manufacturer, &bs->manufacturer_ext, + sizeof(r->manufacturer)); + r->manufacturer[sizeof(r->manufacturer) - 1] = 0; + memcpy(&r->model, &bs->model_ext, sizeof(r->model)); + r->model[sizeof(r->model) - 1] = 0; + memcpy(&r->serial, &bs->serial_ext, sizeof(r->serial)); + r->serial[sizeof(r->serial) - 1] = 0; + memcpy(&r->type, &bs->type_ext, sizeof(r->type)); + r->type[sizeof(r->type) - 1] = 0; + + args->response_size = sizeof(*r); + } else if (args->version == 1) { + struct ec_response_battery_static_info_v1 *r = args->response; + + r->design_capacity = bs->design_capacity; + r->design_voltage = bs->design_voltage; + r->cycle_count = bs->cycle_count; + + /* Truncate strings to reduced size */ + memcpy(r->manufacturer_ext, &bs->manufacturer_ext, + sizeof(r->manufacturer_ext)); + r->manufacturer_ext[sizeof(r->manufacturer_ext) - 1] = 0; + memcpy(r->model_ext, &bs->model_ext, sizeof(r->model_ext)); + r->model_ext[sizeof(r->model_ext) - 1] = 0; + memcpy(r->serial_ext, &bs->serial_ext, sizeof(r->serial_ext)); + r->serial_ext[sizeof(r->serial_ext) - 1] = 0; + memcpy(r->type_ext, &bs->type_ext, sizeof(r->type_ext)); + r->type_ext[sizeof(r->type_ext) - 1] = 0; + + args->response_size = sizeof(*r); + } else { + return EC_RES_INVALID_VERSION; + } + + return EC_RES_SUCCESS; +} +DECLARE_HOST_COMMAND(EC_CMD_BATTERY_GET_STATIC, + host_command_battery_get_static, + EC_VER_MASK(0) | EC_VER_MASK(1)); + +static enum ec_status +host_command_battery_get_dynamic(struct host_cmd_handler_args *args) +{ + const struct ec_params_battery_dynamic_info *p = args->params; + struct ec_response_battery_dynamic_info *r = args->response; + + if (p->index < 0 || p->index >= CONFIG_BATTERY_COUNT) + return EC_RES_INVALID_PARAM; + + args->response_size = sizeof(*r); + memcpy(r, &battery_dynamic[p->index], sizeof(*r)); + + return EC_RES_SUCCESS; +} +DECLARE_HOST_COMMAND(EC_CMD_BATTERY_GET_DYNAMIC, + host_command_battery_get_dynamic, + EC_VER_MASK(0)); +#endif /* CONFIG_HOSTCMD_BATTERY_V2 */ + +void battery_memmap_refresh(enum battery_index index) +{ + if (*host_get_memmap(EC_MEMMAP_BATT_INDEX) == index) + battery_update(index); +} + +void battery_memmap_set_index(enum battery_index index) +{ + if (*host_get_memmap(EC_MEMMAP_BATT_INDEX) == index) + return; + + *host_get_memmap(EC_MEMMAP_BATT_INDEX) = BATT_IDX_INVALID; + if (index < 0 || index >= CONFIG_BATTERY_COUNT) + return; + + battery_update(index); + *host_get_memmap(EC_MEMMAP_BATT_INDEX) = index; +} + +static void battery_init(void) +{ + *host_get_memmap(EC_MEMMAP_BATT_INDEX) = BATT_IDX_INVALID; + *host_get_memmap(EC_MEMMAP_BATT_COUNT) = CONFIG_BATTERY_COUNT; + *host_get_memmap(EC_MEMMAP_BATTERY_VERSION) = 2; + + battery_memmap_set_index(BATT_IDX_MAIN); +} +DECLARE_HOOK(HOOK_INIT, battery_init, HOOK_PRIO_DEFAULT); +#endif /* HAS_TASK_HOSTCMD */ + +static int is_battery_string_reliable(const char *buf) +{ + /* + * From is_string_printable rule, 0xFF is not printable. + * So, EC should think battery string is unreliable if string + * include 0xFF. + */ + while (*buf) { + if ((*buf) == 0xFF) + return 0; + buf++; + } + + return 1; +} + +int update_static_battery_info(void) +{ + int batt_serial; + int val; + /* + * The return values have type enum ec_error_list, but EC_SUCCESS is + * zero. We'll just look for any failures so we can try them all again. + */ + int rv, ret; + + struct battery_static_info *const bs = &battery_static[BATT_IDX_MAIN]; + + /* Clear all static information. */ + memset(bs, 0, sizeof(*bs)); + + /* Smart battery serial number is 16 bits */ + rv = battery_serial_number(&batt_serial); + if (!rv) + snprintf(bs->serial_ext, sizeof(bs->serial_ext), + "%04X", batt_serial); + + /* Design Capacity of Full */ + ret = battery_design_capacity(&val); + if (!ret) + bs->design_capacity = val; + rv |= ret; + + /* Design Voltage */ + ret = battery_design_voltage(&val); + if (!ret) + bs->design_voltage = val; + rv |= ret; + + /* Cycle Count */ + ret = battery_cycle_count(&val); + if (!ret) + bs->cycle_count = val; + rv |= ret; + + /* Battery Manufacturer string */ + rv |= battery_manufacturer_name(bs->manufacturer_ext, + sizeof(bs->manufacturer_ext)); + + /* Battery Model string */ + rv |= battery_device_name(bs->model_ext, sizeof(bs->model_ext)); + + /* Battery Type string */ + rv |= battery_device_chemistry(bs->type_ext, sizeof(bs->type_ext)); + + /* + * b/181639264: Battery gauge follow SMBus SPEC and SMBus define + * cumulative clock low extend time for both controller (master) and + * peripheral (slave). However, I2C doesn't. + * Regarding this issue, we observe EC sometimes pull I2C CLK low + * a while after EC start running. Actually, we are not sure the + * reason until now. + * If EC pull I2C CLK low too long, and it may cause battery fw timeout + * because battery count cumulative clock extend time over 25ms. + * When it happened, battery will release both its CLK and DATA and + * reset itself. So, EC may get 0xFF when EC keep reading data from + * battery. Battery static information will be unreliable and need to + * be updated. + * This change is improvement that EC should retry if battery string is + * unreliable. + */ + if (!is_battery_string_reliable(bs->serial_ext) || + !is_battery_string_reliable(bs->manufacturer_ext) || + !is_battery_string_reliable(bs->model_ext) || + !is_battery_string_reliable(bs->type_ext)) + rv |= EC_ERROR_UNKNOWN; + + /* Zero the dynamic entries. They'll come next. */ + memset(&battery_dynamic[BATT_IDX_MAIN], 0, + sizeof(battery_dynamic[BATT_IDX_MAIN])); + + if (rv) + charge_problem(PR_STATIC_UPDATE, rv); + +#ifdef HAS_TASK_HOSTCMD + battery_memmap_refresh(BATT_IDX_MAIN); +#endif + + return rv; +} + +void update_dynamic_battery_info(void) +{ + static int batt_present; + uint8_t tmp; + int send_batt_status_event = 0; + int send_batt_info_event = 0; + struct charge_state_data *curr; + struct ec_response_battery_dynamic_info *const bd = + &battery_dynamic[BATT_IDX_MAIN]; + + curr = charge_get_status(); + tmp = 0; + if (curr->ac) + tmp |= EC_BATT_FLAG_AC_PRESENT; + + if (curr->batt.is_present == BP_YES) { + tmp |= EC_BATT_FLAG_BATT_PRESENT; + batt_present = 1; + /* Tell the AP to read battery info if it is newly present. */ + if (!(bd->flags & EC_BATT_FLAG_BATT_PRESENT)) + send_batt_info_event++; + } else { + /* + * Require two consecutive updates with BP_NOT_SURE + * before reporting it gone to the host. + */ + if (batt_present) + tmp |= EC_BATT_FLAG_BATT_PRESENT; + else if (bd->flags & EC_BATT_FLAG_BATT_PRESENT) + send_batt_info_event++; + batt_present = 0; + } + + if (curr->batt.flags & EC_BATT_FLAG_INVALID_DATA) + tmp |= EC_BATT_FLAG_INVALID_DATA; + + if (!(curr->batt.flags & BATT_FLAG_BAD_VOLTAGE)) + bd->actual_voltage = curr->batt.voltage; + + if (!(curr->batt.flags & BATT_FLAG_BAD_CURRENT)) + bd->actual_current = curr->batt.current; + + if (!(curr->batt.flags & BATT_FLAG_BAD_DESIRED_VOLTAGE)) + bd->desired_voltage = curr->batt.desired_voltage; + + if (!(curr->batt.flags & BATT_FLAG_BAD_DESIRED_CURRENT)) + bd->desired_current = curr->batt.desired_current; + + if (!(curr->batt.flags & BATT_FLAG_BAD_REMAINING_CAPACITY)) { + /* + * If we're running off the battery, it must have some charge. + * Don't report zero charge, as that has special meaning + * to Chrome OS powerd. + */ + if (curr->batt.remaining_capacity == 0 && + !curr->batt_is_charging) + bd->remaining_capacity = 1; + else + bd->remaining_capacity = curr->batt.remaining_capacity; + } + + if (!(curr->batt.flags & BATT_FLAG_BAD_FULL_CAPACITY) && + (curr->batt.full_capacity <= + (bd->full_capacity - LFCC_EVENT_THRESH) || + curr->batt.full_capacity >= + (bd->full_capacity + LFCC_EVENT_THRESH))) { + bd->full_capacity = curr->batt.full_capacity; + /* Poke the AP if the full_capacity changes. */ + send_batt_info_event++; + } + + if (curr->batt.is_present == BP_YES && + !(curr->batt.flags & BATT_FLAG_BAD_STATE_OF_CHARGE) && + curr->batt.state_of_charge <= BATTERY_LEVEL_CRITICAL) + tmp |= EC_BATT_FLAG_LEVEL_CRITICAL; + + tmp |= curr->batt_is_charging ? EC_BATT_FLAG_CHARGING : + EC_BATT_FLAG_DISCHARGING; + + /* Tell the AP to re-read battery status if charge state changes */ + if (bd->flags != tmp) + send_batt_status_event++; + + bd->flags = tmp; + +#ifdef HAS_TASK_HOSTCMD + battery_memmap_refresh(BATT_IDX_MAIN); +#endif + +#ifdef CONFIG_HOSTCMD_EVENTS + if (send_batt_info_event) + host_set_single_event(EC_HOST_EVENT_BATTERY); + if (send_batt_status_event) + host_set_single_event(EC_HOST_EVENT_BATTERY_STATUS); +#endif +} diff --git a/common/build.mk b/common/build.mk index 4135b58800..d00a7f8bb1 100644 --- a/common/build.mk +++ b/common/build.mk @@ -30,6 +30,7 @@ common-$(CONFIG_ACCEL_LIS2DS)+=math_util.o common-$(CONFIG_ACCEL_KXCJ9)+=math_util.o common-$(CONFIG_ACCEL_KX022)+=math_util.o common-$(CONFIG_TEMP_SENSOR_TMP112)+=math_util.o +common-$(CONFIG_TEMP_SENSOR_PCT2075)+=math_util.o ifneq ($(CORE),cortex-m) common-$(CONFIG_AES)+=aes.o endif @@ -46,6 +47,8 @@ common-$(CONFIG_BASE32)+=base32.o common-$(CONFIG_BLINK)+=blink.o common-$(CONFIG_DETACHABLE_BASE)+=base_state.o common-$(CONFIG_BATTERY)+=battery.o math_util.o +common-$(CONFIG_BATTERY_V1)+=battery_v1.o +common-$(CONFIG_BATTERY_V2)+=battery_v2.o common-$(CONFIG_BATTERY_FUEL_GAUGE)+=battery_fuel_gauge.o common-$(CONFIG_BLUETOOTH_LE)+=bluetooth_le.o common-$(CONFIG_BLUETOOTH_LE_STACK)+=btle_hci_controller.o btle_ll.o @@ -66,7 +69,7 @@ common-$(CONFIG_CHARGER)+=charger.o charge_state_v2.o common-$(CONFIG_CHARGER_PROFILE_OVERRIDE_COMMON)+=charger_profile_override.o common-$(CONFIG_CMD_I2CWEDGE)+=i2c_wedge.o common-$(CONFIG_COMMON_GPIO)+=gpio.o gpio_commands.o -common-$(CONFIG_IO_EXPANDER)+=ioexpander.o +common-$(CONFIG_IO_EXPANDER)+=ioexpander.o ioexpander_commands.o common-$(CONFIG_COMMON_PANIC_OUTPUT)+=panic_output.o common-$(CONFIG_COMMON_RUNTIME)+=hooks.o main.o system.o peripheral.o common-$(CONFIG_COMMON_TIMER)+=timer.o @@ -81,7 +84,7 @@ common-$(CONFIG_DEVICE_STATE)+=device_state.o common-$(CONFIG_DPTF)+=dptf.o common-$(CONFIG_EC_EC_COMM_CLIENT)+=ec_ec_comm_client.o common-$(CONFIG_EC_EC_COMM_SERVER)+=ec_ec_comm_server.o -common-$(CONFIG_HOSTCMD_ESPI)+=espi.o +common-$(CONFIG_HOST_INTERFACE_ESPI)+=espi.o common-$(CONFIG_EXTPOWER_GPIO)+=extpower_gpio.o common-$(CONFIG_EXTPOWER)+=extpower_common.o common-$(CONFIG_FANS)+=fan.o pwm.o @@ -166,9 +169,10 @@ common-$(CONFIG_USB_PORT_POWER_DUMB)+=usb_port_power_dumb.o common-$(CONFIG_USB_PORT_POWER_SMART)+=usb_port_power_smart.o common-$(CONFIG_HAS_TASK_PD_INT)+=usbc_intr_task.o ifneq ($(CONFIG_USB_POWER_DELIVERY),) -common-$(CONFIG_USB_POWER_DELIVERY)+=usb_common.o +common-$(CONFIG_USB_POWER_DELIVERY)+=usb_common.o usb_pd_pdo.o ifneq ($(CONFIG_USB_PD_TCPMV1),) -common-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_protocol.o usb_pd_policy.o +common-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_protocol.o usb_pd_policy.o \ + usb_pd_pdo.o endif common-$(CONFIG_USB_PD_DUAL_ROLE)+=usb_pd_dual_role.o common-$(CONFIG_USB_PD_HOST_CMD)+=usb_pd_host_cmd.o diff --git a/common/cbi.c b/common/cbi.c index 345e313c54..217dffd6f4 100644 --- a/common/cbi.c +++ b/common/cbi.c @@ -493,11 +493,8 @@ static int cc_cbi(int argc, char **argv) if (setter->size < 1) { ccprintf("Set size too small\n"); return EC_ERROR_PARAM4; - } else if (setter->tag == CBI_TAG_REWORK_ID && - setter->size > 8) { - ccprintf("Set size too large\n"); - return EC_ERROR_PARAM4; - } else if (setter->size > 4) { + } else if ((setter->size > 8) || (setter->size > 4 && + setter->tag != CBI_TAG_REWORK_ID)) { ccprintf("Set size too large\n"); return EC_ERROR_PARAM4; } diff --git a/common/charge_state_v2.c b/common/charge_state_v2.c index e767ec8d83..abb271cad4 100644 --- a/common/charge_state_v2.c +++ b/common/charge_state_v2.c @@ -44,7 +44,6 @@ #define CRITICAL_BATTERY_SHUTDOWN_TIMEOUT_US \ (CONFIG_BATTERY_CRITICAL_SHUTDOWN_TIMEOUT * SECOND) #define PRECHARGE_TIMEOUT_US (PRECHARGE_TIMEOUT * SECOND) -#define LFCC_EVENT_THRESH 5 /* Full-capacity change reqd for host event */ #ifdef CONFIG_THROTTLE_AP_ON_BAT_DISCHG_CURRENT #ifndef CONFIG_HOSTCMD_EVENTS @@ -156,21 +155,6 @@ static int problems_exist; static int debugging; -/* Track problems in communicating with the battery or charger */ -enum problem_type { - PR_STATIC_UPDATE, - PR_SET_VOLTAGE, - PR_SET_CURRENT, - PR_SET_MODE, - PR_SET_INPUT_CURR, - PR_POST_INIT, - PR_CHG_FLAGS, - PR_BATT_FLAGS, - PR_CUSTOM, - PR_CFG_SEC_CHG, - - NUM_PROBLEM_TYPES -}; static const char * const prob_text[] = { "static update", "set voltage", @@ -189,7 +173,7 @@ BUILD_ASSERT(ARRAY_SIZE(prob_text) == NUM_PROBLEM_TYPES); * TODO(crosbug.com/p/27639): When do we decide a problem is real and not * just intermittent? And what do we do about it? */ -static void problem(enum problem_type p, int v) +void charge_problem(enum problem_type p, int v) { static int last_prob_val[NUM_PROBLEM_TYPES]; static timestamp_t last_prob_time[NUM_PROBLEM_TYPES]; @@ -770,357 +754,6 @@ static void charge_allocate_input_current_limit(void) } #endif /* CONFIG_EC_EC_COMM_BATTERY_CLIENT */ -#ifndef CONFIG_BATTERY_V2 -/* Returns zero if every item was updated. */ -static int update_static_battery_info(void) -{ - char *batt_str; - int batt_serial; - uint8_t batt_flags = 0; - /* - * The return values have type enum ec_error_list, but EC_SUCCESS is - * zero. We'll just look for any failures so we can try them all again. - */ - int rv; - - /* Smart battery serial number is 16 bits */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_SERIAL); - memset(batt_str, 0, EC_MEMMAP_TEXT_MAX); - rv = battery_serial_number(&batt_serial); - if (!rv) - snprintf(batt_str, EC_MEMMAP_TEXT_MAX, "%04X", batt_serial); - - /* Design Capacity of Full */ - rv |= battery_design_capacity( - (int *)host_get_memmap(EC_MEMMAP_BATT_DCAP)); - - /* Design Voltage */ - rv |= battery_design_voltage( - (int *)host_get_memmap(EC_MEMMAP_BATT_DVLT)); - - /* Last Full Charge Capacity (this is only mostly static) */ - rv |= battery_full_charge_capacity( - (int *)host_get_memmap(EC_MEMMAP_BATT_LFCC)); - - /* Cycle Count */ - rv |= battery_cycle_count((int *)host_get_memmap(EC_MEMMAP_BATT_CCNT)); - - /* Battery Manufacturer string */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MFGR); - memset(batt_str, 0, EC_MEMMAP_TEXT_MAX); - rv |= battery_manufacturer_name(batt_str, EC_MEMMAP_TEXT_MAX); - - /* Battery Model string */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_MODEL); - memset(batt_str, 0, EC_MEMMAP_TEXT_MAX); - rv |= battery_device_name(batt_str, EC_MEMMAP_TEXT_MAX); - - /* Battery Type string */ - batt_str = (char *)host_get_memmap(EC_MEMMAP_BATT_TYPE); - rv |= battery_device_chemistry(batt_str, EC_MEMMAP_TEXT_MAX); - - /* Zero the dynamic entries. They'll come next. */ - *(int *)host_get_memmap(EC_MEMMAP_BATT_VOLT) = 0; - *(int *)host_get_memmap(EC_MEMMAP_BATT_RATE) = 0; - *(int *)host_get_memmap(EC_MEMMAP_BATT_CAP) = 0; - *(int *)host_get_memmap(EC_MEMMAP_BATT_LFCC) = 0; - if (extpower_is_present()) - batt_flags |= EC_BATT_FLAG_AC_PRESENT; - *host_get_memmap(EC_MEMMAP_BATT_FLAG) = batt_flags; - - if (rv) - problem(PR_STATIC_UPDATE, rv); - else - /* No errors seen. Battery data is now present */ - *host_get_memmap(EC_MEMMAP_BATTERY_VERSION) = 1; - - return rv; -} - -static void update_dynamic_battery_info(void) -{ - /* The memmap address is constant. We should fix these calls somehow. */ - int *memmap_volt = (int *)host_get_memmap(EC_MEMMAP_BATT_VOLT); - int *memmap_rate = (int *)host_get_memmap(EC_MEMMAP_BATT_RATE); - int *memmap_cap = (int *)host_get_memmap(EC_MEMMAP_BATT_CAP); - int *memmap_lfcc = (int *)host_get_memmap(EC_MEMMAP_BATT_LFCC); - uint8_t *memmap_flags = host_get_memmap(EC_MEMMAP_BATT_FLAG); - uint8_t tmp; - int send_batt_status_event = 0; - int send_batt_info_event = 0; - static int batt_present; - - tmp = 0; - if (curr.ac) - tmp |= EC_BATT_FLAG_AC_PRESENT; - - if (curr.batt.is_present == BP_YES) { - tmp |= EC_BATT_FLAG_BATT_PRESENT; - batt_present = 1; - /* Tell the AP to read battery info if it is newly present. */ - if (!(*memmap_flags & EC_BATT_FLAG_BATT_PRESENT)) - send_batt_info_event++; - } else { - /* - * Require two consecutive updates with BP_NOT_SURE - * before reporting it gone to the host. - */ - if (batt_present) - tmp |= EC_BATT_FLAG_BATT_PRESENT; - else if (*memmap_flags & EC_BATT_FLAG_BATT_PRESENT) - send_batt_info_event++; - batt_present = 0; - } - - if (curr.batt.flags & EC_BATT_FLAG_INVALID_DATA) - tmp |= EC_BATT_FLAG_INVALID_DATA; - - if (!(curr.batt.flags & BATT_FLAG_BAD_VOLTAGE)) - *memmap_volt = curr.batt.voltage; - - if (!(curr.batt.flags & BATT_FLAG_BAD_CURRENT)) - *memmap_rate = ABS(curr.batt.current); - - if (!(curr.batt.flags & BATT_FLAG_BAD_REMAINING_CAPACITY)) { - /* - * If we're running off the battery, it must have some charge. - * Don't report zero charge, as that has special meaning - * to Chrome OS powerd. - */ - if (curr.batt.remaining_capacity == 0 && !curr.batt_is_charging) - *memmap_cap = 1; - else - *memmap_cap = curr.batt.remaining_capacity; - } - - if (!(curr.batt.flags & BATT_FLAG_BAD_FULL_CAPACITY) && - (curr.batt.full_capacity <= (*memmap_lfcc - LFCC_EVENT_THRESH) || - curr.batt.full_capacity >= (*memmap_lfcc + LFCC_EVENT_THRESH))) { - *memmap_lfcc = curr.batt.full_capacity; - /* Poke the AP if the full_capacity changes. */ - send_batt_info_event++; - } - - if (curr.batt.is_present == BP_YES && - !(curr.batt.flags & BATT_FLAG_BAD_STATE_OF_CHARGE) && - curr.batt.state_of_charge <= BATTERY_LEVEL_CRITICAL) - tmp |= EC_BATT_FLAG_LEVEL_CRITICAL; - - tmp |= curr.batt_is_charging ? EC_BATT_FLAG_CHARGING : - EC_BATT_FLAG_DISCHARGING; - - /* Tell the AP to re-read battery status if charge state changes */ - if (*memmap_flags != tmp) - send_batt_status_event++; - - /* Update flags before sending host events. */ - *memmap_flags = tmp; - - if (send_batt_info_event) - host_set_single_event(EC_HOST_EVENT_BATTERY); - if (send_batt_status_event) - host_set_single_event(EC_HOST_EVENT_BATTERY_STATUS); -} -#else /* CONFIG_BATTERY_V2 */ - -static int is_battery_string_reliable(const char *buf) -{ - /* - * From is_string_printable rule, 0xFF is not printable. - * So, EC should think battery string is unreliable if string - * include 0xFF. - */ - while (*buf) { - if ((*buf) == 0xFF) - return 0; - buf++; - } - - return 1; -} - -static int update_static_battery_info(void) -{ - int batt_serial; - int val; - /* - * The return values have type enum ec_error_list, but EC_SUCCESS is - * zero. We'll just look for any failures so we can try them all again. - */ - int rv, ret; - - struct ec_response_battery_static_info_v1 *const bs = - &battery_static[BATT_IDX_MAIN]; - - /* Clear all static information. */ - memset(bs, 0, sizeof(*bs)); - - /* Smart battery serial number is 16 bits */ - rv = battery_serial_number(&batt_serial); - if (!rv) - snprintf(bs->serial_ext, sizeof(bs->serial_ext), - "%04X", batt_serial); - - /* Design Capacity of Full */ - ret = battery_design_capacity(&val); - if (!ret) - bs->design_capacity = val; - rv |= ret; - - /* Design Voltage */ - ret = battery_design_voltage(&val); - if (!ret) - bs->design_voltage = val; - rv |= ret; - - /* Cycle Count */ - ret = battery_cycle_count(&val); - if (!ret) - bs->cycle_count = val; - rv |= ret; - - /* Battery Manufacturer string */ - rv |= battery_manufacturer_name(bs->manufacturer_ext, - sizeof(bs->manufacturer_ext)); - - /* Battery Model string */ - rv |= battery_device_name(bs->model_ext, sizeof(bs->model_ext)); - - /* Battery Type string */ - rv |= battery_device_chemistry(bs->type_ext, sizeof(bs->type_ext)); - - /* - * b/181639264: Battery gauge follow SMBus SPEC and SMBus define - * cumulative clock low extend time for both controller (master) and - * peripheral (slave). However, I2C doesn't. - * Regarding this issue, we observe EC sometimes pull I2C CLK low - * a while after EC start running. Actually, we are not sure the - * reason until now. - * If EC pull I2C CLK low too long, and it may cause battery fw timeout - * because battery count cumulative clock extend time over 25ms. - * When it happened, battery will release both its CLK and DATA and - * reset itself. So, EC may get 0xFF when EC keep reading data from - * battery. Battery static information will be unreliable and need to - * be updated. - * This change is improvement that EC should retry if battery string is - * unreliable. - */ - if (!is_battery_string_reliable(bs->serial_ext) || - !is_battery_string_reliable(bs->manufacturer_ext) || - !is_battery_string_reliable(bs->model_ext) || - !is_battery_string_reliable(bs->type_ext)) - rv |= EC_ERROR_UNKNOWN; - - /* Zero the dynamic entries. They'll come next. */ - memset(&battery_dynamic[BATT_IDX_MAIN], 0, - sizeof(battery_dynamic[BATT_IDX_MAIN])); - - if (rv) - problem(PR_STATIC_UPDATE, rv); - -#ifdef HAS_TASK_HOSTCMD - battery_memmap_refresh(BATT_IDX_MAIN); -#endif - - return rv; -} - -static void update_dynamic_battery_info(void) -{ - static int batt_present; - uint8_t tmp; - int send_batt_status_event = 0; - int send_batt_info_event = 0; - - struct ec_response_battery_dynamic_info *const bd = - &battery_dynamic[BATT_IDX_MAIN]; - - tmp = 0; - if (curr.ac) - tmp |= EC_BATT_FLAG_AC_PRESENT; - - if (curr.batt.is_present == BP_YES) { - tmp |= EC_BATT_FLAG_BATT_PRESENT; - batt_present = 1; - /* Tell the AP to read battery info if it is newly present. */ - if (!(bd->flags & EC_BATT_FLAG_BATT_PRESENT)) - send_batt_info_event++; - } else { - /* - * Require two consecutive updates with BP_NOT_SURE - * before reporting it gone to the host. - */ - if (batt_present) - tmp |= EC_BATT_FLAG_BATT_PRESENT; - else if (bd->flags & EC_BATT_FLAG_BATT_PRESENT) - send_batt_info_event++; - batt_present = 0; - } - - if (curr.batt.flags & EC_BATT_FLAG_INVALID_DATA) - tmp |= EC_BATT_FLAG_INVALID_DATA; - - if (!(curr.batt.flags & BATT_FLAG_BAD_VOLTAGE)) - bd->actual_voltage = curr.batt.voltage; - - if (!(curr.batt.flags & BATT_FLAG_BAD_CURRENT)) - bd->actual_current = curr.batt.current; - - if (!(curr.batt.flags & BATT_FLAG_BAD_DESIRED_VOLTAGE)) - bd->desired_voltage = curr.batt.desired_voltage; - - if (!(curr.batt.flags & BATT_FLAG_BAD_DESIRED_CURRENT)) - bd->desired_current = curr.batt.desired_current; - - if (!(curr.batt.flags & BATT_FLAG_BAD_REMAINING_CAPACITY)) { - /* - * If we're running off the battery, it must have some charge. - * Don't report zero charge, as that has special meaning - * to Chrome OS powerd. - */ - if (curr.batt.remaining_capacity == 0 && !curr.batt_is_charging) - bd->remaining_capacity = 1; - else - bd->remaining_capacity = curr.batt.remaining_capacity; - } - - if (!(curr.batt.flags & BATT_FLAG_BAD_FULL_CAPACITY) && - (curr.batt.full_capacity <= - (bd->full_capacity - LFCC_EVENT_THRESH) || - curr.batt.full_capacity >= - (bd->full_capacity + LFCC_EVENT_THRESH))) { - bd->full_capacity = curr.batt.full_capacity; - /* Poke the AP if the full_capacity changes. */ - send_batt_info_event++; - } - - if (curr.batt.is_present == BP_YES && - !(curr.batt.flags & BATT_FLAG_BAD_STATE_OF_CHARGE) && - curr.batt.state_of_charge <= BATTERY_LEVEL_CRITICAL) - tmp |= EC_BATT_FLAG_LEVEL_CRITICAL; - - tmp |= curr.batt_is_charging ? EC_BATT_FLAG_CHARGING : - EC_BATT_FLAG_DISCHARGING; - - /* Tell the AP to re-read battery status if charge state changes */ - if (bd->flags != tmp) - send_batt_status_event++; - - bd->flags = tmp; - -#ifdef HAS_TASK_HOSTCMD - battery_memmap_refresh(BATT_IDX_MAIN); -#endif - -#ifdef CONFIG_HOSTCMD_EVENTS - if (send_batt_info_event) - host_set_single_event(EC_HOST_EVENT_BATTERY); - if (send_batt_status_event) - host_set_single_event(EC_HOST_EVENT_BATTERY_STATUS); -#endif -} -#endif /* CONFIG_BATTERY_V2 */ - static const char * const state_list[] = { "idle", "discharge", "charge", "precharge" }; @@ -1352,12 +985,12 @@ static int charge_request(int voltage, int current) r2 = charger_set_current(0, current); } if (r2 != EC_SUCCESS) - problem(PR_SET_CURRENT, r2); + charge_problem(PR_SET_CURRENT, r2); if (voltage >= 0) r1 = charger_set_voltage(0, voltage); if (r1 != EC_SUCCESS) - problem(PR_SET_VOLTAGE, r1); + charge_problem(PR_SET_VOLTAGE, r1); #ifdef CONFIG_OCPC /* @@ -1374,7 +1007,7 @@ static int charge_request(int voltage, int current) &curr.ocpc, voltage, current); if (r3 != EC_SUCCESS) - problem(PR_CFG_SEC_CHG, r3); + charge_problem(PR_CFG_SEC_CHG, r3); } #endif /* CONFIG_OCPC */ @@ -1387,7 +1020,7 @@ static int charge_request(int voltage, int current) else r4 = charger_set_mode(CHARGE_FLAG_INHIBIT_CHARGE); if (r4 != EC_SUCCESS) - problem(PR_SET_MODE, r4); + charge_problem(PR_SET_MODE, r4); /* * Only update if the request worked, so we'll keep trying on failures. @@ -1688,6 +1321,11 @@ const struct batt_params *charger_current_battery_params(void) return &curr.batt; } +struct charge_state_data *charge_get_status(void) +{ + return &curr; +} + /* Determine if the battery is outside of allowable temperature range */ static int battery_outside_charging_temperature(void) { @@ -2014,14 +1652,15 @@ void charger_task(void *u) int rv = charger_post_init(); if (rv != EC_SUCCESS) { - problem(PR_POST_INIT, rv); + charge_problem(PR_POST_INIT, rv); } else if (curr.desired_input_current != CHARGE_CURRENT_UNINITIALIZED) { rv = charger_set_input_current_limit( chgnum, curr.desired_input_current); if (rv != EC_SUCCESS) - problem(PR_SET_INPUT_CURR, rv); + charge_problem( + PR_SET_INPUT_CURR, rv); } if (rv == EC_SUCCESS) @@ -2109,9 +1748,9 @@ void charger_task(void *u) * better then flag it as an error. */ if (curr.chg.flags & CHG_FLAG_BAD_ANY) - problem(PR_CHG_FLAGS, curr.chg.flags); + charge_problem(PR_CHG_FLAGS, curr.chg.flags); if (curr.batt.flags & BATT_FLAG_BAD_ANY) - problem(PR_BATT_FLAGS, curr.batt.flags); + charge_problem(PR_BATT_FLAGS, curr.batt.flags); /* * If AC is present, check if input current is sufficient to @@ -2167,7 +1806,7 @@ wait_for_it: && get_chg_ctrl_mode() == CHARGE_CONTROL_NORMAL) { sleep_usec = charger_profile_override(&curr); if (sleep_usec < 0) - problem(PR_CUSTOM, sleep_usec); + charge_problem(PR_CUSTOM, sleep_usec); } if (IS_ENABLED(CONFIG_BATTERY_CHECK_CHARGE_TEMP_LIMITS) diff --git a/common/charger.c b/common/charger.c index 764f8b7ba7..d2707473c8 100644 --- a/common/charger.c +++ b/common/charger.c @@ -197,10 +197,13 @@ static int command_charger(int argc, char **argv) } idx_provided = isdigit((unsigned char)argv[1][0]); - if (idx_provided) + if (idx_provided) { chgnum = atoi(argv[1]); - else + if ((chgnum < 0) || (chgnum >= board_get_charger_chip_count())) + return EC_ERROR_PARAM1; + } else { chgnum = 0; + } if ((argc == 2) && idx_provided) { print_charger_debug(chgnum); @@ -230,14 +233,32 @@ static int command_charger(int argc, char **argv) return EC_ERROR_PARAM2+idx_provided; dptf_limit_ma = d; return EC_SUCCESS; + } else if (strcasecmp(argv[1+idx_provided], "dump") == 0) { + if (!IS_ENABLED(CONFIG_CMD_CHARGER_DUMP) || + !chg_chips[chgnum].drv->dump_registers) { + ccprintf("dump not supported\n"); + return EC_ERROR_PARAM1+idx_provided; + } + ccprintf("Dump %s registers\n", + chg_chips[chgnum].drv->get_info(chgnum)->name); + chg_chips[chgnum].drv->dump_registers(chgnum); + return EC_SUCCESS; } else { return EC_ERROR_PARAM1+idx_provided; } } DECLARE_CONSOLE_COMMAND(charger, command_charger, - "[chgnum] [input | current | voltage | dptf] [newval]", - "Get or set charger param(s)"); + "[chgnum] [input | current | voltage | dptf] [newval]" +#ifdef CONFIG_CMD_CHARGER_DUMP + "\n\t[chgnum] dump" +#endif + , + "Get or set charger param(s)" +#ifdef CONFIG_CMD_CHARGER_DUMP + ". Dump registers." +#endif +); /* Driver wrapper functions */ @@ -603,17 +624,25 @@ enum ec_error_list charger_set_option(int option) enum ec_error_list charger_set_hw_ramp(int enable) { - int chgnum = 0; + int chgnum; + int rv = EC_ERROR_UNIMPLEMENTED; - if ((chgnum < 0) || (chgnum >= board_get_charger_chip_count())) { - CPRINTS("%s(%d) Invalid charger!", __func__, chgnum); - return EC_ERROR_INVAL; + for (chgnum = 0; chgnum < board_get_charger_chip_count(); chgnum++) { + /* Check if the chg chip supports set_hw_ramp. */ + if (chg_chips[chgnum].drv->set_hw_ramp) { + if (enable) { + /* Check if this is the active chg chip. */ + if (chgnum == charge_get_active_chg_chip()) + rv = chg_chips[chgnum].drv->set_hw_ramp(chgnum, 1); + /* This is not the active chg chip, disable hw_ramp. */ + else + rv = chg_chips[chgnum].drv->set_hw_ramp(chgnum, 0); + } else + rv = chg_chips[chgnum].drv->set_hw_ramp(chgnum, 0); + } } - if (!chg_chips[chgnum].drv->set_hw_ramp) - return EC_ERROR_UNIMPLEMENTED; - - return chg_chips[chgnum].drv->set_hw_ramp(chgnum, enable); + return rv; } #ifdef CONFIG_CHARGE_RAMP_HW diff --git a/common/ec_ec_comm_client.c b/common/ec_ec_comm_client.c index c92433af8c..b2f2387976 100644 --- a/common/ec_ec_comm_client.c +++ b/common/ec_ec_comm_client.c @@ -296,6 +296,8 @@ int ec_ec_client_base_get_static_info(void) uint8_t crc8; } resp; } __packed data; + const struct ec_response_battery_static_info *info = &data.resp.info; + struct battery_static_info *bs = &battery_static[BATT_IDX_BASE]; data.req.param.index = 0; @@ -316,8 +318,15 @@ int ec_ec_client_base_get_static_info(void) CPRINTF("C-count: %d\n", data.resp.info.cycle_count); #endif - memcpy(&battery_static[BATT_IDX_BASE], &data.resp.info, - sizeof(battery_static[BATT_IDX_BASE])); + bs->design_capacity = info->design_capacity; + bs->design_voltage = info->design_voltage; + bs->cycle_count = info->cycle_count; + strncpy(bs->manufacturer_ext, info->manufacturer, + sizeof(bs->manufacturer_ext)); + strncpy(bs->model_ext, info->model, sizeof(bs->model_ext)); + strncpy(bs->serial_ext, info->serial, sizeof(bs->serial_ext)); + strncpy(bs->type_ext, info->type, sizeof(bs->type_ext)); + return EC_RES_SUCCESS; } diff --git a/common/firmware_image.S b/common/firmware_image.S index 5c70d29069..193719608f 100644 --- a/common/firmware_image.S +++ b/common/firmware_image.S @@ -21,6 +21,9 @@ #define FW_IMAGE_SIGN(sect,suffix) \ STRINGIFY(FW_FILE(FINAL_OUTDIR,PROJECT,sect,suffix,.sig)) +.global _start +_start: + /* Read Only firmware */ #ifdef CONFIG_FW_INCLUDE_RO .section .image.RO, "ax" diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S index e2e34de588..04249367b8 100644 --- a/common/firmware_image.lds.S +++ b/common/firmware_image.lds.S @@ -76,6 +76,15 @@ MEMORY SECTIONS { + /* + * Create empty text section. Without an explicit text section + * clang/lld will create one and put it at an address it selects. Even + * though the section it creates is empty, if the LMA is beyond the end + * of the flash, ec.bin will be too large since the empty space is + * filled with 0xFF. + */ + .text (NOLOAD) : {} + .image.RO : AT(IMAGE_RO_AT) { *(.image.RO) } > FLASH =0xff diff --git a/common/flash.c b/common/flash.c index c8f58a82af..ec9f50b711 100644 --- a/common/flash.c +++ b/common/flash.c @@ -1032,6 +1032,8 @@ static int command_flash_info(int argc, char **argv) ccputs(" STUCK"); if (flags & EC_FLASH_PROTECT_ERROR_INCONSISTENT) ccputs(" INCONSISTENT"); + if (flags & EC_FLASH_PROTECT_ERROR_UNKNOWN) + ccputs(" UNKNOWN_ERROR"); #ifdef CONFIG_ROLLBACK if (flags & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) ccputs(" rollback_at_boot"); @@ -1490,6 +1492,7 @@ static enum ec_status flash_command_protect(struct host_cmd_handler_args *args) EC_FLASH_PROTECT_GPIO_ASSERTED | EC_FLASH_PROTECT_ERROR_STUCK | EC_FLASH_PROTECT_ERROR_INCONSISTENT | + EC_FLASH_PROTECT_ERROR_UNKNOWN | crec_flash_physical_get_valid_flags(); r->writable_flags = crec_flash_physical_get_writable_flags(r->flags); diff --git a/common/ioexpander.c b/common/ioexpander.c index d30ed7ad9b..6caa7f4bc1 100644 --- a/common/ioexpander.c +++ b/common/ioexpander.c @@ -5,7 +5,6 @@ /* IO Expander Controller Common Code */ -#include "console.h" #include "gpio.h" #include "hooks.h" #include "ioexpander.h" @@ -15,25 +14,6 @@ #define CPRINTF(format, args...) cprintf(CC_GPIO, format, ## args) #define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args) -static uint8_t last_val[(IOEX_COUNT + 7) / 8]; - -static int last_val_changed(enum ioex_signal signal, int v) -{ - const int i = signal - IOEX_SIGNAL_START; - - ASSERT(signal_is_ioex(signal)); - - if (v && !(last_val[i / 8] & (BIT(i % 8)))) { - last_val[i / 8] |= BIT(i % 8); - return 1; - } else if (!v && last_val[i / 8] & (BIT(i % 8))) { - last_val[i / 8] &= ~(BIT(i % 8)); - return 1; - } else { - return 0; - } -} - int signal_is_ioex(int signal) { return ((signal >= IOEX_SIGNAL_START) && (signal < IOEX_SIGNAL_END)); @@ -108,6 +88,18 @@ int ioex_disable_interrupt(enum ioex_signal signal) return drv->enable_interrupt(g->ioex, g->port, g->mask, 0); } +int ioex_get_ioex_flags(enum ioex_signal signal, int *val) +{ + const struct ioex_info *g = ioex_get_signal_info(signal); + + if (g == NULL) + return EC_ERROR_BUSY; + + *val = ioex_config[g->ioex].flags; + + return EC_SUCCESS; +} + int ioex_get_flags(enum ioex_signal signal, int *flags) { const struct ioex_info *g = ioex_get_signal_info(signal); @@ -192,7 +184,8 @@ int ioex_init(int ioex) } } - ioex_config[ioex].flags = IOEX_FLAGS_INITIALIZED; + ioex_config[ioex].flags &= ~IOEX_FLAGS_DEFAULT_INIT_DISABLED; + ioex_config[ioex].flags |= IOEX_FLAGS_INITIALIZED; return EC_SUCCESS; } @@ -221,125 +214,3 @@ const char *ioex_get_name(enum ioex_signal signal) return g->name; } - -static void print_ioex_info(enum ioex_signal signal) -{ - int changed, v, val; - int flags = 0; - const struct ioex_info *g = ioex_list + signal - IOEX_SIGNAL_START; - - if (!(ioex_config[g->ioex].flags & IOEX_FLAGS_INITIALIZED)) { - ccprintf(" DISABLED %s\n", ioex_get_name(signal)); - return; - } - - - v = ioex_get_level(signal, &val); - if (v) { - ccprintf("Fail to get %s level\n", ioex_get_name(signal)); - return; - } - v = ioex_get_flags(signal, &flags); - if (v) { - ccprintf("Fail to get %s flags\n", ioex_get_name(signal)); - return; - } - - changed = last_val_changed(signal, val); - - ccprintf(" %d%c %s%s%s%s%s%s\n", val, - (changed ? '*' : ' '), - (flags & GPIO_INPUT ? "I " : ""), - (flags & GPIO_OUTPUT ? "O " : ""), - (flags & GPIO_LOW ? "L " : ""), - (flags & GPIO_HIGH ? "H " : ""), - (flags & GPIO_OPEN_DRAIN ? "ODR " : ""), - ioex_get_name(signal)); - - /* Flush console to avoid truncating output */ - cflush(); -} - -static int ioex_get_default_flags(enum ioex_signal signal) -{ - const struct ioex_info *g = ioex_get_signal_info(signal); - - if (g == NULL) - return 0; - - return g->flags; -} - -/* IO expander commands */ -static enum ioex_signal find_ioex_by_name(const char *name) -{ - enum ioex_signal signal; - - if (!name) - return IOEX_SIGNAL_END; - - for (signal = IOEX_SIGNAL_START; signal < IOEX_SIGNAL_END; signal++) { - if (!strcasecmp(name, ioex_get_name(signal))) - return signal; - } - - return IOEX_SIGNAL_END; -} - -static enum ec_error_list ioex_set(const char *name, int value) -{ - enum ioex_signal signal = find_ioex_by_name(name); - - if (!signal_is_ioex(signal)) - return EC_ERROR_INVAL; - - if (!(ioex_get_default_flags(signal) & GPIO_OUTPUT)) - return EC_ERROR_INVAL; - - return ioex_set_level(signal, value); -} - -static int command_ioex_set(int argc, char **argv) -{ - char *e; - int v; - - if (argc < 3) - return EC_ERROR_PARAM_COUNT; - - v = strtoi(argv[2], &e, 0); - if (*e) - return EC_ERROR_PARAM2; - - if (ioex_set(argv[1], v) != EC_SUCCESS) - return EC_ERROR_PARAM1; - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(ioexset, command_ioex_set, - "name <0 | 1>", - "Set level of a IO expander IO"); - -static int command_ioex_get(int argc, char **argv) -{ - enum ioex_signal signal; - - /* If a signal is specified, print only that one */ - if (argc == 2) { - signal = find_ioex_by_name(argv[1]); - if (!signal_is_ioex(signal)) - return EC_ERROR_PARAM1; - print_ioex_info(signal); - - return EC_SUCCESS; - } - - /* Otherwise print them all */ - for (signal = IOEX_SIGNAL_START; signal < IOEX_SIGNAL_END; signal++) - print_ioex_info(signal); - - return EC_SUCCESS; -} -DECLARE_SAFE_CONSOLE_COMMAND(ioexget, command_ioex_get, - "[name]", - "Read level of IO expander pin(s)"); diff --git a/common/ioexpander_commands.c b/common/ioexpander_commands.c new file mode 100644 index 0000000000..a09337ea88 --- /dev/null +++ b/common/ioexpander_commands.c @@ -0,0 +1,145 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "console.h" +#include "gpio.h" +#include "ioexpander.h" +#include "util.h" + +static uint8_t last_val[(IOEX_COUNT + 7) / 8]; + +static int last_val_changed(enum ioex_signal signal, int v) +{ + const int i = signal - IOEX_SIGNAL_START; + + ASSERT(signal_is_ioex(signal)); + + if (v && !(last_val[i / 8] & (BIT(i % 8)))) { + last_val[i / 8] |= BIT(i % 8); + return 1; + } else if (!v && last_val[i / 8] & (BIT(i % 8))) { + last_val[i / 8] &= ~(BIT(i % 8)); + return 1; + } else { + return 0; + } +} + +static enum ioex_signal find_ioex_by_name(const char *name) +{ + enum ioex_signal signal; + + if (!name) + return IOEX_SIGNAL_END; + + for (signal = IOEX_SIGNAL_START; signal < IOEX_SIGNAL_END; signal++) { + if (!strcasecmp(name, ioex_get_name(signal))) + return signal; + } + + return IOEX_SIGNAL_END; +} + +static void print_ioex_info(enum ioex_signal signal) +{ + int changed, v, val; + int flags = 0; + + if (ioex_get_ioex_flags(signal, &flags)) { + ccprintf(" ERROR getting flags\n"); + return; + } + + if (!(flags & IOEX_FLAGS_INITIALIZED)) { + ccprintf(" DISABLED %s\n", ioex_get_name(signal)); + return; + } + + v = ioex_get_level(signal, &val); + if (v) { + ccprintf("Fail to get %s level\n", ioex_get_name(signal)); + return; + } + v = ioex_get_flags(signal, &flags); + if (v) { + ccprintf("Fail to get %s flags\n", ioex_get_name(signal)); + return; + } + + changed = last_val_changed(signal, val); + + ccprintf(" %d%c %s%s%s%s%s%s\n", val, + (changed ? '*' : ' '), + (flags & GPIO_INPUT ? "I " : ""), + (flags & GPIO_OUTPUT ? "O " : ""), + (flags & GPIO_LOW ? "L " : ""), + (flags & GPIO_HIGH ? "H " : ""), + (flags & GPIO_OPEN_DRAIN ? "ODR " : ""), + ioex_get_name(signal)); + + /* Flush console to avoid truncating output */ + cflush(); +} + +static enum ec_error_list ioex_set(const char *name, int value) +{ + enum ioex_signal signal = find_ioex_by_name(name); + int flags; + + if (!signal_is_ioex(signal)) + return EC_ERROR_INVAL; + + if (ioex_get_flags(signal, &flags)) + return EC_ERROR_INVAL; + + if (!(flags & GPIO_OUTPUT)) + return EC_ERROR_INVAL; + + return ioex_set_level(signal, value); +} + +static int command_ioex_set(int argc, char **argv) +{ + char *e; + int v; + + if (argc < 3) + return EC_ERROR_PARAM_COUNT; + + v = strtoi(argv[2], &e, 0); + if (*e) + return EC_ERROR_PARAM2; + + if (ioex_set(argv[1], v) != EC_SUCCESS) + return EC_ERROR_PARAM1; + + return EC_SUCCESS; +} +DECLARE_CONSOLE_COMMAND(ioexset, command_ioex_set, + "name <0 | 1>", + "Set level of a IO expander pin"); + +static int command_ioex_get(int argc, char **argv) +{ + enum ioex_signal signal; + + /* If a signal is specified, print only that one */ + if (argc == 2) { + signal = find_ioex_by_name(argv[1]); + if (!signal_is_ioex(signal)) + return EC_ERROR_PARAM1; + print_ioex_info(signal); + + return EC_SUCCESS; + } + + /* Otherwise print them all */ + for (signal = IOEX_SIGNAL_START; signal < IOEX_SIGNAL_END; signal++) + print_ioex_info(signal); + + return EC_SUCCESS; +} +DECLARE_SAFE_CONSOLE_COMMAND(ioexget, command_ioex_get, + "[name]", + "Read level of IO expander pin(s)"); diff --git a/common/keyboard_backlight.c b/common/keyboard_backlight.c index d3d9fbe6d3..3c90b96cc5 100644 --- a/common/keyboard_backlight.c +++ b/common/keyboard_backlight.c @@ -65,6 +65,18 @@ int kblight_enable(int enable) return kblight.drv->enable(enable); } +int kblight_get_enabled(void) +{ +#ifdef GPIO_EN_KEYBOARD_BACKLIGHT + if (!gpio_get_level(GPIO_EN_KEYBOARD_BACKLIGHT)) + return 0; +#endif + if (kblight.drv && kblight.drv->get_enabled) + return kblight.drv->get_enabled(); + return -1; +} + + int kblight_register(const struct kblight_drv *drv) { kblight.drv = drv; @@ -125,7 +137,8 @@ static int cc_kblight(int argc, char **argv) if (kblight_enable(i > 0)) return EC_ERROR_PARAM1; } - ccprintf("Keyboard backlight: %d%%\n", kblight_get()); + ccprintf("Keyboard backlight: %d%% enabled: %d\n", + kblight_get(), kblight_get_enabled()); return EC_SUCCESS; } DECLARE_CONSOLE_COMMAND(kblight, cc_kblight, @@ -138,7 +151,7 @@ hc_get_keyboard_backlight(struct host_cmd_handler_args *args) struct ec_response_pwm_get_keyboard_backlight *r = args->response; r->percent = kblight_get(); - r->enabled = 1; /* Deprecated */ + r->enabled = kblight_get_enabled(); args->response_size = sizeof(*r); return EC_RES_SUCCESS; diff --git a/common/mock/tcpc_mock.c b/common/mock/tcpc_mock.c index 7097837268..dc3d11119d 100644 --- a/common/mock/tcpc_mock.c +++ b/common/mock/tcpc_mock.c @@ -187,9 +187,15 @@ __maybe_unused static int mock_set_src_ctrl(int port, int enable) __maybe_unused static int mock_enter_low_power_mode(int port) { + mock_tcpc.lpm_wake_requested = false; return EC_SUCCESS; } +__maybe_unused static void mock_wake_low_power_mode(int port) +{ + mock_tcpc.lpm_wake_requested = true; +} + int mock_set_frs_enable(int port, int enable) { return EC_SUCCESS; @@ -220,6 +226,7 @@ const struct tcpm_drv mock_tcpc_driver = { #endif #ifdef CONFIG_USB_PD_TCPC_LOW_POWER .enter_low_power_mode = &mock_enter_low_power_mode, + .wake_low_power_mode = &mock_wake_low_power_mode, #endif #ifdef CONFIG_USB_PD_FRS_TCPC .set_frs_enable = &mock_set_frs_enable, diff --git a/common/motion_sense.c b/common/motion_sense.c index 6a93e15dde..a9b15fd071 100644 --- a/common/motion_sense.c +++ b/common/motion_sense.c @@ -332,10 +332,10 @@ static inline int motion_sense_init(struct motion_sensor_t *sensor) BUILD_ASSERT(SENSOR_COUNT < 32); #if defined(HAS_TASK_CONSOLE) - ASSERT((task_get_current() == TASK_ID_HOOKS) || + ASSERT((in_deferred_context()) || (task_get_current() == TASK_ID_CONSOLE)); #else - ASSERT(task_get_current() == TASK_ID_HOOKS); + ASSERT(in_deferred_context()); #endif /* HAS_TASK_CONSOLE */ /* Initialize accelerometers. */ @@ -386,7 +386,7 @@ static void motion_sense_switch_sensor_rate(void) struct motion_sensor_t *sensor; unsigned int sensor_setup_mask = 0; - ASSERT(task_get_current() == TASK_ID_HOOKS); + ASSERT(in_deferred_context()); for (i = 0; i < motion_sensor_count; ++i) { sensor = &motion_sensors[i]; diff --git a/common/pwm_kblight.c b/common/pwm_kblight.c index 4967d36df5..3389023ea3 100644 --- a/common/pwm_kblight.c +++ b/common/pwm_kblight.c @@ -38,9 +38,15 @@ static int kblight_pwm_enable(int enable) return EC_SUCCESS; } +static int kblight_pwm_get_enabled(void) +{ + return pwm_get_enabled(kblight_pwm_ch); +} + const struct kblight_drv kblight_pwm = { .init = kblight_pwm_init, .set = kblight_pwm_set, .get = kblight_pwm_get, .enable = kblight_pwm_enable, + .get_enabled = kblight_pwm_get_enabled, }; diff --git a/common/tablet_mode.c b/common/tablet_mode.c index 3a5616ec3f..aa86a13762 100644 --- a/common/tablet_mode.c +++ b/common/tablet_mode.c @@ -69,15 +69,6 @@ void tablet_set_mode(int mode, uint32_t trigger) if (tablet_mode_forced) return; - if (mode) - tablet_mode |= trigger; - else - tablet_mode &= ~trigger; - - /* Boolean comparison */ - if (!tablet_mode == !old_mode) - return; - if (disabled) { CPRINTS("Tablet mode set while disabled (ignoring)!"); return; @@ -89,6 +80,15 @@ void tablet_set_mode(int mode, uint32_t trigger) return; } + if (mode) + tablet_mode |= trigger; + else + tablet_mode &= ~trigger; + + /* Boolean comparison */ + if (!tablet_mode == !old_mode) + return; + notify_tablet_mode_change(); } diff --git a/common/temp_sensor.c b/common/temp_sensor.c index 219e28254c..2f6480e31d 100644 --- a/common/temp_sensor.c +++ b/common/temp_sensor.c @@ -108,18 +108,18 @@ int print_temps(void) int rv, rv1 = EC_SUCCESS; for (i = 0; i < TEMP_SENSOR_COUNT; ++i) { - ccprintf(" %-20s: ", temp_sensors[i].name); + ccprintf(" %-20s ", temp_sensors[i].name); rv = temp_sensor_read(i, &t); if (rv) rv1 = rv; switch (rv) { case EC_SUCCESS: - ccprintf("%d K = %d C", t, K_TO_C(t)); + ccprintf("%d K (= %d C)", t, K_TO_C(t)); #ifdef CONFIG_THROTTLE_AP if (thermal_params[i].temp_fan_off && thermal_params[i].temp_fan_max) - ccprintf(" %d%%", + ccprintf(" %11d%%", thermal_fan_percent( thermal_params[i].temp_fan_off, thermal_params[i].temp_fan_max, @@ -151,7 +151,7 @@ static int command_temps(int argc, char **argv) } DECLARE_CONSOLE_COMMAND(temps, command_temps, NULL, - "Print temp sensors"); + "Print temp sensors and fan speed"); #endif /*****************************************************************************/ diff --git a/common/thermal.c b/common/thermal.c index 50047c96bb..dba7334b74 100644 --- a/common/thermal.c +++ b/common/thermal.c @@ -61,17 +61,20 @@ static int first_read_delay = CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS; static void thermal_control(void) { - int i, j, t, rv, f; + int i, j, t, rv; int count_over[EC_TEMP_THRESH_COUNT]; int count_under[EC_TEMP_THRESH_COUNT]; int num_valid_limits[EC_TEMP_THRESH_COUNT]; int num_sensors_read; - int fmax; - int temp_fan_configured; - -#ifdef CONFIG_CUSTOM_FAN_CONTROL +#ifdef CONFIG_FANS +#ifndef CONFIG_CUSTOM_FAN_CONTROL + int f = 0; + int fmax = 0; + int temp_fan_configured = 0; +#else int temp[TEMP_SENSOR_COUNT]; #endif +#endif /* add delay to ensure thermal sensor is ready when EC boot */ #if defined(CONFIG_TEMP_SENSOR_POWER_GPIO) && \ @@ -87,8 +90,6 @@ static void thermal_control(void) memset(count_under, 0, sizeof(count_under)); memset(num_valid_limits, 0, sizeof(num_valid_limits)); num_sensors_read = 0; - fmax = 0; - temp_fan_configured = 0; /* go through all the sensors */ for (i = 0; i < TEMP_SENSOR_COUNT; ++i) { @@ -96,7 +97,7 @@ static void thermal_control(void) /* read one */ rv = temp_sensor_read(i, &t); -#ifdef CONFIG_CUSTOM_FAN_CONTROL +#if defined(CONFIG_FANS) && defined(CONFIG_CUSTOM_FAN_CONTROL) /* Store all sensors value */ temp[i] = K_TO_C(t); #endif @@ -123,6 +124,8 @@ static void thermal_control(void) } } +#ifdef CONFIG_FANS +#ifndef CONFIG_CUSTOM_FAN_CONTROL /* figure out the max fan needed, too */ if (thermal_params[i].temp_fan_off && thermal_params[i].temp_fan_max) { @@ -134,6 +137,8 @@ static void thermal_control(void) temp_fan_configured = 1; } +#endif +#endif } if (!num_sensors_read) { @@ -208,16 +213,16 @@ static void thermal_control(void) throttle_ap(THROTTLE_OFF, THROTTLE_SOFT, THROTTLE_SRC_THERMAL); } - if (temp_fan_configured) { #ifdef CONFIG_FANS #ifdef CONFIG_CUSTOM_FAN_CONTROL - for (i = 0; i < fan_get_count(); i++) { - if (!is_thermal_control_enabled(i)) - continue; + for (i = 0; i < fan_get_count(); i++) { + if (!is_thermal_control_enabled(i)) + continue; - board_override_fan_control(i, temp); - } + board_override_fan_control(i, temp); + } #else + if (temp_fan_configured) { /* TODO(crosbug.com/p/23797): For now, we just treat all * fans the same. It would be better if we could assign * different thermal profiles to each fan - in case one @@ -226,9 +231,9 @@ static void thermal_control(void) */ for (i = 0; i < fan_get_count(); i++) fan_set_percent_needed(i, fmax); + } #endif #endif - } } /* Wait until after the sensors have been read */ diff --git a/common/timer.c b/common/timer.c index d4504f19b7..0490741c4c 100644 --- a/common/timer.c +++ b/common/timer.c @@ -211,10 +211,19 @@ void usleep(unsigned us) evt & ~TASK_EVENT_TIMER); } +#ifdef CONFIG_ZTEST +timestamp_t *get_time_mock; +#endif /* CONFIG_ZTEST */ + timestamp_t get_time(void) { timestamp_t ts; +#ifdef CONFIG_ZTEST + if (get_time_mock != NULL) + return *get_time_mock; +#endif /* CONFIG_ZTEST */ + if (IS_ENABLED(CONFIG_HWTIMER_64BIT)) { ts.val = __hw_clock_source_read64(); } else { diff --git a/common/uart_printf.c b/common/uart_printf.c index ae6f79bf79..198d076971 100644 --- a/common/uart_printf.c +++ b/common/uart_printf.c @@ -12,11 +12,9 @@ static int __tx_char(void *context, int c) { /* - * Translate '\n' to '\r\n', bypass on Zephyr because printk also - * does this translation. + * Translate '\n' to '\r\n'. */ - if (!IS_ENABLED(CONFIG_ZEPHYR) && c == '\n' && - uart_tx_char_raw(context, '\r')) + if (c == '\n' && uart_tx_char_raw(context, '\r')) return 1; return uart_tx_char_raw(context, c); } diff --git a/common/usb_common.c b/common/usb_common.c index 786bd118cf..d5f42edca2 100644 --- a/common/usb_common.c +++ b/common/usb_common.c @@ -16,6 +16,7 @@ #include "console.h" #include "ec_commands.h" #include "hooks.h" +#include "mkbp_event.h" #include "stdbool.h" #include "host_command.h" #include "system.h" @@ -127,6 +128,12 @@ int remote_flashing(int argc, char **argv) } #endif /* defined(CONFIG_CMD_PD) && defined(CONFIG_CMD_PD_FLASH) */ +#ifdef CONFIG_COMMON_RUNTIME +struct ec_params_usb_pd_rw_hash_entry rw_hash_table[RW_HASH_ENTRIES]; +#endif /* CONFIG_COMMON_RUNTIME */ + +static __maybe_unused uint32_t pd_host_event_status __aligned(4); + bool pd_firmware_upgrade_check_power_readiness(int port) { if (IS_ENABLED(HAS_TASK_CHARGER)) { @@ -698,30 +705,6 @@ __overridable void typec_set_source_current_limit(int p, enum tcpc_rp_value rp) ppc_set_vbus_source_current_limit(p, rp); } -/* ---------------- Power Data Objects (PDOs) ----------------- */ -#ifndef CONFIG_USB_PD_CUSTOM_PDO -#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ - PDO_FIXED_COMM_CAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); -const uint32_t pd_src_pdo_max[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, - GENERIC_MIN((PD_OPERATING_POWER_MW / 5), PD_MAX_CURRENT_MA), - PDO_FIXED_FLAGS), - PDO_BATT(4750, PD_MAX_VOLTAGE_MV, PD_OPERATING_POWER_MW), - PDO_VAR(4750, PD_MAX_VOLTAGE_MV, PD_MAX_CURRENT_MA), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); -#endif /* CONFIG_USB_PD_CUSTOM_PDO */ - /* ----------------- Vendor Defined Messages ------------------ */ #if defined(CONFIG_USB_PE_SM) && !defined(CONFIG_USB_VPD) && \ !defined(CONFIG_USB_CTVPD) @@ -994,6 +977,7 @@ void pd_srccaps_dump(int port) for (i = 0; i < pd_get_src_cap_cnt(port); ++i) { uint32_t max_ma, max_mv, min_mv; +#ifdef CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE pd_extract_pdo_power(srccaps[i], &max_ma, &max_mv, &min_mv); if ((srccaps[i] & PDO_TYPE_MASK) == PDO_TYPE_AUGMENTED) { @@ -1003,6 +987,56 @@ void pd_srccaps_dump(int port) } else { ccprintf("%d: %dmV/%dmA\n", i, max_mv, max_ma); } +#else + const uint32_t pdo = srccaps[i]; + const uint32_t pdo_mask = pdo & PDO_TYPE_MASK; + const char *pdo_type; + bool range_flag = true; + + pd_extract_pdo_power(pdo, &max_ma, &max_mv, &min_mv); + + switch (pdo_mask) { + case PDO_TYPE_FIXED: + pdo_type = "Fixed"; + range_flag = false; + break; + case PDO_TYPE_BATTERY: + pdo_type = "Battery"; + break; + case PDO_TYPE_VARIABLE: + pdo_type = "Variable"; + break; + case PDO_TYPE_AUGMENTED: + pdo_type = "Augmnt"; + if (!IS_ENABLED(CONFIG_USB_PD_REV30)) { + pdo_type = "Aug3.0"; + range_flag = false; + } + break; + default: + pdo_type = "?"; + break; + } + + ccprintf("Src %d: (%s) %dmV", i, pdo_type, max_mv); + if (range_flag) + ccprintf("-%dmV", min_mv); + ccprintf("/%dm%c", max_ma, + pdo_mask == PDO_TYPE_BATTERY ? 'W' : 'A'); + + if (pdo & PDO_FIXED_DUAL_ROLE) + ccprintf(" DRP"); + if (pdo & PDO_FIXED_UNCONSTRAINED) + ccprintf(" UP"); + if (pdo & PDO_FIXED_COMM_CAP) + ccprintf(" USB"); + if (pdo & PDO_FIXED_DATA_SWAP) + ccprintf(" DRD"); + /* Note from ectool.c: FRS bits are reserved in PD 2.0 spec */ + if (pdo & PDO_FIXED_FRS_CURR_MASK) + ccprintf(" FRS"); + ccprintf("\n"); +#endif } } @@ -1025,3 +1059,25 @@ int pd_build_alert_msg(uint32_t *msg, uint32_t *len, enum pd_power_role pr) return EC_SUCCESS; } + +#if defined(HAS_TASK_HOSTCMD) && !defined(TEST_BUILD) +void pd_send_host_event(int mask) +{ + /* mask must be set */ + if (!mask) + return; + + atomic_or(&pd_host_event_status, mask); + /* interrupt the AP */ + host_set_single_event(EC_HOST_EVENT_PD_MCU); +} +#endif /* defined(HAS_TASK_HOSTCMD) && !defined(TEST_BUILD) */ + +__overridable void pd_notify_dp_alt_mode_entry(int port) +{ + if (IS_ENABLED(CONFIG_MKBP_EVENT)) { + (void)port; + CPRINTS("Notifying AP of DP Alt Mode Entry..."); + mkbp_send_event(EC_MKBP_EVENT_DP_ALT_MODE_ENTERED); + } +} diff --git a/common/usb_pd_alt_mode_dfp.c b/common/usb_pd_alt_mode_dfp.c index d7048f4c8e..c7ad4fb4e7 100644 --- a/common/usb_pd_alt_mode_dfp.c +++ b/common/usb_pd_alt_mode_dfp.c @@ -965,6 +965,7 @@ enum tbt_compat_cable_speed get_tbt_cable_speed(int port) max_tbt_speed : cable_tbt_speed; } +/* Note: Assumes that pins have already been set in safe state */ int enter_tbt_compat_mode(int port, enum tcpci_msg_type sop, uint32_t *payload) { @@ -985,13 +986,6 @@ int enter_tbt_compat_mode(int port, enum tcpci_msg_type sop, VDO_CMDT(CMDT_INIT) | VDO_SVDM_VERS(pd_get_vdo_ver(port, enter_mode_sop)); - /* - * Enter safe mode before sending Enter mode SOP/SOP'/SOP'' - * Ref: Tiger Lake Platform PD Controller Interface Requirements for - * Integrated USB C, section A.1.2 TBT as DFP. - */ - usb_mux_set_safe_mode(port); - /* For TBT3 Cable Enter Mode Command, number of Objects is 1 */ if ((sop == TCPCI_MSG_SOP_PRIME) || (sop == TCPCI_MSG_SOP_PRIME_PRIME)) @@ -1237,7 +1231,7 @@ __overridable uint8_t get_dp_pin_mode(int port) return pd_dfp_dp_get_pin_mode(port, dp_status[port]); } -static mux_state_t svdm_dp_get_mux_mode(int port) +mux_state_t svdm_dp_get_mux_mode(int port) { int pin_mode = get_dp_pin_mode(port); /* Default dp_port_mf_allow is true */ @@ -1259,6 +1253,7 @@ static mux_state_t svdm_dp_get_mux_mode(int port) return USB_PD_MUX_DP_ENABLED; } +/* Note: Assumes that pins have already been set in safe state if necessary */ __overridable int svdm_dp_config(int port, uint32_t *payload) { int opos = pd_alt_mode(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT); @@ -1278,17 +1273,6 @@ __overridable int svdm_dp_config(int port, uint32_t *payload) CPRINTS("pin_mode: %x, mf: %d, mux: %d", pin_mode, mf_pref, mux_mode); - /* - * Place the USB Type-C pins that are to be re-configured to DisplayPort - * Configuration into the Safe state. For USB_PD_MUX_DOCK, the - * superspeed signals can remain connected. For USB_PD_MUX_DP_ENABLED, - * disconnect the superspeed signals here, before the pins are - * re-configured to DisplayPort (in svdm_dp_post_config, when we receive - * the config ack). - */ - if (mux_mode == USB_PD_MUX_DP_ENABLED) - usb_mux_set_safe_mode(port); - payload[0] = VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG | VDO_OPOS(opos)); payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ diff --git a/common/usb_pd_host_cmd.c b/common/usb_pd_host_cmd.c index 4261e8c1f0..47ec36ad5f 100644 --- a/common/usb_pd_host_cmd.c +++ b/common/usb_pd_host_cmd.c @@ -20,8 +20,6 @@ #include "usb_pd_tcpm.h" #include "usb_pd.h" #ifdef CONFIG_COMMON_RUNTIME -struct ec_params_usb_pd_rw_hash_entry rw_hash_table[RW_HASH_ENTRIES]; - #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) #else /* CONFIG_COMMON_RUNTIME */ @@ -454,14 +452,6 @@ DECLARE_HOST_COMMAND(EC_CMD_USB_PD_FW_UPDATE, EC_VER_MASK(0)); #endif /* CONFIG_HOSTCMD_FLASHPD && CONFIG_USB_PD_TCPMV2 */ -#ifdef CONFIG_MKBP_EVENT -__overridable void pd_notify_dp_alt_mode_entry(int port) -{ - (void)port; - CPRINTS("Notifying AP of DP Alt Mode Entry..."); - mkbp_send_event(EC_MKBP_EVENT_DP_ALT_MODE_ENTERED); -} -#endif /* CONFIG_MKBP_EVENT */ __overridable enum ec_pd_port_location board_get_pd_port_location(int port) { @@ -573,18 +563,6 @@ hc_pd_host_event_status(struct host_cmd_handler_args *args) } DECLARE_HOST_COMMAND(EC_CMD_PD_HOST_EVENT_STATUS, hc_pd_host_event_status, EC_VER_MASK(0)); - -/* Send host event up to AP */ -void pd_send_host_event(int mask) -{ - /* mask must be set */ - if (!mask) - return; - - atomic_or(&pd_host_event_status, mask); - /* interrupt the AP */ - host_set_single_event(EC_HOST_EVENT_PD_MCU); -} #endif /* ! CONFIG_USB_PD_TCPM_STUB && ! TEST_BUILD */ #endif /* HAS_TASK_HOSTCMD */ diff --git a/common/usb_pd_pdo.c b/common/usb_pd_pdo.c new file mode 100644 index 0000000000..cfa355bf0e --- /dev/null +++ b/common/usb_pd_pdo.c @@ -0,0 +1,33 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "usb_pd.h" +#include "util.h" +#include "usb_pd_pdo.h" + +#ifndef CONFIG_USB_PD_CUSTOM_PDO + +#define PDO_FIXED_FLAGS \ + (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_COMM_CAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); +const uint32_t pd_src_pdo_max[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, + GENERIC_MIN((PD_OPERATING_POWER_MW / 5), PD_MAX_CURRENT_MA), + PDO_FIXED_FLAGS), + PDO_BATT(4750, PD_MAX_VOLTAGE_MV, PD_OPERATING_POWER_MW), + PDO_VAR(4750, PD_MAX_VOLTAGE_MV, PD_MAX_CURRENT_MA), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +#endif /* CONFIG_USB_PD_CUSTOM_PDO */ diff --git a/common/usb_pd_policy.c b/common/usb_pd_policy.c index de6fc63a60..30aa936f28 100644 --- a/common/usb_pd_policy.c +++ b/common/usb_pd_policy.c @@ -786,13 +786,31 @@ int pd_svdm(int port, int cnt, uint32_t *payload, uint32_t **rpayload, } break; case CMD_DP_STATUS: - /* DP status response & UFP's DP attention have same - payload */ + /* + * Note: DP status response & UFP's DP attention have + * the same payload + */ dfp_consume_attention(port, payload); - if (modep && modep->opos) + + if (modep && modep->opos) { + /* + * Place the USB Type-C pins that are to be + * re-configured to DisplayPort Configuration + * into the Safe state. For USB_PD_MUX_DOCK, + * the superspeed signals can remain connected. + * For USB_PD_MUX_DP_ENABLED, disconnect the + * superspeed signals here, before the pins are + * re-configured to DisplayPort (in + * svdm_dp_post_config, when we receive the + * config ack). + */ + if (svdm_dp_get_mux_mode(port) == + USB_PD_MUX_DP_ENABLED) + usb_mux_set_safe_mode(port); rsize = modep->fx->config(port, payload); - else + } else { rsize = 0; + } break; case CMD_DP_CONFIG: if (modep && modep->opos && modep->fx->post_config) diff --git a/common/usbc/build.mk b/common/usbc/build.mk index 48ab5351b8..60e2347741 100644 --- a/common/usbc/build.mk +++ b/common/usbc/build.mk @@ -46,6 +46,7 @@ all-obj-$(CONFIG_USB_PD_ALT_MODE_UFP_DP)+=$(_usbc_dir)usb_pd_dp_ufp.o endif # CONFIG_USB_PD_TCPMV2 # For testing +all-obj-$(CONFIG_TEST_USB_PD_TIMER)+=$(_usbc_dir)usb_pd_timer.o all-obj-$(CONFIG_TEST_USB_PE_SM)+=$(_usbc_dir)usbc_pd_policy.o all-obj-$(CONFIG_TEST_USB_PE_SM)+=$(_usbc_dir)usb_pe_drp_sm.o all-obj-$(CONFIG_TEST_SM)+=$(_usbc_dir)usb_sm.o diff --git a/common/usbc/dp_alt_mode.c b/common/usbc/dp_alt_mode.c index 9a3493c6e1..2a532466ac 100644 --- a/common/usbc/dp_alt_mode.c +++ b/common/usbc/dp_alt_mode.c @@ -12,6 +12,7 @@ #include <stdbool.h> #include <stdint.h> #include "assert.h" +#include "atomic.h" #include "usb_common.h" #include "usb_dp_alt_mode.h" #include "usb_pd.h" @@ -31,8 +32,10 @@ enum dp_states { DP_ENTER_ACKED, DP_ENTER_NAKED, DP_STATUS_ACKED, + DP_PREPARE_CONFIG, DP_ACTIVE, DP_ENTER_RETRY, + DP_PREPARE_EXIT, DP_INACTIVE, DP_STATE_COUNT }; @@ -45,20 +48,31 @@ static enum dp_states dp_state[CONFIG_USB_PD_PORT_MAX_COUNT]; static const uint8_t state_vdm_cmd[DP_STATE_COUNT] = { [DP_START] = CMD_ENTER_MODE, [DP_ENTER_ACKED] = CMD_DP_STATUS, - [DP_STATUS_ACKED] = CMD_DP_CONFIG, - [DP_ACTIVE] = CMD_EXIT_MODE, - [DP_ENTER_NAKED] = CMD_EXIT_MODE, + [DP_PREPARE_CONFIG] = CMD_DP_CONFIG, + [DP_PREPARE_EXIT] = CMD_EXIT_MODE, [DP_ENTER_RETRY] = CMD_ENTER_MODE, }; +/* + * Track if we're retrying due to an Enter Mode NAK + */ +#define DP_FLAG_RETRY BIT(0) + +static uint32_t dpm_dp_flags[CONFIG_USB_PD_PORT_MAX_COUNT]; + +#define DP_SET_FLAG(port, flag) atomic_or(&dpm_dp_flags[port], (flag)) +#define DP_CLR_FLAG(port, flag) atomic_clear_bits(&dpm_dp_flags[port], (flag)) +#define DP_CHK_FLAG(port, flag) (dpm_dp_flags[port] & (flag)) + bool dp_is_active(int port) { - return dp_state[port] == DP_ACTIVE; + return dp_state[port] == DP_ACTIVE || dp_state[port] == DP_PREPARE_EXIT; } void dp_init(int port) { dp_state[port] = DP_START; + dpm_dp_flags[port] = 0; } bool dp_entry_is_done(int port) @@ -71,6 +85,7 @@ static void dp_entry_failed(int port) { CPRINTS("C%d: DP alt mode protocol failed!", port); dp_state[port] = DP_INACTIVE; + dpm_dp_flags[port] = 0; } static bool dp_response_valid(int port, enum tcpci_msg_type type, @@ -135,25 +150,23 @@ void dp_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, dfp_consume_attention(port, vdm); dp_state[port] = DP_STATUS_ACKED; break; - case DP_STATUS_ACKED: + case DP_PREPARE_CONFIG: if (modep && modep->opos && modep->fx->post_config) modep->fx->post_config(port); dp_state[port] = DP_ACTIVE; CPRINTS("C%d: Entered DP mode", port); break; - case DP_ACTIVE: + case DP_PREPARE_EXIT: /* * Request to exit mode successful, so put the module in an - * inactive state. + * inactive state or give entry another shot. */ - dp_exit_to_usb_mode(port); - break; - case DP_ENTER_NAKED: - /* - * The request to exit the mode was successful, - * so try to enter the mode again. - */ - dp_state[port] = DP_ENTER_RETRY; + if (DP_CHK_FLAG(port, DP_FLAG_RETRY)) { + dp_state[port] = DP_ENTER_RETRY; + DP_CLR_FLAG(port, DP_FLAG_RETRY); + } else { + dp_exit_to_usb_mode(port); + } break; case DP_INACTIVE: /* @@ -195,7 +208,7 @@ void dp_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd) */ dp_entry_failed(port); break; - case DP_ACTIVE: + case DP_PREPARE_EXIT: /* Treat an Exit Mode NAK the same as an Exit Mode ACK. */ dp_exit_to_usb_mode(port); break; @@ -207,14 +220,15 @@ void dp_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd) } } -int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm) +enum dpm_msg_setup_status dp_setup_next_vdm(int port, int *vdo_count, + uint32_t *vdm) { const struct svdm_amode_data *modep = pd_get_amode_data(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT); int vdo_count_ret; - if (vdo_count < VDO_MAX_SIZE) - return -1; + if (*vdo_count < VDO_MAX_SIZE) + return MSG_SETUP_ERROR; switch (dp_state[port]) { case DP_START: @@ -223,7 +237,7 @@ int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm) vdm[0] = pd_dfp_enter_mode(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT, 0); if (vdm[0] == 0) - return -1; + return MSG_SETUP_ERROR; /* CMDT_INIT is 0, so this is a no-op */ vdm[0] |= VDO_CMDT(CMDT_INIT); vdm[0] |= VDO_SVDM_VERS(pd_get_vdo_ver(port, TCPCI_MSG_SOP)); @@ -233,26 +247,48 @@ int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm) break; case DP_ENTER_ACKED: if (!(modep && modep->opos)) - return -1; + return MSG_SETUP_ERROR; vdo_count_ret = modep->fx->status(port, vdm); if (vdo_count_ret == 0) - return -1; + return MSG_SETUP_ERROR; vdm[0] |= PD_VDO_OPOS(modep->opos); vdm[0] |= VDO_CMDT(CMDT_INIT); vdm[0] |= VDO_SVDM_VERS(pd_get_vdo_ver(port, TCPCI_MSG_SOP)); break; case DP_STATUS_ACKED: if (!(modep && modep->opos)) - return -1; + return MSG_SETUP_ERROR; + + if (!get_dp_pin_mode(port)) + return MSG_SETUP_ERROR; + dp_state[port] = DP_PREPARE_CONFIG; + + /* + * Place the USB Type-C pins that are to be re-configured to + * DisplayPort Configuration into the Safe state. For + * USB_PD_MUX_DOCK, the superspeed signals can remain + * connected. For USB_PD_MUX_DP_ENABLED, disconnect the + * superspeed signals here, before the pins are re-configured + * to DisplayPort (in svdm_dp_post_config, when we receive + * the config ack). + */ + if (svdm_dp_get_mux_mode(port) == USB_PD_MUX_DP_ENABLED) { + usb_mux_set_safe_mode(port); + return MSG_SETUP_MUX_WAIT; + } + /* Fall through if no mux set is needed */ + case DP_PREPARE_CONFIG: vdo_count_ret = modep->fx->config(port, vdm); if (vdo_count_ret == 0) - return -1; + return MSG_SETUP_ERROR; vdm[0] |= VDO_CMDT(CMDT_INIT); vdm[0] |= VDO_SVDM_VERS(pd_get_vdo_ver(port, TCPCI_MSG_SOP)); break; case DP_ENTER_NAKED: + DP_SET_FLAG(port, DP_FLAG_RETRY); + /* Fall through to send exit mode */ case DP_ACTIVE: /* * Called to exit DP alt mode, either when the mode @@ -265,10 +301,13 @@ int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm) * TODO(b/159856063): Clean up the API to the fx functions. */ if (!(modep && modep->opos)) - return -1; + return MSG_SETUP_ERROR; usb_mux_set_safe_mode_exit(port); - + dp_state[port] = DP_PREPARE_EXIT; + return MSG_SETUP_MUX_WAIT; + case DP_PREPARE_EXIT: + /* DPM should call setup only after safe state is set */ vdm[0] = VDO(USB_SID_DISPLAYPORT, 1, /* structured */ CMD_EXIT_MODE); @@ -282,11 +321,17 @@ int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm) /* * DP mode is inactive. */ - return -1; + return MSG_SETUP_ERROR; default: CPRINTF("%s called with invalid state %d\n", __func__, dp_state[port]); - return -1; + return MSG_SETUP_ERROR; } - return vdo_count_ret; + + if (vdo_count_ret) { + *vdo_count = vdo_count_ret; + return MSG_SETUP_SUCCESS; + } + + return MSG_SETUP_UNSUPPORTED; } diff --git a/common/usbc/tbt_alt_mode.c b/common/usbc/tbt_alt_mode.c index 73e2796345..5baf9d1a73 100644 --- a/common/usbc/tbt_alt_mode.c +++ b/common/usbc/tbt_alt_mode.c @@ -90,6 +90,8 @@ enum tbt_states { TBT_START = 0, TBT_ENTER_SOP, TBT_ACTIVE, + /* Set to force Exit mode from non-Active states */ + TBT_PREPARE_EXIT_MODE, TBT_EXIT_SOP, TBT_INACTIVE, /* Active cable only */ @@ -103,7 +105,6 @@ static enum tbt_states tbt_state[CONFIG_USB_PD_PORT_MAX_COUNT]; static const uint8_t state_vdm_cmd[TBT_STATE_COUNT] = { [TBT_ENTER_SOP] = CMD_ENTER_MODE, - [TBT_ACTIVE] = CMD_EXIT_MODE, [TBT_EXIT_SOP] = CMD_EXIT_MODE, /* Active cable only */ [TBT_ENTER_SOP_PRIME] = CMD_ENTER_MODE, @@ -299,27 +300,18 @@ void intel_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, /* Indicate to PE layer that alt mode is active */ pd_set_dfp_enter_mode_flag(port, true); break; - case TBT_ACTIVE: + case TBT_EXIT_SOP: tbt_prints("exit mode SOP", port); opos_sop = pd_alt_mode(port, TCPCI_MSG_SOP, USB_VID_INTEL); /* Clear Thunderbolt related signals */ - pd_dfp_exit_mode(port, TCPCI_MSG_SOP, USB_VID_INTEL, opos_sop); - set_usb_mux_with_current_data_role(port); + if (opos_sop > 0) + pd_dfp_exit_mode(port, TCPCI_MSG_SOP, USB_VID_INTEL, + opos_sop); if (get_usb_pd_cable_type(port) == IDH_PTYPE_ACABLE) { tbt_active_cable_exit_mode(port); } else { - /* - * Exit Mode process is complete; go to inactive state. - */ - tbt_exit_done(port); - } - break; - case TBT_EXIT_SOP: - set_usb_mux_with_current_data_role(port); - if (get_usb_pd_cable_type(port) == IDH_PTYPE_ACABLE) - tbt_active_cable_exit_mode(port); - else { + set_usb_mux_with_current_data_role(port); if (TBT_CHK_FLAG(port, TBT_FLAG_RETRY_DONE)) /* retried enter mode, still failed, give up */ tbt_exit_done(port); @@ -330,7 +322,6 @@ void intel_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, case TBT_EXIT_SOP_PRIME_PRIME: tbt_prints("exit mode SOP''", port); tbt_state[port] = TBT_EXIT_SOP_PRIME; - set_usb_mux_with_current_data_role(port); break; case TBT_EXIT_SOP_PRIME: tbt_prints("exit mode SOP'", port); @@ -382,26 +373,15 @@ void intel_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd) * so request to exit the mode first before retrying the enter * command. This can happen if the EC is restarted */ - tbt_state[port] = TBT_EXIT_SOP; - break; - case TBT_ACTIVE: - /* Exit SOP got NAK'ed */ - set_usb_mux_with_current_data_role(port); - if (get_usb_pd_cable_type(port) == IDH_PTYPE_ACABLE) - tbt_active_cable_exit_mode(port); - else { - tbt_prints("exit mode SOP failed", port); - tbt_state[port] = TBT_INACTIVE; - TBT_CLR_FLAG(port, TBT_FLAG_RETRY_DONE); - } + tbt_state[port] = TBT_PREPARE_EXIT_MODE; break; case TBT_EXIT_SOP: /* Exit SOP got NAK'ed */ tbt_prints("exit mode SOP failed", port); - set_usb_mux_with_current_data_role(port); if (get_usb_pd_cable_type(port) == IDH_PTYPE_ACABLE) tbt_active_cable_exit_mode(port); else { + set_usb_mux_with_current_data_role(port); if (TBT_CHK_FLAG(port, TBT_FLAG_RETRY_DONE)) /* Retried enter mode, still failed, give up */ tbt_exit_done(port); @@ -410,7 +390,6 @@ void intel_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd) } break; case TBT_EXIT_SOP_PRIME_PRIME: - set_usb_mux_with_current_data_role(port); tbt_prints("exit mode SOP'' failed", port); tbt_state[port] = TBT_EXIT_SOP_PRIME; break; @@ -458,8 +437,9 @@ static bool tbt_mode_is_supported(int port, int vdo_count) return true; } -int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, - enum tcpci_msg_type *tx_type) +enum dpm_msg_setup_status tbt_setup_next_vdm(int port, int *vdo_count, + uint32_t *vdm, + enum tcpci_msg_type *tx_type) { struct svdm_amode_data *modep; int vdo_count_ret = 0; @@ -467,36 +447,39 @@ int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, *tx_type = TCPCI_MSG_SOP; - if (vdo_count < VDO_MAX_SIZE) - return -1; + if (*vdo_count < VDO_MAX_SIZE) + return MSG_SETUP_ERROR; switch (tbt_state[port]) { case TBT_START: - if (!tbt_mode_is_supported(port, vdo_count)) - return 0; + if (!tbt_mode_is_supported(port, *vdo_count)) + return MSG_SETUP_UNSUPPORTED; if (!TBT_CHK_FLAG(port, TBT_FLAG_RETRY_DONE)) tbt_prints("attempt to enter mode", port); else tbt_prints("retry to enter mode", port); + /* + * Enter safe mode before sending Enter mode SOP/SOP'/SOP'' + * Ref: Tiger Lake Platform PD Controller Interface + * Requirements for Integrated USB C, section A.1.2 TBT as DFP. + */ + usb_mux_set_safe_mode(port); + cable_mode_resp.raw_value = pd_get_tbt_mode_vdo(port, TCPCI_MSG_SOP_PRIME); /* Active cable and LRD cables send Enter Mode SOP' first */ if (get_usb_pd_cable_type(port) == IDH_PTYPE_ACABLE || cable_mode_resp.tbt_active_passive == TBT_CABLE_ACTIVE) { - vdo_count_ret = enter_tbt_compat_mode(port, - TCPCI_MSG_SOP_PRIME, vdm); - *tx_type = TCPCI_MSG_SOP_PRIME; tbt_state[port] = TBT_ENTER_SOP_PRIME; } else { /* Passive cable send Enter Mode SOP */ - vdo_count_ret = - enter_tbt_compat_mode(port, TCPCI_MSG_SOP, vdm); tbt_state[port] = TBT_ENTER_SOP; } - break; + + return MSG_SETUP_MUX_WAIT; case TBT_ENTER_SOP_PRIME: vdo_count_ret = enter_tbt_compat_mode(port, TCPCI_MSG_SOP_PRIME, vdm); @@ -512,20 +495,30 @@ int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, vdo_count_ret = enter_tbt_compat_mode(port, TCPCI_MSG_SOP, vdm); break; - case TBT_EXIT_SOP: case TBT_ACTIVE: /* + * Since we had successfully entered mode, consider ourselves + * done with any retires. + */ + TBT_SET_FLAG(port, TBT_FLAG_RETRY_DONE); + /* Fall through */ + case TBT_PREPARE_EXIT_MODE: + /* * Called to exit Thunderbolt alt mode, either when the mode is * active and the system is shutting down, or when an initial * request to enter the mode is NAK'ed. This can happen if EC * is restarted while Thunderbolt mode is active. */ + usb_mux_set_safe_mode_exit(port); + + tbt_state[port] = TBT_EXIT_SOP; + return MSG_SETUP_MUX_WAIT; + case TBT_EXIT_SOP: + /* DPM will only call this after safe state set is done */ modep = pd_get_amode_data(port, TCPCI_MSG_SOP, USB_VID_INTEL); if (!(modep && modep->opos)) - return -1; - - usb_mux_set_safe_mode_exit(port); + return MSG_SETUP_ERROR; vdm[0] = VDO(USB_VID_INTEL, 1, CMD_EXIT_MODE) | VDO_OPOS(modep->opos) | @@ -538,9 +531,7 @@ int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, modep = pd_get_amode_data(port, TCPCI_MSG_SOP_PRIME, USB_VID_INTEL); if (!(modep && modep->opos)) - return -1; - - usb_mux_set_safe_mode_exit(port); + return MSG_SETUP_ERROR; vdm[0] = VDO(USB_VID_INTEL, 1, CMD_EXIT_MODE) | VDO_OPOS(modep->opos) | @@ -554,9 +545,7 @@ int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, modep = pd_get_amode_data(port, TCPCI_MSG_SOP_PRIME, USB_VID_INTEL); if (!(modep && modep->opos)) - return -1; - - usb_mux_set_safe_mode_exit(port); + return MSG_SETUP_ERROR; vdm[0] = VDO(USB_VID_INTEL, 1, CMD_EXIT_MODE) | VDO_OPOS(modep->opos) | @@ -568,12 +557,17 @@ int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, break; case TBT_INACTIVE: /* Thunderbolt mode is inactive */ - return 0; + return MSG_SETUP_UNSUPPORTED; default: CPRINTF("%s called with invalid state %d\n", __func__, tbt_state[port]); - return -1; + return MSG_SETUP_ERROR; + } + + if (vdo_count_ret) { + *vdo_count = vdo_count_ret; + return MSG_SETUP_SUCCESS; } - return vdo_count_ret; + return MSG_SETUP_UNSUPPORTED; } diff --git a/common/usbc/usb_mode.c b/common/usbc/usb_mode.c index b9dc4973bc..7a79ec7a7b 100644 --- a/common/usbc/usb_mode.c +++ b/common/usbc/usb_mode.c @@ -21,6 +21,7 @@ #include "usb_pd_dpm.h" #include "usb_pd_tcpm.h" #include "usb_pe_sm.h" +#include "usb_tbt_alt_mode.h" #include "usbc_ppc.h" #ifdef CONFIG_COMMON_RUNTIME @@ -122,7 +123,9 @@ void usb4_exit_mode_request(int port) { usb4_state[port] = USB4_START; usb_mux_set_safe_mode_exit(port); - set_usb_mux_with_current_data_role(port); + /* If TBT mode is active, leave safe state for mode exit VDMs */ + if (!tbt_is_active(port)) + set_usb_mux_with_current_data_role(port); } void enter_usb_init(int port) diff --git a/common/usbc/usb_pd_dpm.c b/common/usbc/usb_pd_dpm.c index eb2dfc52c0..36cfdf0f75 100644 --- a/common/usbc/usb_pd_dpm.c +++ b/common/usbc/usb_pd_dpm.c @@ -18,9 +18,11 @@ #include "tcpm/tcpm.h" #include "usb_dp_alt_mode.h" #include "usb_mode.h" +#include "usb_mux.h" #include "usb_pd.h" #include "usb_pd_dpm.h" #include "usb_pd_tcpm.h" +#include "usb_pd_pdo.h" #include "usb_tbt_alt_mode.h" #ifdef CONFIG_COMMON_RUNTIME @@ -234,6 +236,7 @@ static void dpm_attempt_mode_entry(int port) enum tcpci_msg_type tx_type = TCPCI_MSG_SOP; bool enter_mode_requested = IS_ENABLED(CONFIG_USB_PD_REQUIRE_AP_MODE_ENTRY) ? false : true; + enum dpm_msg_setup_status status = MSG_SETUP_UNSUPPORTED; if (pd_get_data_role(port) != PD_ROLE_DFP) { if (DPM_CHK_FLAG(port, DPM_FLAG_ENTER_DP | @@ -276,6 +279,14 @@ static void dpm_attempt_mode_entry(int port) return; } + /* + * If muxes are still settling, then wait on our next VDM. We must + * ensure we correctly sequence actions such as USB safe state with TBT + * entry or DP configuration. + */ + if (IS_ENABLED(CONFIG_USBC_SS_MUX) && !usb_mux_set_completed(port)) + return; + /* Check if port, port partner and cable support USB4. */ if (IS_ENABLED(CONFIG_USB_PD_USB4) && board_is_tbt_usb4_port(port) && @@ -287,8 +298,9 @@ static void dpm_attempt_mode_entry(int port) * cable and USB4 mode with the port partner. */ if (tbt_cable_entry_required_for_usb4(port)) { - vdo_count = tbt_setup_next_vdm(port, - ARRAY_SIZE(vdm), vdm, &tx_type); + vdo_count = ARRAY_SIZE(vdm); + status = tbt_setup_next_vdm(port, &vdo_count, vdm, + &tx_type); } else { pd_dpm_request(port, DPM_REQUEST_ENTER_USB); return; @@ -302,24 +314,32 @@ static void dpm_attempt_mode_entry(int port) USB_VID_INTEL) && dpm_mode_entry_requested(port, TYPEC_MODE_TBT)) { enter_mode_requested = true; - vdo_count = tbt_setup_next_vdm(port, - ARRAY_SIZE(vdm), vdm, &tx_type); + vdo_count = ARRAY_SIZE(vdm); + status = tbt_setup_next_vdm(port, &vdo_count, vdm, + &tx_type); } /* If not, check if they support DisplayPort alt mode. */ - if (vdo_count == 0 && !DPM_CHK_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE) && + if (status == MSG_SETUP_UNSUPPORTED && + !DPM_CHK_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE) && pd_is_mode_discovered_for_svid(port, TCPCI_MSG_SOP, - USB_SID_DISPLAYPORT) && + USB_SID_DISPLAYPORT) && dpm_mode_entry_requested(port, TYPEC_MODE_DP)) { enter_mode_requested = true; - vdo_count = dp_setup_next_vdm(port, ARRAY_SIZE(vdm), vdm); + vdo_count = ARRAY_SIZE(vdm); + status = dp_setup_next_vdm(port, &vdo_count, vdm); } + /* Not ready to send a VDM, check again next cycle */ + if (status == MSG_SETUP_MUX_WAIT) + return; + /* * If the PE didn't discover any supported (requested) alternate mode, * just mark setup done and get out of here. */ - if (vdo_count == 0 && !DPM_CHK_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE)) { + if (status != MSG_SETUP_SUCCESS && + !DPM_CHK_FLAG(port, DPM_FLAG_MODE_ENTRY_DONE)) { if (enter_mode_requested) { /* * TODO(b/168030639): Notify the AP that mode entry @@ -335,7 +355,7 @@ static void dpm_attempt_mode_entry(int port) return; } - if (vdo_count < 0) { + if (status != MSG_SETUP_SUCCESS) { dpm_set_mode_entry_done(port); CPRINTS("C%d: Couldn't construct alt mode VDM", port); return; @@ -355,8 +375,9 @@ static void dpm_attempt_mode_entry(int port) static void dpm_attempt_mode_exit(int port) { - uint32_t vdm = 0; - int vdo_count = 0; + uint32_t vdm[VDO_MAX_SIZE]; + int vdo_count = ARRAY_SIZE(vdm); + enum dpm_msg_setup_status status = MSG_SETUP_ERROR; enum tcpci_msg_type tx_type = TCPCI_MSG_SOP; if (IS_ENABLED(CONFIG_USB_PD_USB4) && @@ -364,6 +385,15 @@ static void dpm_attempt_mode_exit(int port) CPRINTS("C%d: USB4 teardown", port); usb4_exit_mode_request(port); } + + /* + * If muxes are still settling, then wait on our next VDM. We must + * ensure we correctly sequence actions such as USB safe state with TBT + * or DP mode exit. + */ + if (IS_ENABLED(CONFIG_USBC_SS_MUX) && !usb_mux_set_completed(port)) + return; + if (IS_ENABLED(CONFIG_USB_PD_TBT_COMPAT_MODE) && tbt_is_active(port)) { /* @@ -373,18 +403,21 @@ static void dpm_attempt_mode_exit(int port) */ CPRINTS("C%d: TBT teardown", port); tbt_exit_mode_request(port); - vdo_count = tbt_setup_next_vdm(port, VDO_MAX_SIZE, &vdm, - &tx_type); + status = tbt_setup_next_vdm(port, &vdo_count, vdm, &tx_type); } else if (dp_is_active(port)) { CPRINTS("C%d: DP teardown", port); - vdo_count = dp_setup_next_vdm(port, VDO_MAX_SIZE, &vdm); + status = dp_setup_next_vdm(port, &vdo_count, vdm); } else { /* Clear exit mode request */ dpm_clear_mode_exit_request(port); return; } - if (!pd_setup_vdm_request(port, tx_type, &vdm, vdo_count)) { + /* This covers error, wait mux, and unsupported cases */ + if (status != MSG_SETUP_SUCCESS) + return; + + if (!pd_setup_vdm_request(port, tx_type, vdm, vdo_count)) { dpm_clear_mode_exit_request(port); return; } @@ -467,7 +500,7 @@ static void balance_source_ports(void) uint32_t removed_ports, new_ports; static bool deferred_waiting; - if (task_get_current() == TASK_ID_HOOKS) + if (in_deferred_context()) deferred_waiting = false; /* diff --git a/common/usbc/usb_pd_timer.c b/common/usbc/usb_pd_timer.c index 67a574904f..97aa699737 100644 --- a/common/usbc/usb_pd_timer.c +++ b/common/usbc/usb_pd_timer.c @@ -4,32 +4,54 @@ */ #include "assert.h" +#include "atomic.h" #include "common.h" #include "console.h" #include "limits.h" +#include "math_util.h" #include "system.h" #include "usb_pd_timer.h" #include "usb_tc_sm.h" #define MAX_PD_PORTS CONFIG_USB_PD_PORT_MAX_COUNT #define MAX_PD_TIMERS PD_TIMER_COUNT -#define PD_TIMERS_ALL_MASK ((uint32_t)(((uint64_t)1 << PD_TIMER_COUNT) - 1)) +#define PD_TIMERS_ALL_MASK (UINT64_MAX >> (64 - PD_TIMER_COUNT)) #define MAX_EXPIRE (0x7FFFFFFF) #define NO_TIMEOUT (-1) #define EXPIRE_NOW (0) -#define PD_SET_ACTIVE(p, m) atomic_or(&timer_active[p], (m)) -#define PD_CLR_ACTIVE(p, m) atomic_clear_bits(&timer_active[p], (m)) -#define PD_CHK_ACTIVE(p, m) (timer_active[p] & (m)) - -#define PD_SET_DISABLED(p, m) atomic_or(&timer_disabled[p], (m)) -#define PD_CLR_DISABLED(p, m) atomic_clear_bits(&timer_disabled[p], (m)) -#define PD_CHK_DISABLED(p, m) (timer_disabled[p] & (m)) - -static uint32_t timer_active[MAX_PD_PORTS]; -static uint32_t timer_disabled[MAX_PD_PORTS]; +#define PD_SET_ACTIVE(p, m) pd_timer_atomic_op( \ + atomic_or, \ + timer_active[p], \ + (m)) +#define PD_CLR_ACTIVE(p, m) pd_timer_atomic_op( \ + atomic_clear_bits, \ + timer_active[p], \ + (m)) +#define PD_CHK_ACTIVE(p, m) ((timer_active[p][0] & ((m) >> 32)) | \ + (timer_active[p][1] & (m))) + +#define PD_SET_DISABLED(p, m) pd_timer_atomic_op( \ + atomic_or, \ + timer_disabled[p], \ + (m)) +#define PD_CLR_DISABLED(p, m) pd_timer_atomic_op( \ + atomic_clear_bits, \ + timer_disabled[p], \ + (m)) +#define PD_CHK_DISABLED(p, m) ((timer_disabled[p][0] & ((m) >> 32)) | \ + (timer_disabled[p][1] & (m))) + +#define TIMER_FIELD_NUM_UINT32S 2 + +test_mockable_static +uint32_t timer_active[MAX_PD_PORTS][TIMER_FIELD_NUM_UINT32S]; +test_mockable_static +uint32_t timer_disabled[MAX_PD_PORTS][TIMER_FIELD_NUM_UINT32S]; static uint64_t timer_expires[MAX_PD_PORTS][MAX_PD_TIMERS]; +BUILD_ASSERT(sizeof(timer_active[0]) * CHAR_BIT >= PD_TIMER_COUNT); +BUILD_ASSERT(sizeof(timer_disabled[0]) * CHAR_BIT >= PD_TIMER_COUNT); /* * CONFIG_CMD_PD_TIMER debug variables @@ -82,9 +104,52 @@ __maybe_unused static __const_data const char * const pd_timer_names[] = { * already and will always return that it is still expired. This timer state * will not adjust the task scheduling timeout value. */ + +/* + * Performs an atomic operation on a PD timer bit field. Atomic operations + * require 32-bit operands, but there are more than 32 timers, so choose the + * correct operand and modify the mask accordingly. + * + * @param op Atomic operation function to call + * @param timer_field Array of timer fields to operate on + * @param mask_val 64-bit mask to apply to the timer field + */ +test_mockable_static void pd_timer_atomic_op( + atomic_val_t (*op)(atomic_t*, atomic_val_t), + uint32_t *const timer_field, const uint64_t mask_val) +{ + uint32_t *atomic_timer_field; + union mask64_t { + struct { +#if (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) + uint32_t lo; + uint32_t hi; +#elif (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) + uint32_t hi; + uint32_t lo; +#endif + }; + uint64_t val; + } mask; + + /* + * High-order mask bits correspond to field [0]. Low-order mask bits + * correspond to field [1]. + */ + mask.val = mask_val; + if (mask.hi) { + atomic_timer_field = timer_field; + (void)op(atomic_timer_field, mask.hi); + } + if (mask.lo) { + atomic_timer_field = timer_field + 1; + (void)op(atomic_timer_field, mask.lo); + } +} + static void pd_timer_inactive(int port, enum pd_task_timer timer) { - uint32_t mask = 1 << timer; + uint64_t mask = bitmask_uint64(timer); if (PD_CHK_ACTIVE(port, mask)) { PD_CLR_ACTIVE(port, mask); @@ -97,14 +162,14 @@ static void pd_timer_inactive(int port, enum pd_task_timer timer) static bool pd_timer_is_active(int port, enum pd_task_timer timer) { - uint32_t mask = 1 << timer; + uint64_t mask = bitmask_uint64(timer); return PD_CHK_ACTIVE(port, mask); } static bool pd_timer_is_inactive(int port, enum pd_task_timer timer) { - uint32_t mask = 1 << timer; + uint64_t mask = bitmask_uint64(timer); return !PD_CHK_ACTIVE(port, mask) && !PD_CHK_DISABLED(port, mask); } @@ -123,7 +188,7 @@ void pd_timer_init(int port) void pd_timer_enable(int port, enum pd_task_timer timer, uint32_t expires_us) { - uint32_t mask = 1 << timer; + uint64_t mask = bitmask_uint64(timer); if (!PD_CHK_ACTIVE(port, mask)) { PD_SET_ACTIVE(port, mask); @@ -140,7 +205,7 @@ void pd_timer_enable(int port, enum pd_task_timer timer, uint32_t expires_us) void pd_timer_disable(int port, enum pd_task_timer timer) { - uint32_t mask = 1 << timer; + uint64_t mask = bitmask_uint64(timer); if (PD_CHK_ACTIVE(port, mask)) { PD_CLR_ACTIVE(port, mask); @@ -179,7 +244,7 @@ void pd_timer_disable_range(int port, enum pd_timer_range range) bool pd_timer_is_disabled(int port, enum pd_task_timer timer) { - uint32_t mask = 1 << timer; + uint64_t mask = bitmask_uint64(timer); return PD_CHK_DISABLED(port, mask); } diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c index c86819d0f7..431dcdc9af 100644 --- a/common/usbc/usb_pe_drp_sm.c +++ b/common/usbc/usb_pe_drp_sm.c @@ -1373,9 +1373,8 @@ static void pe_clear_port_data(int port) pd_set_src_caps(port, 0, NULL); pe_set_snk_caps(port, 0, NULL); - /* Clear any stored modes and discovery data */ + /* Clear any stored discovery data, but leave modes for alt mode exit */ pd_dfp_discovery_init(port); - pd_dfp_mode_init(port); dpm_remove_sink(port); dpm_remove_source(port); diff --git a/common/usbc/usb_tc_drp_acc_trysrc_sm.c b/common/usbc/usb_tc_drp_acc_trysrc_sm.c index 182ea686ec..3fa9528699 100644 --- a/common/usbc/usb_tc_drp_acc_trysrc_sm.c +++ b/common/usbc/usb_tc_drp_acc_trysrc_sm.c @@ -700,9 +700,11 @@ __maybe_unused static void tc_enable_try_src(int en) } /* - * Exit all modes due to a detach event + * Exit all modes due to a detach event or hard reset + * * Note: this skips the ExitMode VDM steps in the PE because it is assumed the - * partner is not present to receive them, and the PE will no longer be running. + * partner is not present to receive them, and the PE will no longer be running, + * or we've forced an abrupt mode exit through a hard reset. */ static void tc_set_modes_exit(int port) { @@ -1304,6 +1306,13 @@ static bool tc_perform_src_hard_reset(int port) /* Set role to DFP */ tc_set_data_role(port, PD_ROLE_DFP); + /* + * USB PD Rev 3.0 Ver 2.0 6.8.3.2: "A Hard Reset Shall cause + * all Active Modes to be exited by both Port Partners and any + * Cable Plugs" + */ + tc_set_modes_exit(port); + tc[port].ps_reset_state = PS_STATE1; pd_timer_enable(port, TC_TIMER_TIMEOUT, PD_T_SRC_RECOVER); return false; @@ -1349,6 +1358,13 @@ static bool tc_perform_snk_hard_reset(int port) tc_set_data_role(port, PD_ROLE_UFP); /* + * USB PD Rev 3.0 Ver 2.0 6.8.3.2: "A Hard Reset Shall cause + * all Active Modes to be exited by both Port Partners and any + * Cable Plugs" + */ + tc_set_modes_exit(port); + + /* * When VCONN is supported, the Hard Reset Shall cause * the Port with the Rd resistor asserted to turn off * VCONN. @@ -1574,9 +1590,9 @@ void tc_state_init(int port) } /* - * If this is non-EFS2 device, battery is not present and EC RO doesn't - * keep power-on reset flag after reset caused by H1, then don't apply - * CC open because it will cause brown out. + * If this is non-EFS2 device, battery is not present or at some minimum + * voltage and EC RO doesn't keep power-on reset flag after reset caused + * by H1, then don't apply CC open because it will cause brown out. * * Please note that we are checking if CONFIG_BOARD_RESET_AFTER_POWER_ON * is defined now, but actually we need to know if it was enabled in @@ -1585,7 +1601,7 @@ void tc_state_init(int port) */ if (!IS_ENABLED(CONFIG_BOARD_RESET_AFTER_POWER_ON) && !IS_ENABLED(CONFIG_VBOOT_EFS2) && IS_ENABLED(CONFIG_BATTERY) && - (battery_is_present() == BP_NO)) { + !pd_is_battery_capable()) { first_state = TC_UNATTACHED_SNK; } @@ -1745,8 +1761,14 @@ void tc_event_check(int port, int evt) } } - if (evt & PD_EVENT_UPDATE_DUAL_ROLE) + if (evt & PD_EVENT_UPDATE_DUAL_ROLE) { + /* If TCPC is idle, start the wake process */ + if (IS_ENABLED(CONFIG_USB_PD_TCPC_LOW_POWER) && + get_state_tc(port) == TC_LOW_POWER_MODE) + tcpm_wake_low_power_mode(port); + pd_update_dual_role_config(port); + } } /* @@ -1893,11 +1915,14 @@ __maybe_unused static void handle_new_power_state(int port) /* * If the sink port was sourcing Vconn, and can no longer, request a - * hard reset on this port to restore Vconn to the source. + * hard reset on this port to restore Vconn to the source. If we do not + * have sufficient battery to withstand Vbus loss, then continue with + * the inconsistent Vconn state in order to keep the board powered. */ if (IS_ENABLED(CONFIG_USB_PE_SM)) { if (tc_is_vconn_src(port) && tc_is_attached_snk(port) && - !pd_check_vconn_swap(port)) + !pd_check_vconn_swap(port) && + pd_is_battery_capable()) pd_dpm_request(port, DPM_REQUEST_HARD_RESET_SEND); } diff --git a/common/virtual_battery.c b/common/virtual_battery.c index 7c40ffb492..99dab0540e 100644 --- a/common/virtual_battery.c +++ b/common/virtual_battery.c @@ -171,6 +171,15 @@ void copy_memmap_string(uint8_t *dest, int offset, int len) memcpy(dest + 1, memmap_str, MIN(memmap_strlen, len - 1)); } +static void copy_battery_info_string(uint8_t *dst, const uint8_t *src, int len) +{ + if (len == 0) + return; + + dst[0] = strlen(src); + strncpy(dst + 1, src, len - 1); +} + int virtual_battery_operation(const uint8_t *batt_cmd_head, uint8_t *dest, int read_len, @@ -192,6 +201,14 @@ int virtual_battery_operation(const uint8_t *batt_cmd_head, * are two bytes. */ int bounded_read_len = MIN(read_len, 2); + const struct battery_static_info *bs; + + if (IS_ENABLED(CONFIG_BATTERY_V2)) + /* + * TODO: To support multiple batteries, we need to translate + * i2c address to a battery index. + */ + bs = &battery_static[BATT_IDX_MAIN]; curr_batt = charger_current_battery_params(); switch (*batt_cmd_head) { @@ -296,13 +313,24 @@ int virtual_battery_operation(const uint8_t *batt_cmd_head, memcpy(dest, &val, bounded_read_len); break; case SB_MANUFACTURER_NAME: - copy_memmap_string(dest, EC_MEMMAP_BATT_MFGR, read_len); + if (IS_ENABLED(CONFIG_BATTERY_V2)) + copy_battery_info_string(dest, bs->manufacturer_ext, + read_len); + else + copy_memmap_string(dest, EC_MEMMAP_BATT_MFGR, read_len); break; case SB_DEVICE_NAME: - copy_memmap_string(dest, EC_MEMMAP_BATT_MODEL, read_len); + if (IS_ENABLED(CONFIG_BATTERY_V2)) + copy_battery_info_string(dest, bs->model_ext, read_len); + else + copy_memmap_string(dest, EC_MEMMAP_BATT_MODEL, + read_len); break; case SB_DEVICE_CHEMISTRY: - copy_memmap_string(dest, EC_MEMMAP_BATT_TYPE, read_len); + if (IS_ENABLED(CONFIG_BATTERY_V2)) + copy_battery_info_string(dest, bs->type_ext, read_len); + else + copy_memmap_string(dest, EC_MEMMAP_BATT_TYPE, read_len); break; case SB_AVERAGE_TIME_TO_FULL: /* This may cause an i2c transaction */ diff --git a/core/cortex-m/build.mk b/core/cortex-m/build.mk index ad7ab6eacc..23a197af88 100644 --- a/core/cortex-m/build.mk +++ b/core/cortex-m/build.mk @@ -15,7 +15,15 @@ $(call set-option,CROSS_COMPILE,\ CFLAGS_FPU-$(CONFIG_FPU)=-mfpu=fpv4-sp-d16 -mfloat-abi=hard # CPU specific compilation flags -CFLAGS_CPU+=-mthumb -Os -mno-sched-prolog +CFLAGS_CPU+=-mthumb +ifeq ($(cc-name),clang) +CFLAGS_CPU+=-Oz # Like -Os (and thus -O2), but reduces code size further. +# Link compiler-rt when using clang, so clang finds the builtins it provides. +LDFLAGS_EXTRA+=-lclang_rt.builtins-arm +else +CFLAGS_CPU+=-Os +CFLAGS_CPU+=-mno-sched-prolog +endif CFLAGS_CPU+=-mno-unaligned-access CFLAGS_CPU+=$(CFLAGS_FPU-y) @@ -24,7 +32,11 @@ CFLAGS_CPU+=-flto LDFLAGS_EXTRA+=-flto endif -core-y=cpu.o debug.o init.o ldivmod.o llsr.o uldivmod.o vecttable.o +core-y=cpu.o debug.o init.o vecttable.o +# When using clang, we get these as builtins from compiler-rt. +ifneq ($(cc-name),clang) +core-y+=ldivmod.o llsr.o uldivmod.o +endif core-$(CONFIG_AES)+=aes.o core-$(CONFIG_AES_GCM)+=ghash.o core-$(CONFIG_ARMV7M_CACHE)+=cache.o diff --git a/core/cortex-m/cpu.h b/core/cortex-m/cpu.h index 0b03302bfc..dbad99650c 100644 --- a/core/cortex-m/cpu.h +++ b/core/cortex-m/cpu.h @@ -70,6 +70,26 @@ enum { #define CPU_SCB_DCISW CPUREG(0xe000ef60) #define CPU_SCB_DCCISW CPUREG(0xe000ef74) +/* Bitfield values for EXC_RETURN. */ +#define EXC_RETURN_ES_MASK BIT(0) +#define EXC_RETURN_ES_NON_SECURE 0 +#define EXC_RETURN_ES_SECURE BIT(0) +#define EXC_RETURN_SPSEL_MASK BIT(2) +#define EXC_RETURN_SPSEL_MSP 0 +#define EXC_RETURN_SPSEL_PSP BIT(2) +#define EXC_RETURN_MODE_MASK BIT(3) +#define EXC_RETURN_MODE_HANDLER 0 +#define EXC_RETURN_MODE_THREAD BIT(3) +#define EXC_RETURN_FTYPE_MASK BIT(4) +#define EXC_RETURN_FTYPE_ON 0 +#define EXC_RETURN_FTYPE_OFF BIT(4) +#define EXC_RETURN_DCRS_MASK BIT(5) +#define EXC_RETURN_DCRS_OFF 0 +#define EXC_RETURN_DCRS_ON BIT(5) +#define EXC_RETURN_S_MASK BIT(6) +#define EXC_RETURN_S_NON_SECURE 0 +#define EXC_RETURN_S_SECURE BIT(6) + /* Set up the cpu to detect faults */ void cpu_init(void); /* Enable the CPU I-cache and D-cache if they are not already enabled */ diff --git a/core/cortex-m/ec.lds.S b/core/cortex-m/ec.lds.S index dd3811bb78..f85b262c18 100644 --- a/core/cortex-m/ec.lds.S +++ b/core/cortex-m/ec.lds.S @@ -396,7 +396,7 @@ SECTIONS *(.bss.Tpm2_common) __bss_libtpm2_end = .; - *(.bss) + *(.bss*) /* * Reserve space for deferred function firing times. diff --git a/core/cortex-m/irq_handler.h b/core/cortex-m/irq_handler.h index ae5d95cd94..9a69f8feeb 100644 --- a/core/cortex-m/irq_handler.h +++ b/core/cortex-m/irq_handler.h @@ -27,7 +27,7 @@ typedef struct { \ int fake[irq >= CONFIG_IRQ_COUNT ? -1 : 1]; \ } irq_num_check_##irq; \ - void __keep routine(void); \ + static void __attribute__((used)) routine(void); \ void IRQ_HANDLER(irq)(void) \ { \ asm volatile("mov r0, lr\n" \ diff --git a/core/cortex-m/panic.c b/core/cortex-m/panic.c index fd80061b95..d8e82a4e5d 100644 --- a/core/cortex-m/panic.c +++ b/core/cortex-m/panic.c @@ -363,7 +363,6 @@ void exception_panic(void) { /* Save registers and branch directly to panic handler */ asm volatile( - "mov r0, %[pregs]\n" "mrs r1, psp\n" "mrs r2, ipsr\n" "mov r3, sp\n" @@ -394,7 +393,7 @@ void exception_panic(void) "mov r10, #0\n" "mov r11, #0\n" #endif - "stmia r0, {r1-r11, lr}\n" + "stmia %[pregs], {r1-r11, lr}\n" "mov sp, %[pstack]\n" "bl report_panic\n" : : [pregs] "r" (pdata_ptr->cm.regs), diff --git a/core/cortex-m/task.c b/core/cortex-m/task.c index b86750bd67..7d781f3661 100644 --- a/core/cortex-m/task.c +++ b/core/cortex-m/task.c @@ -79,7 +79,7 @@ void __idle(void) * CSAE bit is set. Please notice this symptom only * occurs at npcx5. */ -#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(CHIP_FAMILY_NPCX5) && defined(CONFIG_HOST_INTERFACE_ESPI) /* Enable Host access wakeup */ SET_BIT(NPCX_WKEN(MIWU_TABLE_0, MIWU_GROUP_5), 6); #endif @@ -227,7 +227,7 @@ void interrupt_enable(void) asm("cpsie i"); } -inline int is_interrupt_enabled(void) +inline bool is_interrupt_enabled(void) { int primask; @@ -237,7 +237,7 @@ inline int is_interrupt_enabled(void) return !(primask & 0x1); } -inline int in_interrupt_context(void) +inline bool in_interrupt_context(void) { int ret; asm("mrs %0, ipsr \n" /* read exception number */ @@ -389,7 +389,9 @@ void __keep task_start_irq_handler(void *excep_return) * and we are not called from another exception (this must match the * logic for when we chain to svc_handler() below). */ - if (!need_resched_or_profiling || (((uint32_t)excep_return & 0xf) == 1)) + if (!need_resched_or_profiling + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; exc_start_time = t; @@ -402,7 +404,9 @@ void __keep task_resched_if_needed(void *excep_return) * Continue iff a rescheduling event happened or profiling is active, * and we are not called from another exception. */ - if (!need_resched_or_profiling || (((uint32_t)excep_return & 0xf) == 1)) + if (!need_resched_or_profiling + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; svc_handler(0, 0); diff --git a/core/cortex-m0/atomic.h b/core/cortex-m0/atomic.h index 0c58e71e41..1774d90332 100644 --- a/core/cortex-m0/atomic.h +++ b/core/cortex-m0/atomic.h @@ -22,7 +22,8 @@ typedef atomic_t atomic_val_t; ({ \ uint32_t reg0, reg1; \ \ - __asm__ __volatile__(" cpsid i\n" \ + __asm__ __volatile__(".syntax unified\n" \ + " cpsid i\n" \ " ldr %0, [%2]\n" \ " mov %1, %0\n" \ #asm_op" %0, %0, %3\n" \ @@ -36,12 +37,12 @@ typedef atomic_t atomic_val_t; static inline atomic_val_t atomic_clear_bits(atomic_t *addr, atomic_val_t bits) { - return ATOMIC_OP(bic, addr, bits); + return ATOMIC_OP(bics, addr, bits); } static inline atomic_val_t atomic_or(atomic_t *addr, atomic_val_t bits) { - return ATOMIC_OP(orr, addr, bits); + return ATOMIC_OP(orrs, addr, bits); } static inline atomic_val_t atomic_add(atomic_t *addr, atomic_val_t value) @@ -51,14 +52,14 @@ static inline atomic_val_t atomic_add(atomic_t *addr, atomic_val_t value) static inline atomic_val_t atomic_sub(atomic_t *addr, atomic_val_t value) { - return ATOMIC_OP(sub, addr, value); + return ATOMIC_OP(subs, addr, value); } static inline atomic_val_t atomic_clear(atomic_t *addr) { atomic_t ret; - __asm__ __volatile__(" mov %2, #0\n" + __asm__ __volatile__(" movs %2, #0\n" " cpsid i\n" " ldr %0, [%1]\n" " str %2, [%1]\n" diff --git a/core/cortex-m0/build.mk b/core/cortex-m0/build.mk index b0136f347e..8d2002bad5 100644 --- a/core/cortex-m0/build.mk +++ b/core/cortex-m0/build.mk @@ -12,7 +12,15 @@ $(call set-option,CROSS_COMPILE,\ /opt/coreboot-sdk/bin/arm-eabi-) # CPU specific compilation flags -CFLAGS_CPU+=-mthumb -Os -mno-sched-prolog +CFLAGS_CPU+=-mthumb +ifeq ($(cc-name),clang) +CFLAGS_CPU+=-Oz # Like -Os (and thus -O2), but reduces code size further. +# Link compiler-rt when using clang, so clang finds the builtins it provides. +LDFLAGS_EXTRA+=-lclang_rt.builtins-arm +else +CFLAGS_CPU+=-Os +CFLAGS_CPU+=-mno-sched-prolog +endif CFLAGS_CPU+=-mno-unaligned-access ifneq ($(CONFIG_LTO),) @@ -20,8 +28,17 @@ CFLAGS_CPU+=-flto LDFLAGS_EXTRA+=-flto endif -core-y=cpu.o debug.o init.o thumb_case.o div.o lmul.o ldivmod.o mula.o uldivmod.o -core-y+=vecttable.o __builtin.o +core-y=cpu.o debug.o init.o thumb_case.o mula.o +# When using clang, we get these as builtins from compiler-rt. +ifneq ($(cc-name),clang) +core-y+=div.o lmul.o ldivmod.o uldivmod.o +endif + +core-y+=vecttable.o +# When using clang, we get these as builtins from compiler-rt. +ifneq ($(cc-name),clang) +core-y+=__builtin.o +endif core-$(CONFIG_COMMON_PANIC_OUTPUT)+=panic.o core-$(CONFIG_COMMON_RUNTIME)+=switch.o task.o diff --git a/core/cortex-m0/config_core.h b/core/cortex-m0/config_core.h index c31adc471c..a40756fb49 100644 --- a/core/cortex-m0/config_core.h +++ b/core/cortex-m0/config_core.h @@ -10,9 +10,14 @@ #define BFD_ARCH arm #define BFD_FORMAT "elf32-littlearm" -/* Emulate the CLZ/CTZ instructions since the CPU core is lacking support */ +/* + * Emulate the CLZ/CTZ instructions since the CPU core is lacking support. + * When building with clang, we rely on compiler_rt to provide this support. + */ +#ifndef __clang__ #define CONFIG_SOFTWARE_CLZ #define CONFIG_SOFTWARE_CTZ +#endif /* __clang__ */ #define CONFIG_SOFTWARE_PANIC #define CONFIG_ASSEMBLY_MULA32 diff --git a/core/cortex-m0/cpu.h b/core/cortex-m0/cpu.h index ac184090f9..c30095fd65 100644 --- a/core/cortex-m0/cpu.h +++ b/core/cortex-m0/cpu.h @@ -38,6 +38,14 @@ #define CPU_NVIC_CCR_UNALIGN_TRAP BIT(3) +/* Bitfield values for EXC_RETURN. */ +#define EXC_RETURN_SPSEL_MASK BIT(2) +#define EXC_RETURN_SPSEL_MSP 0 +#define EXC_RETURN_SPSEL_PSP BIT(2) +#define EXC_RETURN_MODE_MASK BIT(3) +#define EXC_RETURN_MODE_HANDLER 0 +#define EXC_RETURN_MODE_THREAD BIT(3) + /* Set up the cpu to detect faults */ void cpu_init(void); diff --git a/core/cortex-m0/ec.lds.S b/core/cortex-m0/ec.lds.S index a04b92f5ff..ce67760cf2 100644 --- a/core/cortex-m0/ec.lds.S +++ b/core/cortex-m0/ec.lds.S @@ -263,7 +263,7 @@ SECTIONS . = ALIGN(8); *(.bss.system_stack) /* Rest of .bss takes care of its own alignment */ - *(.bss) + *(.bss*) /* * Reserve space for deferred function firing times. @@ -284,7 +284,7 @@ SECTIONS . = ALIGN(4); __data_start = .; *(.data.tasks) - *(.data) + *(.data*) . = ALIGN(4); *(.iram.text) . = ALIGN(4); diff --git a/core/cortex-m0/irq_handler.h b/core/cortex-m0/irq_handler.h index de36ef7623..e528717420 100644 --- a/core/cortex-m0/irq_handler.h +++ b/core/cortex-m0/irq_handler.h @@ -21,7 +21,7 @@ #define DECLARE_IRQ(irq, routine, priority) DECLARE_IRQ_(irq, routine, priority) #ifdef CONFIG_TASK_PROFILING #define DECLARE_IRQ_(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(irq)(void) \ { \ void *ret = __builtin_return_address(0); \ @@ -35,7 +35,7 @@ #else /* CONFIG_TASK_PROFILING */ /* No Profiling : connect directly the IRQ vector */ #define DECLARE_IRQ_(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(irq)(void) __attribute__((alias(STRINGIFY(routine))));\ const struct irq_priority __keep IRQ_PRIORITY(irq) \ __attribute__((section(".rodata.irqprio"))) \ diff --git a/core/cortex-m0/panic.c b/core/cortex-m0/panic.c index b0fa1f4e1d..34519c73d4 100644 --- a/core/cortex-m0/panic.c +++ b/core/cortex-m0/panic.c @@ -146,17 +146,16 @@ void exception_panic(void) { /* Save registers and branch directly to panic handler */ asm volatile( - "mov r0, %[pregs]\n" "mrs r1, psp\n" "mrs r2, ipsr\n" "mov r3, sp\n" - "stmia r0!, {r1-r7}\n" + "stmia %[pregs]!, {r1-r7}\n" "mov r1, r8\n" "mov r2, r9\n" "mov r3, r10\n" "mov r4, r11\n" "mov r5, lr\n" - "stmia r0!, {r1-r5}\n" + "stmia %[pregs]!, {r1-r5}\n" "mov sp, %[pstack]\n" "bl report_panic\n" : : [pregs] "r" (pdata_ptr->cm.regs), diff --git a/core/cortex-m0/task.c b/core/cortex-m0/task.c index 2c1bf2a8c4..71f05c442e 100644 --- a/core/cortex-m0/task.c +++ b/core/cortex-m0/task.c @@ -161,7 +161,7 @@ void interrupt_enable(void) asm("cpsie i"); } -inline int is_interrupt_enabled(void) +inline bool is_interrupt_enabled(void) { int primask; @@ -171,12 +171,12 @@ inline int is_interrupt_enabled(void) return !(primask & 0x1); } -inline int in_interrupt_context(void) +inline bool in_interrupt_context(void) { int ret; - asm("mrs %0, ipsr\n" /* read exception number */ - "lsl %0, #23\n" : "=r"(ret)); /* exception bits are the 9 LSB */ - return ret; + asm("mrs %0, ipsr\n" /* read exception number */ + : "=r"(ret)); + return ret & GENMASK(8, 0); /* exception bits are the 9 LSB */ } #ifdef CONFIG_TASK_PROFILING @@ -304,7 +304,9 @@ void task_start_irq_handler(void *excep_return) * Continue iff the tasks are ready and we are not called from another * exception (as the time accouting is done in the outer irq). */ - if (!start_called || ((uint32_t)excep_return & 0xf) == 1) + if (!start_called + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; exc_start_time = t; @@ -322,7 +324,9 @@ void task_end_irq_handler(void *excep_return) * Continue iff the tasks are ready and we are not called from another * exception (as the time accouting is done in the outer irq). */ - if (!start_called || ((uint32_t)excep_return & 0xf) == 1) + if (!start_called + || (((uint32_t)excep_return & EXC_RETURN_MODE_MASK) + == EXC_RETURN_MODE_HANDLER)) return; /* Track time in interrupts */ diff --git a/core/cortex-m0/vecttable.c b/core/cortex-m0/vecttable.c index de667749ad..5c69f6d6c8 100644 --- a/core/cortex-m0/vecttable.c +++ b/core/cortex-m0/vecttable.c @@ -77,7 +77,11 @@ extern void reset(void); #pragma clang diagnostic ignored "-Winitializer-overrides" #endif /* __clang__ */ -#define table(x) func vectors[] __attribute__((section(".text.vecttable,\"a\" @"))) = { x[IRQ_UNUSED_OFFSET] = null }; +#define table(x) \ + const func vectors[] __attribute__((section(".text.vecttable"))) = { \ + x \ + [IRQ_UNUSED_OFFSET] = null \ + } #define vec(name) name ## _handler, #define irq(num) [num < CONFIG_IRQ_COUNT ? num + IRQ_OFFSET : IRQ_UNUSED_OFFSET] = vec(irq_ ## num) @@ -135,7 +139,7 @@ table( irq(29) irq(30) irq(31) -) +); #if PASS == 2 #ifdef __clang__ diff --git a/core/host/irq_handler.h b/core/host/irq_handler.h index f905f463c1..3947046f8c 100644 --- a/core/host/irq_handler.h +++ b/core/host/irq_handler.h @@ -16,7 +16,7 @@ * ensure it is enabled in the interrupt controller with the right priority. */ #define DECLARE_IRQ(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(irq)(void) \ { \ void *ret = __builtin_return_address(0); \ diff --git a/core/host/task.c b/core/host/task.c index 70ce3e006f..44d8082d82 100644 --- a/core/host/task.c +++ b/core/host/task.c @@ -47,7 +47,7 @@ static int task_started; static sem_t interrupt_sem; static pthread_mutex_t interrupt_lock; static pthread_t interrupt_thread; -static int in_interrupt; +static bool in_interrupt; static int interrupt_disabled; static void (*pending_isr)(void); static int generator_sleeping; @@ -119,9 +119,9 @@ void task_pre_init(void) /* Nothing */ } -int in_interrupt_context(void) +bool in_interrupt_context(void) { - return !!in_interrupt; + return in_interrupt; } test_mockable void interrupt_disable(void) @@ -138,17 +138,17 @@ test_mockable void interrupt_enable(void) pthread_mutex_unlock(&interrupt_lock); } -inline int is_interrupt_enabled(void) +inline bool is_interrupt_enabled(void) { return !interrupt_disabled; } static void _task_execute_isr(int sig) { - in_interrupt = 1; + in_interrupt = true; pending_isr(); sem_post(&interrupt_sem); - in_interrupt = 0; + in_interrupt = false; } void task_register_interrupt(void) diff --git a/core/minute-ia/build.mk b/core/minute-ia/build.mk index 099b9ea736..b51512c16e 100644 --- a/core/minute-ia/build.mk +++ b/core/minute-ia/build.mk @@ -14,11 +14,14 @@ $(call set-option,CROSS_COMPILE,$(CROSS_COMPILE_i386),\ CFLAGS_FPU-$(CONFIG_FPU)= # CPU specific compilation flags -CFLAGS_CPU+=-O2 -fomit-frame-pointer -mno-accumulate-outgoing-args \ +CFLAGS_CPU+=-O2 -fomit-frame-pointer \ -ffunction-sections -fdata-sections \ -fno-builtin-printf -fno-builtin-sprintf \ -fno-stack-protector -gdwarf-2 -fno-common -ffreestanding \ -minline-all-stringops -fno-strict-aliasing +ifneq ($(cc-name),clang) +CFLAGS_CPU+=-mno-accumulate-outgoing-args +endif CFLAGS_CPU+=$(CFLAGS_FPU-y) diff --git a/core/minute-ia/irq_handler.h b/core/minute-ia/irq_handler.h index eec0ffddb4..d0f00a39f3 100644 --- a/core/minute-ia/irq_handler.h +++ b/core/minute-ia/irq_handler.h @@ -31,7 +31,7 @@ asm (".include \"core/minute-ia/irq_handler_common.S\""); * to be used for dynamically setting up interrupt gates */ #define DECLARE_IRQ_(irq_, routine_, vector) \ - void __keep routine_(void); \ + static void __attribute__((used)) routine_(void); \ void IRQ_HANDLER(irq_)(void); \ __asm__ (".section .rodata.irqs\n"); \ const struct irq_def __keep CONCAT4(__irq_, irq_, _, routine_) \ diff --git a/core/minute-ia/task.c b/core/minute-ia/task.c index dc0d72fb23..cde3d80e12 100644 --- a/core/minute-ia/task.c +++ b/core/minute-ia/task.c @@ -173,7 +173,7 @@ void interrupt_enable(void) __asm__ __volatile__ ("sti"); } -inline int is_interrupt_enabled(void) +inline bool is_interrupt_enabled(void) { uint32_t eflags = 0; @@ -182,12 +182,12 @@ inline int is_interrupt_enabled(void) : "=r"(eflags)); /* Check Interrupt Enable flag */ - return !!(eflags & 0x200); + return eflags & 0x200; } -inline int in_interrupt_context(void) +inline bool in_interrupt_context(void) { - return !!__in_isr; + return __in_isr; } task_id_t task_get_current(void) diff --git a/core/nds32/init.S b/core/nds32/init.S index b8e109c434..159f3709d3 100644 --- a/core/nds32/init.S +++ b/core/nds32/init.S @@ -87,7 +87,7 @@ vector irq_15, 15 /* HW 15 */ .global eflash_sig eflash_sig: .byte 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5 -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI .byte 0xA4 /* eSPI */ #else .byte 0xA5 /* LPC */ diff --git a/core/nds32/irq_handler.h b/core/nds32/irq_handler.h index eb55d9e233..7f679fa57e 100644 --- a/core/nds32/irq_handler.h +++ b/core/nds32/irq_handler.h @@ -16,7 +16,7 @@ * ensure it is enabled in the interrupt controller with the right priority. */ #define DECLARE_IRQ(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(CPU_INT(irq))(void) \ __attribute__ ((alias(STRINGIFY(routine)))); \ const struct irq_priority __keep IRQ_PRIORITY(CPU_INT(irq)) \ diff --git a/core/nds32/task.c b/core/nds32/task.c index 5b4fe86876..3457af2bb5 100644 --- a/core/nds32/task.c +++ b/core/nds32/task.c @@ -224,17 +224,17 @@ void __ram_code interrupt_enable(void) asm volatile ("mtsr %0, $INT_MASK" : : "r"(val)); } -inline int is_interrupt_enabled(void) +inline bool is_interrupt_enabled(void) { uint32_t val = 0; asm volatile ("mfsr %0, $INT_MASK" : "=r"(val)); /* Interrupts are enabled if any of HW2 ~ HW15 is enabled */ - return !!(val & 0xFFFC); + return val & 0xFFFC; } -inline int in_interrupt_context(void) +inline bool in_interrupt_context(void) { /* check INTL (Interrupt Stack Level) bits */ return get_psw() & PSW_INTL_MASK; diff --git a/core/riscv-rv32i/init.S b/core/riscv-rv32i/init.S index 5715478356..8ee5479e0e 100644 --- a/core/riscv-rv32i/init.S +++ b/core/riscv-rv32i/init.S @@ -75,7 +75,7 @@ __ec_intc: .global eflash_sig eflash_sig: .byte 0xA5, 0xA5, 0xA5, 0xA5, 0xA5, 0xA5 -#ifdef CONFIG_HOSTCMD_ESPI +#ifdef CONFIG_HOST_INTERFACE_ESPI .byte 0xA4 /* eSPI */ #else .byte 0xA5 /* LPC */ diff --git a/core/riscv-rv32i/irq_handler.h b/core/riscv-rv32i/irq_handler.h index 6414f90c7f..b6f9a222ef 100644 --- a/core/riscv-rv32i/irq_handler.h +++ b/core/riscv-rv32i/irq_handler.h @@ -21,7 +21,7 @@ * ensure it is enabled in the interrupt controller with the right priority. */ #define DECLARE_IRQ(irq, routine, priority) \ - void routine(void); \ + static void routine(void); \ void IRQ_HANDLER(CPU_INT(irq))(void) \ __attribute__ ((alias(STRINGIFY(routine)))); \ const struct irq_priority __keep IRQ_PRIORITY(CPU_INT(irq)) \ diff --git a/core/riscv-rv32i/panic.c b/core/riscv-rv32i/panic.c index b339fdf76c..5860fba072 100644 --- a/core/riscv-rv32i/panic.c +++ b/core/riscv-rv32i/panic.c @@ -4,6 +4,7 @@ */ #include "cpu.h" +#include "console.h" #include "panic.h" #include "task.h" #include "util.h" @@ -167,3 +168,53 @@ void panic_data_print(const struct panic_data *pdata) mepc = pdata->riscv.mepc; print_panic_information(regs, mcause, mepc); } + +#ifdef CONFIG_PANIC_CONSOLE_OUTPUT +static void ccprint_panic_information(uint32_t *regs, uint32_t mcause, + uint32_t mepc) +{ + ccprintf("=== EXCEPTION: MCAUSE=%x ===\n", mcause); + ccprintf("S11 %08x S10 %08x S9 %08x S8 %08x\n", + regs[0], regs[1], regs[2], regs[3]); + ccprintf("S7 %08x S6 %08x S5 %08x S4 %08x\n", + regs[4], regs[5], regs[6], regs[7]); + ccprintf("S3 %08x S2 %08x S1 %08x S0 %08x\n", + regs[8], regs[9], regs[10], regs[11]); + ccprintf("T6 %08x T5 %08x T4 %08x T3 %08x\n", + regs[12], regs[13], regs[14], regs[15]); + ccprintf("T2 %08x T1 %08x T0 %08x A7 %08x\n", + regs[16], regs[17], regs[18], regs[19]); + cflush(); + + ccprintf("A6 %08x A5 %08x A4 %08x A3 %08x\n", + regs[20], regs[21], regs[22], regs[23]); + ccprintf("A2 %08x A1 %08x A0 %08x TP %08x\n", + regs[24], regs[25], regs[26], regs[27]); + ccprintf("GP %08x RA %08x SP %08x MEPC %08x\n", + regs[28], regs[29], regs[30], mepc); + +#ifdef CONFIG_DEBUG_EXCEPTIONS + if ((regs[SOFT_PANIC_GPR_REASON] & 0xfffffff0) == PANIC_SW_BASE) { +#ifdef CONFIG_SOFTWARE_PANIC + ccprintf("Software panic reason: %s\n", + panic_sw_reasons[(regs[SOFT_PANIC_GPR_REASON] - + PANIC_SW_BASE)]); + ccprintf("Software panic info: %d\n", + regs[SOFT_PANIC_GPR_INFO]); +#endif /* CONFIG_SOFTWARE_PANIC */ + } else { + ccprintf("Exception type: %s\n", exc_type[(mcause & 0xf)]); + } +#endif /* CONFIG_DEBUG_EXCEPTIONS */ + cflush(); +} +void panic_data_ccprint(const struct panic_data *pdata) +{ + uint32_t *regs, mcause, mepc; + + regs = (uint32_t *)pdata->riscv.regs; + mcause = pdata->riscv.mcause; + mepc = pdata->riscv.mepc; + ccprint_panic_information(regs, mcause, mepc); +} +#endif /* CONFIG_PANIC_CONSOLE_OUTPUT */ diff --git a/core/riscv-rv32i/task.c b/core/riscv-rv32i/task.c index ef1595eaeb..89d7671fe1 100644 --- a/core/riscv-rv32i/task.c +++ b/core/riscv-rv32i/task.c @@ -199,22 +199,22 @@ void __ram_code interrupt_enable(void) asm volatile ("csrs mie, t0"); } -inline int is_interrupt_enabled(void) +inline bool is_interrupt_enabled(void) { int mie = 0; asm volatile ("csrr %0, mie" : "=r"(mie)); /* Check if MEIE bit is set in MIE register */ - return !!(mie & 0x800); + return mie & 0x800; } -inline int in_interrupt_context(void) +inline bool in_interrupt_context(void) { return in_interrupt; } -int in_soft_interrupt_context(void) +bool in_soft_interrupt_context(void) { /* group 16 is reserved for soft-irq */ return in_interrupt_context() && ec_int_group == 16; diff --git a/docs/configuration/config_ap_to_ec_comm.md b/docs/configuration/config_ap_to_ec_comm.md index 24b309feb7..0a517401be 100644 --- a/docs/configuration/config_ap_to_ec_comm.md +++ b/docs/configuration/config_ap_to_ec_comm.md @@ -9,10 +9,10 @@ details a system level of the operation of this feature. Configure the AP to EC communication channel, picking exactly one of the following options. -- `CONFIG_HOSTCMD_SHI` - [SPI Host Interface](../ec_terms.md#shi) (SHI) -- `CONFIG_HOSTCMD_HECI` - HECI interface -- `CONFIG_HOSTCMD_LPC` - [LPC](../ec_terms.md#lpc) bus -- `CONFIG_HOSTCMD_ESPI` - [eSPI](../ec_terms.md#espi) bus +- `CONFIG_HOST_INTERFACE_SHI` - [SPI Host Interface](../ec_terms.md#shi) (SHI) +- `CONFIG_HOST_INTERFACE_HECI` - HECI interface +- `CONFIG_HOST_INTERFACE_LPC` - [LPC](../ec_terms.md#lpc) bus +- `CONFIG_HOST_INTERFACE_ESPI` - [eSPI](../ec_terms.md#espi) bus In [config.h], search for options that start with the same name as your selected communication interface. Override defaults as needed. diff --git a/docs/fingerprint/fingerprint.md b/docs/fingerprint/fingerprint.md index 39785f5afb..51c6192670 100644 --- a/docs/fingerprint/fingerprint.md +++ b/docs/fingerprint/fingerprint.md @@ -28,8 +28,8 @@ The main source code for fingerprint sensor functionality lives in the The following "boards" (specified by the `BOARD` environment variable when building the EC code) are for fingerprint: -MCU | Sensor | Firmware (EC "board") | Dev Board | Nucleo Board ----------------------- | ---------- | ---------------------------------------------- | -------------------------------------------- | ------------ +MCU | Sensor | Firmware (EC "board") | Dev Board | Nucleo Board +------------------------ | ---------- | ---------------------------------------------- | -------------------------------------------- | ------------ [STM32H743] \(Cortex-M7) | [FPC 1145] | `dartmonkey`<br>(aka `nocturne_fp`, `nami_fp`) | [Icetower v0.2] <br>(Previously Dragontalon) | [Nucleo H743ZI2] [STM32F412] \(Cortex-M4) | [FPC 1025] | `bloonchipper`<br>(aka `hatch_fp`) | [Dragonclaw v0.2] | [Nucleo F412ZG] @@ -243,9 +243,8 @@ openssl genrsa -3 -out board/$BOARD/dev_key.pem 3072 ### Resources -* https://sites.google.com/a/google.com/chromeos/resources/engineering/releng/signer-documentation -* https://sites.google.com/a/google.com/chromeos/paygen---payload -* https://b.corp.google.com/issues/77882970 +* http://go/cros-signer-docs +* https://issuetracker.google.com/issues/77882970 ## Signing diff --git a/docs/reducing_ec_image_size.md b/docs/reducing_ec_image_size.md index a165f165ff..4b5c5bbf31 100644 --- a/docs/reducing_ec_image_size.md +++ b/docs/reducing_ec_image_size.md @@ -233,6 +233,7 @@ prj.conf file to disable the console command. | x | CONFIG_CMD_PD | `pd` | Used by FAFT PD | | | CONFIG_CMD_PD_DEV_DUMP_INFO | | Not a console command | | | CONFIG_CMD_PD_FLASH | `pd flash` | Not supported by TCPMv2 | +| | CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE | `pd <port> srccaps` | Defining this reduces the verbosity of this command, saving bytes | | | CONFIG_CMD_PECI | `peci` | firmware_ECThermal uses `ectool tempsinfo` | | | CONFIG_CMD_PLL | `pll` | only used by lm4 chip | | | CONFIG_CMD_POWERINDEBUG | `powerindebug` | | @@ -451,7 +452,7 @@ Note that there are some [FAFT tests][5] that rely on the GPIO name. If you enable this option, you may also need to change firmware testing configuration [file][6]. -[1]:./zephyr_build.md#Working-outside-the-chroot +[1]:./zephyr/zephyr_build.md#Working-outside-the-chroot [2]:https://github.com/zephyrproject-rtos/zephyr/blob/main/subsys/shell/Kconfig [3]:https://docs.zephyrproject.org/latest/guides/optimizations/tools.html [4]:https://github.com/zephyrproject-rtos/zephyr/issues/2112 diff --git a/docs/sitemap.md b/docs/sitemap.md index 2b9f4aaaf8..7258aacd17 100644 --- a/docs/sitemap.md +++ b/docs/sitemap.md @@ -35,7 +35,7 @@ ## Testing * [Unit Tests](./unit_tests.md) - * [Porting EC unit tests to Ztest](./ztest.md) + * [Porting EC unit tests to Ztest](./zephyr/ztest.md) * [Code Coverage](./code_coverage.md) ## Updaters @@ -59,10 +59,11 @@ ## Zephyr -* [Initialization Order](./zephyr_init.md) -* [Proof-of-Concept-Device Bringup](./zephyr_poc_device_bringup.md) -* [Shimming](./zephyr_shim.md) -* [Porting EC unit tests to Ztest](./ztest.md) +* [Building Zephyr OS](./zephyr/zephyr_build.md) +* [Initialization Order](./zephyr/zephyr_init.md) +* [Proof-of-Concept-Device Bringup](./zephyr/zephyr_poc_device_bringup.md) +* [Shimming](./zephyr/zephyr_shim.md) +* [Porting EC unit tests to Ztest](./zephyr/ztest.md) ## Miscellaneous diff --git a/docs/unit_tests.md b/docs/unit_tests.md index f26a8519c8..1d9da40f9d 100644 --- a/docs/unit_tests.md +++ b/docs/unit_tests.md @@ -196,7 +196,7 @@ Build and run the test as an EC unit test: ``` For building the test as a Zephyr Ztest unit test, follow the instructions in -[Porting EC unit tests to Ztest](./ztest.md) to build the unit test for Zephyr's +[Porting EC unit tests to Ztest](./zephyr/ztest.md) to build the unit test for Zephyr's "native_posix" host-based target. <!-- mdformat off(b/139308852) --> diff --git a/docs/usb-c.md b/docs/usb-c.md index 1e009f82b2..78ca970267 100644 --- a/docs/usb-c.md +++ b/docs/usb-c.md @@ -1,7 +1,24 @@ # EC Implementation of USB-C Power Delivery and Alternate Modes -USB-C PD requires a complex state machine as USB-C PD can operate in many -different modes. This includes but isn't limited to: +USB-C is intended to be a flexible connector supporting multiple data rates, +protocols, and power in either direction. For one connector to support varying +states of power delivery, the system and what it is connected to +must decide who will act as the source (drives power) and sink (consumes power). +Additionally, they need to decide the correct voltage and current for the source +to drive by taking into account not only the source's and sink's capabilities, +but also what the cable can support. Resistance of pull-up and pull-down resistors +on the configuration channel (CC) ports of the USB-C connector are used to +negotiate who is source and who is sink when a new USB-C connection is established. +This allows for setting power characteristics to default USB2 (500mA) default +USB3 (900mA) 1.5A and 3.0A at 5V. Additional power requirements using USB-PD must +then be negotiated by the source and sink over the CC pins of the USB-C connectors. +Beyond power contract negotiations, USB PD messages can be used to enable alternate +modes (Example: DisplayPort) and send a class of messages called Structured Vendor +Defined Message (SVDMs), which are not related to power delivery. The additional +flexiblity and functionality in USB-C requires support from the OS. + +From the system, USB PD requires a complex state machine as USB PD can +operate in many different modes. This includes but isn't limited to: * Negotiated power contracts. Either side of the cable can source or sink power up to 100W (if supported by device). diff --git a/docs/zephyr_build.md b/docs/zephyr/zephyr_build.md index 1ca7030ed0..60a9e1d97e 100644 --- a/docs/zephyr_build.md +++ b/docs/zephyr/zephyr_build.md @@ -132,7 +132,7 @@ zmake configure -B /tmp/z/vol zephyr/projects/volteer/volteer/ -t zephyr ``` If you are building for posix-ec, change the default toolchain to host to make -it use the native system one instead of llvm. Make sure to start with a clean +it use the system toolchain instead of llvm. Make sure to start with a clean build directory if zmake returns any build error: ```bash diff --git a/docs/zephyr_init.md b/docs/zephyr/zephyr_init.md index 8822736efb..8822736efb 100644 --- a/docs/zephyr_init.md +++ b/docs/zephyr/zephyr_init.md diff --git a/docs/zephyr_poc_device_bringup.md b/docs/zephyr/zephyr_poc_device_bringup.md index 394aa4a05b..394aa4a05b 100644 --- a/docs/zephyr_poc_device_bringup.md +++ b/docs/zephyr/zephyr_poc_device_bringup.md diff --git a/docs/zephyr_shim.md b/docs/zephyr/zephyr_shim.md index fac0383aff..fac0383aff 100644 --- a/docs/zephyr_shim.md +++ b/docs/zephyr/zephyr_shim.md diff --git a/docs/ztest.md b/docs/zephyr/ztest.md index 021b3391bd..021b3391bd 100644 --- a/docs/ztest.md +++ b/docs/zephyr/ztest.md diff --git a/driver/accelgyro_bmi160.c b/driver/accelgyro_bmi160.c index f92f61d181..08bd7a0445 100644 --- a/driver/accelgyro_bmi160.c +++ b/driver/accelgyro_bmi160.c @@ -28,23 +28,6 @@ #define CPRINTF(format, args...) cprintf(CC_ACCEL, format, ## args) #define CPRINTS(format, args...) cprints(CC_ACCEL, format, ## args) -#if defined(CONFIG_ZEPHYR) && defined(CONFIG_ACCEL_INTERRUPTS) -/* Get the motion sensor ID of the BMI160 sensor that generates the interrupt. - * The interrupt is converted to the event and transferred to motion sense task - * that actually handles the interrupt. - * - * Here we use an alias (bmi160_int) to get the motion sensor ID. This alias - * MUST be defined for this driver to work. - * aliases { - * bmi160-int = &base_accel; - * }; - */ -#if DT_NODE_EXISTS(DT_ALIAS(bmi160_int)) -#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(bmi160_int))) -#endif -#endif - STATIC_IF(CONFIG_BMI_ORIENTATION_SENSOR) void irq_set_orientation( struct motion_sensor_t *s, int interrupt); @@ -247,6 +230,11 @@ static int perform_calib(struct motion_sensor_t *s, int enable) if (!enable) return EC_SUCCESS; + /* We only support accelerometers and gyroscopes */ + if (s->type != MOTIONSENSE_TYPE_ACCEL && + s->type != MOTIONSENSE_TYPE_GYRO) + return EC_RES_INVALID_PARAM; + rate = bmi_get_data_rate(s); /* * Temporary set frequency to 100Hz to get enough data in a short @@ -287,10 +275,12 @@ static int perform_calib(struct motion_sensor_t *s, int enable) /* Timeout for gyroscope calibration */ timeout.val = 800 * MSEC; break; + /* LCOV_EXCL_START */ default: - /* Not supported on Magnetometer */ - ret = EC_RES_INVALID_PARAM; - goto end_perform_calib; + /* Unreachable due to sensor type check above. */ + ASSERT(false); + return EC_RES_INVALID_PARAM; + /* LCOV_EXCL_STOP */ } ret = bmi_write8(s->port, s->i2c_spi_addr_flags, BMI160_FOC_CONF, val); @@ -387,13 +377,12 @@ static int manage_activity(const struct motion_sensor_t *s, } #endif -static __maybe_unused int config_interrupt(const struct motion_sensor_t *s) +/** Requires that the passed sensor `*s` is an accelerometer */ +static __maybe_unused int +config_accel_interrupt(const struct motion_sensor_t *s) { int ret, tmp; - if (s->type != MOTIONSENSE_TYPE_ACCEL) - return EC_SUCCESS; - mutex_lock(s->mutex); bmi_write8(s->port, s->i2c_spi_addr_flags, BMI160_CMD_REG, BMI160_CMD_FIFO_FLUSH); @@ -728,7 +717,7 @@ static int init(struct motion_sensor_t *s) if (IS_ENABLED(CONFIG_ACCEL_INTERRUPTS) && (s->type == MOTIONSENSE_TYPE_ACCEL)) - ret = config_interrupt(s); + ret = config_accel_interrupt(s); return sensor_init_done(s); } diff --git a/driver/accelgyro_bmi260.c b/driver/accelgyro_bmi260.c index fe0bf0e0cc..daddf9fac5 100644 --- a/driver/accelgyro_bmi260.c +++ b/driver/accelgyro_bmi260.c @@ -37,26 +37,6 @@ #define CPRINTF(format, args...) cprintf(CC_ACCEL, format, ## args) #define CPRINTS(format, args...) cprints(CC_ACCEL, format, ## args) -#if defined(CONFIG_ZEPHYR) && defined(CONFIG_ACCEL_INTERRUPTS) -/* - * Get the mostion sensor ID of the BMI260 sensor that - * generates the interrupt. - * The interrupt is converted to the event and transferred to motion - * sense task that actually handles the interrupt. - * - * Here, we use alias to get the motion sensor ID - * - * e.g) base_accel is the label of a child node in /motionsense-sensors - * aliases { - * bmi260-int = &base_accel; - * }; - */ -#if DT_NODE_EXISTS(DT_ALIAS(bmi260_int)) -#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ - TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(bmi260_int))) -#endif -#endif - STATIC_IF(CONFIG_ACCEL_FIFO) volatile uint32_t last_interrupt_timestamp; /* @@ -315,13 +295,16 @@ void bmi260_interrupt(enum gpio_signal signal) task_set_event(TASK_ID_MOTIONSENSE, CONFIG_ACCELGYRO_BMI260_INT_EVENT); } +/** + * config_interrupt - sets up the interrupt request output pin on the BMI260 + * + * Note: this function only supports motion_sensor_t structs of type + * MOTIONSENSE_TYPE_ACCEL and expects the caller to verify this. + */ static int config_interrupt(const struct motion_sensor_t *s) { int ret; - if (s->type != MOTIONSENSE_TYPE_ACCEL) - return EC_SUCCESS; - mutex_lock(s->mutex); bmi_write8(s->port, s->i2c_spi_addr_flags, BMI260_CMD_REG, BMI260_CMD_FIFO_FLUSH); diff --git a/driver/accelgyro_bmi3xx.c b/driver/accelgyro_bmi3xx.c index ee9b30a9cf..4b525c94df 100644 --- a/driver/accelgyro_bmi3xx.c +++ b/driver/accelgyro_bmi3xx.c @@ -370,6 +370,43 @@ static int read_temp(const struct motion_sensor_t *s, int *temp_ptr) return EC_ERROR_UNIMPLEMENTED; } +static int reset_offset(const struct motion_sensor_t *s, uint8_t offset_en) +{ + uint8_t offset_sel[2] = { BMI3_REG_UGAIN_OFF_SEL, 0 }; + uint8_t reg_data[4] = { 0 }; + + /* Reset the existing offset values by setting the bits in DMA*/ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + offset_sel, 2)); + + reg_data[0] = offset_en; + reg_data[1] = 0; + + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 2)); + + /* Update the offset change to the sensor engine */ + reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_LOW_BYTE); + reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_HIGH_BYTE) >> 8); + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + + /* Delay time for offset update */ + msleep(OFFSET_UPDATE_DELAY); + + /* Read the configuration from the feature engine register */ + RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); + + if ((reg_data[3] & BMI3_UGAIN_OFFS_UPD_COMPLETE) + && ((reg_data[2] & BMI3_FEATURE_IO_1_ERROR_MASK) + == BMI3_FEATURE_IO_1_NO_ERROR)) { + return EC_SUCCESS; + } + + return EC_ERROR_NOT_CALIBRATED; +} + int get_gyro_offset(const struct motion_sensor_t *s, intv3_t v) { int i; @@ -393,28 +430,25 @@ int get_gyro_offset(const struct motion_sensor_t *s, intv3_t v) return EC_SUCCESS; } -int set_gyro_offset(const struct motion_sensor_t *s, intv3_t v) +static int write_gyro_offset(const struct motion_sensor_t *s, int *val) { uint8_t reg_data[6] = { 0 }; uint8_t base_addr[2] = { BMI3_GYRO_OFFSET_ADDR, 0 }; - int i, val[3]; - - for (i = X; i <= Z; ++i) { - val[i] = round_divide((int64_t)v[i] * BMI_OFFSET_GYRO_DIV_MDS, - BMI_OFFSET_GYRO_MULTI_MDS); - if (val[i] > 511) - val[i] = 511; - if (val[i] < -512) - val[i] = -512; - if (val[i] < 0) - val[i] = 1024 + val[i]; - } + uint8_t offset_sel[2] = { BMI3_REG_UGAIN_OFF_SEL, 0 }; + /* Enable user gain/offset update*/ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + offset_sel, 2)); + reg_data[0] = 0; + reg_data[1] = 0; + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 2)); /* - * Set the user accel offset base address to feature engine + * Set the user gyro offset base address to feature engine * transmission address to start DMA transaction */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, base_addr, 2)); + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + base_addr, 2)); reg_data[0] = (uint8_t)(val[0] & BMI3_SET_LOW_BYTE); reg_data[1] = (uint8_t)((val[0] & 0x0300) >> 8); @@ -424,16 +458,66 @@ int set_gyro_offset(const struct motion_sensor_t *s, intv3_t v) reg_data[5] = (uint8_t)((val[2] & 0x0300) >> 8); /* Set the configuration to the feature engine register */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, reg_data, - 6)); + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 6)); /* Update the offset to the sensor engine */ reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & BMI3_SET_LOW_BYTE); reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & - BMI3_SET_HIGH_BYTE) >> 8); + BMI3_SET_HIGH_BYTE) >> 8); RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + msleep(OFFSET_UPDATE_DELAY); + + /* Read the configuration from the feature engine register */ + RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); + + if ((reg_data[3] & BMI3_UGAIN_OFFS_UPD_COMPLETE) + && ((reg_data[2] & BMI3_FEATURE_IO_1_ERROR_MASK) + == BMI3_FEATURE_IO_1_NO_ERROR)) { + return EC_SUCCESS; + } + + return EC_ERROR_NOT_CALIBRATED; +} + +int set_gyro_offset(const struct motion_sensor_t *s, intv3_t v) +{ + uint8_t reg_data[4] = { 0 }; + uint8_t saved_conf[6] = { 0 }; + int i, val[3]; + + for (i = X; i <= Z; ++i) { + val[i] = round_divide((int64_t)v[i] * BMI_OFFSET_GYRO_DIV_MDS, + BMI_OFFSET_GYRO_MULTI_MDS); + if (val[i] > 511) + val[i] = 511; + if (val[i] < -512) + val[i] = -512; + if (val[i] < 0) + val[i] = 1024 + val[i]; + } + + /* Set the power mode as suspend */ + RETURN_ERROR(bmi3_read_n(s, BMI3_REG_ACC_CONF, saved_conf, 6)); + + /* Disable accelerometer and gyroscope */ + reg_data[0] = saved_conf[2]; + reg_data[1] = 0x00; + reg_data[2] = saved_conf[4]; + reg_data[3] = 0x00; + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, reg_data, 4)); + + /* Reset the existing offset values */ + RETURN_ERROR(reset_offset(s, 2)); + + /* Set the gyro offset in the sensor registers */ + RETURN_ERROR(write_gyro_offset(s, val)); + + /* Restore ACC_CONF by storing saved_conf data */ + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, &saved_conf[2], 4)); + return EC_SUCCESS; } @@ -460,10 +544,64 @@ int get_accel_offset(const struct motion_sensor_t *s, intv3_t v) return EC_SUCCESS; } -int set_accel_offset(const struct motion_sensor_t *s, intv3_t v) +static int write_accel_offsets(const struct motion_sensor_t *s, int *val) { - uint8_t reg_data[6] = { 0 }; uint8_t base_addr[2] = { BMI3_ACC_OFFSET_ADDR, 0 }; + uint8_t offset_sel[2] = { BMI3_REG_UGAIN_OFF_SEL, 0 }; + uint8_t reg_data[6] = {0}; + + /* Enable user gain/offset update*/ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + offset_sel, 2)); + reg_data[0] = 0; + reg_data[1] = 0; + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 2)); + /* + * Set the user accel offset base address to feature engine + * transmission address to start DMA transaction + */ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, + base_addr, 2)); + + reg_data[0] = (uint8_t)(val[0] & BMI3_SET_LOW_BYTE); + reg_data[1] = (uint8_t)((val[0] & 0x1F00) >> 8); + reg_data[2] = (uint8_t)(val[1] & BMI3_SET_LOW_BYTE); + reg_data[3] = (uint8_t)((val[1] & 0x1F00) >> 8); + reg_data[4] = (uint8_t)(val[2] & BMI3_SET_LOW_BYTE); + reg_data[5] = (uint8_t)((val[2] & 0x1F00) >> 8); + + /* Set the configuration to the feature engine register */ + RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, + reg_data, 6)); + + /* Update the offset to the sensor engine */ + reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_LOW_BYTE); + + reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & + BMI3_SET_HIGH_BYTE) >> 8); + + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + + msleep(OFFSET_UPDATE_DELAY); + + /* Read the configuration from the feature engine register */ + RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); + + if ((reg_data[3] & BMI3_UGAIN_OFFS_UPD_COMPLETE) + && ((reg_data[2] & BMI3_FEATURE_IO_1_ERROR_MASK) + == BMI3_FEATURE_IO_1_NO_ERROR)) { + return EC_SUCCESS; + } + + return EC_ERROR_NOT_CALIBRATED; +} + +int set_accel_offset(const struct motion_sensor_t *s, intv3_t v, + uint8_t reset_en) +{ + uint8_t reg_data[4] = { 0 }; uint8_t saved_conf[6] = { 0 }; int i, val[3]; @@ -481,41 +619,24 @@ int set_accel_offset(const struct motion_sensor_t *s, intv3_t v) /* Set the power mode as suspend */ RETURN_ERROR(bmi3_read_n(s, BMI3_REG_ACC_CONF, saved_conf, 6)); - /* Ignore two i2c sync bytes and store consecutive bytes in reg_data */ + /* Disable accelerometer and gyroscope */ reg_data[0] = saved_conf[2]; reg_data[1] = 0x00; reg_data[2] = saved_conf[4]; reg_data[3] = 0x00; RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, reg_data, 4)); - /* - * Set the user accel offset base address to feature engine - * transmission address to start DMA transaction - */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, base_addr, 2)); - - reg_data[0] = (uint8_t)(val[0] & BMI3_SET_LOW_BYTE); - reg_data[1] = (uint8_t)((val[0] & 0x1F00) >> 8); - reg_data[2] = (uint8_t)(val[1] & BMI3_SET_LOW_BYTE); - reg_data[3] = (uint8_t)((val[1] & 0x1F00) >> 8); - reg_data[4] = (uint8_t)(val[2] & BMI3_SET_LOW_BYTE); - reg_data[5] = (uint8_t)((val[2] & 0x1F00) >> 8); + /* Reset the existing offset values */ + if (reset_en) { + /* Reset is only done for writing offset and not for FOC */ + RETURN_ERROR(reset_offset(s, 1)); + } - /* Set the configuration to the feature engine register */ - RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX_DATA, reg_data, - 6)); + /* Set the accel offset in the sensor registers */ + RETURN_ERROR(write_accel_offsets(s, val)); /* Restore ACC_CONF by storing saved_conf data */ - RETURN_ERROR(bmi3_read_n(s, BMI3_REG_ACC_CONF, saved_conf, 6)); - - /* Update the offset to the sensor engine */ - reg_data[0] = (uint8_t)(BMI3_CMD_USR_GAIN_OFFS_UPDATE & - BMI3_SET_LOW_BYTE); - - reg_data[1] = (uint8_t)((BMI3_CMD_USR_GAIN_OFFS_UPDATE & - BMI3_SET_HIGH_BYTE) >> 8); - - RETURN_ERROR(bmi3_write_n(s, BMI3_REG_CMD, reg_data, 2)); + RETURN_ERROR(bmi3_write_n(s, BMI3_REG_ACC_CONF, &saved_conf[2], 4)); return EC_SUCCESS; } @@ -585,7 +706,10 @@ static int8_t perform_accel_foc(struct motion_sensor_t *s, int *target, rotate_inv(offset, *s->rot_standard_ref, offset); - RETURN_ERROR(set_accel_offset(s, offset)); + /* Set accel offset without resetting the existing offsets + * since we calculated the bias with the existing offsets + */ + RETURN_ERROR(set_accel_offset(s, offset, BMI3_DISABLE)); return EC_SUCCESS; } @@ -596,7 +720,7 @@ static int set_gyro_foc_config(struct motion_sensor_t *s) uint8_t base_addr[2] = { BMI3_BASE_ADDR_SC, 0 }; /* - * Set the user accel offset base address to feature engine + * Set the FOC base address to feature engine * transmission address to start DMA transaction */ RETURN_ERROR(bmi3_write_n(s, BMI3_FEATURE_ENGINE_DMA_TX, base_addr, 2)); @@ -629,7 +753,7 @@ static int get_calib_result(struct motion_sensor_t *s) for (i = 0; i < 25; i++) { /* A delay of 120ms is required to read this status register */ - msleep(120); + msleep(OFFSET_UPDATE_DELAY); /* Read the configuration from the feature engine register */ RETURN_ERROR(bmi3_read_n(s, BMI3_FEATURE_IO_1, reg_data, 4)); @@ -768,7 +892,7 @@ static int set_offset(const struct motion_sensor_t *s, switch (s->type) { case MOTIONSENSE_TYPE_ACCEL: /* Offset should be in units of mg */ - RETURN_ERROR(set_accel_offset(s, v)); + RETURN_ERROR(set_accel_offset(s, v, BMI3_ENABLE)); break; case MOTIONSENSE_TYPE_GYRO: /* Offset should be in units of mdps */ diff --git a/driver/accelgyro_bmi3xx.h b/driver/accelgyro_bmi3xx.h index b52d503f92..afd6855bc0 100644 --- a/driver/accelgyro_bmi3xx.h +++ b/driver/accelgyro_bmi3xx.h @@ -50,7 +50,7 @@ #define BMI3_REG_GYR_CONF 0x21 #define BMI3_REG_INT_MAP1 0x3A #define BMI3_REG_FIFO_WATERMARK 0x35 - +#define BMI3_REG_UGAIN_OFF_SEL 0x3F #define BMI3_REG_FIFO_CONF 0x36 #define BMI3_FIFO_STOP_ON_FULL 0x01 #define BMI3_FIFO_TIME_EN 0x01 @@ -106,9 +106,10 @@ #define BMI3_ACC_FOC_16G_REF 2048 #define BMI3_FOC_SAMPLE_LIMIT 32 -/* 20ms delay for 50Hz ODR */ #define FOC_TRY_COUNT 5 +/* 20ms delay for 50Hz ODR */ #define FOC_DELAY 20 +#define OFFSET_UPDATE_DELAY 120 #define BMI3_INT_STATUS_FWM 0x4000 #define BMI3_INT_STATUS_FFULL 0x8000 #define BMI3_INT_STATUS_ORIENTATION 0x0008 diff --git a/driver/accelgyro_lsm6dsm.c b/driver/accelgyro_lsm6dsm.c index 8a83f72f82..cffb721aa7 100644 --- a/driver/accelgyro_lsm6dsm.c +++ b/driver/accelgyro_lsm6dsm.c @@ -188,6 +188,7 @@ static int fifo_enable(const struct motion_sensor_t *accel) (decimators[FIFO_DEV_GYRO] << LSM6DSM_FIFO_DEC_G_OFF) | (decimators[FIFO_DEV_ACCEL] << LSM6DSM_FIFO_DEC_XL_OFF)); if (IS_ENABLED(CONFIG_LSM6DSM_SEC_I2C)) { + ASSERT(ARRAY_SIZE(decimators) > FIFO_DEV_MAG); st_raw_write8(accel->port, accel->i2c_spi_addr_flags, LSM6DSM_FIFO_CTRL4_ADDR, decimators[FIFO_DEV_MAG]); diff --git a/driver/build.mk b/driver/build.mk index eaf5772ae2..e0ccda2b10 100644 --- a/driver/build.mk +++ b/driver/build.mk @@ -121,6 +121,7 @@ driver-$(CONFIG_TEMP_SENSOR_G753)+=temp_sensor/g753.o driver-$(CONFIG_TEMP_SENSOR_G781)+=temp_sensor/g78x.o driver-$(CONFIG_TEMP_SENSOR_G782)+=temp_sensor/g78x.o driver-$(CONFIG_TEMP_SENSOR_OTI502)+=temp_sensor/oti502.o +driver-$(CONFIG_TEMP_SENSOR_PCT2075)+=temp_sensor/pct2075.o driver-$(CONFIG_TEMP_SENSOR_SB_TSI)+=temp_sensor/sb_tsi.o driver-$(CONFIG_TEMP_SENSOR_TMP006)+=temp_sensor/tmp006.o driver-$(CONFIG_TEMP_SENSOR_TMP112)+=temp_sensor/tmp112.o @@ -190,8 +191,9 @@ driver-$(CONFIG_USB_MUX_PI3USB31532)+=usb_mux/pi3usb3x532.o driver-$(CONFIG_USB_MUX_PS8740)+=usb_mux/ps8740.o driver-$(CONFIG_USB_MUX_PS8742)+=usb_mux/ps8740.o driver-$(CONFIG_USB_MUX_PS8743)+=usb_mux/ps8743.o -driver-$(CONFIG_USB_MUX_TUSB1064)+=usb_mux/tusb1064.o driver-$(CONFIG_USB_MUX_PS8822)+=usb_mux/ps8822.o +driver-$(CONFIG_USB_MUX_TUSB1044)+=usb_mux/tusb1064.o +driver-$(CONFIG_USB_MUX_TUSB1064)+=usb_mux/tusb1064.o driver-$(CONFIG_USB_MUX_VIRTUAL)+=usb_mux/virtual.o # USB Hub with I2C interface diff --git a/driver/charger/bd9995x.c b/driver/charger/bd9995x.c index 6fd79b8d8f..bf8dfb4c5d 100644 --- a/driver/charger/bd9995x.c +++ b/driver/charger/bd9995x.c @@ -1465,7 +1465,7 @@ static int read_ext(int chgnum, uint8_t cmd) } /* Dump all readable registers on bd9995x */ -static int console_bd9995x_dump_regs(int argc, char **argv) +static void console_bd9995x_dump_regs(int chgnum) { int i; uint8_t regs[] = { 0x14, 0x15, 0x3c, 0x3d, 0x3e, 0x3f }; @@ -1480,12 +1480,7 @@ static int console_bd9995x_dump_regs(int argc, char **argv) ccprintf("EXT REG %4x: %4x\n", i, read_ext(CHARGER_SOLO, i)); cflush(); } - - return 0; } -DECLARE_CONSOLE_COMMAND(charger_dump, console_bd9995x_dump_regs, - NULL, - "Dump all charger registers"); #endif /* CONFIG_CMD_CHARGER_DUMP */ #ifdef CONFIG_CMD_CHARGER @@ -1737,6 +1732,9 @@ const struct charger_drv bd9995x_drv = { .device_id = &bd9995x_device_id, .get_option = &bd9995x_get_option, .set_option = &bd9995x_set_option, +#ifdef CONFIG_CMD_CHARGER_DUMP + .dump_registers = &console_bd9995x_dump_regs, +#endif }; #ifdef CONFIG_BC12_SINGLE_DRIVER diff --git a/driver/charger/bq25710.c b/driver/charger/bq25710.c index df898467be..0e0cf56725 100644 --- a/driver/charger/bq25710.c +++ b/driver/charger/bq25710.c @@ -5,9 +5,11 @@ * TI bq25710 battery charger driver. */ +#include <stdbool.h> + #include "battery.h" #include "battery_smart.h" -#include "bq25710.h" +#include "bq257x0_regs.h" #include "charge_ramp.h" #include "charge_state_v2.h" #include "charger.h" @@ -20,10 +22,82 @@ #include "timer.h" #include "util.h" +#if !defined(CONFIG_CHARGER_BQ25710) && \ + !defined(CONFIG_CHARGER_BQ25720) +#error Only the BQ25720 and BQ25710 are supported by bq25710 driver. +#endif + #ifndef CONFIG_CHARGER_NARROW_VDC #error "BQ25710 is a NVDC charger, please enable CONFIG_CHARGER_NARROW_VDC." #endif +#ifndef CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV GET_BQ_FIELD(BQ25720, \ + VMIN_AP, \ + VSYS_TH2, \ + UINT16_MAX) +#endif + +#ifndef CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM +#define CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV 0 +#endif + +#ifndef CONFIG_CHARGER_BQ25720_VSYS_UVP_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_UVP 0 +#endif + +#ifndef CONFIG_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM +#define CONFIG_CHARGER_BQ25720_IDCHG_DEG2 1 +#endif + +#ifndef CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_IDCHG_TH2 1 +#endif + +#ifndef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#define CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG 0 +#endif + +/* + * Helper macros + */ + +#define SET_CO1_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ257X0, \ + CHARGE_OPTION_1, \ + _field, _c, (_x)) + +#define SET_CO2(_field, _v, _x) SET_BQ_FIELD(BQ257X0, \ + CHARGE_OPTION_2, \ + _field, _v, (_x)) + +#define SET_CO2_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ257X0, \ + CHARGE_OPTION_2, \ + _field, _c, (_x)) + +#define SET_CO3(_field, _v, _x) SET_BQ_FIELD(BQ257X0, \ + CHARGE_OPTION_3, \ + _field, _v, (_x)) + +#define SET_CO3_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ257X0, \ + CHARGE_OPTION_3, \ + _field, _c, (_x)) + +#define SET_CO4(_field, _v, _x) SET_BQ_FIELD(BQ25720, \ + CHARGE_OPTION_4, \ + _field, _v, (_x)) + +#define SET_CO4_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ25720, \ + CHARGE_OPTION_4, \ + _field, _c, (_x)) + +#define SET_PO1(_field, _v, _x) SET_BQ_FIELD(BQ257X0, \ + PROCHOT_OPTION_1, \ + _field, _v, (_x)) + +#define SET_PO1_BY_NAME(_field, _c, _x) SET_BQ_FIELD_BY_NAME(BQ257X0, \ + PROCHOT_OPTION_1, \ + _field, _c, (_x)) + /* * Delay required from taking the bq25710 out of low power mode and having the * correct value in register 0x3E for VSYS_MIN voltage. The length of the delay @@ -35,23 +109,15 @@ /* Sense resistor configurations and macros */ #define DEFAULT_SENSE_RESISTOR 10 -#ifdef CONFIG_CHARGER_SENSE_RESISTOR_AC_BQ25710 - #undef CONFIG_CHARGER_SENSE_RESISTOR_AC - #define CONFIG_CHARGER_SENSE_RESISTOR_AC \ - CONFIG_CHARGER_SENSE_RESISTOR_AC_BQ25710 -#endif - - #define INPUT_RESISTOR_RATIO \ - ((CONFIG_CHARGER_SENSE_RESISTOR_AC) / DEFAULT_SENSE_RESISTOR) + ((CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC) / DEFAULT_SENSE_RESISTOR) #define CHARGING_RESISTOR_RATIO \ - ((CONFIG_CHARGER_SENSE_RESISTOR) / DEFAULT_SENSE_RESISTOR) + ((CONFIG_CHARGER_BQ25710_SENSE_RESISTOR) / DEFAULT_SENSE_RESISTOR) + #define REG_TO_CHARGING_CURRENT(REG) ((REG) / CHARGING_RESISTOR_RATIO) #define CHARGING_CURRENT_TO_REG(CUR) ((CUR) * CHARGING_RESISTOR_RATIO) -#ifdef CONFIG_CHARGER_BQ25720 #define VMIN_AP_VSYS_TH2_TO_REG(DV) ((DV) - 32) -#endif /* Console output macros */ #define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args) @@ -85,14 +151,14 @@ static enum ec_error_list bq25710_set_option(int chgnum, int option); static inline int iin_dpm_reg_to_current(int reg) { - return (reg + 1) * BQ25710_IIN_DPM_CURRENT_STEP_MA / + return (reg + 1) * BQ257X0_IIN_DPM_CURRENT_STEP_MA / INPUT_RESISTOR_RATIO; } static inline int iin_host_current_to_reg(int current) { return (current * INPUT_RESISTOR_RATIO / - BQ25710_IIN_HOST_CURRENT_STEP_MA) - 1; + BQ257X0_IIN_HOST_CURRENT_STEP_MA) - 1; } static inline enum ec_error_list raw_read16(int chgnum, int offset, int *value) @@ -104,8 +170,17 @@ static inline enum ec_error_list raw_read16(int chgnum, int offset, int *value) static inline int min_system_voltage_to_reg(int voltage_mv) { - return (voltage_mv / BQ25710_MIN_SYSTEM_VOLTAGE_STEP_MV) << - BQ25710_MIN_SYSTEM_VOLTAGE_SHIFT; + int steps; + int reg; + + if (IS_ENABLED(CONFIG_CHARGER_BQ25720)) { + steps = voltage_mv / BQ25720_VSYS_MIN_VOLTAGE_STEP_MV; + reg = SET_BQ_FIELD(BQ25720, VSYS_MIN, VOLTAGE, steps, 0); + } else { + steps = voltage_mv / BQ25710_MIN_SYSTEM_VOLTAGE_STEP_MV; + reg = SET_BQ_FIELD(BQ25710, MIN_SYSTEM, VOLTAGE, steps, 0); + } + return reg; } static inline enum ec_error_list raw_write16(int chgnum, int offset, int value) @@ -126,7 +201,7 @@ static int bq25710_get_low_power_mode(int chgnum, int *mode) if (rv) return rv; - *mode = !!(reg & BQ25710_CHARGE_OPTION_0_LOW_POWER_MODE); + *mode = !!(reg & BQ_FIELD_MASK(BQ257X0, CHARGE_OPTION_0, EN_LWPWR)); return EC_SUCCESS; } @@ -156,9 +231,11 @@ static int bq25710_set_low_power_mode(int chgnum, int enable) #endif if (enable) - reg |= BQ25710_CHARGE_OPTION_0_LOW_POWER_MODE; + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, EN_LWPWR, true, + reg); else - reg &= ~BQ25710_CHARGE_OPTION_0_LOW_POWER_MODE; + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, EN_LWPWR, false, + reg); rv = raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_0, reg); #ifdef CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA @@ -170,6 +247,23 @@ static int bq25710_set_low_power_mode(int chgnum, int enable) return EC_SUCCESS; } +static int co1_set_psys_sensing(int reg, bool enable) +{ + if (IS_ENABLED(CONFIG_CHARGER_BQ25720)) { + if (enable) + reg = SET_BQ_FIELD_BY_NAME(BQ25720, CHARGE_OPTION_1, + PSYS_CONFIG, PBUS_PBAT, reg); + else + reg = SET_BQ_FIELD_BY_NAME(BQ25720, CHARGE_OPTION_1, + PSYS_CONFIG, OFF, reg); + } else if (IS_ENABLED(CONFIG_CHARGER_BQ25710)) { + reg = SET_BQ_FIELD(BQ25710, CHARGE_OPTION_1, EN_PSYS, enable, + reg); + } + + return reg; +} + static int bq25710_adc_start(int chgnum, int adc_en_mask) { int reg; @@ -188,8 +282,8 @@ static int bq25710_adc_start(int chgnum, int adc_en_mask) * Turn on the ADC for one reading. Note that adc_en_mask * maps to bit[7:0] in ADCOption register. */ - reg = (adc_en_mask & BQ25710_ADC_OPTION_EN_ADC_ALL) | - BQ25710_ADC_OPTION_ADC_START; + reg = (adc_en_mask & BQ257X0_ADC_OPTION_EN_ADC_ALL) | + BQ_FIELD_MASK(BQ257X0, ADC_OPTION, ADC_START); if (raw_write16(chgnum, BQ25710_REG_ADC_OPTION, reg)) return EC_ERROR_UNKNOWN; @@ -203,20 +297,209 @@ static int bq25710_adc_start(int chgnum, int adc_en_mask) /* sleep 2 ms so we time out after 2x the expected time */ msleep(2); raw_read16(chgnum, BQ25710_REG_ADC_OPTION, ®); - } while (--tries_left && (reg & BQ25710_ADC_OPTION_ADC_START)); + } while (--tries_left && (reg & BQ_FIELD_MASK(BQ257X0, ADC_OPTION, + ADC_START))); /* ADC reading attempt complete, go back to low power mode */ if (bq25710_set_low_power_mode(chgnum, mode)) return EC_ERROR_UNKNOWN; /* Could not complete read */ - if (reg & BQ25710_ADC_OPTION_ADC_START) + if (reg & BQ_FIELD_MASK(BQ257X0, ADC_OPTION, ADC_START)) return EC_ERROR_TIMEOUT; return EC_SUCCESS; } #endif +static int bq257x0_init_charge_option_1(int chgnum) +{ + int rv; + int reg; + + if (!IS_ENABLED(CONFIG_CHARGER_BQ25710_PSYS_SENSING) && + !IS_ENABLED(CONFIG_CHARGER_BQ25710_CMP_REF_1P2)) + return EC_SUCCESS; + + rv = raw_read16(chgnum, BQ25710_REG_CHARGE_OPTION_1, ®); + if (rv) + return rv; + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_PSYS_SENSING)) + reg = co1_set_psys_sensing(reg, true); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_CMP_REF_1P2)) + reg = SET_CO1_BY_NAME(CMP_REF, 1P2, reg); + + return raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_1, reg); +} + +static int bq257x0_init_prochot_option_1(int chgnum) +{ + int rv; + int reg; + + rv = raw_read16(chgnum, BQ25710_REG_PROCHOT_OPTION_1, ®); + if (rv) + return rv; + + /* Disable VDPM prochot profile at initialization */ + reg = SET_PO1_BY_NAME(PP_VDPM, DISABLE, reg); + + /* + * Enable PROCHOT to be asserted with VSYS min detection. Note + * that when no battery is present, then VSYS will be set to the + * value in register 0x3E (MinSysVoltage) which means that when + * no battery is present prochot will continuosly be asserted. + */ + reg = SET_PO1_BY_NAME(PP_VSYS, ENABLE, reg); + +#ifdef CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA + /* + * Set the IDCHG limit who's value is defined in the config + * option in mA. + * + * IDCHG limit is in 512 mA steps. Note there is a 128 mA offset + * so the actual IDCHG limit will be the value stored in + * IDCHG_VTH + 128 mA. + */ + reg = SET_PO1(IDCHG_VTH, + CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA >> 9, + reg); + + /* Enable IDCHG trigger for prochot. */ + reg = SET_PO1_BY_NAME(PP_IDCHG, ENABLE, reg); +#endif + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_PP_INOM)) + reg = SET_PO1_BY_NAME(PP_INOM, ENABLE, reg); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_PP_BATPRES)) + reg = SET_PO1_BY_NAME(PP_BATPRES, ENABLE, reg); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_PP_ACOK)) + reg = SET_PO1_BY_NAME(PP_ACOK, ENABLE, reg); + + return raw_write16(chgnum, BQ25710_REG_PROCHOT_OPTION_1, reg); +} + +static int bq257x0_init_charge_option_2(int chgnum) +{ + int reg; + int rv; + + rv = raw_read16(chgnum, BQ25710_REG_CHARGE_OPTION_2, ®); + if (rv) + return rv; + + /* + * Reduce peak power mode overload and relax cycle time from + * default 20 msec to the minimum of 5 msec on the bq25710. The + * minimum is 20 msec on the bq25720. + */ + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_2, PKPWR_TMAX, 0, reg); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM)) { + /* Set input overload time in peak power mode. */ + reg = SET_CO2(PKPWR_TOVLD_DEG, + CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG, reg); + } + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_EN_ACOC)) { + /* Enable AC input over-current protection. */ + reg = SET_CO2_BY_NAME(EN_ACOC, ENABLE, reg); + } + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_ACOC_VTH_1P33)) { + /* Set ACOC threshold to 133% of ILIM2 */ + reg = SET_CO2_BY_NAME(ACOC_VTH, 1P33, reg); + } + + if (IS_ENABLED(CONFIG_CHARGER_BQ25710_BATOC_VTH_MINIMUM)) { + /* Set battery over-current threshold to minimum. */ + reg = SET_CO2_BY_NAME(BATOC_VTH, 1P33, reg); + } + + return raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_2, reg); +} + +static int bq257x0_init_charge_option_3(int chgnum) +{ + int reg; + int rv; + + if (!IS_ENABLED(CONFIG_CHARGER_BQ25720)) + return EC_SUCCESS; + + rv = raw_read16(chgnum, BQ25710_REG_CHARGE_OPTION_3, ®); + if (rv) + return rv; + + reg = SET_CO3_BY_NAME(IL_AVG, 10A, reg); + + return raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_3, reg); +} + +static int bq257x0_init_charge_option_4(int chgnum) +{ + int reg; + int rv; + + if (!IS_ENABLED(CONFIG_CHARGER_BQ25720)) + return EC_SUCCESS; + + if (!IS_ENABLED(CONFIG_CHARGER_BQ25720_VSYS_UVP_CUSTOM) && + !IS_ENABLED(CONFIG_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM) && + !IS_ENABLED(CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM)) + return EC_SUCCESS; + + rv = raw_read16(chgnum, BQ25720_REG_CHARGE_OPTION_4, ®); + if (rv) + return rv; + + if (IS_ENABLED(CONFIG_CHARGER_BQ25720_VSYS_UVP_CUSTOM)) + reg = SET_CO4(VSYS_UVP, CONFIG_CHARGER_BQ25720_VSYS_UVP, reg); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM)) + reg = SET_CO4(IDCHG_DEG2, CONFIG_CHARGER_BQ25720_IDCHG_DEG2, + reg); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM)) + reg = SET_CO4(IDCHG_TH2, CONFIG_CHARGER_BQ25720_IDCHG_TH2, reg); + + if (IS_ENABLED(CONFIG_CHARGER_BQ25720_PP_IDCHG2)) + reg = SET_CO4_BY_NAME(PP_IDCHG2, ENABLE, reg); + + return raw_write16(chgnum, BQ25720_REG_CHARGE_OPTION_4, reg); +} + +static int bq25720_init_vmin_active_protection(int chgnum) +{ + int reg; + int rv; + int th2_dv; + + if (!IS_ENABLED(CONFIG_CHARGER_BQ25720)) + return EC_SUCCESS; + + if (!IS_ENABLED(CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM)) + return EC_SUCCESS; + + rv = raw_read16(chgnum, BQ25720_REG_VMIN_ACTIVE_PROTECTION, ®); + if (rv) + return rv; + + /* + * The default VSYS_TH2 is 5.9v for a 2S config. Boards may need + * to increase this for stability. PROCHOT is asserted when the + * threshold is reached. + */ + th2_dv = VMIN_AP_VSYS_TH2_TO_REG(CONFIG_CHARGER_BQ25720_VSYS_TH2_DV); + reg = SET_BQ_FIELD(BQ25720, VMIN_AP, VSYS_TH2, th2_dv, reg); + + return raw_write16(chgnum, BQ25720_REG_VMIN_ACTIVE_PROTECTION, reg); +} + static void bq25710_init(int chgnum) { int reg; @@ -224,23 +507,35 @@ static void bq25710_init(int chgnum) int rv; /* - * Reset registers to their default settings. There is no reset pin for - * this chip so without a full power cycle, some registers may not be at - * their default values. Note, need to save the POR value of - * MIN_SYSTEM_VOLTAGE register prior to setting the reset so that the - * correct value is preserved. In order to have the correct value read, - * the bq25710 must not be in low power mode, otherwise the VDDA rail - * may not be powered if AC is not connected. Note, this reset is only - * required when running out of RO and not following sysjump to RW. + * Reset registers to their default settings. There is no reset + * pin for this chip so without a full power cycle, some + * registers may not be at their default values. Note, need to + * save the POR value of MIN_SYSTEM_VOLTAGE/VSYS_MIN register + * prior to setting the reset so that the correct value is + * preserved. In order to have the correct value read, the + * bq25710 must not be in low power mode, otherwise the VDDA + * rail may not be powered if AC is not connected. Note, this + * reset is only required when running out of RO and not + * following sysjump to RW. */ if (!system_jumped_late()) { rv = bq25710_set_low_power_mode(chgnum, 0); /* Allow enough time for VDDA to be powered */ msleep(BQ25710_VDDA_STARTUP_DELAY_MSEC); - rv |= raw_read16(chgnum, BQ25710_REG_MIN_SYSTEM_VOLTAGE, &vsys); + + if (IS_ENABLED( + CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM)) { + vsys = min_system_voltage_to_reg( + CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV); + } else { + rv |= raw_read16(chgnum, + BQ25710_REG_MIN_SYSTEM_VOLTAGE, &vsys); + } + rv |= raw_read16(chgnum, BQ25710_REG_CHARGE_OPTION_3, ®); if (!rv) { - reg |= BQ25710_CHARGE_OPTION_3_RESET_REG; + reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_3, RESET_REG, + 1, reg); /* Set all registers to default values */ raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_3, reg); /* Restore VSYS_MIN voltage to POR reset value */ @@ -251,64 +546,24 @@ static void bq25710_init(int chgnum) bq25710_set_low_power_mode(chgnum, 1); } - if (!raw_read16(chgnum, BQ25710_REG_PROCHOT_OPTION_1, ®)) { - /* Disable VDPM prochot profile at initialization */ - reg &= ~BQ25710_PROCHOT_PROFILE_VDPM; - /* - * Enable PROCHOT to be asserted with VSYS min detection. Note - * that when no battery is present, then VSYS will be set to the - * value in register 0x3E (MinSysVoltage) which means that when - * no battery is present prochot will continuosly be asserted. - */ - reg |= BQ25710_PROCHOT_PROFILE_VSYS; -#ifdef CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA - /* - * Set the IDCHG limit who's value is defined in the config - * option in mA. Also, enable IDCHG trigger for prochot. - */ - reg &= ~BQ25710_PROCHOT_IDCHG_VTH_MASK; - /* - * IDCHG limit is in 512 mA steps. Note there is a 128 mA offset - * so the actual IDCHG limit will be the value stored in bits - * 15:10 + 128 mA. - */ - reg |= ((CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA << 1) & - BQ25710_PROCHOT_IDCHG_VTH_MASK); - reg |= BQ25710_PROCHOT_PROFILE_IDCHG; -#endif - raw_write16(chgnum, BQ25710_REG_PROCHOT_OPTION_1, reg); -#ifdef CONFIG_CHARGER_BQ25720_VSYS_TH2_DV - /* - * The default VSYS_TH2 is 5.9v for a 2S config. Boards - * may need to increase this for stability. PROCHOT is - * asserted when the threshold is reached. - */ - if (!raw_read16(chgnum, BQ25720_REG_VMIN_ACTIVE_PROTECTION, - ®)) { - reg &= ~BQ25720_VMIN_AP_VSYS_TH2_MASK; - reg |= VMIN_AP_VSYS_TH2_TO_REG( - CONFIG_CHARGER_BQ25720_VSYS_TH2_DV) << - BQ25720_VMIN_AP_VSYS_TH2_SHIFT; - raw_write16(chgnum, BQ25720_REG_VMIN_ACTIVE_PROTECTION, - reg); - } -#endif - } + bq257x0_init_charge_option_1(chgnum); + + bq257x0_init_prochot_option_1(chgnum); /* Reduce ILIM from default of 150% to 105% */ if (!raw_read16(chgnum, BQ25710_REG_PROCHOT_OPTION_0, ®)) { - reg &= ~BQ25710_PROCHOT0_ILIM_VTH_MASK; + reg = SET_BQ_FIELD(BQ257X0, PROCHOT_OPTION_0, ILIM2_VTH, 0, + reg); raw_write16(chgnum, BQ25710_REG_PROCHOT_OPTION_0, reg); } - /* - * Reduce peak power mode overload and relax cycle time from default 20 - * msec to the minimum of 5 msec. - */ - if (!raw_read16(chgnum, BQ25710_REG_CHARGE_OPTION_2, ®)) { - reg &= ~BQ25710_CHARGE_OPTION_2_TMAX_MASK; - raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_2, reg); - } + bq257x0_init_charge_option_2(chgnum); + + bq257x0_init_charge_option_3(chgnum); + + bq257x0_init_charge_option_4(chgnum); + + bq25720_init_vmin_active_protection(chgnum); } /* Charger interfaces */ @@ -343,7 +598,7 @@ static enum ec_error_list bq25710_get_status(int chgnum, int *status) /* Default status */ *status = CHARGER_LEVEL_2; - if (option & BQ25710_CHARGE_OPTION_0_CHRG_INHIBIT) + if (option & BQ_FIELD_MASK(BQ257X0, CHARGE_OPTION_0, CHRG_INHIBIT)) *status |= CHARGER_CHARGE_INHIBITED; return EC_SUCCESS; @@ -359,9 +614,11 @@ static enum ec_error_list bq25710_set_mode(int chgnum, int mode) return rv; if (mode & CHARGER_CHARGE_INHIBITED) - option |= BQ25710_CHARGE_OPTION_0_CHRG_INHIBIT; + option = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, CHRG_INHIBIT, 1, + option); else - option &= ~BQ25710_CHARGE_OPTION_0_CHRG_INHIBIT; + option = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, CHRG_INHIBIT, 0, + option); return bq25710_set_option(chgnum, option); } @@ -418,9 +675,11 @@ static enum ec_error_list bq25710_discharge_on_ac(int chgnum, int enable) return rv; if (enable) - option |= BQ25710_CHARGE_OPTION_0_EN_LEARN; + option = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, EN_LEARN, 1, + option); else - option &= ~BQ25710_CHARGE_OPTION_0_EN_LEARN; + option = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_0, EN_LEARN, 0, + option); return bq25710_set_option(chgnum, option); } @@ -431,7 +690,7 @@ static enum ec_error_list bq25710_set_input_current_limit(int chgnum, int num_steps = iin_host_current_to_reg(input_current); return raw_write16(chgnum, BQ25710_REG_IIN_HOST, - num_steps << BQ25710_IIN_HOST_CURRENT_SHIFT); + num_steps << BQ257X0_IIN_HOST_CURRENT_SHIFT); } static enum ec_error_list bq25710_get_input_current_limit(int chgnum, @@ -449,7 +708,7 @@ static enum ec_error_list bq25710_get_input_current_limit(int chgnum, if (!rv) *input_current = iin_dpm_reg_to_current(reg >> - BQ25710_IIN_DPM_CURRENT_SHIFT); + BQ257X0_IIN_DPM_CURRENT_SHIFT); return rv; } @@ -497,7 +756,8 @@ static enum ec_error_list bq25710_get_vbus_voltage(int chgnum, int port, { int reg, rv; - rv = bq25710_adc_start(chgnum, BQ25710_ADC_OPTION_EN_ADC_VBUS); + rv = bq25710_adc_start(chgnum, BQ_FIELD_MASK(BQ257X0, ADC_OPTION, + EN_ADC_VBUS)); if (rv) goto error; @@ -506,7 +766,7 @@ static enum ec_error_list bq25710_get_vbus_voltage(int chgnum, int port, if (rv) goto error; - reg >>= BQ25710_ADC_VBUS_STEP_BIT_OFFSET; + reg >>= BQ257X0_ADC_VBUS_PSYS_VBUS_SHIFT; *voltage = reg_adc_vbus_to_mv(reg); error: @@ -597,22 +857,26 @@ static enum ec_error_list bq25710_set_hw_ramp(int chgnum, int enable) return rv; /* Enable ICO algorithm */ - option3_reg |= BQ25710_CHARGE_OPTION_3_EN_ICO_MODE; + option3_reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_3, + EN_ICO_MODE, 1, option3_reg); /* 0b: Input current limit is set by BQ25710_REG_IIN_HOST */ - option2_reg &= ~BQ25710_CHARGE_OPTION_2_EN_EXTILIM; + option2_reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_2, + EN_EXTILIM, 0, option2_reg); /* Charge ramp may take up to 2s to settle down */ hook_call_deferred(&bq25710_chg_ramp_handle_data, (4 * SECOND)); } else { /* Disable ICO algorithm */ - option3_reg &= ~BQ25710_CHARGE_OPTION_3_EN_ICO_MODE; + option3_reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_3, + EN_ICO_MODE, 0, option3_reg); /* * 1b: Input current limit is set by the lower value of * ILIM_HIZ pin and BQ25710_REG_IIN_HOST */ - option2_reg |= BQ25710_CHARGE_OPTION_2_EN_EXTILIM; + option2_reg = SET_BQ_FIELD(BQ257X0, CHARGE_OPTION_2, + EN_EXTILIM, 1, option2_reg); } rv = raw_write16(chgnum, BQ25710_REG_CHARGE_OPTION_2, option2_reg); @@ -628,7 +892,7 @@ static int bq25710_ramp_is_stable(int chgnum) if (raw_read16(chgnum, BQ25710_REG_CHARGER_STATUS, ®)) return 0; - return reg & BQ25710_CHARGE_STATUS_ICO_DONE; + return reg & BQ_FIELD_MASK(BQ257X0, CHARGER_STATUS, ICO_DONE); } static int bq25710_ramp_get_current_limit(int chgnum) @@ -642,7 +906,7 @@ static int bq25710_ramp_get_current_limit(int chgnum) return 0; } - return iin_dpm_reg_to_current(reg >> BQ25710_IIN_DPM_CURRENT_SHIFT); + return iin_dpm_reg_to_current(reg >> BQ257X0_IIN_DPM_CURRENT_SHIFT); } #endif /* CONFIG_CHARGE_RAMP_HW */ @@ -666,12 +930,10 @@ DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, bq25710_chipset_suspend, HOOK_PRIO_DEFAULT); #endif #ifdef CONFIG_CMD_CHARGER_DUMP -static int console_bq25710_dump_regs(int argc, char **argv) +static void console_bq25710_dump_regs(int chgnum) { int i; int val; - int chgnum = 0; - char *e; /* Dump all readable registers on bq25710. */ static const uint8_t regs[] = { @@ -703,25 +965,13 @@ static int console_bq25710_dump_regs(int argc, char **argv) BQ25710_REG_MANUFACTURER_ID, BQ25710_REG_DEVICE_ADDRESS, }; - if (argc >= 2) { - chgnum = strtoi(argv[1], &e, 10); - if (*e) - return EC_ERROR_PARAM1; - } for (i = 0; i < ARRAY_SIZE(regs); ++i) { if (raw_read16(chgnum, regs[i], &val)) continue; ccprintf("BQ25710 REG 0x%02x: 0x%04x\n", regs[i], val); } - - - return 0; } -DECLARE_CONSOLE_COMMAND(charger_dump, console_bq25710_dump_regs, - "charger_dump <chgnum>", - "Dump all charger registers"); - #endif /* CONFIG_CMD_CHARGER_DUMP */ const struct charger_drv bq25710_drv = { @@ -749,4 +999,7 @@ const struct charger_drv bq25710_drv = { .ramp_is_stable = &bq25710_ramp_is_stable, .ramp_get_current_limit = &bq25710_ramp_get_current_limit, #endif /* CONFIG_CHARGE_RAMP_HW */ +#ifdef CONFIG_CMD_CHARGER_DUMP + .dump_registers = &console_bq25710_dump_regs, +#endif }; diff --git a/driver/charger/bq25710.h b/driver/charger/bq25710.h index 68c7619ceb..603f3bf140 100644 --- a/driver/charger/bq25710.h +++ b/driver/charger/bq25710.h @@ -30,10 +30,8 @@ #define BQ25710_REG_PROCHOT_OPTION_0 0x33 #define BQ25710_REG_PROCHOT_OPTION_1 0x34 #define BQ25710_REG_ADC_OPTION 0x35 -#ifdef CONFIG_CHARGER_BQ25720 #define BQ25720_REG_CHARGE_OPTION_4 0x36 #define BQ25720_REG_VMIN_ACTIVE_PROTECTION 0x37 -#endif #define BQ25710_REG_OTG_VOLTAGE 0x3B #define BQ25710_REG_OTG_CURRENT 0x3C #define BQ25710_REG_INPUT_VOLTAGE 0x3D @@ -42,37 +40,6 @@ #define BQ25710_REG_MANUFACTURER_ID 0xFE #define BQ25710_REG_DEVICE_ADDRESS 0xFF -/* ChargeOption0 Register */ -#define BQ25710_CHARGE_OPTION_0_LOW_POWER_MODE BIT(15) -#define BQ25710_CHARGE_OPTION_0_IDPM_AUTO_DIS BIT(12) -#define BQ25710_CHARGE_OPTION_0_EN_LEARN BIT(5) -#define BQ25710_CHARGE_OPTION_0_IADP_GAIN BIT(4) -#define BQ25710_CHARGE_OPTION_0_EN_IDPM BIT(1) -#define BQ25710_CHARGE_OPTION_0_CHRG_INHIBIT BIT(0) - -/* ChargeOption2 Register */ -#define BQ25710_CHARGE_OPTION_2_EN_EXTILIM BIT(7) -#define BQ25710_CHARGE_OPTION_2_TMAX_SHIFT 8 -#define BQ25710_CHARGE_OPTION_2_TMAX_MASK (0x3 << \ - BQ25710_CHARGE_OPTION_2_TMAX_SHIFT) - -/* ChargeOption3 Register */ -#define BQ25710_CHARGE_OPTION_3_RESET_REG BIT(14) -#define BQ25710_CHARGE_OPTION_3_EN_ICO_MODE BIT(11) - -/* ChargeStatus Register */ -#define BQ25710_CHARGE_STATUS_ICO_DONE BIT(14) - -/* IIN_DPM Register */ -#define BQ25710_IIN_DPM_CURRENT_SHIFT 8 -#define BQ25710_IIN_DPM_CURRENT_STEP_MA 50 - -/* ADCOption Register */ -#define BQ25710_ADC_OPTION_ADC_START BIT(14) -#define BQ25710_ADC_OPTION_EN_ADC_VBUS BIT(6) -#define BQ25710_ADC_OPTION_EN_ADC_IIN BIT(4) -#define BQ25710_ADC_OPTION_EN_ADC_ALL 0xFF - /* ADC conversion time ins ms */ #if defined(CONFIG_CHARGER_BQ25720) #define BQ25710_ADC_OPTION_ADC_CONV_MS 25 @@ -91,43 +58,10 @@ #else #error Only the BQ25720 and BQ25710 are supported by bq25710 driver. #endif -#define BQ25710_ADC_VBUS_STEP_BIT_OFFSET 8 - -/* ADCIIN Register */ -#define BQ25710_ADC_IIN_STEP_MA 50 -#define BQ25710_ADC_IIN_STEP_BIT_OFFSET 8 - -/* ProchotOption0 Register */ -#define BQ25710_PROCHOT0_ILIM_VTH_SHIFT 11 -#define BQ25710_PROCHOT0_ILIM_VTH_MASK (0x1f << \ - BQ25710_PROCHOT0_ILIM_VTH_SHIFT) - -/* ProchotOption1 Register */ -#define BQ25710_PROCHOT_PROFILE_VDPM BIT(7) -#define BQ25710_PROCHOT_PROFILE_IDCHG BIT(3) -#define BQ25710_PROCHOT_PROFILE_VSYS BIT(2) -#define BQ25710_PROCHOT_IDCHG_VTH_MASK 0xFC00 - -/* IIN_HOST Register */ -#define BQ25710_IIN_HOST_CURRENT_SHIFT 8 -#define BQ25710_IIN_HOST_CURRENT_STEP_MA 50 - -#if defined(CONFIG_CHARGER_BQ25720) -/* Vmin Active Protection Register */ -#define BQ25720_VMIN_AP_VSYS_TH2_SHIFT 2 -#define BQ25720_VMIN_AP_VSYS_TH2_MASK GENMASK(7, \ - BQ25720_VMIN_AP_VSYS_TH2_SHIFT) -#endif /* Min System Voltage Register */ -#if defined(CONFIG_CHARGER_BQ25720) #define BQ25710_MIN_SYSTEM_VOLTAGE_STEP_MV 100 -#elif defined(CONFIG_CHARGER_BQ25710) -#define BQ25710_MIN_SYSTEM_VOLTAGE_STEP_MV 256 -#else -#error Only the BQ25720 and BQ25710 are supported by bq25710 driver. -#endif -#define BQ25710_MIN_SYSTEM_VOLTAGE_SHIFT 8 +#define BQ25720_VSYS_MIN_VOLTAGE_STEP_MV 256 extern const struct charger_drv bq25710_drv; diff --git a/driver/charger/bq257x0_regs.h b/driver/charger/bq257x0_regs.h new file mode 100644 index 0000000000..455233d501 --- /dev/null +++ b/driver/charger/bq257x0_regs.h @@ -0,0 +1,280 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * TI bq257x0 battery charger driver. + */ + +#ifndef __CROS_EC_BQ257X0_REGS_H +#define __CROS_EC_BQ257X0_REGS_H + +#include "bq25710.h" + +/* + * BQ257x0 family register definitions. + * + * Common registers are prefixed with BQ257X0, chip specific registers + * and registers with incompatible definitions are prefixed with + * BQ25710, BQ25720, etc. + */ + +/* + * ChargerStatus Register (0x20) + */ +#define BQ257X0_CHARGER_STATUS_ICO_DONE_SHIFT 14 +#define BQ257X0_CHARGER_STATUS_ICO_DONE_BITS 1 + +/* + * ChargeOption0 Register (0x12) + */ +#define BQ257X0_CHARGE_OPTION_0_EN_LWPWR_SHIFT 15 +#define BQ257X0_CHARGE_OPTION_0_EN_LWPWR_BITS 1 +#define BQ257X0_CHARGE_OPTION_0_EN_LEARN_SHIFT 5 +#define BQ257X0_CHARGE_OPTION_0_EN_LEARN_BITS 1 +#define BQ257X0_CHARGE_OPTION_0_IADP_GAIN_SHIFT 4 +#define BQ257X0_CHARGE_OPTION_0_IADP_GAIN_BITS 1 +#define BQ257X0_CHARGE_OPTION_0_EN_IDPM_SHIFT 1 +#define BQ257X0_CHARGE_OPTION_0_EN_IDPM_BITS 1 +#define BQ257X0_CHARGE_OPTION_0_CHRG_INHIBIT_SHIFT 0 +#define BQ257X0_CHARGE_OPTION_0_CHRG_INHIBIT_BITS 1 + +/* + * ChargeOption1 Register (0x30) + */ +#define BQ25710_CHARGE_OPTION_1_EN_PSYS_SHIFT 12 +#define BQ25710_CHARGE_OPTION_1_EN_PSYS_BITS 1 + +#define BQ25720_CHARGE_OPTION_1_PSYS_CONFIG_SHIFT 12 +#define BQ25720_CHARGE_OPTION_1_PSYS_CONFIG_BITS 2 +#define BQ25720_CHARGE_OPTION_1_PSYS_CONFIG__PBUS_PBAT 0 +#define BQ25720_CHARGE_OPTION_1_PSYS_CONFIG__OFF 3 + +#define BQ257X0_CHARGE_OPTION_1_CMP_REF_SHIFT 7 +#define BQ257X0_CHARGE_OPTION_1_CMP_REF_BITS 1 +#define BQ257X0_CHARGE_OPTION_1_CMP_REF__2P3 0 +#define BQ257X0_CHARGE_OPTION_1_CMP_REF__1P2 1 + +/* + * ChargeOption2 Register (0x31) + */ +#define BQ257X0_CHARGE_OPTION_2_PKPWR_TOVLD_DEG_SHIFT 14 +#define BQ257X0_CHARGE_OPTION_2_PKPWR_TOVLD_DEG_BITS 2 +#define BQ25720_CHARGE_OPTION_2_PKPWR_TOVLD_DEG__10MS 3 + +#define BQ257X0_CHARGE_OPTION_2_PKPWR_TMAX_SHIFT 8 +#define BQ257X0_CHARGE_OPTION_2_PKPWR_TMAX_BITS 2 + +#define BQ257X0_CHARGE_OPTION_2_EN_EXTILIM_SHIFT 7 +#define BQ257X0_CHARGE_OPTION_2_EN_EXTILIM_BITS 1 + +#define BQ257X0_CHARGE_OPTION_2_EN_ACOC_SHIFT 3 +#define BQ257X0_CHARGE_OPTION_2_EN_ACOC_BITS 1 +#define BQ257X0_CHARGE_OPTION_2_EN_ACOC__DISABLE 0 +#define BQ257X0_CHARGE_OPTION_2_EN_ACOC__ENABLE 1 + +#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH_SHIFT 2 +#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH_BITS 1 +#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH__1P33 0 +#define BQ257X0_CHARGE_OPTION_2_ACOC_VTH__2P00 1 + +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH_SHIFT 0 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH_BITS 1 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH__1P33 0 +#define BQ257X0_CHARGE_OPTION_2_BATOC_VTH__2P00 1 + +/* + * ChargeOption3 Register (0x32) + */ +#define BQ257X0_CHARGE_OPTION_3_RESET_REG_SHIFT 14 +#define BQ257X0_CHARGE_OPTION_3_RESET_REG_BITS 1 + +#define BQ257X0_CHARGE_OPTION_3_EN_ICO_MODE_SHIFT 11 +#define BQ257X0_CHARGE_OPTION_3_EN_ICO_MODE_BITS 1 + +#define BQ257X0_CHARGE_OPTION_3_IL_AVG_SHIFT 3 +#define BQ257X0_CHARGE_OPTION_3_IL_AVG_BITS 2 +#define BQ257X0_CHARGE_OPTION_3_IL_AVG__10A 1 + +/* + * ChargeOption4 Register (0x36) + */ +#define BQ25720_CHARGE_OPTION_4_VSYS_UVP_SHIFT 13 +#define BQ25720_CHARGE_OPTION_4_VSYS_UVP_BITS 3 +#define BQ25720_CHARGE_OPTION_4_VSYS_UVP__2P4 0 +#define BQ25720_CHARGE_OPTION_4_VSYS_UVP__4P0 2 + +#define BQ25720_CHARGE_OPTION_4_IDCHG_DEG2_SHIFT 6 +#define BQ25720_CHARGE_OPTION_4_IDCHG_DEG2_BITS 2 +#define BQ25720_CHARGE_OPTION_4_IDCHG_DEG2__1P6MS 1 +#define BQ25720_CHARGE_OPTION_4_IDCHG_DEG2__12MS 3 + +#define BQ25720_CHARGE_OPTION_4_IDCHG_TH2_SHIFT 3 +#define BQ25720_CHARGE_OPTION_4_IDCHG_TH2_BITS 3 +#define BQ25720_CHARGE_OPTION_4_IDCHG_TH2__1P25 0 +#define BQ25720_CHARGE_OPTION_4_IDCHG_TH2__1P5 1 + +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2_SHIFT 2 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2_BITS 1 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2__DISABLE 0 +#define BQ25720_CHARGE_OPTION_4_PP_IDCHG2__ENABLE 1 + +/* + * Vmin Active Protection Register (0x37) + */ +#define BQ25720_VMIN_AP_VSYS_TH2_SHIFT 2 +#define BQ25720_VMIN_AP_VSYS_TH2_BITS 6 + +/* + * ProchotOption0 Register (0x33) + */ +#define BQ257X0_PROCHOT_OPTION_0_ILIM2_VTH_SHIFT 11 +#define BQ257X0_PROCHOT_OPTION_0_ILIM2_VTH_BITS 5 + +/* + * ProchotOption1 Register (0x34) + */ +#define BQ257X0_PROCHOT_OPTION_1_IDCHG_VTH_SHIFT 10 +#define BQ257X0_PROCHOT_OPTION_1_IDCHG_VTH_BITS 6 + +#define BQ257X0_PROCHOT_OPTION_1_PP_INOM_SHIFT 4 +#define BQ257X0_PROCHOT_OPTION_1_PP_INOM_BITS 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_INOM__DISABLE 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_INOM__ENABLE 1 + +#define BQ257X0_PROCHOT_OPTION_1_PP_IDCHG_SHIFT 3 +#define BQ257X0_PROCHOT_OPTION_1_PP_IDCHG_BITS 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_IDCHG__DISABLE 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_IDCHG__ENABLE 1 + +#define BQ257X0_PROCHOT_OPTION_1_PP_VDPM_SHIFT 7 +#define BQ257X0_PROCHOT_OPTION_1_PP_VDPM_BITS 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_VDPM__DISABLE 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_VDPM__ENABLE 1 + +#define BQ257X0_PROCHOT_OPTION_1_PP_VSYS_SHIFT 2 +#define BQ257X0_PROCHOT_OPTION_1_PP_VSYS_BITS 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_VSYS__DISABLE 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_VSYS__ENABLE 1 + +#define BQ257X0_PROCHOT_OPTION_1_PP_BATPRES_SHIFT 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_BATPRES_BITS 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_BATPRES__DISABLE 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_BATPRES__ENABLE 1 + +#define BQ257X0_PROCHOT_OPTION_1_PP_ACOK_SHIFT 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_ACOK_BITS 1 +#define BQ257X0_PROCHOT_OPTION_1_PP_ACOK__DISABLE 0 +#define BQ257X0_PROCHOT_OPTION_1_PP_ACOK__ENABLE 1 + +/* + * ChargeCurrent Register (0x14) + */ +#define BQ257X0_CHARGE_CURRENT_CHARGE_CURRENT_SHIFT 6 +#define BQ257X0_CHARGE_CURRENT_CHARGE_CURRENT_BITS 7 + +/* + * IIN_DPM Register (0x22) + */ +#define BQ257X0_IIN_DPM_CURRENT_SHIFT 8 +#define BQ257X0_IIN_DPM_CURRENT_BITS 7 +#define BQ257X0_IIN_DPM_CURRENT_STEP_MA 50 + +/* + * IIN_HOST Register (0x3f) + */ +#define BQ257X0_IIN_HOST_CURRENT_SHIFT 8 +#define BQ257X0_IIN_HOST_CURRENT_BITS 7 +#define BQ257X0_IIN_HOST_CURRENT_STEP_MA 50 + +/* + * ADCOption Register (0x35) + */ +#define BQ257X0_ADC_OPTION_ADC_START_SHIFT 14 +#define BQ257X0_ADC_OPTION_ADC_START_BITS 1 +#define BQ257X0_ADC_OPTION_ADC_FULLSCALE_SHIFT 13 +#define BQ257X0_ADC_OPTION_ADC_FULLSCALE_BITS 1 + +#define BQ257X0_ADC_OPTION_EN_ADC_VBUS_SHIFT 6 +#define BQ257X0_ADC_OPTION_EN_ADC_VBUS_BITS 1 +#define BQ257X0_ADC_OPTION_EN_ADC_ALL GENMASK(7, 0) + +/* + * ADCVBUS/PSYS Register (0x23) + */ +#define BQ257X0_ADC_VBUS_PSYS_VBUS_SHIFT 8 +#define BQ257X0_ADC_VBUS_PSYS_VBUS_BITS 8 +#define BQ257X0_ADC_VBUS_PSYS_PSYS_SHIFT 0 +#define BQ257X0_ADC_VBUS_PSYS_PSYS_BITS 8 + +/* + * VSYS_MIN Register (0x3e) + */ +#define BQ25710_MIN_SYSTEM_VOLTAGE_SHIFT 8 +#define BQ25710_MIN_SYSTEM_VOLTAGE_BITS 6 +#define BQ25720_VSYS_MIN_VOLTAGE_SHIFT 8 +#define BQ25720_VSYS_MIN_VOLTAGE_BITS 8 + +/* + * BQ257x0 register field accessor macros. + */ + +/* + * Returns the bitmask of a register field. + * + * _chip chip name + * _reg chip register name + * _field register field name + */ + +#define BQ_FIELD_MASK(_chip, _reg, _field) \ + GENMASK( \ + (_chip##_##_reg##_##_field##_SHIFT + \ + _chip##_##_reg##_##_field##_BITS - 1), \ + _chip##_##_reg##_##_field##_SHIFT) + +/* + * Given a register value, returns the value of the specified field. + * + * _chip chip name + * _reg chip register name + * _field register field name + * _x the value of the register to be examined + */ + +#define GET_BQ_FIELD(_chip, _reg, _field, _x) \ + (((_x) >> _chip##_##_reg##_##_field##_SHIFT) & \ + GENMASK(_chip##_##_reg##_##_field##_BITS - 1, 0)) + +/* + * Given a register value, sets the specified field to the given value, + * and returns the resulting register value. + * + * _chip chip name + * _reg chip register name + * _field register field name + * _v register field value + * _x the initial value of the register + */ + +#define SET_BQ_FIELD(_chip, _reg, _field, _v, _x) \ + (((_x) & ~BQ_FIELD_MASK(_chip, _reg, _field)) | \ + (((_v) & \ + GENMASK(_chip##_##_reg##_##_field##_BITS - 1, 0)) << \ + _chip##_##_reg##_##_field##_SHIFT)) + +/* + * Given a register value, sets the specified field to the predefined + * constant, and returns the resulting register value. + * + * _chip chip name + * _reg chip register name + * _field register field name + * _c register field value constant name + * _x the initial value of the register + */ + +#define SET_BQ_FIELD_BY_NAME(_chip, _reg, _field, _c, _x) \ + SET_BQ_FIELD(_chip, _reg, _field, \ + _chip##_##_reg##_##_field##__##_c, (_x)) + +#endif /* __CROS_EC_BQ257X0_REGS_H */ diff --git a/driver/charger/isl923x.c b/driver/charger/isl923x.c index 7603350a84..7861ec95bc 100644 --- a/driver/charger/isl923x.c +++ b/driver/charger/isl923x.c @@ -1185,17 +1185,8 @@ static void dump_reg_range(int chgnum, int low, int high) } } -static int command_isl923x_dump(int argc, char **argv) +static void command_isl923x_dump(int chgnum) { - int chgnum = 0; - char *e; - - if (argc >= 2) { - chgnum = strtoi(argv[1], &e, 10); - if (*e) - return EC_ERROR_PARAM1; - } - dump_reg_range(chgnum, 0x14, 0x15); if (IS_ENABLED(CONFIG_CHARGER_ISL9238C)) dump_reg_range(chgnum, 0x37, 0x37); @@ -1205,11 +1196,7 @@ static int command_isl923x_dump(int argc, char **argv) IS_ENABLED(CONFIG_CHARGER_RAA489000)) dump_reg_range(chgnum, 0x4B, 0x4E); dump_reg_range(chgnum, 0xFE, 0xFF); - - return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(charger_dump, command_isl923x_dump, - "charger_dump <chgnum>", "Dumps ISL923x registers"); #endif /* CONFIG_CMD_CHARGER_DUMP */ static enum ec_error_list isl923x_get_vbus_voltage(int chgnum, int port, @@ -1295,6 +1282,7 @@ static enum ec_error_list raa489000_enable_linear_charge(int chgnum, rv = raw_update16(CHARGER_PRIMARY, RAA489000_REG_CONTROL10, RAA489000_C10_ENABLE_DVC_TRICKLE_CHARGE, MASK_CLR); + rv |= isl9237_set_current(CHARGER_PRIMARY, 0); } return rv; @@ -1457,4 +1445,7 @@ const struct charger_drv isl923x_drv = { .enable_linear_charge = &raa489000_enable_linear_charge, .set_vsys_compensation = &raa489000_set_vsys_compensation, #endif +#ifdef CONFIG_CMD_CHARGER_DUMP + .dump_registers = &command_isl923x_dump, +#endif }; diff --git a/driver/charger/isl9241.c b/driver/charger/isl9241.c index d53c8998ba..45073e1897 100644 --- a/driver/charger/isl9241.c +++ b/driver/charger/isl9241.c @@ -546,17 +546,8 @@ static void dump_reg_range(int chgnum, int low, int high) } } -static int command_isl9241_dump(int argc, char **argv) +static void command_isl9241_dump(int chgnum) { - char *e; - int chgnum = 0; - - if (argc >= 2) { - chgnum = strtoi(argv[1], &e, 10); - if (*e) - return EC_ERROR_PARAM1; - } - dump_reg_range(chgnum, 0x14, 0x15); dump_reg_range(chgnum, 0x38, 0x40); dump_reg_range(chgnum, 0x43, 0x43); @@ -564,12 +555,7 @@ static int command_isl9241_dump(int argc, char **argv) dump_reg_range(chgnum, 0x80, 0x87); dump_reg_range(chgnum, 0x90, 0x91); dump_reg_range(chgnum, 0xFE, 0xFF); - - return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(charger_dump, command_isl9241_dump, - "charger_dump <chgnum>", - "Dumps ISL9241 registers"); #endif /* CONFIG_CMD_CHARGER_DUMP */ const struct charger_drv isl9241_drv = { @@ -596,4 +582,7 @@ const struct charger_drv isl9241_drv = { .ramp_is_detected = &isl9241_ramp_is_detected, .ramp_get_current_limit = &isl9241_ramp_get_current_limit, #endif +#ifdef CONFIG_CMD_CHARGER_DUMP + .dump_registers = &command_isl9241_dump, +#endif }; diff --git a/driver/charger/sm5803.c b/driver/charger/sm5803.c index 460dcf4093..43a54d798b 100644 --- a/driver/charger/sm5803.c +++ b/driver/charger/sm5803.c @@ -1850,14 +1850,10 @@ static int sm5803_ramp_get_current_limit(int chgnum) #endif /* CONFIG_CHARGE_RAMP_HW */ #ifdef CONFIG_CMD_CHARGER_DUMP -static int command_sm5803_dump(int argc, char **argv) +static void command_sm5803_dump(int chgnum) { int reg; int regval; - int chgnum = 0; - - if (argc > 1) - chgnum = atoi(argv[1]); /* Dump base regs */ ccprintf("BASE regs\n"); @@ -1891,11 +1887,7 @@ static int command_sm5803_dump(int argc, char **argv) watchdog_reload(); } } - - return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(charger_dump, command_sm5803_dump, - "charger_dump [chgnum]", "Dumps SM5803 registers"); #endif /* CONFIG_CMD_CHARGER_DUMP */ const struct charger_drv sm5803_drv = { @@ -1930,4 +1922,7 @@ const struct charger_drv sm5803_drv = { .ramp_is_detected = &sm5803_ramp_is_detected, .ramp_get_current_limit = &sm5803_ramp_get_current_limit, #endif +#ifdef CONFIG_CMD_CHARGER_DUMP + .dump_registers = &command_sm5803_dump, +#endif }; diff --git a/driver/ioexpander/ccgxxf.c b/driver/ioexpander/ccgxxf.c index ac079d7b2f..347a2c7587 100644 --- a/driver/ioexpander/ccgxxf.c +++ b/driver/ioexpander/ccgxxf.c @@ -14,6 +14,10 @@ #define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args) +#ifdef CONFIG_IO_EXPANDER_SUPPORT_GET_PORT +#error "This driver doesn't support get_port function" +#endif + static inline int ccgxxf_read8(int ioex, int reg, int *data) { return i2c_read8(ioex_config[ioex].i2c_host_port, diff --git a/driver/ioexpander/ioexpander_nct38xx.c b/driver/ioexpander/ioexpander_nct38xx.c index 8c87a33d24..6d30e4ecc3 100644 --- a/driver/ioexpander/ioexpander_nct38xx.c +++ b/driver/ioexpander/ioexpander_nct38xx.c @@ -16,6 +16,10 @@ #define CPRINTF(format, args...) cprintf(CC_GPIO, format, ## args) #define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args) +#ifdef CONFIG_IO_EXPANDER_SUPPORT_GET_PORT +#error "This driver doesn't support get_port function" +#endif + /* * Store the GPIO_ALERT_MASK_0/1 and chip ID registers locally. In this way, * we don't have to read it via I2C transaction everytime. diff --git a/driver/ioexpander/it8801.c b/driver/ioexpander/it8801.c index 96070074fb..9bb6ca4487 100644 --- a/driver/ioexpander/it8801.c +++ b/driver/ioexpander/it8801.c @@ -19,6 +19,10 @@ #define CPRINTS(format, args...) cprints(CC_KEYSCAN, format, ## args) +#ifdef CONFIG_IO_EXPANDER_SUPPORT_GET_PORT +#error "This driver doesn't support get_port function" +#endif + static int it8801_ioex_set_level(int ioex, int port, int mask, int value); static void it8801_ioex_event_handler(void); DECLARE_DEFERRED(it8801_ioex_event_handler); @@ -655,6 +659,11 @@ static int it8801_kblight_enable(int enable) return EC_SUCCESS; } +static int it8801_kblight_get_enabled(void) +{ + return it8801_pwm_get_enabled(it8801_kblight_pwm_ch); +} + static int it8801_kblight_set_brightness(int percent) { it8801_pwm_set_duty(it8801_kblight_pwm_ch, percent); @@ -678,6 +687,7 @@ const struct kblight_drv kblight_it8801 = { .set = it8801_kblight_set_brightness, .get = it8801_kblight_get_brightness, .enable = it8801_kblight_enable, + .get_enabled = it8801_kblight_get_enabled, }; #endif #endif /* CONFIG_IO_EXPANDER_IT8801_PWM */ diff --git a/driver/ioexpander/pca9675.c b/driver/ioexpander/pca9675.c index 3fe3bfa0c4..2bef06d19e 100644 --- a/driver/ioexpander/pca9675.c +++ b/driver/ioexpander/pca9675.c @@ -9,6 +9,10 @@ #include "ioexpander.h" #include "pca9675.h" +#ifdef CONFIG_IO_EXPANDER_SUPPORT_GET_PORT +#error "This driver doesn't support get_port function" +#endif + struct pca9675_ioexpander { /* I/O port direction (1 = input, 0 = output) */ uint16_t io_direction; diff --git a/driver/ioexpander/pcal6408.c b/driver/ioexpander/pcal6408.c index 287e0506d0..46de96b595 100644 --- a/driver/ioexpander/pcal6408.c +++ b/driver/ioexpander/pcal6408.c @@ -15,6 +15,10 @@ #define CPRINTF(format, args...) cprintf(CC_GPIO, format, ## args) #define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args) +#ifdef CONFIG_IO_EXPANDER_SUPPORT_GET_PORT +#error "This driver doesn't support get_port function" +#endif + /* * Store interrupt mask registers locally. In this way, * we don't have to read it via i2c transaction every time. diff --git a/driver/ioexpander/tca64xxa.c b/driver/ioexpander/tca64xxa.c index 9a70ceec11..5bbaf92521 100644 --- a/driver/ioexpander/tca64xxa.c +++ b/driver/ioexpander/tca64xxa.c @@ -25,7 +25,8 @@ static int tca64xxa_write_byte(int ioex, int port, int reg, uint8_t val) { const struct ioexpander_config_t *ioex_p = &ioex_config[ioex]; - const int reg_addr = TCA64XXA_PORT_ID(port, reg, ioex_p->flags); + const int reg_addr = TCA64XXA_PORT_ID(port, reg, + (ioex_p->flags & IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6416A) ? 2:4); return i2c_write8(ioex_p->i2c_host_port, ioex_p->i2c_addr_flags, @@ -36,7 +37,8 @@ static int tca64xxa_write_byte(int ioex, int port, int reg, uint8_t val) static int tca64xxa_read_byte(int ioex, int port, int reg, int *val) { const struct ioexpander_config_t *ioex_p = &ioex_config[ioex]; - const int reg_addr = TCA64XXA_PORT_ID(port, reg, ioex_p->flags); + const int reg_addr = TCA64XXA_PORT_ID(port, reg, + (ioex_p->flags & IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6416A) ? 2:4); return i2c_read8(ioex_p->i2c_host_port, ioex_p->i2c_addr_flags, @@ -87,9 +89,9 @@ static int tca64xxa_init(int ioex) const struct ioexpander_config_t *ioex_p = &ioex_config[ioex]; int portsCount; - if (ioex_p->flags & TCA64XXA_FLAG_VER_TCA6416A) + if (ioex_p->flags & IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6416A) portsCount = 2; - else if (ioex_p->flags & TCA64XXA_FLAG_VER_TCA6424A) + else if (ioex_p->flags & IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6424A) portsCount = 3; else return EC_ERROR_UNIMPLEMENTED; diff --git a/driver/ioexpander/tca64xxa.h b/driver/ioexpander/tca64xxa.h index 8c3448f804..2d2e6e36bc 100644 --- a/driver/ioexpander/tca64xxa.h +++ b/driver/ioexpander/tca64xxa.h @@ -6,8 +6,11 @@ #ifndef __CROS_EC_DRIVER_IOEXPANDER_TCA64XXA_H_ #define __CROS_EC_DRIVER_IOEXPANDER_TCA64XXA_H_ -#define TCA64XXA_FLAG_VER_TCA6416A 2 -#define TCA64XXA_FLAG_VER_TCA6424A 4 +/* io-expander driver specific flag bit for tca6416a */ +#define IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6416A IOEX_FLAGS_CUSTOM_BIT(24) +/* io-expander driver specific flag bit for tca6424a */ +#define IOEX_FLAGS_TCA64XXA_FLAG_VER_TCA6424A IOEX_FLAGS_CUSTOM_BIT(25) + #define TCA64XXA_FLAG_VER_MASK GENMASK(2, 1) #define TCA64XXA_FLAG_VER_OFFSET 0 diff --git a/driver/led/lm3509.c b/driver/led/lm3509.c index 7c20c43ac2..fbd783a42e 100644 --- a/driver/led/lm3509.c +++ b/driver/led/lm3509.c @@ -54,6 +54,17 @@ static int lm3509_power(int enable) return lm3509_write(LM3509_REG_GP, enable ? 0x7 : 0); } +static int lm3509_get_power(void) +{ + int rv, val; + + rv = lm3509_read(LM3509_REG_GP, &val); + if (rv) + return -1; + /* Bit 0: Enable MAIN. Bit 1: Enable SUB/FB */ + return (val & 0x3) == 0x3 ? 1 : 0; +} + static int lm3509_set_brightness(int percent) { /* We don't need to read/mask/write BMAIN because bit6 and 7 are non @@ -82,4 +93,5 @@ const struct kblight_drv kblight_lm3509 = { .set = lm3509_set_brightness, .get = lm3509_get_brightness, .enable = lm3509_power, + .get_enabled = lm3509_get_power, }; diff --git a/driver/ppc/aoz1380.c b/driver/ppc/aoz1380.c index 4e2188c60d..935503b593 100644 --- a/driver/ppc/aoz1380.c +++ b/driver/ppc/aoz1380.c @@ -159,4 +159,5 @@ const struct ppc_drv aoz1380_drv = { .vbus_source_enable = &aoz1380_vbus_source_enable, .set_vbus_source_current_limit = &aoz1380_set_vbus_source_current_limit, + .interrupt = &aoz1380_interrupt, }; diff --git a/driver/ppc/nx20p348x.c b/driver/ppc/nx20p348x.c index a5136bbf23..b582259e04 100644 --- a/driver/ppc/nx20p348x.c +++ b/driver/ppc/nx20p348x.c @@ -563,4 +563,5 @@ const struct ppc_drv nx20p348x_drv = { #ifdef CONFIG_USBC_PPC_VCONN .set_vconn = &nx20p348x_set_vconn, #endif /* defined(CONFIG_USBC_PPC_VCONN) */ + .interrupt = &nx20p348x_interrupt, }; diff --git a/driver/ppc/sn5s330.c b/driver/ppc/sn5s330.c index 9cc5918bf1..3fa44ae803 100644 --- a/driver/ppc/sn5s330.c +++ b/driver/ppc/sn5s330.c @@ -464,7 +464,14 @@ static int sn5s330_init(int port) i2c_write8(i2c_port, i2c_addr_flags, SN5S330_INT_STATUS_REG4, regval); - /* Turn on PP2 FET. */ + /* + * Turn on PP2 FET. + * Although PP2 FET is already enabled during dead batter boot + * by the spec, we force that state here. + * + * TODO(207034759): Verify need or remove redundant PP2 set. + */ + status = sn5s330_pp_fet_enable(port, SN5S330_PP2, 1); if (status) { ppc_prints("Failed to turn on PP2 FET!", port); @@ -760,4 +767,5 @@ const struct ppc_drv sn5s330_drv = { #ifdef CONFIG_USBC_PPC_VCONN .set_vconn = &sn5s330_set_vconn, #endif + .interrupt = &sn5s330_interrupt, }; diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h index 188499e34a..fbf1159165 100644 --- a/driver/ppc/sn5s330.h +++ b/driver/ppc/sn5s330.h @@ -43,6 +43,9 @@ enum sn5s330_pp_idx { #define SN5S330_INT_STATUS_REG1 0x2F #define SN5S330_INT_STATUS_REG2 0x30 #define SN5S330_INT_STATUS_REG3 0x31 +/* + * TODO(b:205754232): Register name discrepancy + */ #define SN5S330_INT_STATUS_REG4 0x32 #define SN5S330_INT_TRIP_RISE_REG1 0x20 diff --git a/driver/ppc/syv682x.c b/driver/ppc/syv682x.c index 0e49abdf6a..722824c53d 100644 --- a/driver/ppc/syv682x.c +++ b/driver/ppc/syv682x.c @@ -834,4 +834,5 @@ const struct ppc_drv syv682x_drv = { #ifdef CONFIG_USBC_PPC_VCONN .set_vconn = &syv682x_set_vconn, #endif + .interrupt = &syv682x_interrupt, }; diff --git a/driver/retimer/kb800x.c b/driver/retimer/kb800x.c index 48e47404c2..1adcf3a07f 100644 --- a/driver/retimer/kb800x.c +++ b/driver/retimer/kb800x.c @@ -446,6 +446,8 @@ static int kb800x_set_state(const struct usb_mux *me, mux_state_t mux_state, static int kb800x_init(const struct usb_mux *me) { + bool unused; + gpio_set_level(kb800x_control[me->usb_port].usb_ls_en_gpio, 1); gpio_set_level(kb800x_control[me->usb_port].retimer_rst_gpio, 1); @@ -459,7 +461,7 @@ static int kb800x_init(const struct usb_mux *me) if (!gpio_get_level(kb800x_control[me->usb_port].retimer_rst_gpio)) return EC_ERROR_NOT_POWERED; - return kb800x_set_state(me, USB_PD_MUX_NONE); + return kb800x_set_state(me, USB_PD_MUX_NONE, &unused); } static int kb800x_enter_low_power_mode(const struct usb_mux *me) diff --git a/driver/retimer/pi3dpx1207.h b/driver/retimer/pi3dpx1207.h index 2e3405d1aa..ec3c9b42bc 100644 --- a/driver/retimer/pi3dpx1207.h +++ b/driver/retimer/pi3dpx1207.h @@ -45,7 +45,7 @@ extern const struct usb_mux_driver pi3dpx1207_usb_retimer; /* Retimer driver hardware specific controls */ struct pi3dpx1207_usb_control { /* Retimer enable */ - const enum gpio_signal enable_gpio; + const enum ioex_signal enable_gpio; /* DP Mode enable */ const enum gpio_signal dp_enable_gpio; }; diff --git a/driver/tcpm/it83xx_pd.h b/driver/tcpm/it83xx_pd.h index ff7c231f23..0c613d67ae 100644 --- a/driver/tcpm/it83xx_pd.h +++ b/driver/tcpm/it83xx_pd.h @@ -7,6 +7,8 @@ #ifndef __CROS_EC_DRIVER_TCPM_IT83XX_H #define __CROS_EC_DRIVER_TCPM_IT83XX_H +#include <stdint.h> + #include "driver/tcpm/it8xxx2_pd_public.h" /* USBPD Controller */ diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c index 11551b1a7c..e84aee8077 100644 --- a/driver/tcpm/ps8xxx.c +++ b/driver/tcpm/ps8xxx.c @@ -710,11 +710,12 @@ static int ps8xxx_get_chip_info(int port, int live, static int ps8xxx_enter_low_power_mode(int port) { /* - * PS8751 has the auto sleep function that enters low power mode on - * its own in ~2 seconds. Other chips don't have it. Stub it out for - * PS8751. + * PS8751/PS8815 has the auto sleep function that enters + * low power mode on its own in ~2 seconds. Other chips + * don't have it. Stub it out for PS8751/PS8815. */ - if (product_id[port] == PS8751_PRODUCT_ID) + if (product_id[port] == PS8751_PRODUCT_ID || + product_id[port] == PS8815_PRODUCT_ID) return EC_SUCCESS; return tcpci_enter_low_power_mode(port); @@ -772,6 +773,9 @@ __maybe_unused static int ps8815_disable_rp_detect_workaround_check(int port) ps8815_disable_rp_detect[port] = false; ps8815_disconnected[port] = true; + if (product_id[port] != PS8815_PRODUCT_ID) + return EC_SUCCESS; + reg = get_reg_by_product(port, REG_FW_VER); rv = tcpc_read(port, reg, &val); if (rv != EC_SUCCESS) diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h index 8458dbb7e5..508f185ef3 100644 --- a/driver/tcpm/ps8xxx.h +++ b/driver/tcpm/ps8xxx.h @@ -62,6 +62,12 @@ /* Vendor defined registers */ #define PS8815_P1_REG_HW_REVISION 0xF0 +/* Vendor defined registers */ +#define PS8815_REG_APTX_EQ_AT_10G 0x20 +#define PS8815_REG_RX_EQ_AT_10G 0x22 +#define PS8815_REG_APTX_EQ_AT_5G 0x24 +#define PS8815_REG_RX_EQ_AT_5G 0x26 + /* * Below register is defined from Parade PS8815 Register Table, * See b:189587527 for more detail. diff --git a/driver/tcpm/raa489000.c b/driver/tcpm/raa489000.c index c4976bab4e..65b9eeec97 100644 --- a/driver/tcpm/raa489000.c +++ b/driver/tcpm/raa489000.c @@ -317,6 +317,7 @@ const struct tcpm_drv raa489000_tcpm_drv = { .get_chip_info = &tcpci_get_chip_info, #ifdef CONFIG_USB_PD_TCPC_LOW_POWER .enter_low_power_mode = &raa489000_enter_low_power_mode, + .wake_low_power_mode = &tcpci_wake_low_power_mode, #endif .set_bist_test_mode = &tcpci_set_bist_test_mode, .tcpc_enable_auto_discharge_disconnect = diff --git a/driver/tcpm/tcpci.c b/driver/tcpm/tcpci.c index e22a284a1a..359cb04d30 100644 --- a/driver/tcpm/tcpci.c +++ b/driver/tcpm/tcpci.c @@ -580,6 +580,19 @@ int tcpci_enter_low_power_mode(int port) { return tcpc_write(port, TCPC_REG_COMMAND, TCPC_REG_COMMAND_I2CIDLE); } + +void tcpci_wake_low_power_mode(int port) +{ + /* + * TCPCI 4.8.1 I2C Interface - wake the TCPC with a throw-away command + * + * TODO(b/205140007): Align LPM exit to TCPCI spec for TCPCs which can + * correctly support it + */ + i2c_write8(tcpc_config[port].i2c_info.port, + tcpc_config[port].i2c_info.addr_flags, + TCPC_REG_COMMAND, TCPC_REG_COMMAND_WAKE_I2C); +} #endif int tcpci_tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity) @@ -1007,6 +1020,18 @@ int tcpci_tcpm_transmit(int port, enum tcpci_msg_type type, } /* + * The PRL_RX state machine should force a discard of PRL_TX any time a + * new message comes in. However, since most of the PRL_RX runs on + * the TCPC, we may receive a RX interrupt between the EC PRL_RX and + * PRL_TX state machines running. In this case, mark the message + * discarded and don't tell the TCPC to transmit. + */ + if (tcpm_has_pending_message(port)) { + pd_transmit_complete(port, TCPC_TX_COMPLETE_DISCARDED); + return EC_ERROR_BUSY; + } + + /* * We always retry in TCPC hardware since the TCPM is too slow to * respond within tRetry (~195 usec). * diff --git a/driver/temp_sensor/pct2075.c b/driver/temp_sensor/pct2075.c new file mode 100644 index 0000000000..bde1521edc --- /dev/null +++ b/driver/temp_sensor/pct2075.c @@ -0,0 +1,91 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* PCT2075 temperature sensor module for Chrome EC */ + +#include "common.h" +#include "console.h" +#include "pct2075.h" +#include "i2c.h" +#include "hooks.h" +#include "math_util.h" +#include "util.h" + +#define PCT2075_RESOLUTION 11 +#define PCT2075_SHIFT1 (16 - PCT2075_RESOLUTION) +#define PCT2075_SHIFT2 (PCT2075_RESOLUTION - 8) + +#define CPRINTS(format, args...) cprints(CC_THERMAL, format, ## args) + +static int temp_mk_local[PCT2075_COUNT]; + +static int raw_read16(int sensor, const int offset, int *data_ptr) +{ +#ifdef CONFIG_I2C_BUS_MAY_BE_UNPOWERED + /* + * Don't try to read if the port is unpowered + */ + if (!board_is_i2c_port_powered(pct2075_sensors[sensor].i2c_port)) + return EC_ERROR_NOT_POWERED; +#endif + return i2c_read16(pct2075_sensors[sensor].i2c_port, + pct2075_sensors[sensor].i2c_addr_flags, + offset, data_ptr); +} + +static int get_reg_temp(int sensor, int *temp_ptr) +{ + int temp_raw = 0; + + RETURN_ERROR(raw_read16(sensor, PCT2075_REG_TEMP, &temp_raw)); + + *temp_ptr = (int)(int16_t)temp_raw; + return EC_SUCCESS; +} + +static inline int pct2075_reg_to_mk(int16_t reg) +{ + int temp_mc; + + temp_mc = (((reg >> PCT2075_SHIFT1) * 1000) >> PCT2075_SHIFT2); + + return MILLI_CELSIUS_TO_MILLI_KELVIN(temp_mc); +} + +int pct2075_get_val_k(int idx, int *temp_k_ptr) +{ + if (idx >= PCT2075_COUNT) + return EC_ERROR_INVAL; + + *temp_k_ptr = MILLI_KELVIN_TO_KELVIN(temp_mk_local[idx]); + return EC_SUCCESS; +} + +int pct2075_get_val_mk(int idx, int *temp_mk_ptr) +{ + if (idx >= PCT2075_COUNT) + return EC_ERROR_INVAL; + + *temp_mk_ptr = temp_mk_local[idx]; + return EC_SUCCESS; +} + +static void pct2075_poll(void) +{ + int s; + int temp_reg = 0; + + for (s = 0; s < PCT2075_COUNT; s++) { + if (get_reg_temp(s, &temp_reg) == EC_SUCCESS) + temp_mk_local[s] = pct2075_reg_to_mk(temp_reg); + } +} +DECLARE_HOOK(HOOK_SECOND, pct2075_poll, HOOK_PRIO_TEMP_SENSOR); + +void pct2075_init(void) +{ +/* Incase we need to initialize somthing */ +} +DECLARE_HOOK(HOOK_INIT, pct2075_init, HOOK_PRIO_DEFAULT); diff --git a/driver/temp_sensor/pct2075.h b/driver/temp_sensor/pct2075.h new file mode 100644 index 0000000000..c09d0e383c --- /dev/null +++ b/driver/temp_sensor/pct2075.h @@ -0,0 +1,70 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_PCT2075_H +#define __CROS_EC_PCT2075_H + +#include "i2c.h" + +#define PCT2075_I2C_ADDR_FLAGS0 (0x48 | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS1 (0x49 | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS2 (0x4A | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS3 (0x4B | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS4 (0x4C | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS5 (0x4D | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS6 (0x4E | I2C_FLAG_BIG_ENDIAN) +#define PCT2075_I2C_ADDR_FLAGS7 (0x4F | I2C_FLAG_BIG_ENDIAN) + +#define PCT2075_REG_TEMP 0x00 +#define PCT2075_REG_CONF 0x01 +#define PCT2075_REG_THYST 0x02 +#define PCT2075_REG_TOS 0x03 + +/* + * I2C port and address information for all the board PCT2075 sensors should be + * defined in an array of the following structures, with an enum PCT2075_sensor + * indexing the array. The enum PCT2075_sensor shall end with a PCT2075_COUNT + * defining the maximum number of sensors for the board. + */ + +struct pct2075_sensor_t { + int i2c_port; + int i2c_addr_flags; +}; + +extern const struct pct2075_sensor_t pct2075_sensors[]; + +/** + * Get the last polled value of a sensor. + * + * @param idx Index to read, from board's enum PCT2075_sensor + * definition + * + * @param temp_k_ptr Destination for temperature in K. + * + * @return EC_SUCCESS if successful, non-zero if error. + */ +int pct2075_get_val_k(int idx, int *temp_k_ptr); + +/** + * Get the last polled value of a sensor. + * + * @param idx Index to read, from board's enum PCT2075_sensor + * definition + * + * @param temp_mk_ptr Destination for temperature in mK. + * + * @return EC_SUCCESS if successful, non-zero if error. + */ +int pct2075_get_val_mk(int idx, int *temp_mk_ptr); + +/** + * Init the sensors. Note, this will run automatically on HOOK_INIT, but is + * made available for boards which may not always power the sensor in all + * states. + */ +void pct2075_init(void); + +#endif /* __CROS_EC_PCT2075_H */ diff --git a/driver/usb_mux/amd_fp6.c b/driver/usb_mux/amd_fp6.c index b2d5ae1fb4..a692fbcf3e 100644 --- a/driver/usb_mux/amd_fp6.c +++ b/driver/usb_mux/amd_fp6.c @@ -34,7 +34,7 @@ static struct { const struct usb_mux *mux; uint8_t val; bool write_pending; -} saved_mux_state[USBC_PORT_COUNT]; +} saved_mux_state[CONFIG_USB_PD_PORT_MAX_COUNT]; static int amd_fp6_mux_port0_read(const struct usb_mux *me, uint8_t *val) { diff --git a/driver/usb_mux/anx7451.c b/driver/usb_mux/anx7451.c index 42fdb1f078..db56457bb8 100644 --- a/driver/usb_mux/anx7451.c +++ b/driver/usb_mux/anx7451.c @@ -11,7 +11,7 @@ #include "common.h" #include "console.h" #include "i2c.h" -#include "time.h" +#include "timer.h" #include "usb_mux.h" #include "util.h" diff --git a/driver/usb_mux/tusb1064.c b/driver/usb_mux/tusb1064.c index 1c0f0e4701..6a82aca68f 100644 --- a/driver/usb_mux/tusb1064.c +++ b/driver/usb_mux/tusb1064.c @@ -10,11 +10,9 @@ #define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) #define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) -/* - * configuration bits which never change in the General Register - * e.g. REG_GENERAL_DP_EN_CTRL or REG_GENERAL_EQ_OVERRIDE - */ -#define REG_GENERAL_STATIC_BITS REG_GENERAL_EQ_OVERRIDE +#if defined(CONFIG_USB_MUX_TUSB1044) && defined(CONFIG_USB_MUX_TUSB1064) +#error "Must choose CONFIG_USB_MUX_TUSB1044 or CONFIG_USB_MUX_TUSB1064" +#endif static int tusb1064_read(const struct usb_mux *me, uint8_t reg, uint8_t *val) { @@ -31,11 +29,79 @@ static int tusb1064_write(const struct usb_mux *me, uint8_t reg, uint8_t val) (int)reg, (int)val); } +#if defined(CONFIG_USB_MUX_TUSB1044) +void tusb1044_hpd_update(const struct usb_mux *me, mux_state_t mux_state) +{ + int res; + uint8_t reg; + + res = tusb1064_read(me, TUSB1064_REG_GENERAL, ®); + if (res) + return; + + /* + * Overrides HPDIN pin state. + Settings of this bit will enable the Display port lanes. + 0h = HPD_IN based on HPD_IN pin. + 1h = HPD_IN high. + */ + if (mux_state & USB_PD_MUX_HPD_LVL) + reg |= REG_GENERAL_HPDIN_OVERRIDE; + else + reg &= ~REG_GENERAL_HPDIN_OVERRIDE; + + tusb1064_write(me, TUSB1064_REG_GENERAL, reg); +} +#endif + +int tusb1064_set_dp_rx_eq(const struct usb_mux *me, int db) +{ + uint8_t reg; + int rv; + + if (db < TUSB1064_DP_EQ_RX_NEG_0_3_DB || db > TUSB1064_DP_EQ_RX_12_1_DB) + return EC_ERROR_INVAL; + + /* Set the requested gain values */ + reg = TUSB1064_DP1EQ(db) | TUSB1064_DP3EQ(db); + rv = tusb1064_write(me, TUSB1064_REG_DP1DP3EQ_SEL, reg); + if (rv) + return rv; + + reg = TUSB1064_DP0EQ(db) | TUSB1064_DP2EQ(db); + rv = tusb1064_write(me, TUSB1064_REG_DP0DP2EQ_SEL, reg); + if (rv) + return rv; + + /* Enable EQ_OVERRIDE so the gain registers are used */ + rv = tusb1064_read(me, TUSB1064_REG_GENERAL, ®); + if (rv) + return rv; + + reg |= REG_GENERAL_EQ_OVERRIDE; + + return tusb1064_write(me, TUSB1064_REG_GENERAL, reg); +} + /* Writes control register to set switch mode */ static int tusb1064_set_mux(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { - int reg = REG_GENERAL_STATIC_BITS; + uint8_t reg; + int rv; + int mask; + + rv = tusb1064_read(me, TUSB1064_REG_GENERAL, ®); + if (rv) + return rv; + + /* Mask bits that may be set in this function */ + mask = REG_GENERAL_CTLSEL_USB3 | REG_GENERAL_CTLSEL_ANYDP | + REG_GENERAL_FLIPSEL; +#ifdef CONFIG_USB_MUX_TUSB1044 + mask |= REG_GENERAL_HPDIN_OVERRIDE; +#endif + reg &= ~mask; /* This driver does not use host command ACKs */ *ack_required = false; @@ -46,6 +112,10 @@ static int tusb1064_set_mux(const struct usb_mux *me, mux_state_t mux_state, reg |= REG_GENERAL_CTLSEL_ANYDP; if (mux_state & USB_PD_MUX_POLARITY_INVERTED) reg |= REG_GENERAL_FLIPSEL; +#if defined(CONFIG_USB_MUX_TUSB1044) + if (mux_state & USB_PD_MUX_HPD_LVL) + reg |= REG_GENERAL_HPDIN_OVERRIDE; +#endif return tusb1064_write(me, TUSB1064_REG_GENERAL, reg); } @@ -67,6 +137,10 @@ static int tusb1064_get_mux(const struct usb_mux *me, mux_state_t *mux_state) *mux_state |= USB_PD_MUX_DP_ENABLED; if (reg & REG_GENERAL_FLIPSEL) *mux_state |= USB_PD_MUX_POLARITY_INVERTED; +#if defined(CONFIG_USB_MUX_TUSB1044) + if (reg & REG_GENERAL_HPDIN_OVERRIDE) + *mux_state |= USB_PD_MUX_HPD_LVL; +#endif return EC_SUCCESS; } @@ -75,22 +149,8 @@ static int tusb1064_get_mux(const struct usb_mux *me, mux_state_t *mux_state) static int tusb1064_init(const struct usb_mux *me) { int res; - uint8_t reg; bool unused; - /* Default to "Floating Pin" DP Equalization */ - reg = TUSB1064_DP1EQ(TUSB1064_DP_EQ_RX_10_0_DB) | - TUSB1064_DP3EQ(TUSB1064_DP_EQ_RX_10_0_DB); - res = tusb1064_write(me, TUSB1064_REG_DP1DP3EQ_SEL, reg); - if (res) - return res; - - reg = TUSB1064_DP0EQ(TUSB1064_DP_EQ_RX_10_0_DB) | - TUSB1064_DP2EQ(TUSB1064_DP_EQ_RX_10_0_DB); - res = tusb1064_write(me, TUSB1064_REG_DP0DP2EQ_SEL, reg); - if (res) - return res; - /* * Note that bypassing the usb_mux API is okay for internal driver calls * since the task calling init already holds this port's mux lock. diff --git a/driver/usb_mux/tusb1064.h b/driver/usb_mux/tusb1064.h index e860cc539a..a71d6defa3 100644 --- a/driver/usb_mux/tusb1064.h +++ b/driver/usb_mux/tusb1064.h @@ -39,7 +39,11 @@ #define REG_GENERAL_CTLSEL_USB3 BIT(0) #define REG_GENERAL_CTLSEL_ANYDP BIT(1) #define REG_GENERAL_FLIPSEL BIT(2) +#if defined(CONFIG_USB_MUX_TUSB1044) +#define REG_GENERAL_HPDIN_OVERRIDE BIT(3) +#else #define REG_GENERAL_DP_EN_CTRL BIT(3) +#endif #define REG_GENERAL_EQ_OVERRIDE BIT(4) /* AUX and DP Lane Control Register */ @@ -127,4 +131,22 @@ #define TUSB1064_USB_EQ_UFP_10_7_DB 0xE #define TUSB1064_USB_EQ_UFP_11_1_DB 0xF +#if defined(CONFIG_USB_MUX_TUSB1044) +/* + * This api is used to override the HPD infomartion received on HPD_IN pin + * or when no HPD physical pin is connected. + * Writes HPD infomration to the General_1 Registor. + */ +void tusb1044_hpd_update(const struct usb_mux *me, mux_state_t mux_state); +#endif + +/** + * Set DP Rx Equalization value + * + * @param *me pointer to usb_mux descriptor + * @param db requested gain setting for DP Rx path + * @return EC_SUCCESS if db param is valid and I2C is successful + */ +int tusb1064_set_dp_rx_eq(const struct usb_mux *me, int db); + #endif /* __CROS_EC_TUSB1064_H */ diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index 155ba8fb3e..ee7f96b905 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -11,6 +11,7 @@ #include "chipset.h" #include "hooks.h" #include "host_command.h" +#include "queue.h" #include "task.h" #include "timer.h" #include "usb_mux.h" @@ -46,6 +47,10 @@ static mutex_t mux_lock[CONFIG_USB_PD_PORT_MAX_COUNT]; static task_id_t ack_task[CONFIG_USB_PD_PORT_MAX_COUNT] = { [0 ... CONFIG_USB_PD_PORT_MAX_COUNT - 1] = TASK_ID_INVALID }; +static void perform_mux_set(int port, mux_state_t mux_mode, + enum usb_switch usb_mode, int polarity); +static void perform_mux_hpd_update(int port, mux_state_t hpd_state); + enum mux_config_type { USB_MUX_INIT, USB_MUX_LOW_POWER, @@ -55,19 +60,192 @@ enum mux_config_type { USB_MUX_HPD_UPDATE, }; +/* Define a USB mux task ID for the purpose of linking */ +#ifndef HAS_TASK_USB_MUX +#define TASK_ID_USB_MUX TASK_ID_INVALID +#endif + +/* + * USB mux task + * + * Since USB mux sets can take extended periods of time (on the order of 100s of + * ms for some muxes), run a small task to complete those mux sets in order to + * not block the PD task. Run HPD sets from this task as well, since they + * should be sequenced behind setting up the mux pins for DP. + * + * Depth must be a power of 2, which is normally enforced by the queue init + * code, but must be manually enforced here. + */ +#define MUX_QUEUE_DEPTH 4 +BUILD_ASSERT(POWER_OF_TWO(MUX_QUEUE_DEPTH)); + +/* Define in order to enable debug info about how long the queue takes */ +#undef DEBUG_MUX_QUEUE_TIME + +struct mux_queue_entry { + enum mux_config_type type; + mux_state_t mux_mode; /* For both HPD and mux set */ + enum usb_switch usb_config; /* Set only */ + int polarity; /* Set only */ +#ifdef DEBUG_MUX_QUEUE_TIME + timestamp_t enqueued_time; +#endif +}; + +/* + * Note: test builds won't optimize out the mux task code and thereby require + * the queue to link + */ +#if defined(TEST_BUILD) || defined(HAS_TASK_USB_MUX) +/* + * Note: QUEUE macros cannot be used to initialize this array, since they rely + * on anonymous data structs for allocation which results in all entries + * sharing the same state pointer and data buffers. + */ +static struct queue mux_queue[CONFIG_USB_PD_PORT_MAX_COUNT]; +__maybe_unused static struct queue_state + queue_states[CONFIG_USB_PD_PORT_MAX_COUNT]; +__maybe_unused static struct mux_queue_entry + queue_buffers[CONFIG_USB_PD_PORT_MAX_COUNT] + [MUX_QUEUE_DEPTH]; +static mutex_t queue_lock[CONFIG_USB_PD_PORT_MAX_COUNT]; +#else +extern struct queue const mux_queue[]; +extern mutex_t queue_lock[]; +#endif + #ifdef CONFIG_ZEPHYR static int init_mux_mutex(const struct device *dev) { int port; ARG_UNUSED(dev); - for (port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; port++) + for (port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; port++) { k_mutex_init(&mux_lock[port]); + + if (IS_ENABLED(HAS_TASK_USB_MUX)) + k_mutex_init(&queue_lock[port]); + } + return 0; } SYS_INIT(init_mux_mutex, POST_KERNEL, 50); #endif /* CONFIG_ZEPHYR */ +__maybe_unused static void mux_task_enqueue(int port, enum mux_config_type type, + mux_state_t mux_mode, + enum usb_switch usb_config, + int polarity) +{ + struct mux_queue_entry new_entry; + + if (!IS_ENABLED(HAS_TASK_USB_MUX)) + return; + + new_entry.type = type; + new_entry.mux_mode = mux_mode; + new_entry.usb_config = usb_config; + new_entry.polarity = polarity; +#ifdef DEBUG_MUX_QUEUE_TIME + new_entry.enqueued_time = get_time(); +#endif + + mutex_lock(&queue_lock[port]); + + if (queue_add_unit(&mux_queue[port], &new_entry) == 0) + CPRINTS("Error: Dropping port %d mux %d", port, type); + else + task_wake(TASK_ID_USB_MUX); + + mutex_unlock(&queue_lock[port]); +} + +#ifdef HAS_TASK_USB_MUX +static void init_queue_structs(void) +{ + int i; + + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + mux_queue[i].state = &queue_states[i]; + mux_queue[i].policy = &queue_policy_null; + mux_queue[i].buffer_units = MUX_QUEUE_DEPTH; + mux_queue[i].buffer_units_mask = MUX_QUEUE_DEPTH - 1; + mux_queue[i].unit_bytes = sizeof(struct mux_queue_entry); + mux_queue[i].buffer = (uint8_t *) &queue_buffers[i][0]; + } +} +DECLARE_HOOK(HOOK_INIT, init_queue_structs, HOOK_PRIO_FIRST); +#endif + +__maybe_unused void usb_mux_task(void *u) +{ + bool items_waiting = true; + + while (1) { + int port; + + /* Wait if we had no queue items to service */ + if (!items_waiting) + task_wait_event(-1); + + items_waiting = false; + + /* + * Round robin the ports, so no one port can monopolize the task + */ + for (port = 0; port < board_get_usb_pd_port_count(); port++) { + if (queue_count(&mux_queue[port])) { + /* + * Process our first item. Leave it in the + * queue until we've completed its operation so + * the PD task can tell it is still pending. + * Note this should be safe to do unlocked, as + * this task is the only one which changes the + * queue head. + */ + struct mux_queue_entry next; + + queue_peek_units(&mux_queue[port], &next, 0, 1); + +#ifdef DEBUG_MUX_QUEUE_TIME + CPRINTS("C%d: Start mux set queued %d us ago", + port, time_since32(next.enqueued_time)); +#endif + if (next.type == USB_MUX_SET_MODE) + perform_mux_set(port, next.mux_mode, + next.usb_config, + next.polarity); + else if (next.type == USB_MUX_HPD_UPDATE) + perform_mux_hpd_update(port, + next.mux_mode); + else + CPRINTS("Error: Unknown mux task type:" + "%d", next.type); + +#ifdef DEBUG_MUX_QUEUE_TIME + CPRINTS("C%d: Completed mux set queued %d " + "us ago", + port, time_since32(next.enqueued_time)); +#endif + /* + * Lock since the tail is changing, which would + * disrupt any calls iterating the queue. + */ + mutex_lock(&queue_lock[port]); + queue_advance_head(&mux_queue[port], 1); + mutex_unlock(&queue_lock[port]); + + /* + * Force the task to run again if this queue has + * more items to process. + */ + if (queue_count(&mux_queue[port])) + items_waiting = true; + } + } + } +} + /* Configure the MUX */ static int configure_mux(int port, enum mux_config_type config, @@ -173,8 +351,16 @@ static int configure_mux(int port, mutex_unlock(&mux_lock[port]); if (ack_required) { - /* This should only be called from the PD task */ - assert(port == TASK_ID_TO_PD_PORT(task_get_current())); + /* + * This should only be called from the PD task or usb + * mux task + */ + if (IS_ENABLED(HAS_TASK_USB_MUX)) { + assert(task_get_current() == TASK_ID_USB_MUX); + } else { + assert(port == + TASK_ID_TO_PD_PORT(task_get_current())); + } /* * Note: This task event could be generalized for more @@ -254,22 +440,14 @@ void usb_mux_init(int port) atomic_clear_bits(&flags[port], USB_MUX_FLAG_IN_LPM); } -/* - * TODO(crbug.com/505480): Setting muxes often involves I2C transcations, - * which can block. Consider implementing an asynchronous task. - */ -void usb_mux_set(int port, mux_state_t mux_mode, - enum usb_switch usb_mode, int polarity) +static void perform_mux_set(int port, mux_state_t mux_mode, + enum usb_switch usb_mode, int polarity) { mux_state_t mux_state; const int should_enter_low_power_mode = (mux_mode == USB_PD_MUX_NONE && usb_mode == USB_SWITCH_DISCONNECT); - if (port >= board_get_usb_pd_port_count()) { - return; - } - /* Perform initialization if not initialized yet */ if (!(flags[port] & USB_MUX_FLAG_INIT)) usb_mux_init(port); @@ -310,6 +488,48 @@ void usb_mux_set(int port, mux_state_t mux_mode, enter_low_power_mode(port); } +void usb_mux_set(int port, mux_state_t mux_mode, + enum usb_switch usb_mode, int polarity) +{ + if (port >= board_get_usb_pd_port_count()) + return; + + /* Block if we have no mux task, but otherwise queue it up and return */ + if (IS_ENABLED(HAS_TASK_USB_MUX)) + mux_task_enqueue(port, USB_MUX_SET_MODE, mux_mode, + usb_mode, polarity); + else + perform_mux_set(port, mux_mode, usb_mode, polarity); +} + +bool usb_mux_set_completed(int port) +{ + bool sets_pending = false; + struct queue_iterator it; + + /* No mux task, no items waiting to process */ + if (!IS_ENABLED(HAS_TASK_USB_MUX)) + return true; + + /* Lock the queue so we can scroll through the items left to do */ + mutex_lock(&queue_lock[port]); + + for (queue_begin(&mux_queue[port], &it); it.ptr != NULL; + queue_next(&mux_queue[port], &it)) { + const struct mux_queue_entry *check = + (struct mux_queue_entry *) it.ptr; + + if (check->type == USB_MUX_SET_MODE) { + sets_pending = true; + break; + } + } + + mutex_unlock(&queue_lock[port]); + + return !sets_pending; +} + mux_state_t usb_mux_get(int port) { mux_state_t mux_state; @@ -357,12 +577,8 @@ void usb_mux_flip(int port) configure_mux(port, USB_MUX_SET_MODE, &mux_state); } -void usb_mux_hpd_update(int port, mux_state_t hpd_state) +static void perform_mux_hpd_update(int port, mux_state_t hpd_state) { - if (port >= board_get_usb_pd_port_count()) { - return; - } - /* Perform initialization if not initialized yet */ if (!(flags[port] & USB_MUX_FLAG_INIT)) usb_mux_init(port); @@ -373,6 +589,19 @@ void usb_mux_hpd_update(int port, mux_state_t hpd_state) configure_mux(port, USB_MUX_HPD_UPDATE, &hpd_state); } +void usb_mux_hpd_update(int port, mux_state_t hpd_state) +{ + if (port >= board_get_usb_pd_port_count()) + return; + + /* Send to the mux task if present to maintain sequencing with sets */ + if (IS_ENABLED(HAS_TASK_USB_MUX)) + mux_task_enqueue(port, USB_MUX_HPD_UPDATE, hpd_state, + 0, 0); + else + perform_mux_hpd_update(port, hpd_state); +} + int usb_mux_retimer_fw_update_port_info(void) { int i; diff --git a/driver/usb_mux/virtual.c b/driver/usb_mux/virtual.c index dbece4faf9..4388bb485a 100644 --- a/driver/usb_mux/virtual.c +++ b/driver/usb_mux/virtual.c @@ -81,10 +81,17 @@ static int virtual_set_mux(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { int port = me->usb_port; + mux_state_t new_mux_state; - /* Current USB & DP mux status + existing HPD related mux status */ - mux_state_t new_mux_state = (mux_state & ~USB_PD_MUX_HPD_STATE) | - (virtual_mux_state[port] & USB_PD_MUX_HPD_STATE); + /* + * Current USB & DP mux status + existing HPD related mux status if DP + * is still active. Otherwise, don't preserve HPD state. + */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + new_mux_state = (mux_state & ~USB_PD_MUX_HPD_STATE) | + (virtual_mux_state[port] & USB_PD_MUX_HPD_STATE); + else + new_mux_state = mux_state; virtual_mux_update_state(port, new_mux_state, ack_required); diff --git a/include/battery.h b/include/battery.h index 2de5835807..27e678c0ba 100644 --- a/include/battery.h +++ b/include/battery.h @@ -19,13 +19,6 @@ enum battery_index { BATT_IDX_BASE = 1, }; -#ifdef CONFIG_BATTERY_V2 -extern struct ec_response_battery_static_info_v1 - battery_static[CONFIG_BATTERY_COUNT]; -extern struct ec_response_battery_dynamic_info - battery_dynamic[CONFIG_BATTERY_COUNT]; -#endif - /* Stop charge when charging and battery level >= this percentage */ #define BATTERY_LEVEL_FULL 100 @@ -54,6 +47,9 @@ extern struct ec_response_battery_dynamic_info */ #define BATTERY_LEVEL_SHUTDOWN 3 +/* Full-capacity change reqd for host event */ +#define LFCC_EVENT_THRESH 5 + /* * Sometimes we have hardware to detect battery present, sometimes we have to * wait until we've been able to talk to the battery. @@ -77,6 +73,30 @@ enum battery_disconnect_state { BATTERY_DISCONNECT_ERROR, }; +struct battery_static_info { + uint16_t design_capacity; + uint16_t design_voltage; + uint32_t cycle_count; + /* + * TODO: The fields below should be renamed & re-typed: + * uint16_t serial[32]; + * char manufacturer[32]; + * char device_name[32]; + * char chemistry[32]; + */ + /* Max string size in the SB spec is 31. */ + char manufacturer_ext[32]; /* SB_MANUFACTURER_NAME */ + char model_ext[32]; /* SB_DEVICE_NAME */ + char serial_ext[32]; /* SB_SERIAL_NUMBER */ + char type_ext[32]; /* SB_DEVICE_CHEMISTRY */ +#ifdef CONFIG_BATTERY_VENDOR_PARAM + uint8_t vendor_param[32]; +#endif +}; + +extern struct battery_static_info battery_static[]; +extern struct ec_response_battery_dynamic_info battery_dynamic[]; + /* Battery parameters */ struct batt_params { int temperature; /* Temperature in 0.1 K */ @@ -148,6 +168,9 @@ struct battery_info { int8_t charging_max_c; int8_t discharging_min_c; int8_t discharging_max_c; +#ifdef CONFIG_BATTERY_VENDOR_PARAM + uint8_t vendor_param_start; +#endif }; /** @@ -398,7 +421,7 @@ int battery_is_cut_off(void); * @param value Location to store retrieved value. * @return non-zero if error. */ -int battery_get_vendor_param(uint32_t param, uint32_t *value); +__override_proto int battery_get_vendor_param(uint32_t param, uint32_t *value); /** * Write battery vendor parameter. @@ -409,7 +432,7 @@ int battery_get_vendor_param(uint32_t param, uint32_t *value); * @param value Value to write to the battery. * @return non-zero if error. */ -int battery_set_vendor_param(uint32_t param, uint32_t value); +__override_proto int battery_set_vendor_param(uint32_t param, uint32_t value); /** * Wait for battery stable. @@ -476,4 +499,16 @@ __override_proto void board_battery_compensate_params(struct batt_params *batt); void battery_validate_params(struct batt_params *batt); +/** + * Read static battery info from a main battery and store it in a cache. + * + * @return EC_SUCCESS or EC_ERROR_*. + */ +int update_static_battery_info(void); + +/** + * Read dynamic battery info from a main battery and store it in a cache. + */ +void update_dynamic_battery_info(void); + #endif /* __CROS_EC_BATTERY_H */ diff --git a/include/charge_state_v2.h b/include/charge_state_v2.h index 9325bcfdca..dc54ac5a89 100644 --- a/include/charge_state_v2.h +++ b/include/charge_state_v2.h @@ -191,4 +191,24 @@ bool charge_is_current_stable(void); */ void trigger_ocpc_reset(void); +/* Track problems in communicating with the battery or charger */ +enum problem_type { + PR_STATIC_UPDATE, + PR_SET_VOLTAGE, + PR_SET_CURRENT, + PR_SET_MODE, + PR_SET_INPUT_CURR, + PR_POST_INIT, + PR_CHG_FLAGS, + PR_BATT_FLAGS, + PR_CUSTOM, + PR_CFG_SEC_CHG, + + NUM_PROBLEM_TYPES +}; + +void charge_problem(enum problem_type p, int v); + +struct charge_state_data *charge_get_status(void); + #endif /* __CROS_EC_CHARGE_STATE_V2_H */ diff --git a/include/charger.h b/include/charger.h index 402f9eca73..bc2b66eac2 100644 --- a/include/charger.h +++ b/include/charger.h @@ -135,6 +135,9 @@ struct charger_drv { /* Enable/disable linear charging */ enum ec_error_list (*enable_linear_charge)(int chgnum, bool enable); + + /* Dumps charger registers */ + void (*dump_registers)(int chgnum); }; struct charger_config_t { diff --git a/include/chipset.h b/include/chipset.h index 4ce52afb53..333cef8ef4 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -96,7 +96,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason); /** * Reset the CPU and/or chipset. */ -void chipset_reset(enum chipset_reset_reason reason); +void chipset_reset(enum chipset_shutdown_reason reason); /** * Interrupt handler to power GPIO inputs. @@ -137,7 +137,7 @@ static inline void chipset_force_shutdown(enum chipset_shutdown_reason reason) { } -static inline void chipset_reset(enum chipset_reset_reason reason) { } +static inline void chipset_reset(enum chipset_shutdown_reason reason) { } static inline void power_interrupt(enum gpio_signal signal) { } static inline void chipset_handle_espi_reset_assert(void) { } static inline void chipset_handle_reboot(void) { } diff --git a/include/config.h b/include/config.h index 61471daa0c..5452ccdaa9 100644 --- a/include/config.h +++ b/include/config.h @@ -631,14 +631,19 @@ #undef CONFIG_BATTERY_LEVEL_NEAR_FULL /* + * Use memory mapped region to store battery information. It supports only + * single battery systems. V2 should be used unless there is a reason not to. + */ +#undef CONFIG_BATTERY_V1 + +/* * Use an alternative method to store battery information: Instead of writing * directly to host memory mapped region, this keeps the battery information in * ec_response_battery_static/dynamic_info structures, that can then be fetched * using host commands, or via EC_ACPI_MEM_BATTERY_INDEX command, which tells * the EC to update the shared memory. * - * This is required on dual-battery systems, and on on hostless bases with a - * battery. + * This is required on dual-battery systems and hostless bases with a battery. */ #undef CONFIG_BATTERY_V2 @@ -1032,6 +1037,9 @@ */ #undef CONFIG_CHARGER_BQ25710_IDCHG_LIMIT_MA +/* Enable if CONFIG_CHARGER_BQ25720_VSYS_TH2_DV should be applied */ +#undef CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM + /* * This config option is used to set the charger's VSYS voltage * threshold. When the voltage drops to this level, PROCHOT is asserted @@ -1042,6 +1050,137 @@ */ #undef CONFIG_CHARGER_BQ25720_VSYS_TH2_DV +/* Enable if CONFIG_CHARGER_BQ25720_VSYS_UVP should be applied */ +#undef CONFIG_CHARGER_BQ25720_VSYS_UVP_CUSTOM + +/* + * This config option is used to set the VSYS under voltage (VSYS_UVP) + * lockout threshold. This is a 3 bit field with default value 0. The + * actual voltage encoded is (0.8 * <value> + 2.4), allowing a threshold + * in the range of 2.4 V to 8.0 V to be specified. + */ +#undef CONFIG_CHARGER_BQ25720_VSYS_UVP + +/* Enable if CONFIG_CHARGER_BQ25720_IDCHG_DEG2 should be applied */ +#undef CONFIG_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM + +/* + * This config option is used to set the 2nd battery discharge current + * limit (IDCHG_TH2) deglitch time (IDCHG_DEG2). This is a 2 bit field + * with default value 1 (1.6 ms). The encoded value ranges from 100 us + * to 12 ms. + */ +#undef CONFIG_CHARGER_BQ25720_IDCHG_DEG2 + +/* Enable if CONFIG_CHARGER_BQ25720_IDCHG_TH2 should be applied */ +#undef CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM + +/* + * This config option is used to set the charger's 2nd battery discharge + * current limit (IDCHG_TH2) as a percentage of IDCHG_TH1. This is a 3 + * bit field with default value 1 (150%). The encoded value ranges from + * 125% to 400%. + */ +#undef CONFIG_CHARGER_BQ25720_IDCHG_TH2 + +/* Value of the bq25710 charge sense resistor, in mOhms */ +#undef CONFIG_CHARGER_BQ25710_SENSE_RESISTOR + +/* Value of the bq25710 input current sense resistor, in mOhms */ +#undef CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC + +/* + * This config option is used to enable the PSYS sensing circuit on the + * BQ25710 and BQ25720 chargers. This is used for system power + * monitoring on board designs that support this capability. This + * circuit is disabled by default (reset) and needs to be explicitly + * enabled for meaningful results. + */ +#undef CONFIG_CHARGER_BQ25710_PSYS_SENSING + +/* + * This config option is used to change the charger's internal + * comparator reference voltage to 1.2 V. The power-on default is 2.3 + * V. This must be enabled if the board was designed for 1.2 V instead + * of 2.3 V. + */ +#undef CONFIG_CHARGER_BQ25710_CMP_REF_1P2 + +/* Enable if CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG should be applied */ +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM + +/* + * Input overload time when in peak power mode (PKPWR_TOVLD_DEG). This + * limits how long the charger can draw ILIM2 from the adapter. This is + * a 2 bit field. On the bq25710 1 ms to 20 ms can be encoded. On the + * bq25720 1 ms to 10 ms can be encoded. + */ +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG + +/* + * This config option is used to enable the charger's AC over-current + * protection. The converter turns off when the OC threshold is + * reached. The threshold is selected using the ACOC_VTH bit. + */ +#undef CONFIG_CHARGER_BQ25710_EN_ACOC + +/* + * This config option selects which ACOC protection threshold is used + * with EN_ACOC. Enabling this option selects 133% of ILIM2. Otherwise, + * the default is 200% of ILIM2. + */ +#undef CONFIG_CHARGER_BQ25710_ACOC_VTH_1P33 + +/* + * This config option selects the minimum BATOC protection threshold to + * be used with EN_BATOC. The minimum threshold is 150% of PROCHOT IDCHG + * on the bq25710 and 133% of PROCHOT IDCHG_TH2 on the bq25720. The + * default threshold is 200% on both chips. + */ +#undef CONFIG_CHARGER_BQ25710_BATOC_VTH_MINIMUM + +/* + * This config option sets the PP_INOM bit in Prochot Option 1 + * register. This causes PROCHOT to be pulsed when the nominal adapter + * current threshold is reached. INOM is 110% of IDPM/IIN_DPM (input + * current setting). + */ +#undef CONFIG_CHARGER_BQ25710_PP_INOM + +/* + * This config option sets the PP_BATPRES bit in Prochot Option 1 + * register. This causes PROCHOT to be pulsed when the battery is + * removed. + */ +#undef CONFIG_CHARGER_BQ25710_PP_BATPRES + +/* + * This config option sets the PP_ACOK in Prochot Option 1 + * register. This causes PROCHOT to be pulsed when the AC adapter is + * removed. + */ +#undef CONFIG_CHARGER_BQ25710_PP_ACOK + +/* + * This config option sets the PP_IDCHG2 bit in the Charge Option 4 + * register. This causes PROCHOT to be pulsed when IDCHG_TH2 is reached. + */ + +#undef CONFIG_CHARGER_BQ25720_PP_IDCHG2 + +/* Enable if CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV should be applied */ +#undef CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM + +/* + * This config option sets the minimum system voltage in + * milli-volts. The bq25710 uses 6 bits of resolution and can be + * configured from 1.024 V to 16.128 V in 256 mV increments. The bq25720 + * uses 8 bits of resolution and can be set from 1.0 V to 19.2 V in 100 + * mV increments. The default value depends on configured number of + * battery cells connected in series using the CELL_BATPRESZ strap. + */ +#undef CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV + /* * Board specific maximum input current limit, in mA. */ @@ -1252,6 +1391,7 @@ * discrete EC control */ #undef CONFIG_CHIPSET_ECDRIVEN /* Mock power module */ +#undef CONFIG_CHIPSET_FALCONLITE /* Falcon-lite*/ #undef CONFIG_CHIPSET_GEMINILAKE /* Intel Geminilake (x86) */ #undef CONFIG_CHIPSET_ICELAKE /* Intel Icelake (x86) */ #undef CONFIG_CHIPSET_JASPERLAKE /* Intel Jasperlake (x86) */ @@ -1394,6 +1534,7 @@ #undef CONFIG_CMD_BATT_MFG_ACCESS #undef CONFIG_CMD_BUTTON #define CONFIG_CMD_CBI +#undef CONFIG_CMD_PD_SRCCAPS_REDUCED_SIZE /* * HAS_TASK_CHIPSET implies the GSC presence. @@ -1521,6 +1662,9 @@ /* Don't save General Purpose Registers during panic */ #undef CONFIG_PANIC_STRIP_GPR +/* Provide another output method of panic information by console channel */ +#undef CONFIG_PANIC_CONSOLE_OUTPUT + /* * Provide the default GPIO abstraction layer. * You want this unless you are doing a really tiny firmware. @@ -2269,7 +2413,7 @@ * Accept EC host commands over the SPI host interface. The AP is SPI * controller and the EC is the SPI peripheral for this configuration. */ -#undef CONFIG_HOSTCMD_SHI +#undef CONFIG_HOST_INTERFACE_SHI /* * Host command rate limiting assures EC will have time to process lower @@ -3015,19 +3159,19 @@ #undef CONFIG_HID_HECI /* Support host command interface over HECI */ -#undef CONFIG_HOSTCMD_HECI +#undef CONFIG_HOST_INTERFACE_HECI /* * EC supports x86 host communication with AP. This can either be through LPC * or eSPI. The CONFIG_HOSTCMD_X86 will get automatically defined if either - * CONFIG_HOSTCMD_LPC or CONFIG_HOSTCMD_ESPI are defined. LPC and eSPI are - * mutually exclusive. + * CONFIG_HOST_INTERFACE_LPC or CONFIG_HOST_INTERFACE_ESPI are defined. + * LPC and eSPI are mutually exclusive. */ #undef CONFIG_HOSTCMD_X86 /* Support host command interface over LPC bus. */ -#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_HOST_INTERFACE_LPC /* Support host command interface over eSPI bus. */ -#undef CONFIG_HOSTCMD_ESPI +#undef CONFIG_HOST_INTERFACE_ESPI /* * SLP signals (SLP_S3 and SLP_S4) use virtual wires intead of physical pins @@ -3880,8 +4024,10 @@ #undef CONFIG_TEMP_SENSOR_G781 /* G781 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_G782 /* G782 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_OTI502 /* OTI502 sensor, on I2C bus */ +#undef CONFIG_TEMP_SENSOR_PCT2075 /* PCT2075 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_SB_TSI /* SB_TSI sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP006 /* TI TMP006 sensor, on I2C bus */ +#undef CONFIG_TEMP_SENSOR_TMP112 /* TI TMP112 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP411 /* TI TMP411 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP432 /* TI TMP432 sensor, on I2C bus */ #undef CONFIG_TEMP_SENSOR_TMP468 /* TI TMP468 sensor, on I2C bus */ @@ -5053,6 +5199,9 @@ /* Support the Parade PS8743 Type-C Redriving Switch */ #undef CONFIG_USB_MUX_PS8743 +/* Config to enable TUSB1044 Type-c USB redriver */ +#undef CONFIG_USB_MUX_TUSB1044 + /* Support the Texas Instrument TUSB1064 Type-C Redriving Switch (UFP) */ #undef CONFIG_USB_MUX_TUSB1064 @@ -5387,7 +5536,7 @@ * without using eSPI for host commands. */ #if (!defined(CONFIG_ZEPHYR) && defined(CONFIG_HOST_ESPI_VW_POWER_SIGNAL) && \ - !defined(CONFIG_HOSTCMD_ESPI)) + !defined(CONFIG_HOST_INTERFACE_ESPI)) #error Must enable eSPI to enable virtual wires. #endif @@ -5512,17 +5661,17 @@ * Automatically define CONFIG_HOSTCMD_X86 if either child option is defined. * Ensure LPC and eSPI are mutually exclusive */ -#if defined(CONFIG_HOSTCMD_LPC) || defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) || defined(CONFIG_HOST_INTERFACE_ESPI) #define CONFIG_HOSTCMD_X86 #endif -#if defined(CONFIG_HOSTCMD_LPC) && defined(CONFIG_HOSTCMD_ESPI) +#if defined(CONFIG_HOST_INTERFACE_LPC) && defined(CONFIG_HOST_INTERFACE_ESPI) #error Must select only one type of host communication bus. #endif #if defined(CONFIG_HOSTCMD_X86) && \ - !defined(CONFIG_HOSTCMD_LPC) && \ - !defined(CONFIG_HOSTCMD_ESPI) + !defined(CONFIG_HOST_INTERFACE_LPC) && \ + !defined(CONFIG_HOST_INTERFACE_ESPI) #error Must select one type of host communication bus. #endif @@ -5840,6 +5989,12 @@ #endif /* CONFIG_EC_EC_COMM_BATTERY */ /*****************************************************************************/ +/* If battery_v2 isn't used, it's v1. */ +#if defined(CONFIG_BATTERY) && !defined(CONFIG_BATTERY_V2) +#define CONFIG_BATTERY_V1 +#endif + +/*****************************************************************************/ /* Define derived USB PD Discharge common path */ #if defined(CONFIG_USB_PD_DISCHARGE_GPIO) || \ defined(CONFIG_USB_PD_DISCHARGE_TCPC) || \ diff --git a/include/driver/accelgyro_bmi160.h b/include/driver/accelgyro_bmi160.h index c916576130..76d24936c6 100644 --- a/include/driver/accelgyro_bmi160.h +++ b/include/driver/accelgyro_bmi160.h @@ -383,12 +383,27 @@ /* Root mean square noise of 100 Hz accelerometer, units: ug */ #define BMI160_ACCEL_RMS_NOISE_100HZ 1300 -#ifdef CONFIG_BMI_SEC_I2C /* Functions to access the secondary device through the accel/gyro. */ int bmi160_sec_raw_read8(const int port, const uint16_t addr_flags, const uint8_t reg, int *data_ptr); int bmi160_sec_raw_write8(const int port, const uint16_t addr_flags, const uint8_t reg, int data); + +#if defined(CONFIG_ZEPHYR) && defined(CONFIG_ACCEL_INTERRUPTS) +/* Get the motion sensor ID of the BMI160 sensor that generates the interrupt. + * The interrupt is converted to the event and transferred to motion sense task + * that actually handles the interrupt. + * + * Here we use an alias (bmi160_int) to get the motion sensor ID. This alias + * MUST be defined for this driver to work. + * aliases { + * bmi160-int = &base_accel; + * }; + */ +#if DT_NODE_EXISTS(DT_ALIAS(bmi160_int)) +#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(bmi160_int))) +#endif #endif #endif /* __CROS_EC_ACCELGYRO_BMI160_H */ diff --git a/include/driver/accelgyro_bmi260.h b/include/driver/accelgyro_bmi260.h index e59870a93e..ae1c0f5777 100644 --- a/include/driver/accelgyro_bmi260.h +++ b/include/driver/accelgyro_bmi260.h @@ -328,4 +328,24 @@ /* Root mean square noise of 100Hz accelerometer, units: ug */ #define BMI260_ACCEL_RMS_NOISE_100HZ 1060 +#if defined(CONFIG_ZEPHYR) && defined(CONFIG_ACCEL_INTERRUPTS) +/* + * Get the motion sensor ID of the BMI260 sensor that + * generates the interrupt. + * The interrupt is converted to the event and transferred to motion + * sense task that actually handles the interrupt. + * + * Here, we use alias to get the motion sensor ID + * + * e.g) base_accel is the label of a child node in /motionsense-sensors + * aliases { + * bmi260-int = &base_accel; + * }; + */ +#if DT_NODE_EXISTS(DT_ALIAS(bmi260_int)) +#define CONFIG_ACCELGYRO_BMI260_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(SENSOR_ID(DT_ALIAS(bmi260_int))) +#endif +#endif + #endif /* __CROS_EC_ACCELGYRO_BMI260_H */ diff --git a/include/driver/tcpm/tcpci.h b/include/driver/tcpm/tcpci.h index a2831d4e06..932139b82d 100644 --- a/include/driver/tcpm/tcpci.h +++ b/include/driver/tcpm/tcpci.h @@ -159,6 +159,7 @@ #define TCPC_REG_ALERT_EXT_SNK_FRS BIT(0) #define TCPC_REG_COMMAND 0x23 +#define TCPC_REG_COMMAND_WAKE_I2C 0x11 #define TCPC_REG_COMMAND_ENABLE_VBUS_DETECT 0x33 #define TCPC_REG_COMMAND_SNK_CTRL_LOW 0x44 #define TCPC_REG_COMMAND_SNK_CTRL_HIGH 0x55 @@ -304,12 +305,11 @@ int tcpci_tcpc_drp_toggle(int port); #endif #ifdef CONFIG_USB_PD_TCPC_LOW_POWER int tcpci_enter_low_power_mode(int port); +void tcpci_wake_low_power_mode(int port); #endif enum ec_error_list tcpci_set_bist_test_mode(const int port, const bool enable); -#ifdef CONFIG_USB_PD_DISCHARGE_TCPC void tcpci_tcpc_discharge_vbus(int port, int enable); -#endif void tcpci_tcpc_enable_auto_discharge_disconnect(int port, int enable); int tcpci_tcpc_debug_accessory(int port, bool enable); diff --git a/include/driver/tcpm/tcpm.h b/include/driver/tcpm/tcpm.h index fb63e5504f..1c01b6692b 100644 --- a/include/driver/tcpm/tcpm.h +++ b/include/driver/tcpm/tcpm.h @@ -227,13 +227,14 @@ static inline int tcpm_sop_prime_enable(int port, bool enable) static inline int tcpm_set_vconn(int port, int enable) { -#ifdef CONFIG_USB_PD_TCPC_VCONN - int rv; + if (IS_ENABLED(CONFIG_USB_PD_TCPC_VCONN) || + tcpc_config[port].flags & TCPC_FLAGS_CONTROL_VCONN) { + int rv; - rv = tcpc_config[port].drv->set_vconn(port, enable); - if (rv) - return rv; -#endif + rv = tcpc_config[port].drv->set_vconn(port, enable); + if (rv) + return rv; + } return tcpm_sop_prime_enable(port, enable); } @@ -355,8 +356,15 @@ static inline int tcpm_enter_low_power_mode(int port) { return tcpc_config[port].drv->enter_low_power_mode(port); } + +static inline void tcpm_wake_low_power_mode(int port) +{ + if (tcpc_config[port].drv->wake_low_power_mode) + tcpc_config[port].drv->wake_low_power_mode(port); +} #else int tcpm_enter_low_power_mode(int port); +void tcpm_wake_low_power_mode(int port); #endif #ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC diff --git a/include/ec_commands.h b/include/ec_commands.h index e317c29e28..b089cd08d4 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -1768,6 +1768,8 @@ struct ec_params_flash_erase_v1 { #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) /* Rollback information flash region protected now */ #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) +/* Error - Unknown error */ +#define EC_FLASH_PROTECT_ERROR_UNKNOWN BIT(11) /** @@ -6055,7 +6057,10 @@ struct ec_params_set_cbi { * - The semantic meaning of an entry should not change. * - Do not exceed 2^15 - 1 for reset reasons or 2^16 - 1 for shutdown reasons. */ -enum chipset_reset_reason { +enum chipset_shutdown_reason { + /* + * Beginning of reset reasons. + */ CHIPSET_RESET_BEGIN = 0, CHIPSET_RESET_UNKNOWN = CHIPSET_RESET_BEGIN, /* Custom reason defined by a board.c or baseboard.c file */ @@ -6079,13 +6084,11 @@ enum chipset_reset_reason { /* EC detected an AP watchdog event. */ CHIPSET_RESET_AP_WATCHDOG, - CHIPSET_RESET_COUNT, -}; + CHIPSET_RESET_COUNT, /* End of reset reasons. */ -/* - * AP hard shutdowns are logged on the same path as resets. - */ -enum chipset_shutdown_reason { + /* + * Beginning of shutdown reasons. + */ CHIPSET_SHUTDOWN_BEGIN = BIT(15), CHIPSET_SHUTDOWN_POWERFAIL = CHIPSET_SHUTDOWN_BEGIN, /* Forcing a shutdown as part of EC initialization */ @@ -6107,7 +6110,7 @@ enum chipset_shutdown_reason { /* Force a chipset shutdown from the power button through EC */ CHIPSET_SHUTDOWN_BUTTON, - CHIPSET_SHUTDOWN_COUNT, + CHIPSET_SHUTDOWN_COUNT, /* End of shutdown reasons. */ }; diff --git a/include/gpio.h b/include/gpio.h index 3fa091f4bd..5a41c7ea88 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -29,7 +29,7 @@ #elif GPIO_INPUT != BIT(8) #error GPIO_INPUT values are not the same! #elif GPIO_OUTPUT != BIT(9) -#error GPIO_PULL_DOWN values are not the same! +#error GPIO_OUTPUT values are not the same! #endif /* Otherwise define overlapping GPIO_ flags ourselves */ @@ -253,6 +253,26 @@ int gpio_get_flags(enum gpio_signal signal); int gpio_get_flags_by_mask(uint32_t port, uint32_t mask); #endif +#ifdef CONFIG_ZEPHYR + +/** + * Convert flags from Zephyr to CrOS EC format + * + * @param zephyr flags in Zephyr format + * @returns flags in CrOS EC format + */ +int convert_from_zephyr_flags(const gpio_flags_t zephyr); + +/** + * Convert flags from CrOS EC to Zephyr format + * + * @param ec_flags flags in CrOS EC format + * @returns flags in Zephyr format + */ +gpio_flags_t convert_to_zephyr_flags(int ec_flags); + +#endif + /** * Get the default flags for a signal. * diff --git a/include/init_rom.h b/include/init_rom.h index 2c1ab33cd5..84fe53d4ff 100644 --- a/include/init_rom.h +++ b/include/init_rom.h @@ -14,7 +14,6 @@ #include "stdbool.h" -#ifdef CONFIG_CHIP_INIT_ROM_REGION /** * Get the memory mapped address of an .init_rom data object. * @@ -27,7 +26,14 @@ * @return Pointer to data object in memory. Return NULL if the object * is not memory mapped. */ +#ifdef CONFIG_CHIP_INIT_ROM_REGION const void *init_rom_map(const void *addr, int size); +#else +static inline const void *init_rom_map(const void *addr, int size) +{ + return addr; +} +#endif /** * Unmaps an .init_rom data object. Must be called when init_rom_map() is @@ -36,7 +42,13 @@ const void *init_rom_map(const void *addr, int size); * @param offset Address of the data object assigned by the linker. * @param size Size of the data object. */ +#ifdef CONFIG_CHIP_INIT_ROM_REGION void init_rom_unmap(const void *addr, int size); +#else +static inline void init_rom_unmap(const void *addr, int size) +{ +} +#endif /** * Copy an .init_rom data object into a RAM location. This routine must be used @@ -49,17 +61,9 @@ void init_rom_unmap(const void *addr, int size); * * @return 0 on success. */ +#ifdef CONFIG_CHIP_INIT_ROM_REGION int init_rom_copy(int offset, int size, char *data); #else -static inline const void *init_rom_map(const void *addr, int size) -{ - return addr; -} - -static inline void init_rom_unmap(const void *addr, int size) -{ -} - static inline int init_rom_copy(int offset, int size, char *data) { return 0; diff --git a/include/ioexpander.h b/include/ioexpander.h index e9499d27bd..4024a5a267 100644 --- a/include/ioexpander.h +++ b/include/ioexpander.h @@ -59,6 +59,12 @@ struct ioexpander_drv { /* IO Expander has been initialized */ #define IOEX_FLAGS_INITIALIZED BIT(1) +/* + * BITS 24 to 31 are used by io-expander drivers that need to control multiple + * devices + */ +#define IOEX_FLAGS_CUSTOM_BIT(x) BUILD_CHECK_INLINE(BIT(x), BIT(x) & 0xff000000) + struct ioexpander_config_t { /* Physical I2C port connects to the IO expander chip. */ int i2c_host_port; @@ -92,6 +98,16 @@ int ioex_enable_interrupt(enum ioex_signal signal); int ioex_disable_interrupt(enum ioex_signal signal); /* + * Get io expander flags (IOEX_FLAGS_*) for chip that specified IOEX signal + * belongs to. They contain information if port was disabled or initialized. + * + * @param signal IOEX signal that belongs to chip which flags will be returned + * @param val Pointer to memory where flags will be stored + * @return EC_SUCCESS if successful, non-zero if error. + */ +int ioex_get_ioex_flags(enum ioex_signal signal, int *val); + +/* * Get flags for the IOEX signal * * @param signal IOEX signal to get flags for diff --git a/include/keyboard_backlight.h b/include/keyboard_backlight.h index e0a1f4d30e..96bf69aaae 100644 --- a/include/keyboard_backlight.h +++ b/include/keyboard_backlight.h @@ -43,6 +43,12 @@ struct kblight_drv { * @return EC_SUCCESS or EC_ERROR_* */ int (*enable)(int enable); + + /** + * Get the enabled state. + * @return 1=Enable, 0=Disable, -1=Failed to read enabled state. + */ + int (*get_enabled)(void); }; /** diff --git a/include/mock/tcpc_mock.h b/include/mock/tcpc_mock.h index 9098fe1ba3..f4db14efb7 100644 --- a/include/mock/tcpc_mock.h +++ b/include/mock/tcpc_mock.h @@ -15,6 +15,7 @@ struct mock_tcpc_ctrl { int num_calls_to_set_header; bool should_print_call; uint64_t first_call_to_enable_auto_toggle; + bool lpm_wake_requested; /* Set to function pointer if callback is needed for test code */ struct tcpm_drv callbacks; diff --git a/include/panic.h b/include/panic.h index 577e592e32..4976486e95 100644 --- a/include/panic.h +++ b/include/panic.h @@ -176,6 +176,14 @@ void panic_printf(const char *format, ...); */ void panic_data_print(const struct panic_data *pdata); +/* + * Print saved panic information on console channel to observe panic + * information + * + * @param pdata pointer to saved panic data + */ +void panic_data_ccprint(const struct panic_data *pdata); + /** * Report an assertion failure and reset * diff --git a/include/power/falconlite.h b/include/power/falconlite.h new file mode 100644 index 0000000000..3c0baeff66 --- /dev/null +++ b/include/power/falconlite.h @@ -0,0 +1,21 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_POWER_FALCONLITE_H_ +#define __CROS_EC_POWER_FALCONLITE_H_ + +enum power_signal_falconlite { + FCL_AP_WARM_RST_REQ, + FCL_AP_SHUTDOWN_REQ, + FCL_AP_WATCHDOG, + FCL_PG_S5, + FCL_PG_VDD1_VDD2, + FCL_PG_VDD_MEDIA_ML, + FCL_PG_VDD_SOC, + FCL_PG_VDD_DDR_OD, + POWER_SIGNAL_COUNT, +}; + +#endif /* __CROS_EC_POWER_FALCONLITE_H_ */ diff --git a/include/power/mt8192.h b/include/power/mt8192.h index e0c65c3bcc..7a992001ab 100644 --- a/include/power/mt8192.h +++ b/include/power/mt8192.h @@ -6,6 +6,8 @@ #ifndef __CROS_EC_POWER_MT8192_H_ #define __CROS_EC_POWER_MT8192_H_ +#ifndef CONFIG_ZEPHYR + enum power_signal { PMIC_PWR_GOOD, AP_IN_S3_L, @@ -13,4 +15,6 @@ enum power_signal { POWER_SIGNAL_COUNT, }; +#endif /* !CONFIG_ZEPHYR */ + #endif /* __CROS_EC_POWER_MT8192_H_ */ diff --git a/include/task.h b/include/task.h index 9eb5a23b33..fdfae9d5c6 100644 --- a/include/task.h +++ b/include/task.h @@ -10,6 +10,7 @@ #include "common.h" #include "compile_time_macros.h" +#include <stdbool.h> #include "task_id.h" /* Task event bitmasks */ @@ -82,7 +83,7 @@ void interrupt_enable(void); /** * Check if interrupts are enabled */ -int is_interrupt_enabled(void); +bool is_interrupt_enabled(void); /* * Define irq_lock and irq_unlock that match the function signatures to Zephyr's @@ -118,12 +119,12 @@ void irq_unlock(uint32_t key); /** * Return true if we are in interrupt context. */ -int in_interrupt_context(void); +bool in_interrupt_context(void); /** * Return true if we are in software interrupt context. */ -int in_soft_interrupt_context(void); +bool in_soft_interrupt_context(void); /** * Return current interrupt mask with disabling interrupt. Meaning is @@ -166,6 +167,23 @@ static inline void task_wake(task_id_t tskid) */ task_id_t task_get_current(void); +#ifdef CONFIG_ZEPHYR +/** + * Check if this current task is running in deferred context + */ +bool in_deferred_context(void); +#else +/* All ECOS deferred calls run from the HOOKS task */ +static inline bool in_deferred_context(void) +{ +#ifdef HAS_TASK_HOOKS + return (task_get_current() == TASK_ID_HOOKS); +#else + return false; +#endif /* HAS_TASK_HOOKS */ +} +#endif /* CONFIG_ZEPHYR */ + /** * Return a pointer to the bitmap of events of the task. */ @@ -431,8 +449,9 @@ struct irq_def { #define IRQ_HANDLER(irqname) CONCAT3(irq_, irqname, _handler) #define IRQ_HANDLER_OPT(irqname) CONCAT3(irq_, irqname, _handler_optional) #define DECLARE_IRQ(irq, routine, priority) DECLARE_IRQ_(irq, routine, priority) -#define DECLARE_IRQ_(irq, routine, priority) \ - void IRQ_HANDLER_OPT(irq)(void) __attribute__((alias(#routine))); +#define DECLARE_IRQ_(irq, routine, priority) \ + static void routine(void) __attribute__((used)); \ + void IRQ_HANDLER_OPT(irq)(void) __attribute__((alias(#routine))) /* Include ec.irqlist here for compilation dependency */ #define ENABLE_IRQ(x) diff --git a/include/timer.h b/include/timer.h index d8bc252ba0..340dd8c5e8 100644 --- a/include/timer.h +++ b/include/timer.h @@ -177,4 +177,17 @@ static inline int time_after(uint32_t a, uint32_t b) return time_until(a, b) < 0; } +/** + * @brief Mock get_time() function. + * + * Setting to non-NULL makes subsequent calls to get_time() return + * its set value. + * + * When set to NULL, subsequent calls to get_time() return + * unmocked values. + */ +#ifdef CONFIG_ZTEST +extern timestamp_t *get_time_mock; +#endif /* CONFIG_ZTEST */ + #endif /* __CROS_EC_TIMER_H */ diff --git a/include/usb_dp_alt_mode.h b/include/usb_dp_alt_mode.h index ea824ea476..40b7c321dd 100644 --- a/include/usb_dp_alt_mode.h +++ b/include/usb_dp_alt_mode.h @@ -15,6 +15,7 @@ #include <stdint.h> #include "tcpm/tcpm.h" +#include "usb_pd_dpm.h" /* * Initialize DP state for the specified port. @@ -66,12 +67,14 @@ void dp_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd); /* * Construct the next DisplayPort VDM that should be sent. * - * @param port USB-C port number - * @param vdo_count The number of VDOs in vdm; must be at least VDO_MAX_SIZE - * @param vdm The VDM payload to be sent; output; must point to at least - * VDO_MAX_SIZE elements - * @return The number of VDOs written to VDM or -1 to indicate error + * @param[in] port USB-C port number + * @param[in,out] vdo_count The number of VDOs in vdm; must be at least + * VDO_MAX_SIZE. On success, number of populated VDOs + * @param[out] vdm The VDM payload to be sent; output; must point to at + * least VDO_MAX_SIZE elements + * @return enum dpm_msg_setup_status */ -int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm); +enum dpm_msg_setup_status dp_setup_next_vdm(int port, int *vdo_count, + uint32_t *vdm); #endif /* __CROS_EC_USB_DP_ALT_MODE_H */ diff --git a/include/usb_mux.h b/include/usb_mux.h index 9909f1c1c5..41e5881a81 100644 --- a/include/usb_mux.h +++ b/include/usb_mux.h @@ -262,4 +262,11 @@ void usb_mux_hpd_update(int port, mux_state_t mux_state); */ int usb_mux_retimer_fw_update_port_info(void); +/** + * Check whether this port has pending mux sets + * + * @param port USB-C port number + * @return True if all pending mux sets have completed + */ +bool usb_mux_set_completed(int port); #endif diff --git a/include/usb_pd.h b/include/usb_pd.h index c9ead8ba33..ba6f3d99ff 100644 --- a/include/usb_pd.h +++ b/include/usb_pd.h @@ -3269,6 +3269,14 @@ __override_proto int svdm_dp_attention(int port, uint32_t *payload); */ __override_proto void svdm_exit_dp_mode(int port); +/** + * Get the DP mode that's desired on this port + * + * @param port The PD port number + * @return USB_PD_MUX_DOCK or USB_PD_MUX_DP_ENABLED + */ +uint8_t svdm_dp_get_mux_mode(int port); + /* Google Firmware Update Alternate Mode */ /** * Enter Google Firmware Update (GFU) Mode. diff --git a/include/usb_pd_dpm.h b/include/usb_pd_dpm.h index 19d4c4fe6b..18b73fca84 100644 --- a/include/usb_pd_dpm.h +++ b/include/usb_pd_dpm.h @@ -108,4 +108,12 @@ int dpm_get_source_pdo(const uint32_t **src_pdo, const int port); */ int dpm_get_source_current(const int port); +/* Enum for modules to describe to the DPM their setup status */ +enum dpm_msg_setup_status { + MSG_SETUP_SUCCESS, + MSG_SETUP_ERROR, + MSG_SETUP_UNSUPPORTED, + MSG_SETUP_MUX_WAIT, +}; + #endif /* __CROS_EC_USB_DPM_H */ diff --git a/include/usb_pd_pdo.h b/include/usb_pd_pdo.h new file mode 100644 index 0000000000..4219c05183 --- /dev/null +++ b/include/usb_pd_pdo.h @@ -0,0 +1,19 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __CROS_EC_COMMON_USB_PD_PDO_H +#define __CROS_EC_COMMON_USB_PD_PDO_H + +/* ---------------- Power Data Objects (PDOs) ----------------- */ +#ifndef CONFIG_USB_PD_CUSTOM_PDO +extern const uint32_t pd_src_pdo[1]; +extern const int pd_src_pdo_cnt; +extern const uint32_t pd_src_pdo_max[1]; +extern const int pd_src_pdo_max_cnt; +extern const uint32_t pd_snk_pdo[3]; +extern const int pd_snk_pdo_cnt; +#endif /* CONFIG_USB_PD_CUSTOM_PDO */ + +#endif /* __CROS_EC_COMMON_USB_PD_PDO_H */ diff --git a/include/usb_pd_tcpm.h b/include/usb_pd_tcpm.h index 08c332efa2..d17dab6aab 100644 --- a/include/usb_pd_tcpm.h +++ b/include/usb_pd_tcpm.h @@ -430,6 +430,16 @@ struct tcpm_drv { * @return EC_SUCCESS or error */ int (*enter_low_power_mode)(int port); + + /** + * Starts I2C wake sequence for TCPC + * + * NOTE: Do no use tcpc_(read|write) style helper methods in this + * function. You must use i2c_(read|write) directly. + * + * @param port Type-C port number + */ + void (*wake_low_power_mode)(int port); #endif #ifdef CONFIG_USB_PD_FRS_TCPC @@ -487,6 +497,7 @@ struct tcpm_drv { * Bit 4 --> Set to 1 if TCPC is using TCPCI Revision 2.0 but does not support * the vSafe0V bit in the EXTENDED_STATUS_REGISTER * Bit 5 --> Set to 1 to prevent TCPC setting debug accessory control + * Bit 6 --> TCPC controls VCONN (even when CONFIG_USB_PD_TCPC_VCONN is off) */ #define TCPC_FLAGS_ALERT_ACTIVE_HIGH BIT(0) #define TCPC_FLAGS_ALERT_OD BIT(1) @@ -494,6 +505,7 @@ struct tcpm_drv { #define TCPC_FLAGS_TCPCI_REV2_0 BIT(3) #define TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V BIT(4) #define TCPC_FLAGS_NO_DEBUG_ACC_CONTROL BIT(5) +#define TCPC_FLAGS_CONTROL_VCONN BIT(6) struct tcpc_config_t { enum ec_bus_type bus_type; /* enum ec_bus_type */ @@ -503,6 +515,7 @@ struct tcpc_config_t { const struct tcpm_drv *drv; /* See TCPC_FLAGS_* above */ uint32_t flags; + enum gpio_signal alert_signal; }; #ifndef CONFIG_USB_PD_TCPC_RUNTIME_CONFIG diff --git a/include/usb_pd_timer.h b/include/usb_pd_timer.h index 5757bd7ada..5746e76430 100644 --- a/include/usb_pd_timer.h +++ b/include/usb_pd_timer.h @@ -194,7 +194,6 @@ enum pd_task_timer { PD_TIMER_COUNT }; -BUILD_ASSERT(PD_TIMER_COUNT <= 32); enum pd_timer_range { PE_TIMER_RANGE, @@ -295,4 +294,58 @@ int pd_timer_next_expiration(int port); */ void pd_timer_dump(int port); +#ifdef TEST_BUILD +/***************************************************************************** + * TEST_BUILD section + * + * This is solely for the use of unit testing. Most of the inner workings + * of PD timer are internal static, so they have to be allowed access in + * order to unit test the basics of the code. + * + * If you are interested in the workings of PD timers please refer to + * common/usbc/usb_pd_timer.c + */ + +/* exported: number of USB-C ports */ +#define MAX_PD_PORTS CONFIG_USB_PD_PORT_MAX_COUNT +/* exported: number of uint32_t fields for bit mask to all timers */ +#define TIMER_FIELD_NUM_UINT32S 2 + +/* PD timers have three possible states: Active, Inactive and Disabled */ +/* exported: timer_active indicates if a timer is currently active */ +extern uint32_t timer_active[MAX_PD_PORTS][TIMER_FIELD_NUM_UINT32S]; +/* exported: timer_disabled indicates if a timer is currently disabled */ +extern uint32_t timer_disabled[MAX_PD_PORTS][TIMER_FIELD_NUM_UINT32S]; + +/* exported: do not call directly, only for the defined macros */ +extern void pd_timer_atomic_op( + atomic_val_t (*op)(atomic_t*, atomic_val_t), + uint32_t *const timer_field, const uint64_t mask); + +/* exported: set/clear/check the current timer_active for a timer */ +#define PD_SET_ACTIVE(p, m) pd_timer_atomic_op( \ + atomic_or, \ + timer_active[p], \ + (m)) +#define PD_CLR_ACTIVE(p, m) pd_timer_atomic_op( \ + atomic_clear_bits, \ + timer_active[p], \ + (m)) +#define PD_CHK_ACTIVE(p, m) ((timer_active[p][0] & ((m) >> 32)) | \ + (timer_active[p][1] & (m))) + +/* exported: set/clear/check the current timer_disabled for a timer */ +#define PD_SET_DISABLED(p, m) pd_timer_atomic_op( \ + atomic_or, \ + timer_disabled[p], \ + (m)) +#define PD_CLR_DISABLED(p, m) pd_timer_atomic_op( \ + atomic_clear_bits, \ + timer_disabled[p], \ + (m)) +#define PD_CHK_DISABLED(p, m) ((timer_disabled[p][0] & ((m) >> 32)) | \ + (timer_disabled[p][1] & (m))) + +#endif /* TEST_BUILD */ + #endif /* __CROS_EC_USB_PD_TIMER_H */ diff --git a/include/usb_tbt_alt_mode.h b/include/usb_tbt_alt_mode.h index 1ea4828059..a187c1b42b 100644 --- a/include/usb_tbt_alt_mode.h +++ b/include/usb_tbt_alt_mode.h @@ -14,6 +14,7 @@ #include <stdint.h> #include "tcpm/tcpm.h" +#include "usb_pd_dpm.h" #include "usb_pd_tcpm.h" /* @@ -92,14 +93,17 @@ void intel_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd); /* * Construct the next Thunderbolt VDM that should be sent. * - * @param port USB-C port number - * @param vdo_count The number of VDOs in vdm; must be at least VDO_MAX_SIZE - * @param vdm The VDM payload to be sent; output; must point to at least - * VDO_MAX_SIZE elements - * @param tx_type Transmit type(SOP, SOP', SOP'') for next VDM to be sent - * @return The number of VDOs written to VDM or -1 to indicate error + * @param[in] port USB-C port number + * @param[in,out] vdo_count The number of VDOs in vdm; must be at least + * VDO_MAX_SIZE. Filled with VDOs populated on success + * @param[out] vdm The VDM payload to be sent; output; must point to at + * least VDO_MAX_SIZE elements + * @param[out] tx_type Transmit type(SOP, SOP', SOP'') for next VDM to be + * sent + * @return enum dpm_msg_setup_status */ -int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, - enum tcpci_msg_type *tx_type); +enum dpm_msg_setup_status tbt_setup_next_vdm(int port, int *vdo_count, + uint32_t *vdm, + enum tcpci_msg_type *tx_type); #endif diff --git a/include/usbc_ppc.h b/include/usbc_ppc.h index 8c18857961..ae7e0fba4c 100644 --- a/include/usbc_ppc.h +++ b/include/usbc_ppc.h @@ -158,6 +158,13 @@ struct ppc_drv { * @return EC_SUCCESS on success, error otherwise. */ int (*enter_low_power_mode)(int port); + + /** + * Interrupt handler for GPIO pin. + * + * @port Port The Type-C port which triggered the interrupt. + */ + void (*interrupt)(int port); }; struct ppc_config_t { @@ -1,6 +1,6 @@ # CrOS EC (Embedded Controller) -[logo]: https://chromium-review.googlesource.com/plugins/chromium-style/static/chromium_logo.png +[logo]: https://chromium-review.googlesource.com/plugins/chromium-style/static/web/chromium_logo.png [home]: /README.md * [Home][home] diff --git a/power/alderlake_slg4bd44540.c b/power/alderlake_slg4bd44540.c index 381b86bd1e..7c6e16b9c1 100644 --- a/power/alderlake_slg4bd44540.c +++ b/power/alderlake_slg4bd44540.c @@ -63,7 +63,7 @@ const struct power_signal_info power_signal_list[] = { .name = "SLP_S3_DEASSERTED", }, [X86_SLP_S4_DEASSERTED] = { - .gpio = SLP_S4_SIGNAL_L, + .gpio = (enum gpio_signal)SLP_S4_SIGNAL_L, .flags = POWER_SIGNAL_ACTIVE_HIGH, .name = "SLP_S4_DEASSERTED", }, diff --git a/power/amd_x86.c b/power/amd_x86.c index c1b7b2d853..ae3367e227 100644 --- a/power/amd_x86.c +++ b/power/amd_x86.c @@ -47,7 +47,7 @@ static void chipset_force_g3(void) gpio_set_level(GPIO_EN_PWR_A, 0); } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { CPRINTS("%s: %d", __func__, reason); diff --git a/power/braswell.c b/power/braswell.c index 288092c795..dd2e3a8bb5 100644 --- a/power/braswell.c +++ b/power/braswell.c @@ -69,7 +69,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) forcing_shutdown = 1; } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { CPRINTS("%s: %d", __func__, reason); report_ap_reset(reason); diff --git a/power/build.mk b/power/build.mk index e2b86a055e..3e47167f0a 100644 --- a/power/build.mk +++ b/power/build.mk @@ -26,5 +26,6 @@ power-$(CONFIG_CHIPSET_SC7280)+=qcom.o power-$(CONFIG_CHIPSET_SDM845)+=sdm845.o power-$(CONFIG_CHIPSET_SKYLAKE)+=skylake.o intel_x86.o power-$(CONFIG_CHIPSET_STONEY)+=amd_x86.o +power-$(CONFIG_CHIPSET_FALCONLITE)+=falconlite.o power-$(CONFIG_POWER_COMMON)+=common.o power-$(CONFIG_POWER_TRACK_HOST_SLEEP_STATE)+=host_sleep.o diff --git a/power/common.c b/power/common.c index 0f83a2ce61..0db4eb8f3e 100644 --- a/power/common.c +++ b/power/common.c @@ -115,7 +115,7 @@ __overridable int power_signal_get_level(enum gpio_signal signal) if (IS_ENABLED(CONFIG_HOST_ESPI_VW_POWER_SIGNAL)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) - return espi_vw_get_wire(signal); + return espi_vw_get_wire((enum espi_vw_signal)signal); } return gpio_get_level(signal); } @@ -125,7 +125,8 @@ int power_signal_disable_interrupt(enum gpio_signal signal) if (IS_ENABLED(CONFIG_HOST_ESPI_VW_POWER_SIGNAL)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) - return espi_vw_disable_wire_int(signal); + return espi_vw_disable_wire_int( + (enum espi_vw_signal)signal); } return gpio_disable_interrupt(signal); } @@ -135,7 +136,8 @@ int power_signal_enable_interrupt(enum gpio_signal signal) if (IS_ENABLED(CONFIG_HOST_ESPI_VW_POWER_SIGNAL)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) - return espi_vw_enable_wire_int(signal); + return espi_vw_enable_wire_int( + (enum espi_vw_signal)signal); } return gpio_enable_interrupt(signal); } @@ -149,10 +151,11 @@ int power_signal_is_asserted(const struct power_signal_info *s) #ifdef CONFIG_BRINGUP static const char *power_signal_get_name(enum gpio_signal signal) { - if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) { + if (IS_ENABLED(CONFIG_HOST_INTERFACE_ESPI)) { /* Check signal is from GPIOs or VWs */ if (espi_signal_is_vw(signal)) - return espi_vw_get_wire_name(signal); + return espi_vw_get_wire_name( + (enum espi_vw_signal)signal); } return gpio_get_name(signal); } diff --git a/power/falconlite.c b/power/falconlite.c new file mode 100644 index 0000000000..d2f8e5952a --- /dev/null +++ b/power/falconlite.c @@ -0,0 +1,515 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* FalconLite chipset power control module for Chrome EC */ + +#include "charge_state.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "ec_commands.h" +#include "gpio.h" +#include "hooks.h" +#include "lid_switch.h" +#include "power.h" +#include "power_button.h" +#include "system.h" +#include "task.h" +#include "timer.h" +#include "util.h" + +#ifdef CONFIG_BRINGUP +#define GPIO_SET_LEVEL(signal, value) \ + gpio_set_level_verbose(CC_CHIPSET, signal, value) +#else +#define GPIO_SET_LEVEL(signal, value) gpio_set_level(signal, value) +#endif + +/* Console output macros */ +#define CPUTS(outstr) cputs(CC_CHIPSET, outstr) +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) + +/* Long power key press to force shutdown in S0. go/crosdebug */ +#define FORCED_SHUTDOWN_DELAY (8 * SECOND) +/* Long power key press to boot from S5/G3 state. */ +#define POWERBTN_BOOT_DELAY (10 * MSEC) + +#define SYS_RST_PULSE_LENGTH (30 * MSEC) + +/* Masks for power signals */ +#define IN_PG_S5 POWER_SIGNAL_MASK(FCL_PG_S5) +#define IN_PGOOD (POWER_SIGNAL_MASK(FCL_PG_VDD1_VDD2) | \ + POWER_SIGNAL_MASK(FCL_PG_VDD_MEDIA_ML) | \ + POWER_SIGNAL_MASK(FCL_PG_VDD_SOC) | \ + POWER_SIGNAL_MASK(FCL_PG_VDD_DDR_OD) | \ + POWER_SIGNAL_MASK(FCL_PG_S5)) + +#define IN_ALL_S0 IN_PGOOD +#define IN_ALL_S3 IN_PGOOD + +/* Power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + [FCL_AP_WARM_RST_REQ] = { + GPIO_AP_EC_WARM_RST_REQ, + POWER_SIGNAL_ACTIVE_HIGH, + "AP_WARM_RST_REQ" + }, + [FCL_AP_SHUTDOWN_REQ] = { + GPIO_AP_EC_SHUTDOWN_REQ_L, + POWER_SIGNAL_ACTIVE_LOW, + "AP_SHUTDOWN_REQ" + }, + [FCL_AP_WATCHDOG] = { + GPIO_AP_EC_WATCHDOG_L, + POWER_SIGNAL_ACTIVE_LOW, + "AP_WDT" + }, + [FCL_PG_S5] = { + GPIO_PG_S5_PWR_OD, + POWER_SIGNAL_ACTIVE_HIGH, + "PG_S5" + }, + [FCL_PG_VDD1_VDD2] = { + GPIO_PG_VDD1_VDD2_OD, + POWER_SIGNAL_ACTIVE_HIGH, + "PG_VDD1_VDD2" + }, + [FCL_PG_VDD_MEDIA_ML] = { + GPIO_PG_VDD_MEDIA_ML_OD, + POWER_SIGNAL_ACTIVE_HIGH, + "PG_VDD_MEDIA_ML" + }, + [FCL_PG_VDD_SOC] = { + GPIO_PG_VDD_SOC_OD, + POWER_SIGNAL_ACTIVE_HIGH, + "PG_VDD_SOC" + }, + [FCL_PG_VDD_DDR_OD] = { + GPIO_PG_VDD_DDR_OD, + POWER_SIGNAL_ACTIVE_HIGH, + "PG_VDD_DDR" + }, +}; + + +/* Data structure for a GPIO operation for power sequencing */ +struct power_seq_op { + enum gpio_signal signal; + uint8_t level; + /* Number of milliseconds to delay after setting signal to level */ + uint32_t delay; +}; + +/* + * The entries in the table are handled sequentially from the top + * to the bottom. + */ + +/* The power sequence for POWER_S3S5 */ +static const struct power_seq_op s3s5_power_seq[] = { + {GPIO_EN_VDD_CPU, 0, 0}, + {GPIO_EN_VDD_GPU, 0, 0}, + {GPIO_EN_VDD_MEDIA_ML, 0, 4}, + + {GPIO_EN_VDDQ_VR_D, 0, 4}, /* LPDDR */ + + {GPIO_EN_VDD1_VDD2_VR, 0, 4}, /* LPDDR */ + + {GPIO_EN_VDD_DDR, 0, 4}, + + {GPIO_EN_PP3300A_IO_X, 0, 0}, + {GPIO_EN_PP3300_S3, 0, 4}, + + {GPIO_EN_PP1820A_IO_X, 0, 0}, + {GPIO_EN_PP1800_S3, 0, 0}, +}; + +/* The power sequence for POWER_G3S5 */ +static const struct power_seq_op g3s5_power_seq[] = { + /* delay 10ms as PP1800_S5 uses PP1800_S5 as alaternative supply */ + {GPIO_EN_PP5000_S5, 1, 10}, + + {GPIO_EN_PP1800_S5, 1, 0}, + + {GPIO_EN_PP1800_VDDIO_PMC_X, 1, 4}, + + {GPIO_EN_PP0800_VDD_PMC_X, 1, 0}, + {GPIO_EN_VDD_SOC, 1, 4}, + + {GPIO_EN_PP1800_VDD33_PMC_X, 1, 0}, +}; + +/* This is the power sequence for POWER_S5S3. */ +static const struct power_seq_op s5s3_power_seq[] = { + {GPIO_EN_PP1800_S3, 1, 0}, + {GPIO_EN_PP1820A_IO_X, 1, 4}, + + {GPIO_EN_PP3300_S3, 1, 0}, + {GPIO_EN_PP3300A_IO_X, 1, 4}, + + {GPIO_EN_VDD_DDR, 1, 4}, + + {GPIO_EN_VDD1_VDD2_VR, 1, 4}, /* LPDDR */ + + {GPIO_EN_VDDQ_VR_D, 1, 4}, /* LPDDR */ + + {GPIO_EN_VDD_MEDIA_ML, 1, 0}, + {GPIO_EN_VDD_GPU, 1, 0}, + {GPIO_EN_VDD_CPU, 1, 0}, +}; + +/* The power sequence for POWER_S5G3 */ +static const struct power_seq_op s5g3_power_seq[] = { + {GPIO_EN_PP1800_VDD33_PMC_X, 0, 4}, + + {GPIO_EN_VDD_SOC, 0, 0}, + + {GPIO_EN_PP0800_VDD_PMC_X, 0, 4}, + + {GPIO_EN_PP1800_VDDIO_PMC_X, 0, 4}, + + {GPIO_EN_PP1800_S5, 0, 4}, + + {GPIO_EN_PP5000_S5, 0, 4}, +}; + +/* most recently received sleep event */ +static enum host_sleep_event ap_sleep_event; +/* indicator for shutdown AP */ +static char ap_shutdown; +/* indicator for boot AP from off state */ +static char boot_from_off; + +static void reset_request_interrupt_deferred(void) +{ + chipset_reset(CHIPSET_RESET_AP_REQ); +} +DECLARE_DEFERRED(reset_request_interrupt_deferred); + +void chipset_force_shutdown(enum chipset_shutdown_reason reason) +{ + CPRINTS("%s(%d)", __func__, reason); + report_ap_reset(reason); + + /* + * Force power off. This condition will reset once the state machine + * transitions to G3. + */ + ap_shutdown = 1; + task_wake(TASK_ID_CHIPSET); +} + +void chipset_force_shutdown_button(void) +{ + chipset_force_shutdown(CHIPSET_SHUTDOWN_BUTTON); +} +DECLARE_DEFERRED(chipset_force_shutdown_button); + +void chipset_exit_hard_off_button(void) +{ + /* Power up from off */ + ap_shutdown = 0; + boot_from_off = 1; + CPRINTS("PWRON:BTN"); + chipset_exit_hard_off(); +} +DECLARE_DEFERRED(chipset_exit_hard_off_button); + +void chipset_reset_request_interrupt(enum gpio_signal signal) +{ + /* + * indicator for the following reset is a reboot or a AP requested + * shutdown. + */ + static char want_reboot; + + if (signal == GPIO_AP_EC_WARM_RST_REQ) { + CPRINTS("AP wants reboot"); + hook_call_deferred(&reset_request_interrupt_deferred_data, 0); + want_reboot = 1; + } else if (signal == GPIO_AP_EC_SHUTDOWN_REQ_L) { + /* + * When AP_SHUTDOWN_REQ_L is asserted, we have to check if + * there is a AP_EC_WARM_RST_REQ interrupt prior to this one, + * and that would be a reboot request, rather than a + * shutdown. In the meantime, the WDT should not be asserted, + * or this is a WDT reset, which will be handled by AP. + */ + if (gpio_get_level(GPIO_AP_EC_WATCHDOG_L) && + !gpio_get_level(signal) && !want_reboot) { + CPRINTS("AP wants shutdown"); + ap_shutdown = 1; + } + want_reboot = 0; + } + power_signal_interrupt(signal); +} + +enum power_state power_chipset_init(void) +{ + uint32_t reset_flags = system_get_reset_flags(); + int exit_hard_off = 1; + + /* Enable reboot / sleep control inputs from AP */ + gpio_enable_interrupt(GPIO_AP_EC_WARM_RST_REQ); + gpio_enable_interrupt(GPIO_AP_EC_SHUTDOWN_REQ_L); + + if (reset_flags & EC_RESET_FLAG_SYSJUMP) { + if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) { + disable_sleep(SLEEP_MASK_AP_RUN); + CPRINTS("already in S0"); + return POWER_S0; + } + } else if (reset_flags & EC_RESET_FLAG_AP_OFF) { + exit_hard_off = 0; + } else if ((reset_flags & EC_RESET_FLAG_HIBERNATE) && + gpio_get_level(GPIO_AC_PRESENT)) { + /* + * If AC present, assume this is a wake-up by AC insert. + * Boot EC only. + * + * Note that extpower module is not initialized at this point, + * the only way is to ask GPIO_AC_PRESENT directly. + */ + exit_hard_off = 0; + } + + if (battery_is_present() == BP_YES) + /* + * (crosbug.com/p/28289): Wait battery stable. + * Some batteries use clock stretching feature, which requires + * more time to be stable. + */ + battery_wait_for_stable(); + + if (exit_hard_off) { + CPRINTS("PWRON:0x%x", reset_flags); + ap_shutdown = 0; + boot_from_off = 1; + /* Auto-power on */ + chipset_exit_hard_off(); + } + + /* Start from S5 if the rail is already up. */ + if (power_get_signals() & IN_PG_S5) { + /* Force shutdown from S5 if the rails is already up. */ + if (!exit_hard_off) + ap_shutdown = 1; + return POWER_S5; + } + + return POWER_G3; +} + +void chipset_reset(enum chipset_shutdown_reason reason) +{ + CPRINTS("%s: %d", __func__, reason); + report_ap_reset(reason); + + GPIO_SET_LEVEL(GPIO_SYS_RST_ODL, 0); + usleep(SYS_RST_PULSE_LENGTH); + GPIO_SET_LEVEL(GPIO_SYS_RST_ODL, 1); +} +/** + * Step through the power sequence table and do corresponding GPIO operations. + * + * @param power_seq_ops The pointer to the power sequence table. + * @param op_count The number of entries of power_seq_ops. + */ +static void power_seq_run(const struct power_seq_op *power_seq_ops, + int op_count) +{ + int i; + + for (i = 0; i < op_count; i++) { + GPIO_SET_LEVEL(power_seq_ops[i].signal, + power_seq_ops[i].level); + if (!power_seq_ops[i].delay) + continue; + msleep(power_seq_ops[i].delay); + } +} + +enum power_state power_handle_state(enum power_state state) +{ + /* Retry S5->S3 transition, if not zero. */ + static int s5s3_retry; + + switch (state) { + case POWER_G3: + break; + + case POWER_S5: + if (boot_from_off) { + s5s3_retry = 1; + return POWER_S5S3; + } + + /* + * Stay in S5, common code will drop to G3 after timeout + * if the long press does not work. + */ + return POWER_S5; + case POWER_S3: + if (!power_has_signals(IN_PGOOD) || ap_shutdown) + return POWER_S3S5; + else if (ap_sleep_event == HOST_SLEEP_EVENT_S3_RESUME || + boot_from_off) + return POWER_S3S0; + break; + + case POWER_S0: + if (ap_sleep_event == HOST_SLEEP_EVENT_S3_SUSPEND || + !power_has_signals(IN_ALL_S0) || ap_shutdown) + return POWER_S0S3; + break; + + case POWER_G3S5: + ap_shutdown = 0; + power_seq_run(g3s5_power_seq, ARRAY_SIZE(g3s5_power_seq)); + + /* Power up to next state, or go back */ + if (power_get_signals() & IN_PG_S5) + return POWER_S5; + else + return POWER_G3; + break; + + case POWER_S5S3: + hook_notify(HOOK_CHIPSET_PRE_INIT); + + power_seq_run(s5s3_power_seq, ARRAY_SIZE(s5s3_power_seq)); + + /* + * Wait for rails up. Retry if it fails + * (it may take 2 attempts on restart after we use + * force reset). + */ + if (!power_has_signals(IN_ALL_S3)) { + if (s5s3_retry) { + s5s3_retry = 0; + return POWER_S5S3; + } + boot_from_off = 0; + /* Give up, go back to G3. */ + return POWER_S5G3; + } + + GPIO_SET_LEVEL(GPIO_SYS_RST_ODL, 1); + + /* Call hooks now that rails are up */ + hook_notify(HOOK_CHIPSET_STARTUP); + + /* Power up to next state */ + return POWER_S3; + + case POWER_S3S5: + /* Call hooks before we remove power rails */ + hook_notify(HOOK_CHIPSET_SHUTDOWN); + + GPIO_SET_LEVEL(GPIO_SYS_RST_ODL, 0); + power_seq_run(s3s5_power_seq, ARRAY_SIZE(s3s5_power_seq)); + + /* Call hooks after we remove power rails */ + hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); + + /* Start shutting down */ + return POWER_S5; + + case POWER_S0S3: + /* Call hooks before we remove power rails */ + hook_notify(HOOK_CHIPSET_SUSPEND); + + /* + * Enable idle task deep sleep. Allow the low power idle task + * to go into deep sleep in S3 or lower. + */ + enable_sleep(SLEEP_MASK_AP_RUN); + + /* + * In case the power button is held awaiting power-off timeout, + * power off immediately now that we're entering S3. + */ + if (power_button_is_pressed()) { + ap_shutdown = 1; + hook_call_deferred(&chipset_force_shutdown_button_data, + -1); + } + + return POWER_S3; + + case POWER_S3S0: + if (power_wait_signals(IN_ALL_S0)) { + chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT); + return POWER_S0S3; + } + boot_from_off = 0; + + /* Call hooks now that rails are up */ + hook_notify(HOOK_CHIPSET_RESUME); + + /* + * Disable idle task deep sleep. This means that the low + * power idle task will not go into deep sleep while in S0. + */ + disable_sleep(SLEEP_MASK_AP_RUN); + + /* Power up to next state */ + return POWER_S0; + + case POWER_S5G3: + power_seq_run(s5g3_power_seq, ARRAY_SIZE(s5g3_power_seq)); + return POWER_G3; + } + + return state; +} + +static void power_button_changed(void) +{ + if (power_button_is_pressed()) { + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + hook_call_deferred(&chipset_exit_hard_off_button_data, + POWERBTN_BOOT_DELAY); + + /* Delayed power down from S0/S3, cancel on PB release */ + hook_call_deferred(&chipset_force_shutdown_button_data, + FORCED_SHUTDOWN_DELAY); + } else { + /* Power button released, cancel deferred shutdown/boot */ + hook_call_deferred(&chipset_exit_hard_off_button_data, -1); + hook_call_deferred(&chipset_force_shutdown_button_data, -1); + } +} +DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, power_button_changed, HOOK_PRIO_DEFAULT); + +#ifdef CONFIG_POWER_TRACK_HOST_SLEEP_STATE +__override void power_chipset_handle_host_sleep_event( + enum host_sleep_event state, + struct host_sleep_event_context *ctx) +{ + CPRINTS("Handle sleep: %d", state); + + ap_sleep_event = state; + + if (state == HOST_SLEEP_EVENT_S3_RESUME || + state == HOST_SLEEP_EVENT_S3_SUSPEND) + task_wake(TASK_ID_CHIPSET); +} +#endif /* CONFIG_POWER_TRACK_HOST_SLEEP_STATE */ + +#ifdef CONFIG_LID_SWITCH +static void lid_changed(void) +{ + /* Power-up from off on lid open */ + if (lid_is_open() && chipset_in_state(CHIPSET_STATE_ANY_OFF)) { + CPRINTS("PWRON:LIDOPEN"); + ap_shutdown = 0; + boot_from_off = 1; + chipset_exit_hard_off(); + } +} +DECLARE_HOOK(HOOK_LID_CHANGE, lid_changed, HOOK_PRIO_DEFAULT); +#endif diff --git a/power/icelake.c b/power/icelake.c index c47f44c146..120df9f578 100644 --- a/power/icelake.c +++ b/power/icelake.c @@ -46,7 +46,7 @@ const struct power_signal_info power_signal_list[] = { .name = "SLP_S3_DEASSERTED", }, [X86_SLP_S4_DEASSERTED] = { - .gpio = SLP_S4_SIGNAL_L, + .gpio = (enum gpio_signal)SLP_S4_SIGNAL_L, .flags = POWER_SIGNAL_ACTIVE_HIGH, .name = "SLP_S4_DEASSERTED", }, diff --git a/power/intel_x86.c b/power/intel_x86.c index a982ff03c0..c682b3f078 100644 --- a/power/intel_x86.c +++ b/power/intel_x86.c @@ -390,6 +390,10 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) lpc_s3_resume_clear_masks(); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Call hooks prior to chipset resume */ + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif /* Call hooks now that rails are up */ hook_notify(HOOK_CHIPSET_RESUME); @@ -412,8 +416,13 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) return POWER_S0; case POWER_S0S3: + /* Call hooks before we remove power rails */ hook_notify(HOOK_CHIPSET_SUSPEND); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + /* Call hooks after chipset suspend */ + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif /* Suspend wireless */ wireless_set_state(WIRELESS_SUSPEND); @@ -445,6 +454,11 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) * to go into deep sleep in S0ix. */ enable_sleep(SLEEP_MASK_AP_RUN); + +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_SUSPEND_COMPLETE); +#endif + return POWER_S0ix; case POWER_S0ixS0: @@ -454,6 +468,10 @@ enum power_state common_intel_x86_power_handle_state(enum power_state state) */ disable_sleep(SLEEP_MASK_AP_RUN); +#ifdef CONFIG_CHIPSET_RESUME_INIT_HOOK + hook_notify(HOOK_CHIPSET_RESUME_INIT); +#endif + sleep_resume_transition(); return POWER_S0; #endif @@ -607,7 +625,7 @@ __overridable void intel_x86_sys_reset_delay(void) udelay(32 * MSEC); } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { /* * Irrespective of cold_reset value, always toggle SYS_RESET_L to diff --git a/power/mt817x.c b/power/mt817x.c index e7e23605f2..8f11af2364 100644 --- a/power/mt817x.c +++ b/power/mt817x.c @@ -644,7 +644,7 @@ static void power_on(void) CPRINTS("AP running ..."); } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { CPRINTS("%s: %d", __func__, reason); report_ap_reset(reason); diff --git a/power/mt8183.c b/power/mt8183.c index bdbd319601..ddf49799e9 100644 --- a/power/mt8183.c +++ b/power/mt8183.c @@ -186,7 +186,7 @@ DECLARE_HOOK(HOOK_CHIPSET_RESET, handle_chipset_reset, HOOK_PRIO_FIRST); #endif /* CONFIG_POWER_TRACK_HOST_SLEEP_STATE */ /* If chipset needs to be reset, EC also reboots to RO. */ -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { int flags = SYSTEM_RESET_HARD; diff --git a/power/mt8192.c b/power/mt8192.c index f1c8e994c1..5a4bafe600 100644 --- a/power/mt8192.c +++ b/power/mt8192.c @@ -67,9 +67,6 @@ /* Maximum time it should for PMIC to turn on after toggling PMIC_EN_ODL. */ #define PMIC_EN_TIMEOUT (300 * MSEC) -/* Time delay in G3 to deassert EN_PP1800_S5_L */ -#define EN_PP1800_S5_L_DEASSERT_TIME (20 * MSEC) - /* * Time delay for AP on/off the AP_EC_WDT when received SYS_RST_ODL. * Generally it can be done within 3 ms. @@ -79,6 +76,8 @@ /* 30 ms for hard reset, we hold it longer to prevent TPM false alarm. */ #define SYS_RST_PULSE_LENGTH (50 * MSEC) +#ifndef CONFIG_ZEPHYR + /* power signal list. Must match order of enum power_signal. */ const struct power_signal_info power_signal_list[] = { {GPIO_PMIC_EC_PWRGD, POWER_SIGNAL_ACTIVE_HIGH, "PMIC_PWR_GOOD"}, @@ -87,6 +86,8 @@ const struct power_signal_info power_signal_list[] = { }; BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); +#endif /* !CONFIG_ZEPHYR */ + static int forcing_shutdown; static void watchdog_interrupt_deferred(void) @@ -169,7 +170,7 @@ void chipset_exit_hard_off_button(void) } DECLARE_DEFERRED(chipset_exit_hard_off_button); -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { CPRINTS("%s: %d", __func__, reason); report_ap_reset(reason); diff --git a/power/qcom.c b/power/qcom.c index ef9e329111..a119ce23d6 100644 --- a/power/qcom.c +++ b/power/qcom.c @@ -578,13 +578,19 @@ enum power_state power_chipset_init(void) } } - /* Leave power off only if requested by reset flags */ - if (!(reset_flags & EC_RESET_FLAG_AP_OFF) && - !(reset_flags & EC_RESET_FLAG_SYSJUMP)) { - CPRINTS("auto_power_on set due to reset_flag 0x%x", - system_get_reset_flags()); - auto_power_on = 1; - } + auto_power_on = 1; + + /* + * Leave power off only if requested by reset flags + * + * TODO(b/201099749): EC bootloader: Give RO chance to run EFS after + * shutdown from recovery screen + */ + if (reset_flags & EC_RESET_FLAG_AP_OFF) + auto_power_on = 0; + else if (!(reset_flags & EC_RESET_FLAG_EFS) && + (reset_flags & EC_RESET_FLAG_SYSJUMP)) + auto_power_on = 0; if (battery_is_present() == BP_YES) { /* @@ -595,6 +601,9 @@ enum power_state power_chipset_init(void) battery_wait_for_stable(); } + if (auto_power_on) + CPRINTS("auto_power_on set due to reset flags"); + return init_power_state; } @@ -803,7 +812,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) task_wake(TASK_ID_CHIPSET); } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { int rv; diff --git a/power/rk3288.c b/power/rk3288.c index c647ab97b2..39f19ddeff 100644 --- a/power/rk3288.c +++ b/power/rk3288.c @@ -385,7 +385,7 @@ static void power_off(void) hook_notify(HOOK_CHIPSET_SHUTDOWN_COMPLETE); } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { CPRINTS("%s(%d)", __func__, reason); report_ap_reset(reason); diff --git a/power/rk3399.c b/power/rk3399.c index 9db25f0b28..c1693057b9 100644 --- a/power/rk3399.c +++ b/power/rk3399.c @@ -215,7 +215,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) } #define SYS_RST_HOLD_US (1 * MSEC) -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { #ifdef CONFIG_CMD_RTC /* Print out the RTC to help correlate resets in logs. */ @@ -602,7 +602,7 @@ static void power_signal_changed(void) * Pass a fake power gpio_signal to power_signal_interrupt(). * Note that here we make power_signal_interrupt() reentrant. */ - power_signal_interrupt(POWER_SIGNAL_COUNT); + power_signal_interrupt(GPIO_COUNT); in_signals = inew; } } diff --git a/power/sdm845.c b/power/sdm845.c index a8cc70b8ea..7157f98cc3 100644 --- a/power/sdm845.c +++ b/power/sdm845.c @@ -687,7 +687,7 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) task_wake(TASK_ID_CHIPSET); } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { int rv; diff --git a/power/skylake.c b/power/skylake.c index c68035e099..511ab8c32f 100644 --- a/power/skylake.c +++ b/power/skylake.c @@ -31,12 +31,12 @@ const struct power_signal_info power_signal_list[] = { }, #endif [X86_SLP_S3_DEASSERTED] = { - SLP_S3_SIGNAL_L, + (enum gpio_signal)SLP_S3_SIGNAL_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED", }, [X86_SLP_S4_DEASSERTED] = { - SLP_S4_SIGNAL_L, + (enum gpio_signal)SLP_S4_SIGNAL_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S4_DEASSERTED", }, diff --git a/test/build.mk b/test/build.mk index e695654b18..cdaca18bc4 100644 --- a/test/build.mk +++ b/test/build.mk @@ -86,6 +86,7 @@ test-list-host += usb_pd test-list-host += usb_pd_giveback test-list-host += usb_pd_rev30 test-list-host += usb_pd_pdo_fixed +test-list-host += usb_pd_timer test-list-host += usb_ppc test-list-host += usb_sm_framework_h3 test-list-host += usb_sm_framework_h2 @@ -212,6 +213,7 @@ usb_pd-y=usb_pd.o usb_pd_giveback-y=usb_pd.o usb_pd_rev30-y=usb_pd.o usb_pd_pdo_fixed-y=usb_pd_pdo_fixed_test.o +usb_pd_timer-y=usb_pd_timer.o usb_ppc-y=usb_ppc.o usb_sm_framework_h3-y=usb_sm_framework_h3.o usb_sm_framework_h2-y=usb_sm_framework_h3.o diff --git a/test/stm32f_rtc.c b/test/stm32f_rtc.c index 0e60fcb73f..36c67f004e 100644 --- a/test/stm32f_rtc.c +++ b/test/stm32f_rtc.c @@ -17,7 +17,7 @@ static const int rtc_delay_ms = 500; static const int delay_tol_us = MSEC / 2; /* Override default RTC interrupt handler */ -void __rtc_alarm_irq(void) +void rtc_alarm_irq(void) { atomic_add(&rtc_fired, 1); reset_rtc_alarm(&rtc_irq); diff --git a/test/test_config.h b/test/test_config.h index a60393dc42..8383ce005e 100644 --- a/test/test_config.h +++ b/test/test_config.h @@ -269,6 +269,8 @@ enum sensor_id { #ifdef TEST_SBS_CHARGING_V2 #define CONFIG_BATTERY +#define CONFIG_BATTERY_V2 +#define CONFIG_BATTERY_COUNT 1 #define CONFIG_BATTERY_MOCK #define CONFIG_BATTERY_SMART #define CONFIG_CHARGER @@ -381,6 +383,12 @@ int ncp15wb_calculate_temp(uint16_t adc); #define CONFIG_SW_CRC #endif +#if defined(TEST_USB_PD_TIMER) +#define CONFIG_USB_PD_PORT_MAX_COUNT 1 +#define CONFIG_MATH_UTIL +#define CONFIG_TEST_USB_PD_TIMER +#endif + #if defined(TEST_USB_PRL) #define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USB_PD_REV30 @@ -488,7 +496,11 @@ int ncp15wb_calculate_temp(uint16_t adc); #define CONFIG_USB_PD_PORT_MAX_COUNT 1 #define CONFIG_USBC_SS_MUX #define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_TCPC_LOW_POWER #define CONFIG_USB_PD_VBUS_DETECT_TCPC +/* Since we have no real HW to wait on, use a minimal debounce */ +#undef CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE +#define CONFIG_USB_PD_TCPC_LPM_EXIT_DEBOUNCE 1 #define CONFIG_USB_POWER_DELIVERY #undef CONFIG_USB_PRL_SM #undef CONFIG_USB_PE_SM diff --git a/test/usb_pd_timer.c b/test/usb_pd_timer.c new file mode 100644 index 0000000000..38ed0cda78 --- /dev/null +++ b/test/usb_pd_timer.c @@ -0,0 +1,168 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Test USB PD timer module. + */ +#include "atomic.h" +#include "test_util.h" +#include "timer.h" +#include "usb_pd_timer.h" + +/* + * Verify the operation of the underlying bit operations underlying the timer + * module. This is technically redundant with the higher level test below, but + * it is useful for catching bugs during timer changes. + */ +int test_pd_timers_bit_ops(void) +{ + int bit; + const int port = 0; + + /* + * Initialization calling pd_timer_init will initialize the port's + * active timer to be clear and disabled timer to be set for all mask + * bits + */ + pd_timer_init(port); + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) + TEST_EQ(PD_CHK_ACTIVE(port, 1ULL << bit), 0ULL, "%llu"); + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) + TEST_NE(PD_CHK_DISABLED(port, 1ULL << bit), 0ULL, "%llu"); + + /* + * Set one active bit at a time and verify it is the only bit set. Reset + * the bit on each iteration of the bit loop. + */ + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) { + TEST_EQ(PD_CHK_ACTIVE(port, 1ULL << bit), 0ULL, "%llu"); + PD_SET_ACTIVE(port, 1ULL << bit); + for (int i = 0; i < PD_TIMER_COUNT; ++i) { + if (i != bit) + TEST_EQ(PD_CHK_ACTIVE(port, 1ULL << i), 0ULL, + "%llu"); + else + TEST_NE(PD_CHK_ACTIVE(port, 1ULL << i), 0ULL, + "%llu"); + } + PD_CLR_ACTIVE(port, 1ULL << bit); + } + + /* + * Clear one disabled bit at a time and verify it is the only bit clear. + * Reset the bit on each iteration of the bit loop. + */ + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) { + TEST_NE(PD_CHK_DISABLED(port, 1ULL << bit), 0ULL, "%llu"); + PD_CLR_DISABLED(port, 1ULL << bit); + for (int i = 0; i < PD_TIMER_COUNT; ++i) { + if (i != bit) + TEST_NE(PD_CHK_DISABLED(port, 1ULL << i), 0ULL, + "%llu"); + else + TEST_EQ(PD_CHK_DISABLED(port, 1ULL << i), 0ULL, + "%llu"); + } + PD_SET_DISABLED(port, 1ULL << bit); + } + + return EC_SUCCESS; +} + +int test_pd_timers(void) +{ + int bit; + int ms_to_expire; + const int port = 0; + + /* + * Initialization calling pd_timer_init will initialize the port's + * active timer to be clear and disabled timer to be set for all mask + * bits. + */ + pd_timer_init(port); + + /* Verify all timers are disabled. */ + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) + TEST_ASSERT(pd_timer_is_disabled(port, bit)); + + /* Enable some timers. */ + for (bit = 0; bit < 5; ++bit) + pd_timer_enable(0, bit, (bit + 1) * 50); + + /* Verify all timers for enabled/disabled. */ + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) { + if (bit < 5) + TEST_ASSERT(!pd_timer_is_disabled(port, bit)); + else + TEST_ASSERT(pd_timer_is_disabled(port, bit)); + } + + /* Disable the first timer; verify all timers for enabled/disabled. */ + pd_timer_disable(port, 0); + TEST_ASSERT(pd_timer_is_disabled(port, 0)); + for (bit = 1; bit < 5; ++bit) + TEST_ASSERT(!pd_timer_is_disabled(port, bit)); + for (; bit < PD_TIMER_COUNT; ++bit) + TEST_ASSERT(pd_timer_is_disabled(port, bit)); + + /* + * Verify finding the next timer to expire. + * + * Timer at BIT(1) is the next to expire and originally had an expire + * time of 100ms. So allow for the test's simulated time lapse and + * verify in the 90-100 range. + */ + ms_to_expire = pd_timer_next_expiration(port); + TEST_GE(ms_to_expire, 90, "%d"); + TEST_LE(ms_to_expire, 100, "%d"); + + /* Enable the timers in the PRL range. */ + for (bit = PR_TIMER_START; bit <= PR_TIMER_END; ++bit) + pd_timer_enable(port, bit, 20); + + /* Verify all timers for enabled/disabled. */ + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) { + if ((bit > 0 && bit < 5) || + (bit >= PR_TIMER_START && bit <= PR_TIMER_END)) + TEST_ASSERT(!pd_timer_is_disabled(port, bit)); + else + TEST_ASSERT(pd_timer_is_disabled(port, bit)); + } + /* Verify that the PRL timers haven't expired yet. */ + for (bit = PR_TIMER_START; bit <= PR_TIMER_END; ++bit) + TEST_ASSERT(!pd_timer_is_expired(port, bit)); + + /* Allow the PRL timers to expire and verify that they have expired. */ + msleep(21); + for (bit = PR_TIMER_START; bit <= PR_TIMER_END; ++bit) + TEST_ASSERT(pd_timer_is_expired(port, bit)); + + /* Disable the PRL range. */ + pd_timer_disable_range(port, PR_TIMER_RANGE); + /* Verify all timers for enabled/disabled. */ + TEST_ASSERT(pd_timer_is_disabled(port, 0)); + for (bit = 1; bit < 5; ++bit) + TEST_ASSERT(!pd_timer_is_disabled(port, bit)); + for (; bit < PD_TIMER_COUNT; ++bit) + TEST_ASSERT(pd_timer_is_disabled(port, bit)); + + /* + * Disable the PE timer range, which contains the previously enabled + * timers 1-5. + */ + pd_timer_disable_range(port, PE_TIMER_RANGE); + /* Verify all timers are disabled. */ + for (bit = 0; bit < PD_TIMER_COUNT; ++bit) + TEST_ASSERT(pd_timer_is_disabled(port, bit)); + + return EC_SUCCESS; +} + +void run_test(int argc, char **argv) +{ + RUN_TEST(test_pd_timers_bit_ops); + RUN_TEST(test_pd_timers); + + test_print_result(); +} diff --git a/test/usb_pd_timer.tasklist b/test/usb_pd_timer.tasklist new file mode 100644 index 0000000000..9a1e6b3e08 --- /dev/null +++ b/test/usb_pd_timer.tasklist @@ -0,0 +1,10 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TEST_TASK_LIST + diff --git a/test/usb_typec_drp_acc_trysrc.c b/test/usb_typec_drp_acc_trysrc.c index 96ed5601b7..106370db72 100644 --- a/test/usb_typec_drp_acc_trysrc.c +++ b/test/usb_typec_drp_acc_trysrc.c @@ -782,6 +782,25 @@ __maybe_unused static int test_typec_dis_as_src(void) return EC_SUCCESS; } +__maybe_unused static int test_wake_tcpc_toggle_change(void) +{ + /* Start with auto toggle disabled */ + pd_set_dual_role(PORT0, PD_DRP_TOGGLE_OFF); + task_wait_event(SECOND); + + /* TCPC should be asleep */ + TEST_EQ(mock_tcpc.lpm_wake_requested, false, "%d"); + + /* Enabled auto toggle */ + pd_set_dual_role(PORT0, PD_DRP_TOGGLE_ON); + task_wait_event(FUDGE); + + /* Ensure TCPC was woken */ + TEST_EQ(mock_tcpc.lpm_wake_requested, true, "%d"); + + return EC_SUCCESS; +} + /* Reset the mocks before each test */ void before_test(void) { @@ -833,6 +852,8 @@ void run_test(int argc, char **argv) RUN_TEST(test_auto_toggle_delay); RUN_TEST(test_auto_toggle_delay_early_connect); + RUN_TEST(test_wake_tcpc_toggle_change); + /* Do basic state machine validity checks last. */ RUN_TEST(test_tc_no_parent_cycles); RUN_TEST(test_tc_all_states_named); diff --git a/util/build.mk b/util/build.mk index 3c8ce256e0..e8ed2c8204 100644 --- a/util/build.mk +++ b/util/build.mk @@ -47,10 +47,10 @@ build-util-bin-y+=genvif build-util-art-y+=$(BOARD)_vif.xml # usb_pd_policy.c can be in baseboard, or board, or both. -genvif-pd-srcs=$(sort $(wildcard $(BASEDIR)/usb_pd_policy.c \ - board/$(BOARD)/usb_pd_policy.c)) +genvif-pd-srcs=$(sort $(wildcard $(BASEDIR)/usb_pd_pdo.c \ + board/$(BOARD)/usb_pd_pdo.c)) genvif-pd-objs=$(genvif-pd-srcs:%.c=$(out)/util/%.o) -genvif-pd-objs += $(out)/common/usb_common.o +genvif-pd-objs += $(out)/common/usb_common.o $(out)/common/usb_pd_pdo.o deps-$(CONFIG_USB_POWER_DELIVERY) += $(genvif-pd-objs:%.o=%.o.d) $(out)/util/genvif: $(genvif-pd-objs) util/genvif.h board/$(BOARD)/board.h \ @@ -63,9 +63,15 @@ STANDALONE_FLAGS=-ffreestanding -fno-builtin -nostdinc \ $(out)/util/%/usb_pd_policy.o: %/usb_pd_policy.c -@ mkdir -p $(@D) $(call quiet,c_to_vif,BUILDCC) +$(out)/util/%/usb_pd_pdo.o: %/usb_pd_pdo.c + -@ mkdir -p $(@D) + $(call quiet,c_to_vif,BUILDCC) $(out)/common/usb_common.o: common/usb_common.c -@ mkdir -p $(@D) $(call quiet,c_to_vif,BUILDCC) +$(out)/common/usb_pd_pdo.o: common/usb_pd_pdo.c + -@ mkdir -p $(@D) + $(call quiet,c_to_vif,BUILDCC) endif # CONFIG_USB_POWER_DELIVERY ifneq ($(CONFIG_BOOTBLOCK),) diff --git a/util/config_allowed.txt b/util/config_allowed.txt index 64a49d36cd..6b6fcfce75 100644 --- a/util/config_allowed.txt +++ b/util/config_allowed.txt @@ -179,7 +179,6 @@ CONFIG_CHARGER_RAA489000 CONFIG_CHARGER_RT9466 CONFIG_CHARGER_RT9467 CONFIG_CHARGER_RUNTIME_CONFIG -CONFIG_CHARGER_SENSE_RESISTOR_AC_BQ25710 CONFIG_CHARGER_SENSE_RESISTOR_AC_ISL9238 CONFIG_CHARGER_SINGLE_CHIP CONFIG_CHARGER_SM5803 @@ -489,7 +488,6 @@ CONFIG_HOSTCMD_ALIGNED CONFIG_HOSTCMD_AP_SET_SKUID CONFIG_HOSTCMD_BATTERY_V2 CONFIG_HOSTCMD_BUTTON -CONFIG_HOSTCMD_ESPI CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ CONFIG_HOSTCMD_ESPI_EC_MODE @@ -499,12 +497,10 @@ CONFIG_HOSTCMD_ESPI_VW_SLP_S4 CONFIG_HOSTCMD_EVENTS CONFIG_HOSTCMD_FLASHPD CONFIG_HOSTCMD_FLASH_SPI_INFO -CONFIG_HOSTCMD_HECI CONFIG_HOSTCMD_I2C_ADDR_FLAGS CONFIG_HOSTCMD_I2C_SLAVE_ADDR CONFIG_HOSTCMD_I2C_CONTROL CONFIG_HOSTCMD_LOCATE_CHIP -CONFIG_HOSTCMD_LPC CONFIG_HOSTCMD_PD CONFIG_HOSTCMD_PD_CHG_CTRL CONFIG_HOSTCMD_PD_PANIC @@ -513,7 +509,6 @@ CONFIG_HOSTCMD_RATE_LIMITING_PERIOD CONFIG_HOSTCMD_RATE_LIMITING_RECESS CONFIG_HOSTCMD_RWHASHPD CONFIG_HOSTCMD_SECTION_SORTED -CONFIG_HOSTCMD_SHI CONFIG_HOSTCMD_SKUID CONFIG_HOSTCMD_X86 CONFIG_HOST_COMMAND_STATUS @@ -521,6 +516,10 @@ CONFIG_HOST_ESPI_VW_POWER_SIGNAL CONFIG_HOST_EVENT64 CONFIG_HOST_EVENT64_REPORT_MASK CONFIG_HOST_EVENT_REPORT_MASK +CONFIG_HOST_INTERFACE_ESPI +CONFIG_HOST_INTERFACE_HECI +CONFIG_HOST_INTERFACE_LPC +CONFIG_HOST_INTERFACE_SHI CONFIG_HWTIMER_64BIT CONFIG_HW_CRC CONFIG_HW_SPECIFIC_UDELAY @@ -895,6 +894,7 @@ CONFIG_TEMP_SENSOR_G753 CONFIG_TEMP_SENSOR_G781 CONFIG_TEMP_SENSOR_G782 CONFIG_TEMP_SENSOR_OTI502 +CONFIG_TEMP_SENSOR_PCT2075 CONFIG_TEMP_SENSOR_POWER_GPIO CONFIG_TEMP_SENSOR_SB_TSI CONFIG_TEMP_SENSOR_TMP006 diff --git a/util/ec_panicinfo.c b/util/ec_panicinfo.c index ad6867fdc9..0294ac90de 100644 --- a/util/ec_panicinfo.c +++ b/util/ec_panicinfo.c @@ -26,6 +26,26 @@ static void print_panic_reg(int regnum, const uint32_t *regs, int index) printf((regnum & 3) == 3 ? "\n" : " "); } +static void panic_show_extra_cm(const struct panic_data *pdata) +{ + enum { + CPU_NVIC_CFSR_BFARVALID = BIT(15), + CPU_NVIC_CFSR_MFARVALID = BIT(7), + }; + + printf("\n"); + if (pdata->cm.cfsr & CPU_NVIC_CFSR_BFARVALID) + printf("bfar=%08x, ", pdata->cm.bfar); + if (pdata->cm.cfsr & CPU_NVIC_CFSR_MFARVALID) + printf("mfar=%08x, ", pdata->cm.mfar); + printf("cfsr=%08x, ", pdata->cm.cfsr); + printf("shcsr=%08x, ", pdata->cm.shcsr); + printf("hfsr=%08x, ", pdata->cm.hfsr); + printf("dfsr=%08x, ", pdata->cm.dfsr); + printf("ipsr=%08x", pdata->cm.regs[CORTEX_PANIC_REGISTER_IPSR]); + printf("\n"); +} + static int parse_panic_info_cm(const struct panic_data *pdata) { const uint32_t *lregs = pdata->cm.regs; @@ -68,6 +88,8 @@ static int parse_panic_info_cm(const struct panic_data *pdata) print_panic_reg(14, sregs, 5); print_panic_reg(15, sregs, 6); + panic_show_extra_cm(pdata); + return 0; } diff --git a/util/ectool.c b/util/ectool.c index 01d3605afd..0bc35ef3b4 100644 --- a/util/ectool.c +++ b/util/ectool.c @@ -305,7 +305,7 @@ const char help_str[] = " switches\n" " Prints current EC switch positions\n" " temps <sensorid>\n" - " Print temperature.\n" + " Print temperature and fan speed\n" " tempsinfo <sensorid>\n" " Print temperature sensor info.\n" " thermalget <platform-specific args>\n" @@ -337,8 +337,12 @@ const char help_str[] = "[toggle|toggle-off|sink|source] [none|usb|dp|dock] " "[dr_swap|pr_swap|vconn_swap]>\n" " Control USB PD/type-C [deprecated]\n" - " usbpdmuxinfo\n" - " Get USB-C SS mux info\n" + " usbpdmuxinfo [tsv]\n" + " Get USB-C SS mux info.\n" + " tsv: Output as tab separated values. Columns are defined " + "as:\n" + " Port, USB enabled, DP enabled, Polarity, HPD IRQ, " + "HPD LVL\n" " usbpdpower [port]\n" " Get USB PD power information\n" " version\n" @@ -1576,6 +1580,8 @@ static void print_flash_protect_flags(const char *desc, uint32_t flags) printf(" STUCK"); if (flags & EC_FLASH_PROTECT_ERROR_INCONSISTENT) printf(" INCONSISTENT"); + if (flags & EC_FLASH_PROTECT_ERROR_UNKNOWN) + printf(" UNKNOWN_ERROR"); printf("\n"); } @@ -3016,12 +3022,50 @@ int read_mapped_temperature(int id) return rv; } +static int get_thermal_fan_percent(int temp) +{ + struct ec_params_thermal_get_threshold_v1 p; + struct ec_thermal_config r; + int rv = 0; + + rv = ec_command(EC_CMD_THERMAL_GET_THRESHOLD, 1, &p, sizeof(p), + &r, sizeof(r)); + + if (rv <= 0 || r.temp_fan_max == r.temp_fan_off) + return -1; + if (temp < r.temp_fan_off) + return 0; + if (temp > r.temp_fan_max) + return 100; + return 100 * (temp - r.temp_fan_off) / + (r.temp_fan_max - r.temp_fan_off); +} + +static int cmd_temperature_print(int id, int mtemp) +{ + struct ec_response_temp_sensor_get_info r; + struct ec_params_temp_sensor_get_info p; + int rc; + int temp = mtemp + EC_TEMP_SENSOR_OFFSET; + + p.id = id; + rc = ec_command(EC_CMD_TEMP_SENSOR_GET_INFO, 0, &p, sizeof(p), + &r, sizeof(r)); + if (rc < 0) + return rc; + printf("%-20s %d K (= %d C) %11d%%\n", r.sensor_name, temp, + K_TO_C(temp), get_thermal_fan_percent(temp)); + + return 0; +} int cmd_temperature(int argc, char *argv[]) { - int rv; + int mtemp; int id; char *e; + const char header[] = "--sensor name -------- temperature " + "-------- fan speed --\n"; if (argc != 2) { fprintf(stderr, "Usage: %s <sensorid> | all\n", argv[0]); @@ -3029,11 +3073,12 @@ int cmd_temperature(int argc, char *argv[]) } if (strcmp(argv[1], "all") == 0) { + fprintf(stdout, header); for (id = 0; id < EC_TEMP_SENSOR_ENTRIES + EC_TEMP_SENSOR_B_ENTRIES; id++) { - rv = read_mapped_temperature(id); - switch (rv) { + mtemp = read_mapped_temperature(id); + switch (mtemp) { case EC_TEMP_SENSOR_NOT_PRESENT: break; case EC_TEMP_SENSOR_ERROR: @@ -3047,8 +3092,7 @@ int cmd_temperature(int argc, char *argv[]) id); break; default: - printf("%d: %d K\n", id, - rv + EC_TEMP_SENSOR_OFFSET); + cmd_temperature_print(id, mtemp); } } return 0; @@ -3067,9 +3111,9 @@ int cmd_temperature(int argc, char *argv[]) } printf("Reading temperature..."); - rv = read_mapped_temperature(id); + mtemp = read_mapped_temperature(id); - switch (rv) { + switch (mtemp) { case EC_TEMP_SENSOR_NOT_PRESENT: printf("Sensor not present\n"); return -1; @@ -3083,8 +3127,9 @@ int cmd_temperature(int argc, char *argv[]) fprintf(stderr, "Sensor not calibrated\n"); return -1; default: - printf("%d K\n", rv + EC_TEMP_SENSOR_OFFSET); - return 0; + fprintf(stdout, "\n"); + fprintf(stdout, header); + return cmd_temperature_print(id, mtemp); } } @@ -6375,6 +6420,14 @@ int cmd_usb_pd_mux_info(int argc, char *argv[]) struct ec_params_usb_pd_mux_info p; struct ec_response_usb_pd_mux_info r; int num_ports, rv, i; + bool tsv = false; + + if (argc == 2 && (strncmp(argv[1], "tsv", 4) == 0)) { + tsv = true; + } else if (argc >= 2) { + fprintf(stderr, "Usage: %s [tsv]\n", argv[0]); + return -1; + } rv = ec_command(EC_CMD_USB_PD_PORTS, 0, NULL, 0, ec_inbuf, ec_max_insize); @@ -6390,17 +6443,41 @@ int cmd_usb_pd_mux_info(int argc, char *argv[]) if (rv < 0) return rv; - printf("Port %d: ", i); - printf("USB=%d ", !!(r.flags & USB_PD_MUX_USB_ENABLED)); - printf("DP=%d ", !!(r.flags & USB_PD_MUX_DP_ENABLED)); - printf("POLARITY=%s ", r.flags & USB_PD_MUX_POLARITY_INVERTED ? - "INVERTED" : "NORMAL"); - printf("HPD_IRQ=%d ", !!(r.flags & USB_PD_MUX_HPD_IRQ)); - printf("HPD_LVL=%d ", !!(r.flags & USB_PD_MUX_HPD_LVL)); - printf("SAFE=%d ", !!(r.flags & USB_PD_MUX_SAFE_MODE)); - printf("TBT=%d ", !!(r.flags & USB_PD_MUX_TBT_COMPAT_ENABLED)); - printf("USB4=%d ", !!(r.flags & USB_PD_MUX_USB4_ENABLED)); - printf("\n"); + if (tsv) { + /* + * Machine-readable tab-separated values. This set of + * values is append-only. Columns should not be removed + * or repurposed. Update the documentation above if new + * columns are added. + */ + printf("%d\t", i); + printf("%d\t", !!(r.flags & USB_PD_MUX_USB_ENABLED)); + printf("%d\t", !!(r.flags & USB_PD_MUX_DP_ENABLED)); + printf("%s\t", + r.flags & USB_PD_MUX_POLARITY_INVERTED ? + "INVERTED" : "NORMAL"); + printf("%d\t", !!(r.flags & USB_PD_MUX_HPD_IRQ)); + printf("%d\n", !!(r.flags & USB_PD_MUX_HPD_LVL)); + } else { + /* Human-readable mux info. */ + printf("Port %d: ", i); + printf("USB=%d ", + !!(r.flags & USB_PD_MUX_USB_ENABLED)); + printf("DP=%d ", !!(r.flags & USB_PD_MUX_DP_ENABLED)); + printf("POLARITY=%s", + r.flags & USB_PD_MUX_POLARITY_INVERTED ? + "INVERTED" : "NORMAL"); + printf("HPD_IRQ=%d ", + !!(r.flags & USB_PD_MUX_HPD_IRQ)); + printf("HPD_LVL=%d ", + !!(r.flags & USB_PD_MUX_HPD_LVL)); + printf("SAFE=%d ", !!(r.flags & USB_PD_MUX_SAFE_MODE)); + printf("TBT=%d ", + !!(r.flags & USB_PD_MUX_TBT_COMPAT_ENABLED)); + printf("USB4=%d ", + !!(r.flags & USB_PD_MUX_USB4_ENABLED)); + printf("\n"); + } } return 0; diff --git a/util/flash_cr50.py b/util/flash_cr50.py deleted file mode 100755 index 760a788627..0000000000 --- a/util/flash_cr50.py +++ /dev/null @@ -1,771 +0,0 @@ -#!/usr/bin/env python3 -# -*- coding: utf-8 -*- -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -"""Flash Cr50 using gsctool or cr50-rescue. - -gsctool example: -util/flash_cr50.py --image cr50.bin.prod -util/flash_cr50.py --release prod - -cr50-rescue example: -util/flash_cr50.py --image cr50.bin.prod -c cr50-rescue -p 9999 -util/flash_cr50.py --release prod -c cr50-rescue -p 9999 -""" - -import argparse -import logging -import os -import pprint -import re -import select -import shutil -import subprocess -import sys -import tempfile -import threading -import time - -from chromite.lib import cros_build_lib - -CR50_FIRMWARE_BASE = '/opt/google/cr50/firmware/cr50.bin.' -RELEASE_PATHS = { - 'prepvt': CR50_FIRMWARE_BASE + 'prepvt', - 'prod': CR50_FIRMWARE_BASE + 'prod', -} -# Dictionary mapping a setup to controls used to verify that the setup is -# correct. The keys are strings and the values are lists of strings. -REQUIRED_CONTROLS = { - 'cr50_uart': [ - r'raw_cr50_uart_pty:\S+', - r'cr50_ec3po_interp_connect:\S+', - ], - 'cr50_reset_odl': [ - r'cr50_reset_odl:\S+', - ], - 'ec_uart': [ - r'ec_board:\S+', - ], - 'flex': [ - r'servo_type:.*servo_.[^4]', - ], - 'type-c_servo_v4': [ - r'servo_v4_type:type-c', - r'servo_v4_role:\S+', - ], -} -# Supported methods to resetting cr50. -SUPPORTED_RESETS = ( - 'battery_cutoff', - 'cr50_reset_odl', - 'manual_reset', -) - - -class Error(Exception): - """Exception class for flash_cr50 utility.""" - - -def run_command(cmd, check_error=True): - """Run the given command. - - Args: - cmd: The command to run as a list of arguments. - check_error: Raise an error if the command fails. - - Returns: - (exit_status, The command output) - - Raises: - The command error if the command fails and check_error is True. - """ - try: - result = cros_build_lib.run(cmd, - check=check_error, - print_cmd=True, - capture_output=True, - encoding='utf-8', - stderr=subprocess.STDOUT, - debug_level=logging.DEBUG, - log_output=True) - except cros_build_lib.RunCommandError as cmd_error: - if check_error: - raise - # OSErrors are handled differently. They're raised even if check is - # False. Return the errno and message for OS errors. - return cmd_error.exception.errno, cmd_error.msg - return result.returncode, result.stdout.strip() - - -class Cr50Image(object): - """Class to handle cr50 image conversions.""" - - SUFFIX_LEN = 6 - RW_NAME_BASE = 'cr50.rw.' - - def __init__(self, image, artifacts_dir): - """Create an image object that can be used by cr50 updaters.""" - self._remove_dir = False - if not os.path.exists(image): - raise Error('Could not find image: %s' % image) - if not artifacts_dir: - self._remove_dir = tempfile.mkdtemp() - artifacts_dir = self._remove_dir - if not os.path.isdir(artifacts_dir): - raise Error('Directory does not exist: %s' % artifacts_dir) - self._original_image = image - self._artifacts_dir = artifacts_dir - self._generate_file_names() - - def __del__(self): - """Remove temporary files.""" - if self._remove_dir: - shutil.rmtree(self._remove_dir) - - def _generate_file_names(self): - """Create some filenames to use for image conversion artifacts.""" - self._tmp_rw_bin = os.path.join(self._artifacts_dir, - self.RW_NAME_BASE + '.bin') - self._tmp_rw_hex = os.path.join(self._artifacts_dir, - self.RW_NAME_BASE + '.hex') - self._tmp_cr50_bin = os.path.join(self._artifacts_dir, - self.RW_NAME_BASE + '.orig.bin') - - def extract_rw_a_hex(self): - """Extract RW_A.hex from the original image.""" - run_command(['cp', self.get_bin(), self._tmp_cr50_bin]) - run_command(['dd', 'if=' + self._tmp_cr50_bin, 'of=' + self._tmp_rw_bin, - 'skip=16384', 'count=233472', 'bs=1']) - run_command(['objcopy', '-I', 'binary', '-O', 'ihex', - '--change-addresses', '0x44000', self._tmp_rw_bin, - self._tmp_rw_hex]) - - def get_rw_hex(self): - """cr50-rescue uses the .hex file.""" - if not os.path.exists(self._tmp_rw_hex): - self.extract_rw_a_hex() - return self._tmp_rw_hex - - def get_bin(self): - """Get the filename of the update image.""" - return self._original_image - - def get_original_basename(self): - """Get the basename of the original image.""" - return os.path.basename(self._original_image) - - -class Servo(object): - """Class to interact with servo.""" - - # Wait 3 seconds for device to settle after running the dut control command. - SHORT_WAIT = 3 - - def __init__(self, port): - """Initialize servo class. - - Args: - port: The servo port for the device being updated. - """ - self._port = port - - def dut_control(self, cmd, check_error=True, wait=False): - """Run dut control commands - - Args: - cmd: the command to run - check_error: Raise RunCommandError if the command returns a non-zero - exit status. - wait: If True, wait SHORT_WAIT seconds after running the command - - Returns: - (exit_status, output string) - The exit_status will be non-zero if - the command failed and check_error is True. - - Raises: - RunCommandError if the command fails and check_error is False - """ - dut_control_cmd = ['dut-control', cmd, '-p', self._port] - exit_status, output = run_command(dut_control_cmd, check_error) - if wait: - time.sleep(self.SHORT_WAIT) - return exit_status, output.split(':', 1)[-1] - - def get_raw_cr50_pty(self): - """Return raw_cr50_pty. Disable ec3po, so the raw pty can be used.""" - # Disconnect EC3PO, raw_cr50_uart_pty will control the cr50 - # output and input. - self.dut_control('cr50_ec3po_interp_connect:off', wait=True) - return self.dut_control('raw_cr50_uart_pty')[1] - - def get_cr50_version(self): - """Return the current cr50 version string.""" - # Make sure ec3po is enabled, so getting cr50_version works. - self.dut_control('cr50_ec3po_interp_connect:on', wait=True) - return self.dut_control('cr50_version')[1] - - -class Cr50Reset(object): - """Class to enter and exit cr50 reset.""" - - # A list of requirements for the setup. The requirement strings must match - # something in the REQUIRED_CONTROLS dictionary. - REQUIRED_SETUP = () - - def __init__(self, servo, name): - """Make sure the setup supports the given reset_type. - - Args: - servo: The Servo object for the device. - name: The reset type. - """ - self._servo = servo - self._reset_name = name - self.verify_setup() - self._original_watchdog_state = self.ccd_watchdog_enabled() - self._servo_type = self._servo.dut_control('servo_type')[1] - - def verify_setup(self): - """Verify the setup has all required controls to flash cr50. - - Raises: - Error if something is wrong with the setup. - """ - # If this failed before and didn't cleanup correctly, the device may be - # cutoff. Try to set the servo_v4_role to recover the device before - # checking the device state. - self._servo.dut_control('servo_v4_role:src', check_error=False) - - logging.info('Requirements for %s: %s', self._reset_name, - pprint.pformat(self.REQUIRED_SETUP)) - - # Get the specific control requirements for the necessary categories. - required_controls = [] - for category in self.REQUIRED_SETUP: - required_controls.extend(REQUIRED_CONTROLS[category]) - - logging.debug('Required controls for %r:\n%s', self._reset_name, - pprint.pformat(required_controls)) - setup_issues = [] - # Check the setup has all required controls in the correct state. - for required_control in required_controls: - control, exp_response = required_control.split(':') - returncode, output = self._servo.dut_control(control, False) - logging.debug('%s: got %s expect %s', control, output, exp_response) - match = re.search(exp_response, output) - if returncode: - setup_issues.append('%s: %s' % (control, output)) - elif not match: - setup_issues.append('%s: need %s found %s' % - (control, exp_response, output)) - else: - logging.debug('matched control: %s:%s', control, match.string) - # Save controls, so they can be restored during cleanup. - setattr(self, '_' + control, output) - - if setup_issues: - raise Error('Cannot run update using %s. Setup issues: %s' % - (self._reset_name, setup_issues)) - logging.info('Device Setup: ok') - logging.info('Reset Method: %s', self._reset_name) - - def cleanup(self): - """Try to get the device out of reset and restore all controls.""" - logging.info('Cleaning up') - self.restore_control('cr50_ec3po_interp_connect') - - # Toggle the servo v4 role if possible to try and get the device out of - # cutoff. - self._servo.dut_control('servo_v4_role:snk', check_error=False) - self._servo.dut_control('servo_v4_role:src', check_error=False) - self.restore_control('servo_v4_role') - - # Restore the ccd watchdog. - self.enable_ccd_watchdog(self._original_watchdog_state) - - def restore_control(self, control): - """Restore the control setting, if it has been saved. - - Args: - control: The name of the servo control to restore. - """ - setting = getattr(self, control, None) - if setting is None: - return - self._servo.dut_control('%s:%s' % (control, setting)) - - def ccd_watchdog_enabled(self): - """Return True if servod is monitoring ccd""" - if 'ccd_cr50' not in self._servo_type: - return False - watchdog_state = self._servo.dut_control('watchdog')[1] - logging.debug(watchdog_state) - return not re.search('ccd:.*disconnect ok', watchdog_state) - - def enable_ccd_watchdog(self, enable): - """Control the CCD watchdog. - - Servo will die if it's watching CCD and cr50 is held in reset. Disable - the CCD watchdog, so it's ok for CCD to disconnect. - - This function does nothing if ccd_cr50 isn't in the servo type. - - Args: - enable: If True, enable the CCD watchdog. Otherwise disable it. - """ - if 'ccd_cr50' not in self._servo_type: - logging.debug('Servo is not watching ccd device.') - return - - if enable: - self._servo.dut_control('watchdog_add:ccd') - else: - self._servo.dut_control('watchdog_remove:ccd') - - if self.ccd_watchdog_enabled() != enable: - raise Error('Could not %sable ccd watchdog' % - ('en' if enable else 'dis')) - - def enter_reset(self): - """Disable the CCD watchdog then run the reset cr50 function.""" - logging.info('Using %r to enter reset', self._reset_name) - # Disable the CCD watchdog before putting servo into reset otherwise - # servo will die in the middle of flashing cr50. - self.enable_ccd_watchdog(False) - try: - self.run_reset() - except Exception as e: - logging.warning('%s enter reset failed: %s', self._reset_name, e) - raise - - def exit_reset(self): - """Exit cr50 reset.""" - logging.info('Recovering from %s', self._reset_name) - try: - self.recover_from_reset() - except Exception as e: - logging.warning('%s exit reset failed: %s', self._reset_name, e) - raise - - def run_reset(self): - """Start the cr50 reset process. - - Cr50 doesn't have to enter reset in this function. It just needs to do - whatever setup is necessary for the exit reset function. - """ - raise NotImplementedError() - - def recover_from_reset(self): - """Recover from Cr50 reset. - - Cr50 has to hard or power-on reset during this function for rescue to - work. Uart is disabled on deep sleep recovery, so deep sleep is not a - valid reset. - """ - raise NotImplementedError() - - -class Cr50ResetODLReset(Cr50Reset): - """Class for using the servo cr50_reset_odl to reset cr50.""" - - REQUIRED_SETUP = ( - # Rescue is done through Cr50 uart. It requires a flex cable not ccd. - 'flex', - # cr50_reset_odl is used to hold cr50 in reset. This control only exists - # if it actually resets cr50. - 'cr50_reset_odl', - # Cr50 rescue is done through cr50 uart. - 'cr50_uart', - ) - - def cleanup(self): - """Use the Cr50 reset signal to hold Cr50 in reset.""" - try: - self.restore_control('cr50_reset_odl') - finally: - super(Cr50ResetODLReset, self).cleanup() - - def run_reset(self): - """Use cr50_reset_odl to hold Cr50 in reset.""" - logging.info('cr50_reset_odl:on') - self._servo.dut_control('cr50_reset_odl:on') - - def recover_from_reset(self): - """Release the reset signal.""" - logging.info('cr50_reset_odl:off') - self._servo.dut_control('cr50_reset_odl:off') - - -class BatteryCutoffReset(Cr50Reset): - """Class for using a battery cutoff through EC commands to reset cr50.""" - - REQUIRED_SETUP = ( - # Rescue is done through Cr50 uart. It requires a flex cable not ccd. - 'flex', - # We need type c servo v4 to recover from battery_cutoff. - 'type-c_servo_v4', - # Cr50 rescue is done through cr50 uart. - 'cr50_uart', - # EC console needs to be read-write to issue cutoff command. - 'ec_uart', - ) - - def run_reset(self): - """Use EC commands to cutoff the battery.""" - self._servo.dut_control('servo_v4_role:snk') - - if self._servo.dut_control('ec_board', check_error=False)[0]: - logging.warning('EC is unresponsive. Cutoff may not work.') - - self._servo.dut_control('ec_uart_cmd:cutoff', check_error=False, - wait=True) - self._servo.dut_control('ec_uart_cmd:reboot', check_error=False, - wait=True) - - if not self._servo.dut_control('ec_board', check_error=False)[0]: - raise Error('EC still responsive after cutoff') - logging.info('Device is cutoff') - - def recover_from_reset(self): - """Connect power using servo v4 to recover from cutoff.""" - logging.info('"Connecting" adapter') - self._servo.dut_control('servo_v4_role:src', wait=True) - - -class ManualReset(Cr50Reset): - """Class for using a manual reset to reset Cr50.""" - - REQUIRED_SETUP = ( - # Rescue is done through Cr50 uart. It requires a flex cable not ccd. - 'flex', - # Cr50 rescue is done through cr50 uart. - 'cr50_uart', - ) - - PROMPT_WAIT = 5 - USER_RESET_TIMEOUT = 60 - - def run_reset(self): - """Nothing to do. User will reset cr50.""" - - def recover_from_reset(self): - """Wait for the user to reset cr50.""" - end_time = time.time() + self.USER_RESET_TIMEOUT - while time.time() < end_time: - logging.info('Press enter after you reset cr50') - user_input = select.select([sys.stdin], [], [], self.PROMPT_WAIT)[0] - if user_input: - logging.info('User reset done') - return - logging.warning('User input timeout: assuming cr50 reset') - - -class FlashCr50(object): - """Class for updating cr50.""" - - NAME = 'FlashCr50' - PACKAGE = '' - DEFAULT_UPDATER = '' - - def __init__(self, cmd): - """Verify the update command exists. - - Args: - cmd: The updater command. - - Raises: - Error if no valid updater command was found. - """ - updater = self.get_updater(cmd) - if not updater: - emerge_msg = (('Try emerging ' + self.PACKAGE) if self.PACKAGE - else '') - raise Error('Could not find %s command.%s' % (self, emerge_msg)) - self._updater = updater - - def get_updater(self, cmd): - """Find a valid updater command. - - Args: - cmd: the updater command. - - Returns: - A command string or None if none of the commands ran successfully. - The command string will be the one supplied or the DEFAULT_UPDATER - command. - """ - if not self.updater_works(cmd): - return cmd - - use_default = (self.DEFAULT_UPDATER and - not self.updater_works(self.DEFAULT_UPDATER)) - if use_default: - logging.debug('%r failed using %r to update.', cmd, - self.DEFAULT_UPDATER) - return self.DEFAULT_UPDATER - return None - - @staticmethod - def updater_works(cmd): - """Verify the updater command. - - Returns: - non-zero status if the command failed. - """ - logging.debug('Testing update command %r.', cmd) - exit_status, output = run_command([cmd, '-h'], check_error=False) - if 'Usage' in output: - return 0 - if exit_status: - logging.debug('Could not run %r (%s): %s', cmd, exit_status, output) - return exit_status - - def update(self, image): - """Try to update cr50 to the given image.""" - raise NotImplementedError() - - def __str__(self): - """Use the updater name for the tostring.""" - return self.NAME - - -class GsctoolUpdater(FlashCr50): - """Class to flash cr50 using gsctool.""" - - NAME = 'gsctool' - PACKAGE = 'ec-utils' - DEFAULT_UPDATER = '/usr/sbin/gsctool' - - # Common failures exit with this status. Use STANDARD_ERRORS to map the - # exit status to reasons for the failure. - STANDARD_ERROR_REGEX = r'Error: status (\S+)' - STANDARD_ERRORS = { - '0x8': 'Rejected image with old header.', - '0x9': 'Update too soon.', - '0xc': 'Board id mismatch', - } - - def __init__(self, cmd, serial=None): - """Generate the gsctool command. - - Args: - cmd: gsctool updater command. - serial: The serial number of the CCD device being updated. - """ - super(GsctoolUpdater, self).__init__(cmd) - self._gsctool_cmd = [self._updater] - if serial: - self._gsctool_cmd.extend(['-n', serial]) - - def update(self, image): - """Use gsctool to update cr50. - - Args: - image: Cr50Image object. - """ - update_cmd = self._gsctool_cmd[:] - update_cmd.append(image.get_bin()) - exit_status, output = run_command(update_cmd, check_error=False) - if not exit_status or (exit_status == 1 and 'image updated' in output): - logging.info('update ok') - return - if exit_status == 3: - match = re.search(self.STANDARD_ERROR_REGEX, output) - if match: - update_error = match.group(1) - logging.info('Update error %s', update_error) - raise Error(self.STANDARD_ERRORS[update_error]) - raise Error('gsctool update error: %s' % output.splitlines()[-1]) - - -class Cr50RescueUpdater(FlashCr50): - """Class to flash cr50 through servo micro uart.""" - - NAME = 'cr50-rescue' - PACKAGE = 'cr50-utils' - DEFAULT_UPDATER = '/usr/bin/cr50-rescue' - - WAIT_FOR_UPDATE = 120 - RESCUE_RESET_DELAY = 5 - - def __init__(self, cmd, port, reset_type): - """Initialize cr50-rescue updater. - - cr50-rescue can only be done through servo, because it needs access to - a lot of dut-controls and cr50 uart through servo micro. During rescue - Cr50 has to do a hard reset, so the user should supply a valid reset - method for the setup that's being used. - - Args: - cmd: The cr50-rescue command. - port: The servo port of the device being updated. - reset_type: A string (one of SUPPORTED_RESETS) that describes how - to reset Cr50 during cr50-rescue. - """ - super(Cr50RescueUpdater, self).__init__(cmd) - self._servo = Servo(port) - self._rescue_thread = None - self._rescue_process = None - self._cr50_reset = self.get_cr50_reset(reset_type) - - def get_cr50_reset(self, reset_type): - """Get the cr50 reset object for the given reset_type. - - Args: - reset_type: a string describing how cr50 will be reset. It must be - in SUPPORTED_RESETS. - - Returns: - The Cr50Reset object for the given reset_type. - """ - assert reset_type in SUPPORTED_RESETS, '%s is unsupported.' % reset_type - if reset_type == 'battery_cutoff': - return BatteryCutoffReset(self._servo, reset_type) - elif reset_type == 'cr50_reset_odl': - return Cr50ResetODLReset(self._servo, reset_type) - return ManualReset(self._servo, reset_type) - - def update(self, image): - """Use cr50-rescue to update cr50 then cleanup. - - Args: - image: Cr50Image object. - """ - update_file = image.get_rw_hex() - try: - self.run_update(update_file) - finally: - self.restore_state() - - def start_rescue_process(self, update_file): - """Run cr50-rescue in a process, so it can be killed it if it hangs.""" - pty = self._servo.get_raw_cr50_pty() - - rescue_cmd = [self._updater, '-v', '-i', update_file, '-d', pty] - logging.info('Starting cr50-rescue: %s', - cros_build_lib.CmdToStr(rescue_cmd)) - - self._rescue_process = subprocess.Popen(rescue_cmd) - self._rescue_process.communicate() - logging.info('Rescue Finished') - - def start_rescue_thread(self, update_file): - """Start cr50-rescue.""" - self._rescue_thread = threading.Thread(target=self.start_rescue_process, - args=[update_file]) - self._rescue_thread.start() - - def run_update(self, update_file): - """Run the Update""" - # Enter reset before starting rescue, so any extra cr50 messages won't - # interfere with cr50-rescue. - self._cr50_reset.enter_reset() - - self.start_rescue_thread(update_file) - - time.sleep(self.RESCUE_RESET_DELAY) - # Resume from cr50 reset. - self._cr50_reset.exit_reset() - - self._rescue_thread.join(self.WAIT_FOR_UPDATE) - - logging.info('cr50_version:%s', self._servo.get_cr50_version()) - - def restore_state(self): - """Try to get the device out of reset and restore all controls""" - try: - self._cr50_reset.cleanup() - finally: - self.cleanup_rescue_thread() - - def cleanup_rescue_thread(self): - """Cleanup the rescue process and handle any errors.""" - if not self._rescue_thread: - return - if self._rescue_thread.is_alive(): - logging.info('Killing cr50-rescue process') - self._rescue_process.terminate() - self._rescue_thread.join() - - self._rescue_thread = None - if self._rescue_process.returncode: - logging.info('cr50-rescue failed.') - logging.info('stderr: %s', self._rescue_process.stderr) - logging.info('stdout: %s', self._rescue_process.stdout) - logging.info('returncode: %s', self._rescue_process.returncode) - raise Error('cr50-rescue failed (%d)' % - self._rescue_process.returncode) - - -def parse_args(argv): - """Parse commandline arguments. - - Args: - argv: command line args - - Returns: - options: an argparse.Namespace. - """ - usage = ('%s -i $IMAGE [ -c cr50-rescue -p $SERVO_PORT [ -r ' - '$RESET_METHOD]]' % os.path.basename(argv[0])) - parser = argparse.ArgumentParser(usage=usage, description=__doc__) - parser.add_argument('-d', '--debug', action='store_true', default=False, - help='enable debug messages.') - parser.add_argument('-i', '--image', type=str, - help='Path to cr50 binary image.') - parser.add_argument('-R', '--release', type=str, - choices=RELEASE_PATHS.keys(), - help='Type of cr50 release. Use instead of the image ' - 'arg.') - parser.add_argument('-c', '--updater-cmd', type=str, default='gsctool', - help='Tool to update cr50. Either gsctool or ' - 'cr50-rescue') - parser.add_argument('-s', '--serial', type=str, default='', - help='serial number to pass to gsctool.') - parser.add_argument('-p', '--port', type=str, default='', - help='port servod is listening on (required for ' - 'rescue).') - parser.add_argument('-r', '--reset-type', default='battery_cutoff', - choices=SUPPORTED_RESETS, - type=str, help='The method for cr50 reset.') - parser.add_argument('-a', '--artifacts-dir', default=None, type=str, - help='Location to store artifacts') - opts = parser.parse_args(argv[1:]) - if 'cr50-rescue' in opts.updater_cmd and not opts.port: - raise parser.error('Servo port is required for cr50 rescue') - return opts - - -def get_updater(opts): - """Get the updater object.""" - if 'cr50-rescue' in opts.updater_cmd: - return Cr50RescueUpdater(opts.updater_cmd, opts.port, opts.reset_type) - if 'gsctool' in opts.updater_cmd: - return GsctoolUpdater(opts.updater_cmd, opts.serial) - raise Error('Unsupported update command %r' % opts.updater_cmd) - - -def main(argv): - """Update cr50 using gsctool or cr50-rescue.""" - opts = parse_args(argv) - - loglevel = logging.INFO - log_format = '%(asctime)s - %(levelname)7s' - if opts.debug: - loglevel = logging.DEBUG - log_format += ' - %(lineno)3d:%(funcName)-15s' - log_format += ' - %(message)s' - logging.basicConfig(level=loglevel, format=log_format) - - image = Cr50Image(RELEASE_PATHS.get(opts.release, opts.image), - opts.artifacts_dir) - flash_cr50 = get_updater(opts) - - logging.info('Using %s to update to %s', flash_cr50, - image.get_original_basename()) - flash_cr50.update(image) - - -if __name__ == '__main__': - sys.exit(main(sys.argv)) diff --git a/util/flash_ec b/util/flash_ec index a297d84a20..d92a002d01 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -272,18 +272,6 @@ function dut_control_get_or_die { : ${BOARD:=${FLAGS_board}} -# Find the Zephyr project directory for the specified board. Zephyr projects -# organized under ./zephyr/projects and always contain the file zmake.yaml -mapfile -t zephyr_projects < <(find zephyr/projects/ -type f -name "zmake.yaml") -for i in "${zephyr_projects[@]}"; do - zephyr_project_dir=$(dirname "${i}") - zephyr_project_name=$(basename "${zephyr_project_dir}") - if [[ "${BOARD}" = "${zephyr_project_name}" ]]; then - ZEPHYR_DIR="${zephyr_project_dir}" - break - fi -done - in_array() { local n=$# local value=${!n} @@ -701,7 +689,7 @@ if [[ -n "${EC_DIR}" ]]; then if [ "${FLAGS_ro}" = ${FLAGS_TRUE} ] ; then LOCAL_BUILD="${EC_DIR}/build/${BOARD}/RO/${EC_FILE}" elif [ "${FLAGS_zephyr}" = ${FLAGS_TRUE} ] ; then - LOCAL_BUILD="${EC_DIR}/build/${ZEPHYR_DIR}/output/${EC_FILE}" + LOCAL_BUILD="${EC_DIR}/build/zephyr/${BOARD}/output/${EC_FILE}" else LOCAL_BUILD="${EC_DIR}/build/${BOARD}/${EC_FILE}" fi @@ -1448,7 +1436,7 @@ function flash_npcx_uut() { "$(dirname "$IMG")/chip/npcx/spiflashfw" \ "$(dirname "$IMG")" \ "${EC_DIR}/build/${BOARD}/chip/npcx/spiflashfw" \ - "${EC_DIR}/build/${ZEPHYR_DIR}/output" \ + "${EC_DIR}/build/zephyr/${BOARD}/output" \ "$(dirname "$LOCAL_BUILD")" \ "$(dirname "$EMERGE_BUILD")" ; do diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu index 679478f1e2..57b2525141 100644 --- a/util/flash_fp_mcu +++ b/util/flash_fp_mcu @@ -599,6 +599,11 @@ config_brya() { readonly GPIO_PWREN=314 } +config_brask() { + # Let's call the config_brya since brask follows the brya HW design + config_brya +} + config_zork() { readonly TRANSPORT="UART" readonly DEVICE="/dev/ttyS1" diff --git a/util/genvif.c b/util/genvif.c index 6722df9349..3c9ec3bb89 100644 --- a/util/genvif.c +++ b/util/genvif.c @@ -19,6 +19,7 @@ #include "config.h" #include "usb_pd.h" +#include "usb_pd_pdo.h" #include "usb_pd_tcpm.h" #include "charge_manager.h" @@ -1127,7 +1128,7 @@ static int ov_getc(void) if (!override_file) return EOF; - if (pushback_cnt) + if (pushback_cnt > 0) return pushback_stack[--pushback_cnt]; return getc(override_file); } @@ -3613,7 +3614,7 @@ static void init_vif_component_product_power_fields( enum dtype type) { if (type == DRP || type == SRC) { - char str[10]; + char str[14]; sprintf(str, "%d mW", src_max_power); set_vif_field_itss(&vif_fields[Product_Total_Source_Power_mW], diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index e55db8bdf8..f76690be19 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -40,7 +40,10 @@ if(DEFINED CONFIG_PLATFORM_EC) zephyr_compile_definitions("CONFIG_ZEPHYR") # Force compiler warnings to generate errors - zephyr_compile_options(-Werror) + option(ALLOW_WARNINGS "Do not treat warnings as errors") + if (NOT ALLOW_WARNINGS) + zephyr_compile_options(-Werror) + endif() include(fpu.cmake) @@ -147,6 +150,10 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BACKLIGHT_LID "${PLATFORM_EC}/common/backlight_lid.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY "${PLATFORM_EC}/common/battery.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY_V1 + "${PLATFORM_EC}/common/battery_v1.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY_V2 + "${PLATFORM_EC}/common/battery_v2.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE "${PLATFORM_EC}/common/battery_fuel_gauge.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BATTERY_SMART @@ -214,6 +221,20 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C_DEBUG "${PLATFORM_EC}/common/i2c_trace.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C_VIRTUAL_BATTERY "${PLATFORM_EC}/common/virtual_battery.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_CONSOLE_CMD_IOEX + "${PLATFORM_EC}/common/ioexpander_commands.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_CCGXXF + "${PLATFORM_EC}/driver/ioexpander/ccgxxf.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_IT8801 + "${PLATFORM_EC}/driver/ioexpander/it8801.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_NCT38XX + "${PLATFORM_EC}/driver/ioexpander/ioexpander_nct38xx.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_PCA9675 + "${PLATFORM_EC}/driver/ioexpander/pca9675.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_PCAL6408 + "${PLATFORM_EC}/driver/ioexpander/pcal6408.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_TCA64XXA + "${PLATFORM_EC}/driver/ioexpander/tca64xxa.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD "${PLATFORM_EC}/common/keyboard_scan.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042 @@ -257,6 +278,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWER_BUTTON "${PLATFORM_EC}/common/power_button.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ "${PLATFORM_EC}/power/common.c") +zephyr_library_sources_ifdef(CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 + "${PLATFORM_EC}/power/alderlake_slg4bd44540.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_AMD "${PLATFORM_EC}/power/amd_x86.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_COMETLAKE @@ -268,7 +291,7 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_INTEL zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP "${PLATFORM_EC}/power/host_sleep.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_MT8192 - "${PLATFORM_EC}/power/mt8192.c") + "${PLATFORM_EC}/power/mt8192.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_SC7180 "${PLATFORM_EC}/power/qcom.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_POWERSEQ_SC7280 @@ -307,6 +330,7 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_POWER_DELIVERY "${PLATFORM_EC}/common/usb_common.c" + "${PLATFORM_EC}/common/usb_pd_pdo.c" "${PLATFORM_EC}/common/usbc/usbc_task.c" "${PLATFORM_EC}/common/usbc/usb_pd_timer.c" "${PLATFORM_EC}/common/usbc/usb_sm.c" @@ -323,8 +347,14 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_FW_UPDATE "${PLATFORM_EC}/common/usbc/usb_retimer_fw_update.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB "${PLATFORM_EC}/driver/retimer/bb_retimer.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_PS8818 + "${PLATFORM_EC}/driver/retimer/ps8818.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7451 + "${PLATFORM_EC}/driver/usb_mux/anx7451.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_SS_MUX "${PLATFORM_EC}/driver/usb_mux/usb_mux.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_MUX_AMD_FP6 + "${PLATFORM_EC}/driver/usb_mux/amd_fp6.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_MUX_IT5205 "${PLATFORM_EC}/driver/usb_mux/it5205.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_MUX_PS8743 @@ -369,6 +399,8 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PRL_SM "${PLATFORM_EC}/common/usbc/usb_prl_sm.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX + "${PLATFORM_EC}/driver/tcpm/nct38xx.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751 "${PLATFORM_EC}/driver/tcpm/ps8xxx.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805 @@ -390,6 +422,10 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2 zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC "${PLATFORM_EC}/common/usbc_ppc.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_AOZ1380 + "${PLATFORM_EC}/driver/ppc/aoz1380.c") +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483 + "${PLATFORM_EC}/driver/ppc/nx20p348x.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_SN5S330 "${PLATFORM_EC}/driver/ppc/sn5s330.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_SYV682X diff --git a/zephyr/Kconfig b/zephyr/Kconfig index 07f09ae46e..d0ef3fc711 100644 --- a/zephyr/Kconfig +++ b/zephyr/Kconfig @@ -44,6 +44,7 @@ rsource "Kconfig.espi" rsource "Kconfig.flash" rsource "Kconfig.header" rsource "Kconfig.init_priority" +rsource "Kconfig.ioex" rsource "Kconfig.keyboard" rsource "Kconfig.led" rsource "Kconfig.panic" @@ -219,6 +220,12 @@ config PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK Require to initialize it first such that it can receive a host resume event, that notifies the normal resume hook. +config PLATFORM_EC_CHIP_INIT_ROM_REGION + bool "Enables the use of a dedicated init ROM region" + help + Enable this flag if the board has a `.init_rom` region. This will + activate routines in `init_rom.h` to access objects in this region. + config PLATFORM_EC_CONSOLE_CMD_HCDEBUG bool "Console command: hcdebug" default y @@ -494,6 +501,17 @@ config PLATFORM_EC_CONSOLE_CMD_I2C_SPEED the DYNAMIC_SPEED port flag set, the speed can be set. In all cases, the bus speed is in units of kHz. +config PLATFORM_EC_HOSTCMD_I2C_CONTROL + bool "Host command: i2c_control" + default n + depends on PLATFORM_EC_I2C + help + Enable the I2C_CONTROL host command. This comamnd is used to + display an I2C port's bus speed. Additionally, for ports with + the DYNAMIC_SPEED port flag set, the speed can be set. In all + cases, the bus speed is in units of kHz. More functionality of + the command may be added in the future. + config PLATFORM_EC_SMBUS_PEC bool "Packet error checking support for SMBus" help @@ -630,9 +648,9 @@ config PLATFORM_EC_PWM_DISPLIGHT depends on PLATFORM_EC_PWM help Enables display backlight controlled by a PWM signal connected - directly to the EC chipset. The board files must define the C - reference PWM_CH_DISPLIGHT to the PWM channel used for the - display backlight control. + directly to the EC chipset. The board devicetree file must define the + PWM channel used for the display backlight control and assign the + "displight" node label to it. config PLATFORM_EC_RTC bool "Real-time clock (RTC)" diff --git a/zephyr/Kconfig.battery b/zephyr/Kconfig.battery index 77f2086d98..f4b6276b89 100644 --- a/zephyr/Kconfig.battery +++ b/zephyr/Kconfig.battery @@ -250,6 +250,126 @@ endchoice # "Discharge control method" endif # PLATFORM_EC_CHARGER_DISCHARGE_ON_AC +config PLATFORM_EC_CHARGER_BQ25710_PSYS_SENSING + bool "Charger monitors PSYS" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + This enables the PSYS sensing circuit on the BQ25710 and + BQ25720 chargers. This is used for system power monitoring on + board designs that support this capability. This circuit is + disabled by default (reset) and needs to be explicitly enabled + for meaningful results. + +config PLATFORM_EC_CHARGER_BQ25710_CMP_REF_1P2 + bool "Use 1.2 V for internal comparator reference voltage" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + This changes the charger's internal comparator reference + voltage to 1.2 V. The power-on default is 2.3 V. This must be + enabled if the board was designed for 1.2 V instead of 2.3 V. + +config PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM + bool "PKPWR_TOVLD_DEG override" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Enable customizing the charger's PKPWR_TOVLD_DEG period. + +config PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG + int "PKPWR_TOVLD_DEG period" + range 0 3 + default 0 + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Sets the input overload time when in peak power mode + (PKPWR_TOVLD_DEG). This limits how long the charger can draw + ILIM2 from the adapter. This is a 2 bit field. On the bq25710 + 1 ms to 20 ms can be encoded. On the bq25720 1 ms to 10 ms can + be encoded. + +config PLATFORM_EC_CHARGER_BQ25710_EN_ACOC + bool "Enable AC over-current protection" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + This enables the charger's AC over-current protection. The + converter turns off when the OC threshold is reached. The + threshold is selected using the ACOC_VTH bit. + +config PLATFORM_EC_CHARGER_BQ25710_ACOC_VTH_1P33 + bool "Set ACOC threshold to 133% of ILIM2" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + This selects which ACOC protection threshold is used with + EN_ACOC. Enabling this option selects 133% of + ILIM2. Otherwise, the default is 200% of ILIM2. + +config PLATFORM_EC_CHARGER_BQ25710_BATOC_VTH_MINIMUM + bool "Select the minimum BATOC threshold" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + This selects the minimum BATOC protection threshold to be used + with EN_BATOC. The minimum threshold is 150% of PROCHOT IDCHG + on the bq25710 and 133% of PROCHOT IDCHG_TH2 on the + bq25720. The default threshold is 200% on both chips. + +config PLATFORM_EC_CHARGER_BQ25710_PP_INOM + bool "Enable PROCHOT on adapter current exceeding INOM" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Sets the PP_INOM bit in Prochot Option 1 register. This causes + PROCHOT to be pulsed when the nominal adapter current + threshold is reached. INOM is 110% of IDPM/IIN_DPM (input + current setting). + +config PLATFORM_EC_CHARGER_BQ25710_PP_BATPRES + bool "Enable PROCHOT on battery removal" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Sets the PP_BATPRES bit in Prochot Option 1 register. This + causes PROCHOT to be pulsed when the battery is removed. + +config PLATFORM_EC_CHARGER_BQ25710_PP_ACOK + bool "Enable PROCHOT on AC removal" + default n + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Sets the PP_ACOK in Prochot Option 1 register. This causes + PROCHOT to be pulsed when the AC adapter is removed. + +config PLATFORM_EC_CHARGER_BQ25720_PP_IDCHG2 + bool "Enable PROCHOT on battery current exceeding IDCHG_TH2" + default n + depends on PLATFORM_EC_CHARGER_BQ25720 + help + Sets the PP_IDCHG2 bit in Charge Option 4 register. This + causes PROCHOT to be pulsed when the battery discharge current + exceeds IDCHG_TH2. + +config PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR + int "Value of the charge sense-resistor, in mOhms" + default 10 + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + The charge sense-resistor is used to detect the charge current to the + battery. Its value must be known for the calculation to be correct. + The value is typically around 10 mOhms. + +config PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR_AC + int "Value of the input sense-resistor, in mOhms" + default 10 + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + The input sense-resistor is used to detect the input current from the + external AC power supply. Its value must be known for the calculation + to be correct. The value is typically around 10 mOhms. + config PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM bool "VSYS_TH2 override" depends on PLATFORM_EC_CHARGER_BQ25720 @@ -272,6 +392,79 @@ config PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV 3.2v and 5.9v for 2S or higher batteries. The valid range is 3.2v - 3.9v for 1S and 3.2 - 9.5v for 2S or higher batteries. +config PLATFORM_EC_CHARGER_BQ25720_VSYS_UVP_CUSTOM + bool "VSYS_UVP override" + depends on PLATFORM_EC_CHARGER_BQ25720 + help + Enable customizing the charger's VSYS_UVP threshold. + +config PLATFORM_EC_CHARGER_BQ25720_VSYS_UVP + int "VSYS_UVP threshold" + range 0 7 + default 0 + depends on PLATFORM_EC_CHARGER_BQ25720_VSYS_UVP_CUSTOM + help + Sets the VSYS under voltage (VSYS_UVP) lockout threshold. This + is a 3 bit field with default value 0. The actual voltage + encoded is (0.8 * <value> + 2.4), allowing a threshold in the + range of 2.4 V to 8.0 V to be specified. + +config PLATFORM_EC_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM + bool "IDCHG_TH2 deglitch time override" + depends on PLATFORM_EC_CHARGER_BQ25720 + help + Enable customizing the charger's 2nd battery discharge current + limit (IDCHG_TH2) deglitch time (IDCHG_DEG2). + +config PLATFORM_EC_CHARGER_BQ25720_IDCHG_DEG2 + int "IDCHG_TH2 deglitch time" + range 0 3 + default 1 + depends on PLATFORM_EC_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM + help + Sets the 2nd battery discharge current limit (IDCHG_TH2) + deglitch time (IDCHG_DEG2). This is a 2 bit field with default + value 1 (1.6 ms). The encoded value ranges from 100 us to 12 + ms. + +config PLATFORM_EC_CHARGER_BQ25720_IDCHG_TH2_CUSTOM + bool "IDCHG_TH2 override" + depends on PLATFORM_EC_CHARGER_BQ25720 + help + Enable customizing the charger's 2nd battery discharge current + limit (IDCHG_TH2). + +config PLATFORM_EC_CHARGER_BQ25720_IDCHG_TH2 + int "IDCHG threshold 2" + range 0 7 + default 1 + depends on PLATFORM_EC_CHARGER_BQ25720_IDCHG_TH2_CUSTOM + help + Sets the charger's 2nd battery discharge current limit + (IDCHG_TH2) as a percentage of IDCHG_TH1. This is a 3 bit + field with default value 1 (150%). The encoded value ranges + from 125% to 400%. + +config PLATFORM_EC_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM + bool "Enable minimum system voltage override" + depends on PLATFORM_EC_CHARGER_BQ25710 || PLATFORM_EC_CHARGER_BQ25720 + help + Enable customizing the charger's 2nd battery discharge current + limit (IDCHG_TH2). + +config PLATFORM_EC_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV + int "Minimum system voltage in milli-volts" + default 0 + depends on PLATFORM_EC_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM + help + Sets the minimum system voltage in milli-volts. The bq25710 + uses 6 bits of resolution and can be configured from 1.024 V + to 16.128 V in 256 mV increments. The bq25720 uses 8 bits of + resolution and can be set from 1.0 V to 19.2 V in 100 mV + increments. The default value depends on configured number of + battery cells connected in series using the CELL_BATPRESZ + strap. + config PLATFORM_EC_CHARGER_MAINTAIN_VBAT bool "Maintain VBAT voltage regardless of AC state" help @@ -517,4 +710,40 @@ config PLATFORM_EC_BATT_FULL_CHIPSET_OFF_INPUT_LIMIT_MV This condition is checked on chipset shutdown and startup, AC change and battery SOC change. +choice PLATFORM_EC_BATTERY_API + prompt "Battery API version" + default PLATFORM_EC_BATTERY_V2 + help + Select the battery API version. V2 is required on dual-battery-systems + and hostless bases with a battery. V1 should not be used except for + testing on legacy boards. + +config PLATFORM_EC_BATTERY_V1 + bool "Enable battery API v1" + depends on !PLATFORM_EC_BATTERY_V2 + help + This enables battery API version 1, with support for only a single + battery. Battery information strings are trimmed to 8 characters. + +config PLATFORM_EC_BATTERY_V2 + bool "Enable battery API v2" + help + This enables battery API version 2. This version can support multiple + batteries and full size string values in the battery information + including manufacturer, model, chemistry. + +endchoice + +if PLATFORM_EC_BATTERY_V2 + +config PLATFORM_EC_BATTERY_COUNT + int "Battery count" + default 1 + help + The number of batteries in the system. It matters only when + PLATFORM_EC_BATTERY_V2 is enabled. Note this is different from + BATTERY_TYPE_COUNT. + +endif # PLATFORM_EC_BATTERY_V2 + endif # PLATFORM_EC_BATTERY diff --git a/zephyr/Kconfig.console b/zephyr/Kconfig.console index c1edee71d5..809c03c1e0 100644 --- a/zephyr/Kconfig.console +++ b/zephyr/Kconfig.console @@ -21,9 +21,11 @@ config PLATFORM_EC_CONSOLE_CHANNEL Boards may #undef this to reduce image size. -# Adjusted to the longest print message from the timer_info command +# Adjusted to the account for the build_info[] string (about 160 bytes) plus +# the image type (about 16 bytes). +# printed by the banner. config SHELL_PRINTF_BUFF_SIZE - default 130 + default 180 # Some boards may need to increase the size, depending on the amount of output config SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE @@ -51,14 +53,3 @@ config PLATFORM_EC_HOSTCMD_CONSOLE_BUF_SIZE modular arithmetic is used. endif # PLATFORM_EC_HOSTCMD_CONSOLE - -config PLATFORM_EC_CONSOLE_USES_PRINTK - bool "Console uses printk" - depends on CONSOLE - help - Implement zephyr_print using printk for all cases instead - of using shell_fprintf for non-ISR uses in - shim/common/console.c. - Some devices have not been able to output to the console - fast enough using shell_fprintf and end up timing out - unrelated functionality. diff --git a/zephyr/Kconfig.init_priority b/zephyr/Kconfig.init_priority index af858a5296..5370072c2c 100644 --- a/zephyr/Kconfig.init_priority +++ b/zephyr/Kconfig.init_priority @@ -4,6 +4,7 @@ config PLATFORM_EC_FLASH_INIT_PRIORITY int "Init priority of the flash module" + default 90 if SOC_FAMILY_NPCX default 52 help The initialization priority of the flash module. This should always be diff --git a/zephyr/Kconfig.ioex b/zephyr/Kconfig.ioex new file mode 100644 index 0000000000..08cedb8d2a --- /dev/null +++ b/zephyr/Kconfig.ioex @@ -0,0 +1,72 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +menuconfig PLATFORM_EC_IOEX + bool "IO expander support" + depends on I2C + help + Enable support for IO expanders subsystem. + This will allow to use CrOS EC calls to ioex_* functions. It supports + both CrOS EC ioex drivers and Zephyr GPIO drivers. + +if PLATFORM_EC_IOEX + +config PLATFORM_EC_IOEX_INIT_PRIORITY + int "IO expander init priority" + range 0 99 + default 52 + help + Sets the priority of function that initializes + the IO expander subsystem + +config PLATFORM_EC_CONSOLE_CMD_IOEX + bool "Enable shell commands for IO expander" + depends on SHELL + help + Enable shell commands for IO expander. + It will enable ioexget and ioexset commands in EC console + that allow to get and change values of IO expanders pins. + +config PLATFORM_EC_IOEX_CROS_DRV + bool + help + Enable support for CrOS EC IO expander drivers + +config PLATFORM_EC_IOEX_CCGXXF + bool "Cypress CCGXXF" + select PLATFORM_EC_IOEX_CROS_DRV + help + Enables driver for Cypress CCGXXF IO expander (built inside PD chip) + +config PLATFORM_EC_IOEX_IT8801 + bool "IT8801" + select PLATFORM_EC_IOEX_CROS_DRV + help + Enables support for IT8801 IO expander with keyboard matrix controller + +config PLATFORM_EC_IOEX_NCT38XX + bool "Nuvoton NCT38xx" + select PLATFORM_EC_IOEX_CROS_DRV + help + Enables support for IO expander built inside Nuvoton NCT38xx TCPC + +config PLATFORM_EC_IOEX_PCA9675 + bool "NXP PCA9675PW" + select PLATFORM_EC_IOEX_CROS_DRV + help + Enables support for NXP PCA9675PW IO expander + +config PLATFORM_EC_IOEX_PCAL6408 + bool "NXP PCA(L)6408" + select PLATFORM_EC_IOEX_CROS_DRV + help + Enables support for NXP PCA(L)6408 IO expander + +config PLATFORM_EC_IOEX_TCA64XXA + bool "TI TCA64xA" + select PLATFORM_EC_IOEX_CROS_DRV + help + Enables support for Texas Instruments TCA64xxA IO expanders family + +endif diff --git a/zephyr/Kconfig.keyboard b/zephyr/Kconfig.keyboard index 9ad7fb8316..f95fa43643 100644 --- a/zephyr/Kconfig.keyboard +++ b/zephyr/Kconfig.keyboard @@ -168,9 +168,9 @@ config PLATFORM_EC_PWM_KBLIGHT depends on PLATFORM_EC_PWM help Enables a PWM-controlled keyboard backlight controlled by a PWM signal - connected directly to the EC chipset. The board files must define - the C reference PWM_CH_KBLIGHT to the PWM channel used for the - keyboard backlight control. + connected directly to the EC chipset. The board devicetree file must + define the PWM channel used for the keyboard backlight control and + assign the "kblight" node label to it. endchoice # Keyboard backlight diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq index 0045a69ad8..27abd68e7c 100644 --- a/zephyr/Kconfig.powerseq +++ b/zephyr/Kconfig.powerseq @@ -116,10 +116,18 @@ config PLATFORM_EC_POWERSEQ_COMETLAKE help Use the Comet Lake code for power sequencing. +config CHIPSET_ALDERLAKE_SLG4BD44540 + bool "Use powersequencing with Silego" + depends on AP_X86_INTEL_ADL + default y + help + Use this for AlderLake power sequencing with the + Silego chips. + menuconfig PLATFORM_EC_POWERSEQ_ICELAKE bool "Use common Icelake code for power sequencing" - default y if AP_X86_INTEL_TGL - default y if AP_X86_INTEL_ADL + depends on AP_X86_INTEL_TGL + default y help Use the Icelake common code for power sequencing. Note that this applies to more platforms than just Icelake. For @@ -145,23 +153,12 @@ endif # PLATFORM_EC_POWERSEQ_ICELAKE endif # PLATFORM_EC_POWERSEQ_INTEL -menuconfig PLATFORM_EC_POWERSEQ_IT8XXX2 - bool "Enable shimming common ITE8xxx2 power sequencing code" - depends on AP_ARM_MTK_MT8192 - default y - help - Enable shimming platform/ec AP power sequencing code for - IT8xxx2. - -if PLATFORM_EC_POWERSEQ_IT8XXX2 - config PLATFORM_EC_POWERSEQ_MT8192 bool "Use common MT8192 code for power sequencing" default y + depends on AP_ARM_MTK_MT8192 help - Use the Comet Lake code for power sequencing. - -endif # PLATFORM_EC_POWERSEQ_ITE8XXX2 + Use the MT8192 code for power sequencing. config PLATFORM_EC_POWERSEQ_SC7180 bool "SC7180 power sequencing" diff --git a/zephyr/Kconfig.stacks b/zephyr/Kconfig.stacks index 8df0ca23f1..367564de7e 100644 --- a/zephyr/Kconfig.stacks +++ b/zephyr/Kconfig.stacks @@ -28,10 +28,9 @@ config TASK_CHG_RAMP_STACK_SIZE default 608 config TASK_CHIPSET_STACK_SIZE - default 1056 - -config TASK_HOOKS_STACK_SIZE - default 672 + default 1056 if AP_x86 + default 684 if AP_ARM + default 1200 # Safe default config TASK_HOSTCMD_STACK_SIZE default 672 @@ -84,10 +83,9 @@ config TASK_CHARGER_STACK_SIZE default 750 config TASK_CHIPSET_STACK_SIZE - default 684 - -config TASK_HOOKS_STACK_SIZE - default 672 + default 1056 if AP_x86 + default 684 if AP_ARM + default 1200 # Safe default config TASK_HOSTCMD_STACK_SIZE default 700 @@ -109,3 +107,14 @@ config TASK_USB_CHG_STACK_SIZE endif # SOC_SERIES_NPCX9 ############################################################################## + +############################################################################## +if SOC_SERIES_RISCV32_IT8XXX2 + +# Zephyr internal stack sizes + +config SHELL_STACK_SIZE + default 1560 + +endif # SOC_SERIES_RISCV32_IT8XXX2 +############################################################################## diff --git a/zephyr/Kconfig.tasks b/zephyr/Kconfig.tasks index 1c4e50fa84..da3ae2f95f 100644 --- a/zephyr/Kconfig.tasks +++ b/zephyr/Kconfig.tasks @@ -68,26 +68,6 @@ config TASK_CHIPSET_STACK_SIZE endif # HAS_TASK_CHIPSET -config HAS_TASK_HOOKS - bool "Hooks task" - default y - help - This required task runs periodic routines connected to the HOOK_TICK - and HOOK_SECOND events. This task is responsible for running - deferred routines. - -if HAS_TASK_HOOKS - -config TASK_HOOKS_STACK_SIZE - int "Stack size" - default 1024 - help - The stack size of the hooks task. - - See b/176180736 for checking these stack sizes. - -endif # HAS_TASK_HOOKS - config HAS_TASK_HOSTCMD bool depends on PLATFORM_EC_HOSTCMD @@ -230,9 +210,16 @@ config HAS_TASK_PD_C3 help This turns on the PD_C3 task for devices with 4 ports. +config HAS_TASK_PD_INT_SHARED + bool # Selected by PLATFORM_EC_USB_PD_INT_SHARED + help + This turns on the PD_INT_SHARED task which services PD message + interrupts for any port which has a shared IRQ enabled. + config HAS_TASK_PD_INT_C0 bool depends on PLATFORM_EC_USB_POWER_DELIVERY + depends on !PLATFORM_EC_USB_PD_PORT_0_SHARED default y if PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 0 help This turns on the PD_INT_C0 task which handles servicing of Power @@ -243,6 +230,7 @@ config HAS_TASK_PD_INT_C0 config HAS_TASK_PD_INT_C1 bool depends on PLATFORM_EC_USB_POWER_DELIVERY + depends on !PLATFORM_EC_USB_PD_PORT_1_SHARED default y if PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 1 help This turns on the PD_INT_C1 task for devices with >=2 ports. @@ -250,6 +238,7 @@ config HAS_TASK_PD_INT_C1 config HAS_TASK_PD_INT_C2 bool depends on PLATFORM_EC_USB_POWER_DELIVERY + depends on !PLATFORM_EC_USB_PD_PORT_2_SHARED default y if PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 2 help This turns on the PD_INT_C2 task for devices with >=3 ports. @@ -257,6 +246,7 @@ config HAS_TASK_PD_INT_C2 config HAS_TASK_PD_INT_C3 bool depends on PLATFORM_EC_USB_POWER_DELIVERY + depends on !PLATFORM_EC_USB_PD_PORT_2_SHARED default y if PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 3 help This turns on the PD_INT_C3 task for devices with 4 ports. diff --git a/zephyr/Kconfig.usbc b/zephyr/Kconfig.usbc index c276283846..343de8b4a7 100644 --- a/zephyr/Kconfig.usbc +++ b/zephyr/Kconfig.usbc @@ -208,6 +208,12 @@ config PLATFORM_EC_USBC_RETIMER_PS8811 signals for long media link applications. It supports USB 3.1 Gen 2 with operation speed up to 10Gbps as well as Gen 1 operation at 5Gbps. +config PLATFORM_EC_USBC_RETIMER_PS8818 + bool "Parade PS8818 USB Type-C Retimer for USB and DP Alternate Mode" + help + PS8818 is a 10Gbps retimer for Type-C applications with the + integrated USB3.1 and DisplayPort alternate mode port. + config PLATFORM_EC_USBC_RETIMER_KB800X bool "Enable KB800X retimer" help @@ -244,6 +250,45 @@ menuconfig PLATFORM_EC_USB_POWER_DELIVERY if PLATFORM_EC_USB_POWER_DELIVERY +menuconfig PLATFORM_EC_USB_PD_INT_SHARED + bool "USB-C ports share PD interrupts" + select HAS_TASK_PD_INT_SHARED + help + This enables processing of shared interrupts where multiple ports + share a single IRQ on the EC. Only one shared IRQ is supported, + but any combination of ports can be serviced by that one IRQ. + +if PLATFORM_EC_USB_PD_INT_SHARED + +config PLATFORM_EC_USB_PD_PORT_0_SHARED + bool "Port 0 IRQ is shared" + help + Enable handling of port 0 PD interrupts signalled by an IRQ that is + shared by every other port enabled in this section. + +config PLATFORM_EC_USB_PD_PORT_1_SHARED + bool "Port 1 IRQ is shared" + depends on PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 1 + help + Enable handling of port 1 PD interrupts signalled by an IRQ that is + shared by every other port enabled in this section. + +config PLATFORM_EC_USB_PD_PORT_2_SHARED + bool "Port 2 IRQ is shared" + depends on PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 2 + help + Enable handling of port 2 PD interrupts signalled by an IRQ that is + shared by every other port enabled in this section. + +config PLATFORM_EC_USB_PD_PORT_3_SHARED + bool "Port 3 IRQ is shared" + depends on PLATFORM_EC_USB_PD_PORT_MAX_COUNT > 3 + help + Enable handling of port 3 PD interrupts signalled by an IRQ that is + shared by every other port enabled in this section. + +endif # PLATFORM_EC_USB_PD_INT_SHARED + config PLATFORM_EC_USB_PD_HOST_CMD bool "Host commands related to USB Power Delivery" default y @@ -777,6 +822,21 @@ config PLATFORM_EC_USBC_PPC_VCONN might need to disable this feature (for instance when both the PPC and TCPC can supply VCONN). We can cross that bridge when we come to it. +config PLATFORM_EC_USBC_PPC_AOZ1380 + bool "Alpha & Omega USB Type-C PD Sink and Source Protection Switch" + select PLATFORM_EC_USBC_OCP + help + AOZ1380DI integrates two power switches and control circuitry to + provide all the functionality and protection needed for sourcing + and sinking current through a USB Type-C port with PD capability. + +config PLATFORM_EC_USBC_PPC_NX20P3483 + bool "NX20P3483 High Voltage Sink/Source Combo Switch" + select PLATFORM_EC_USBC_OCP + help + The NX20P3483 is a product with combined multiple power switches + and a LDO for USB PD application. + config PLATFORM_EC_USBC_PPC_SN5S330 bool "TI SN5S330 PD 3.0 power mux" select PLATFORM_EC_USBC_OCP @@ -888,7 +948,6 @@ config PLATFORM_EC_USB_PD_TCPM_TCPCI # CONFIG_USB_PD_TCPM_ANX741X # CONFIG_USB_PD_TCPM_ANX7447 # CONFIG_USB_PD_TCPM_ANX7688 -# CONFIG_USB_PD_TCPM_NCT38XX # CONFIG_USB_PD_TCPM_MT6370 # CONFIG_USB_PD_TCPM_RAA489000 # CONFIG_USB_PD_TCPM_FUSB307 @@ -905,6 +964,12 @@ menuconfig PLATFORM_EC_USB_MUX if PLATFORM_EC_USB_MUX +config PLATFORM_EC_USB_MUX_AMD_FP6 + bool "AMD FP6 integrated mux" + help + Integrated AMD FP6 mux for USB and DP. Mux control happens over + an i2c channel. + config PLATFORM_EC_USB_MUX_IT5205 bool "ITE IT5205 USB Type-C 3:2 Alternative mode passive mux" help @@ -920,6 +985,13 @@ config PLATFORM_EC_USB_MUX_PS8743 High-Bit-Rate 2 (HBR2) redriver. It provides control of switching modes through either GPIO or I2C. +config PLATFORM_EC_USB_MUX_TUSB1044 + bool "TI TUSB1044 USB-C 10 Gbps Linear Redriver" + help + This is a USB Type-C Alt Mode redriver. This supports USB 3.1 + Gen 2 and DisplayPort 1.4 as Alternate Mode. It Provides GPIO and + I2C Control for Channel Direction and Equalization. + endif config PLATFORM_EC_USBC_SS_MUX @@ -1050,9 +1122,17 @@ config PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX PS8805_PRODUCT_ID PS8815_PRODUCT_ID +config PLATFORM_EC_USB_PD_TCPM_NCT38XX + bool "Nuvoton 3807/8 Single/Dual Port Controller with Power Delivery" + help + The NCT38n7/8 is a single/dual-port, USB Type-C Port Controller + (TCPC). It incorporates a Power Delivery (PD) PHY with BMC encoding, + Protocol logic and USB Type-C Configuration Channel (CC) logic. + config PLATFORM_EC_USB_PD_TCPM_PS8751 bool "Parade PS8751 USB-C Gen 2 Type-C Port Controller" select PLATFORM_EC_USB_PD_TCPM_MUX + imply PLATFORM_EC_HOSTCMD_I2C_CONTROL help The Parade Technologies PS8751 is a USB Type-C Port Controller (TCPC) for USB Type-C Host and DisplayPort applications. It supports @@ -1061,6 +1141,7 @@ config PLATFORM_EC_USB_PD_TCPM_PS8751 config PLATFORM_EC_USB_PD_TCPM_PS8805 bool "Parade PS8805 USB-C Gen 2 Type-C Port Controller" select PLATFORM_EC_USB_PD_TCPM_MUX + imply PLATFORM_EC_HOSTCMD_I2C_CONTROL help The Parade Technologies PS8805 is an active retiming/redriving (respectively for USB 3.1 Gen 2 / DisplayPort 1.4a HBR3) integrated @@ -1081,6 +1162,7 @@ endif # PLATFORM_EC_USB_PD_TCPM_PS8805 config PLATFORM_EC_USB_PD_TCPM_PS8815 bool "Parade PS8815 USB-C Gen 2 Type-C Port Controller" select PLATFORM_EC_USB_PD_TCPM_MUX + imply PLATFORM_EC_HOSTCMD_I2C_CONTROL help The Parade Technologies PS8815 is an active retiming/redriving (respectively for USB 3.1 Gen 2 / DisplayPort 1.4a HBR3) integrated diff --git a/zephyr/boards/arm/brya/brya.dts b/zephyr/boards/arm/brya/brya.dts index 4ba8704cd2..0df9f8d0fe 100644 --- a/zephyr/boards/arm/brya/brya.dts +++ b/zephyr/boards/arm/brya/brya.dts @@ -6,6 +6,7 @@ /dts-v1/; #include <cros/nuvoton/npcx9.dtsi> +#include <cros/thermistor/thermistor.dtsi> #include <dt-bindings/gpio_defines.h> #include <nuvoton/npcx9m3f.dtsi> @@ -74,6 +75,83 @@ named-adc-channels { compatible = "named-adc-channels"; + + adc_ddr_soc: ddr_soc { + label = "TEMP_DDR_SOC"; + enum-name = "ADC_TEMP_SENSOR_1_DDR_SOC"; + channel = <0>; + }; + adc_ambient: ambient { + label = "TEMP_AMBIENT"; + enum-name = "ADC_TEMP_SENSOR_2_AMBIENT"; + channel = <1>; + }; + adc_charger: charger { + label = "TEMP_CHARGER"; + enum-name = "ADC_TEMP_SENSOR_3_CHARGER"; + channel = <6>; + }; + adc_wwan: wwan { + label = "TEMP_WWAN"; + enum-name = "ADC_TEMP_SENSOR_4_WWAN"; + channel = <7>; + }; + }; + + named-temp-sensors { + ddr_soc { + compatible = "cros-ec,temp-sensor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + label = "DDR and SOC"; + enum-name = "TEMP_SENSOR_1_DDR_SOC"; + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + adc = <&adc_ddr_soc>; + }; + ambient { + compatible = "cros-ec,temp-sensor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + label = "Ambient"; + enum-name = "TEMP_SENSOR_2_AMBIENT"; + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <85>; + temp_host_halt = <90>; + temp_host_release_high = <80>; + adc = <&adc_ambient>; + }; + charger { + compatible = "cros-ec,temp-sensor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + label = "Charger"; + enum-name = "TEMP_SENSOR_3_CHARGER"; + temp_fan_off = <35>; + temp_fan_max = <65>; + temp_host_high = <105>; + temp_host_halt = <120>; + temp_host_release_high = <90>; + adc = <&adc_charger>; + }; + wwan { + compatible = "cros-ec,temp-sensor"; + thermistor = <&thermistor_3V3_30K9_47K_4050B>; + label = "WWAN"; + enum-name = "TEMP_SENSOR_4_WWAN"; + temp_fan_off = <35>; + temp_fan_max = <60>; + temp_host_high = <130>; + temp_host_halt = <130>; + temp_host_release_high = <100>; + adc = <&adc_wwan>; + }; + }; + + vsby-psl-in-list { + /* Use PSL_IN1/2/3 as detection pins from hibernate mode */ + psl-in-pads = <&psl_in1 &psl_in2 &psl_in3>; }; def-lvol-io-list { @@ -186,3 +264,27 @@ &alt9_no_kso14_sl >; }; + +&adc0 { + status = "okay"; +}; + +/* Power switch logic input pads */ +/* LID_OPEN_OD */ +&psl_in1 { + flag = <NPCX_PSL_RISING_EDGE>; +}; + +/* ACOK_EC_OD */ +&psl_in2 { + flag = <NPCX_PSL_RISING_EDGE>; +}; + +/* GSC_EC_PWR_BTN_ODL */ +&psl_in3 { + flag = <NPCX_PSL_FALLING_EDGE>; +}; + +&thermistor_3V3_30K9_47K_4050B { + status = "okay"; +}; diff --git a/zephyr/boards/arm/brya/brya_defconfig b/zephyr/boards/arm/brya/brya_defconfig index e8c412a592..09c80a57a8 100644 --- a/zephyr/boards/arm/brya/brya_defconfig +++ b/zephyr/boards/arm/brya/brya_defconfig @@ -39,3 +39,11 @@ CONFIG_WATCHDOG=y # BBRAM CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts index 34884a8275..cdf998c13f 100644 --- a/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts +++ b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9.dts @@ -50,12 +50,12 @@ named-pwms { compatible = "named-pwms"; - kblight { + kblight: kblight { pwms = <&pwm3 0 0>; label = "KBLIGHT"; frequency = <10000>; }; - displight { + displight: displight { pwms = <&pwm5 0 0>; label = "DISPLIGHT"; frequency = <4800>; diff --git a/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig index 907ae9ed34..609a8312f1 100644 --- a/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig +++ b/zephyr/boards/arm/herobrine_npcx9/herobrine_npcx9_defconfig @@ -38,3 +38,11 @@ CONFIG_SOC_POWER_MANAGEMENT_TRACE=y # BBRAM CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/arm/kohaku/Kconfig.board b/zephyr/boards/arm/kohaku/Kconfig.board deleted file mode 100644 index c1a1718847..0000000000 --- a/zephyr/boards/arm/kohaku/Kconfig.board +++ /dev/null @@ -1,10 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -config BOARD_KOHAKU - bool "Google Kohaku EC" - depends on SOC_NPCX7M6FC - # NPCX doesn't actually have enough ram for coverage, but this will - # allow generating initial 0 line coverage. - select HAS_COVERAGE_SUPPORT diff --git a/zephyr/boards/arm/kohaku/kohaku.dts b/zephyr/boards/arm/kohaku/kohaku.dts deleted file mode 100644 index b82d89f254..0000000000 --- a/zephyr/boards/arm/kohaku/kohaku.dts +++ /dev/null @@ -1,418 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/dts-v1/; - -#include <cros/nuvoton/npcx7.dtsi> -#include <dt-bindings/gpio_defines.h> -#include <nuvoton/npcx7m6fc.dtsi> - -/ { - model = "Google Kohaku EC"; - - aliases { - i2c-0 = &i2c0_0; - i2c-1 = &i2c1_0; - i2c-2 = &i2c2_0; - i2c-3 = &i2c3_0; - i2c-5 = &i2c5_0; - i2c-7 = &i2c7_0; - }; - - chosen { - zephyr,sram = &sram0; - zephyr,console = &uart1; - zephyr,shell-uart = &uart1; - zephyr,flash = &flash0; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - }; - - named-gpios { - compatible = "named-gpios"; - - lid_open { - gpios = <&gpiod 2 GPIO_INPUT>; - enum-name = "GPIO_LID_OPEN"; - label = "LID_OPEN"; - }; - wp_l { - gpios = <&gpioa 1 GPIO_INPUT>; - enum-name = "GPIO_WP_L"; - label = "WP_L"; - }; - power_button_l { - gpios = <&gpio0 1 GPIO_INPUT>; - enum-name = "GPIO_POWER_BUTTON_L"; - label = "POWER_BUTTON_L"; - }; - acok_od { - gpios = <&gpio0 0 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - label = "ACOK_OD"; - }; - slp_s0_l { - gpios = <&gpiod 5 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S0_L"; - label = "SLP_S0_L"; - }; - slp_s3_l { - gpios = <&gpioa 5 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S3_L"; - label = "SLP_S3_L"; - }; - slp_s4_l { - gpios = <&gpiod 4 GPIO_INPUT>; - enum-name = "GPIO_PCH_SLP_S4_L"; - label = "SLP_S4_L"; - }; - pg_ec_rsmrst_l { - gpios = <&gpioe 2 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_RSMRST_ODL"; - label = "PG_EC_RSMRST_L"; - }; - pg_ec_all_sys_pwrgd { - gpios = <&gpiof 4 GPIO_INPUT>; - enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; - label = "PG_EC_ALL_SYS_PWRGD"; - }; - pp5000_a_pg_od { - gpios = <&gpiod 7 GPIO_INPUT>; - enum-name = "GPIO_PP5000_A_PG_OD"; - label = "PP5000_A_PG_OD"; - }; - base_sixaxis_int_l { - gpios = <&gpio5 6 GPIO_INPUT>; - label = "BASE_SIXAXIS_INT_L"; - }; - wfcam_vsync { - gpios = <&gpiob 7 GPIO_INPUT>; - label = "WFCAM_VSYNC"; - }; - tcs3400_int_odl { - gpios = <&gpio7 2 GPIO_INPUT>; - label = "TCS3400_INT_ODL"; - }; - usb_c0_ppc_int_odl { - gpios = <&gpioe 0 GPIO_INPUT>; - label = "USB_C0_PPC_INT_ODL"; - }; - usb_c1_ppc_int_odl { - gpios = <&gpioa 2 GPIO_INPUT>; - label = "USB_C1_PPC_INT_ODL"; - }; - usb_c0_tcpc_int_odl { - gpios = <&gpio6 2 GPIO_INPUT>; - label = "USB_C0_TCPC_INT_ODL"; - }; - usb_c1_tcpc_int_odl { - gpios = <&gpiof 5 GPIO_INPUT>; - label = "USB_C1_TCPC_INT_ODL"; - }; - usb_c0_bc12_int_odl { - gpios = <&gpio9 5 GPIO_INPUT>; - label = "USB_C0_BC12_INT_ODL"; - }; - usb_c1_bc12_int_odl { - gpios = <&gpioe 4 GPIO_INPUT>; - label = "USB_C1_BC12_INT_ODL"; - }; - ec_voldn_btn_odl { - gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_VOLDN_BTN_ODL"; - }; - ec_volup_btn_odl { - gpios = <&gpio7 5 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_VOLUP_BTN_ODL"; - }; - sys_reset_l { - gpios = <&gpioc 5 GPIO_ODR_HIGH>; - enum-name = "GPIO_SYS_RESET_L"; - label = "SYS_RESET_L"; - }; - entering_rw { - gpios = <&gpioe 3 GPIO_OUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - label = "ENTERING_RW"; - }; - pch_wake_l { - gpios = <&gpio7 4 GPIO_ODR_HIGH>; - enum-name = "GPIO_EC_PCH_WAKE_ODL"; - label = "PCH_WAKE_L"; - }; - pch_pwrbtn_l { - gpios = <&gpioc 1 GPIO_ODR_HIGH>; - enum-name = "GPIO_PCH_PWRBTN_L"; - label = "PCH_PWRBTN_L"; - }; - en_pp5000_a { - gpios = <&gpioa 4 GPIO_OUT_LOW>; - enum-name = "GPIO_EN_PP5000_A"; - label = "EN_PP5000_A"; - }; - en_pp5000 { - gpios = <&gpioa 4 GPIO_OUT_LOW>; - enum-name = "GPIO_EN_PP5000"; - label = "EN_PP5000"; - }; - gpio_edp_bklten_od { - gpios = <&gpiod 3 GPIO_ODR_HIGH>; - enum-name = "GPIO_ENABLE_BACKLIGHT"; - label = "EDP_BKLTEN_OD"; - }; - en_a_rails { - gpios = <&gpioa 3 GPIO_OUT_LOW>; - enum-name = "GPIO_EN_A_RAILS"; - label = "EN_A_RAILS"; - }; - ec_pch_rsmrst_l { - gpios = <&gpioa 6 GPIO_OUT_LOW>; - enum-name = "GPIO_PCH_RSMRST_L"; - label = "EC_PCH_RSMRST_L"; - }; - ec_prochot_odl { - gpios = <&gpio6 3 GPIO_ODR_HIGH>; - enum-name = "GPIO_CPU_PROCHOT"; - label = "EC_PROCHOT_ODL"; - }; - ec_prochot_in_od { - gpios = <&gpio3 4 GPIO_INPUT>; - label = "EC_PROCHOT_IN_OD"; - }; - ec_pch_sys_pwrok { - gpios = <&gpio3 7 GPIO_OUT_LOW>; - enum-name = "GPIO_PCH_SYS_PWROK"; - label = "EC_PCH_SYS_PWROK"; - }; - cpu_c10_gate_l { - gpios = <&gpio6 7 GPIO_INPUT>; - label = "CPU_C10_GATE_L"; - }; - ec_int_l { - gpios = <&gpio7 0 GPIO_ODR_HIGH>; - label = "EC_INT_L"; - }; - ec_rst_odl { - gpios = <&gpio0 2 GPIO_INPUT>; - label = "EC_RST_ODL"; - }; - usb_c_oc_odl { - gpios = <&gpiob 1 GPIO_ODR_HIGH>; - label = "USB_C_OC_ODL"; - }; - usb_c0_tcpc_rst_odl { - gpios = <&gpio9 7 GPIO_ODR_HIGH>; - label = "USB_C0_TCPC_RST_ODL"; - }; - usb_c1_tcpc_rst_odl { - gpios = <&gpio3 2 GPIO_ODR_HIGH>; - label = "USB_C1_TCPC_RST_ODL"; - }; - usb_c0_bc12_chg_det_l { - gpios = <&gpio6 0 GPIO_INPUT>; - label = "USB_C0_BC12_CHG_DET_L"; - }; - usb_c1_bc12_chg_det_l { - gpios = <&gpio9 6 GPIO_INPUT>; - label = "USB_C1_BC12_CHG_DET_L"; - }; - usb_c0_bc12_vbus_on { - gpios = <&gpio9 4 GPIO_OUT_LOW>; - label = "USB_C0_BC12_VBUS_ON"; - }; - usb_c1_bc12_vbus_on { - gpios = <&gpioc 6 GPIO_OUT_LOW>; - label = "USB_C1_BC12_VBUS_ON"; - }; - ec_batt_pres_odl { - gpios = <&gpioe 1 GPIO_INPUT>; - label = "EC_BATT_PRES_ODL"; - }; - led_1_l { - gpios = <&gpioc 4 GPIO_OUT_HIGH>; - label = "LED_1_L"; - }; - led_2_l { - gpios = <&gpioc 3 GPIO_OUT_HIGH>; - label = "LED_2_L"; - }; - led_3_l { - gpios = <&gpioc 2 GPIO_OUT_HIGH>; - label = "LED_3_L"; - }; - ec_kb_bl_en { - gpios = <&gpio8 6 GPIO_OUT_LOW>; - label = "EC_KB_BL_EN"; - }; - edp_bklten_od { - gpios = <&gpiod 3 GPIO_ODR_HIGH>; - label = "EDP_BKLTEN_OD"; - }; - lid_accel_int_l { - gpios = <&gpio5 0 GPIO_INPUT>; - label = "LID_ACCEL_INT_L"; - }; - m2_sd_pln { - gpios = <&gpioa 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "M2_SD_PLN"; - }; - imvp8_pe { - gpios = <&gpioa 7 GPIO_INPUT>; - label = "IMVP8_PE"; - }; - i2c0_scl { - gpios = <&gpiob 5 GPIO_INPUT>; - label = "I2C0_SCL"; - }; - i2c0_sda { - gpios = <&gpiob 4 GPIO_INPUT>; - label = "I2C0_SDA"; - }; - i2c1_scl { - gpios = <&gpio9 0 GPIO_INPUT>; - label = "I2C1_SCL"; - }; - i2c1_sda { - gpios = <&gpio8 7 GPIO_INPUT>; - label = "I2C1_SDA"; - }; - i2c2_scl { - gpios = <&gpio9 2 GPIO_INPUT>; - label = "I2C2_SCL"; - }; - i2c2_sda { - gpios = <&gpio9 1 GPIO_INPUT>; - label = "I2C2_SDA"; - }; - i2c3_scl { - gpios = <&gpiod 1 GPIO_INPUT>; - label = "I2C3_SCL"; - }; - i2c3_sda { - gpios = <&gpiod 0 GPIO_INPUT>; - label = "I2C3_SDA"; - }; - i2c5_scl { - gpios = <&gpio3 3 GPIO_INPUT>; - label = "I2C5_SCL"; - }; - i2c5_sda { - gpios = <&gpio3 6 GPIO_INPUT>; - label = "I2C5_SDA"; - }; - i2c7_scl { - gpios = <&gpiob 3 GPIO_INPUT>; - label = "I2C7_SCL"; - }; - i2c7_sda { - gpios = <&gpiob 2 GPIO_INPUT>; - label = "I2C7_SDA"; - }; - tp58 { - gpios = <&gpio0 4 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP58"; - }; - tp73 { - gpios = <&gpio8 2 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP73"; - }; - tp18 { - gpios = <&gpioc 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP18"; - }; - tp54 { - gpios = <&gpio4 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP54"; - }; - tp56 { - gpios = <&gpio6 1 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP56"; - }; - tp57 { - gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP57"; - }; - tp55 { - gpios = <&gpio7 3 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP55"; - }; - tp59 { - gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "TP59"; - }; - kbd_kso2 { - gpios = <&gpio1 7 GPIO_OUT_LOW>; - label = "KBD_KSO2"; - }; - }; - - def-lvol-io-list { - compatible = "nuvoton,npcx-lvolctrl-def"; - lvol-io-pads = <&lvol_iob4 &lvol_iob5 /* I2C_SDA0 & SCL0 */ - &lvol_io50>; /* GPIO50 */ - }; -}; - -&uart1 { - status = "okay"; - current-speed = <115200>; - pinctrl-0 = <&altc_uart1_sl2>; /* Use UART1_SL2 ie. PIN64.65 */ -}; - -&i2c0_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; -}; - -&i2c_ctrl0 { - status = "okay"; -}; - -&i2c1_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST_PLUS>; -}; - -&i2c_ctrl1 { - status = "okay"; -}; - -&i2c2_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST_PLUS>; -}; - -&i2c_ctrl2 { - status = "okay"; -}; - -&i2c3_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; -}; - -&i2c_ctrl3 { - status = "okay"; -}; - -&i2c5_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; -}; - -&i2c_ctrl5 { - status = "okay"; -}; - -&i2c7_0 { - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; -}; - -&i2c_ctrl7 { - status = "okay"; -}; diff --git a/zephyr/boards/arm/kohaku/kohaku.yaml b/zephyr/boards/arm/kohaku/kohaku.yaml deleted file mode 100644 index 48cc85e7df..0000000000 --- a/zephyr/boards/arm/kohaku/kohaku.yaml +++ /dev/null @@ -1,19 +0,0 @@ -# -# Copyright (c) 2020 Google LLC. -# -# SPDX-License-Identifier: Apache-2.0 -# - -identifier: kohaku -name: "Google Kohaku (Samsung Galaxy Chromebook) Embedded Controller" -type: mcu -arch: arm -toolchain: - - zephyr - - gnuarmemb -ram: 64 -flash: 512 -testing: - ignore_tags: - - net - - bluetooth diff --git a/zephyr/boards/arm/kohaku/kohaku_defconfig b/zephyr/boards/arm/kohaku/kohaku_defconfig deleted file mode 100644 index eccf6da6ab..0000000000 --- a/zephyr/boards/arm/kohaku/kohaku_defconfig +++ /dev/null @@ -1,34 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -# Zephyr Kernel Configuration -CONFIG_SOC_SERIES_NPCX7=y -CONFIG_SOC_NPCX7M6FC=y - -# Platform Configuration -CONFIG_BOARD_KOHAKU=y - -# Serial Drivers -CONFIG_SERIAL=y -CONFIG_UART_INTERRUPT_DRIVEN=y - -# Enable console -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y - -# Pinmux Driver -CONFIG_PINMUX=y - -# GPIO Controller -CONFIG_GPIO=y - -# Clock configuration -CONFIG_CLOCK_CONTROL=y - -# WATCHDOG configuration -CONFIG_WATCHDOG=y - -# BBRAM -CONFIG_BBRAM=y -CONFIG_BBRAM_NPCX=y diff --git a/zephyr/boards/arm/npcx9/npcx9_defconfig b/zephyr/boards/arm/npcx9/npcx9_defconfig index d20fd87f3a..f8cfd551af 100644 --- a/zephyr/boards/arm/npcx9/npcx9_defconfig +++ b/zephyr/boards/arm/npcx9/npcx9_defconfig @@ -31,3 +31,11 @@ CONFIG_WATCHDOG=y CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig index b2fc879cbc..b2da6c4631 100644 --- a/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig +++ b/zephyr/boards/arm/npcx_evb/npcx7_evb_defconfig @@ -53,3 +53,11 @@ CONFIG_SOC_POWER_MANAGEMENT_TRACE=y # BBRAM CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig b/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig index 9a946584ef..6d0f10d1ed 100644 --- a/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig +++ b/zephyr/boards/arm/npcx_evb/npcx9_evb_defconfig @@ -52,3 +52,11 @@ CONFIG_SOC_POWER_MANAGEMENT_TRACE=y # BBRAM CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/arm/trogdor/trogdor.dts b/zephyr/boards/arm/trogdor/trogdor.dts index 24fb584ae1..a13861ad09 100644 --- a/zephyr/boards/arm/trogdor/trogdor.dts +++ b/zephyr/boards/arm/trogdor/trogdor.dts @@ -111,12 +111,12 @@ named-pwms { compatible = "named-pwms"; - kblight { + kblight: kblight { pwms = <&pwm3 0 0>; label = "KBLIGHT"; frequency = <10000>; }; - displight { + displight: displight { pwms = <&pwm5 0 0>; label = "DISPLIGHT"; frequency = <4800>; diff --git a/zephyr/boards/arm/trogdor/trogdor_defconfig b/zephyr/boards/arm/trogdor/trogdor_defconfig index 2a61f3dd5c..e5ca49969f 100644 --- a/zephyr/boards/arm/trogdor/trogdor_defconfig +++ b/zephyr/boards/arm/trogdor/trogdor_defconfig @@ -38,3 +38,11 @@ CONFIG_SOC_POWER_MANAGEMENT_TRACE=y # BBRAM CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/arm/volteer/volteer.dts b/zephyr/boards/arm/volteer/volteer.dts index d837f8ab55..f25363f03f 100644 --- a/zephyr/boards/arm/volteer/volteer.dts +++ b/zephyr/boards/arm/volteer/volteer.dts @@ -60,12 +60,12 @@ enum-name = "I2C_PORT_ACCEL"; label = "ACCEL"; }; - usb-c0 { + i2c_usb_c0: usb-c0 { i2c-port = <&i2c1_0>; enum-name = "I2C_PORT_USB_C0"; label = "USB_C0"; }; - usb-c1 { + i2c_usb_c1: usb-c1 { i2c-port = <&i2c2_0>; enum-name = "I2C_PORT_USB_C1"; label = "USB_C1"; diff --git a/zephyr/boards/arm/volteer/volteer_defconfig b/zephyr/boards/arm/volteer/volteer_defconfig index a3f184dff8..16eee231a3 100644 --- a/zephyr/boards/arm/volteer/volteer_defconfig +++ b/zephyr/boards/arm/volteer/volteer_defconfig @@ -43,3 +43,11 @@ CONFIG_SOC_POWER_MANAGEMENT_TRACE=y # BBRAM CONFIG_BBRAM=y CONFIG_BBRAM_NPCX=y + +# SPI +CONFIG_SPI=y + +# Flash +CONFIG_FLASH=y +CONFIG_SPI_NOR=y +CONFIG_FLASH_JESD216_API=y diff --git a/zephyr/boards/riscv/asurada/Kconfig.defconfig b/zephyr/boards/riscv/asurada/Kconfig.defconfig index cc3e4b000c..463b0c30f3 100644 --- a/zephyr/boards/riscv/asurada/Kconfig.defconfig +++ b/zephyr/boards/riscv/asurada/Kconfig.defconfig @@ -15,9 +15,6 @@ config IDLE_STACK_SIZE config ISR_STACK_SIZE default 800 -config SHELL_STACK_SIZE - default 1048 - config SYSTEM_WORKQUEUE_STACK_SIZE default 1024 @@ -30,9 +27,6 @@ config TASK_CHARGER_STACK_SIZE config TASK_CHIPSET_STACK_SIZE default 820 -config TASK_HOOKS_STACK_SIZE - default 672 - config TASK_HOSTCMD_STACK_SIZE default 1024 diff --git a/zephyr/boards/riscv/asurada/asurada.dts b/zephyr/boards/riscv/asurada/asurada.dts index 8dc3c2abb7..b0c46e4f6f 100644 --- a/zephyr/boards/riscv/asurada/asurada.dts +++ b/zephyr/boards/riscv/asurada/asurada.dts @@ -174,6 +174,10 @@ clock-frequency = <1804800>; }; +&ite_uart1_wrapper { + status = "okay"; +}; + &adc0 { status = "okay"; }; diff --git a/zephyr/boards/riscv/asurada/asurada_defconfig b/zephyr/boards/riscv/asurada/asurada_defconfig index dbcc83ad75..60c04020f7 100644 --- a/zephyr/boards/riscv/asurada/asurada_defconfig +++ b/zephyr/boards/riscv/asurada/asurada_defconfig @@ -67,7 +67,6 @@ CONFIG_PLATFORM_EC_POWER_BUTTON=y # Power Sequencing CONFIG_PLATFORM_EC_POWERSEQ=y CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y -CONFIG_PLATFORM_EC_POWERSEQ_IT8XXX2=y CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y diff --git a/zephyr/boards/riscv/corsola/corsola.dts b/zephyr/boards/riscv/corsola/corsola.dts deleted file mode 100644 index 8a03035550..0000000000 --- a/zephyr/boards/riscv/corsola/corsola.dts +++ /dev/null @@ -1,207 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/dts-v1/; - -#include <cros/ite/it8xxx2.dtsi> -#include <dt-bindings/adc/adc.h> -#include <dt-bindings/gpio_defines.h> -#include <it8xxx2.dtsi> -#include <dt-bindings/wake_mask_event_defines.h> - -/ { - model = "Google Corsola Baseboard"; - - chosen { - zephyr,sram = &sram0; - zephyr,console = &uart1; - zephyr,shell-uart = &uart1; - zephyr,flash = &flash0; - zephyr,flash-controller = &flashctrl; - }; - - ec-mkbp-host-event-wakeup-mask { - compatible = "ec-wake-mask-event"; - wakeup-mask = <( - HOST_EVENT_MASK(HOST_EVENT_AC_CONNECTED) | - HOST_EVENT_MASK(HOST_EVENT_AC_DISCONNECTED) | - HOST_EVENT_MASK(HOST_EVENT_LID_OPEN) | - HOST_EVENT_MASK(HOST_EVENT_POWER_BUTTON) | - HOST_EVENT_MASK(HOST_EVENT_HANG_DETECT) | - HOST_EVENT_MASK(HOST_EVENT_MODE_CHANGE))>; - }; - - ec-mkbp-event-wakeup-mask { - compatible = "ec-wake-mask-event"; - wakeup-mask = <(MKBP_EVENT_KEY_MATRIX | - MKBP_EVENT_HOST_EVENT)>; - }; - - named-adc-channels { - compatible = "named-adc-channels"; - - adc_vbus_c0 { - label = "ADC_VBUS_C0"; - enum-name = "ADC_VBUS_C0"; - channel = <0>; - mul = <10>; - }; - adc_board_id0 { - label = "ADC_BOARD_ID_0"; - enum-name = "ADC_BOARD_ID_0"; - channel = <1>; - }; - adc_board_id1 { - label = "ADC_BOARD_ID_1"; - enum-name = "ADC_BOARD_ID_1"; - channel = <2>; - }; - adc_charger_amon_r { - label = "ADC_AMON_BMON"; - enum-name = "ADC_AMON_BMON"; - channel = <3>; - mul = <1000>; - div = <18>; - }; - adc_vbus_c1 { - label = "ADC_VBUS_C1"; - enum-name = "ADC_VBUS_C1"; - channel = <5>; - mul = <10>; - }; - adc_charger_pmon { - label = "ADC_PMON"; - enum-name = "ADC_PMON"; - channel = <6>; - }; - adc-psys { - label = "ADC_PSYS"; - enum-name = "ADC_PSYS"; - channel = <6>; - }; - }; - - named-i2c-ports { - compatible = "named-i2c-ports"; - - power { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_POWER"; - label = "POWER"; - }; - battery { - i2c-port = <&i2c0>; - remote-port = <0>; - enum-name = "I2C_PORT_BATTERY"; - label = "BATTERY"; - }; - virtual-battery { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_VIRTUAL_BATTERY"; - label = "VIRTUAL_BATTERY"; - }; - eeprom { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_EEPROM"; - label = "EEPROM"; - }; - charger { - i2c-port = <&i2c0>; - enum-name = "I2C_PORT_CHARGER"; - label = "CHARGER"; - }; - i2c_sensor: sensor { - i2c-port = <&i2c1>; - enum-name = "I2C_PORT_SENSOR"; - label = "SENSOR"; - }; - i2c-accel { - i2c-port = <&i2c1>; - enum-name = "I2C_PORT_ACCEL"; - label = "ACCEL"; - }; - ppc0 { - i2c-port = <&i2c2>; - enum-name = "I2C_PORT_PPC0"; - label = "PPC0"; - }; - ppc1 { - i2c-port = <&i2c4>; - enum-name = "I2C_PORT_PPC1"; - label = "PPC1"; - }; - usb-c0 { - i2c-port = <&i2c2>; - enum-name = "I2C_PORT_USB_C0"; - label = "USB_C0"; - }; - usb-c1 { - i2c-port = <&i2c4>; - enum-name = "I2C_PORT_USB_C1"; - label = "USB_C1"; - }; - usb-mux0 { - i2c-port = <&i2c2>; - enum-name = "I2C_PORT_USB_MUX0"; - label = "USB_MUX0"; - }; - usb-mux1 { - i2c-port = <&i2c4>; - enum-name = "I2C_PORT_USB_MUX1"; - label = "USB_MUX1"; - }; - }; - - soc { - /delete-node/ kscan@f01d00; - - cros_kb_raw: cros-kb-raw@f01d00 { - compatible = "ite,it8xxx2-cros-kb-raw"; - reg = <0x00f01d00 0x29>; - label = "CROS_KB_RAW_0"; - interrupt-parent = <&intc>; - interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - }; -}; - -&uart1 { - status = "okay"; - current-speed = <115200>; - clock-frequency = <1804800>; -}; - -&adc0 { - status = "okay"; -}; - -&i2c0 { - /* EC_I2C_PWR_CBI */ - status = "okay"; - clock-frequency = <I2C_BITRATE_STANDARD>; -}; - -&i2c1 { - /* EC_I2C_SENSOR */ - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; -}; - -&i2c2 { - /* EC_I2C_USB_C0 */ - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; -}; - -&i2c4{ - /* EC_I2C_USB_C1 */ - status = "okay"; - clock-frequency = <I2C_BITRATE_FAST>; -}; - -&cros_kb_raw { - status = "okay"; -}; diff --git a/zephyr/boards/riscv/corsola/Kconfig.board b/zephyr/boards/riscv/it8xxx2/Kconfig.board index 5760247df4..0e58c236f8 100644 --- a/zephyr/boards/riscv/corsola/Kconfig.board +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.board @@ -7,8 +7,8 @@ # conventions, we'll still call it "BOARD_*" to make this more # applicable to be upstreamed, even though this code is shared by all # projects using Trogdor baseboard. -config BOARD_CORSOLA - bool "Google Corsola Baseboard" +config BOARD_IT8XXX2 + bool "IT8XXX2 Zephyr Board" depends on SOC_IT8XXX2 # Allow generating initial 0 line coverage. select HAS_COVERAGE_SUPPORT diff --git a/zephyr/boards/riscv/corsola/Kconfig.defconfig b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig index bec25afa54..1b1472dfe1 100644 --- a/zephyr/boards/riscv/corsola/Kconfig.defconfig +++ b/zephyr/boards/riscv/it8xxx2/Kconfig.defconfig @@ -2,10 +2,10 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -if BOARD_CORSOLA +if BOARD_IT8XXX2 config BOARD - default "corsola" + default "it8xxx2" # Zephyr internal stack sizes @@ -15,9 +15,6 @@ config IDLE_STACK_SIZE config ISR_STACK_SIZE default 800 -config SHELL_STACK_SIZE - default 1048 - config SYSTEM_WORKQUEUE_STACK_SIZE default 1024 @@ -30,9 +27,6 @@ config TASK_CHARGER_STACK_SIZE config TASK_CHIPSET_STACK_SIZE default 820 -config TASK_HOOKS_STACK_SIZE - default 672 - config TASK_HOSTCMD_STACK_SIZE default 1024 @@ -53,4 +47,4 @@ choice PLATFORM_EC_HOSTCMD_DEBUG_MODE default HCDEBUG_OFF endchoice # PLATFORM_EC_HOSTCMD_DEBUG_MODE -endif # BOARD_CORSOLA +endif # BOARD_IT8XXX2 diff --git a/zephyr/boards/riscv/it8xxx2/it8xxx2.dts b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts new file mode 100644 index 0000000000..f4a46e335d --- /dev/null +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2.dts @@ -0,0 +1,67 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/dts-v1/; + +#include <cros/ite/it8xxx2.dtsi> +#include <dt-bindings/gpio_defines.h> +#include <it8xxx2.dtsi> +#include <dt-bindings/wake_mask_event_defines.h> + +/ { + model = "Google IT8XXX2 Baseboard"; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &uart1; + zephyr,shell-uart = &uart1; + zephyr,flash = &flash0; + zephyr,flash-controller = &flashctrl; + }; + + ec-mkbp-host-event-wakeup-mask { + compatible = "ec-wake-mask-event"; + wakeup-mask = <( + HOST_EVENT_MASK(HOST_EVENT_AC_CONNECTED) | + HOST_EVENT_MASK(HOST_EVENT_AC_DISCONNECTED) | + HOST_EVENT_MASK(HOST_EVENT_LID_OPEN) | + HOST_EVENT_MASK(HOST_EVENT_POWER_BUTTON) | + HOST_EVENT_MASK(HOST_EVENT_HANG_DETECT) | + HOST_EVENT_MASK(HOST_EVENT_MODE_CHANGE))>; + }; + + ec-mkbp-event-wakeup-mask { + compatible = "ec-wake-mask-event"; + wakeup-mask = <(MKBP_EVENT_KEY_MATRIX | + MKBP_EVENT_HOST_EVENT)>; + }; + + soc { + /delete-node/ kscan@f01d00; + + cros_kb_raw: cros-kb-raw@f01d00 { + compatible = "ite,it8xxx2-cros-kb-raw"; + reg = <0x00f01d00 0x29>; + label = "CROS_KB_RAW_0"; + interrupt-parent = <&intc>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + }; +}; + +&uart1 { + status = "okay"; + current-speed = <115200>; + clock-frequency = <1804800>; +}; + +&ite_uart1_wrapper { + status = "okay"; +}; + +&cros_kb_raw { + status = "okay"; +}; diff --git a/zephyr/boards/riscv/corsola/corsola_defconfig b/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig index 6dd0b3674b..385c98f275 100644 --- a/zephyr/boards/riscv/corsola/corsola_defconfig +++ b/zephyr/boards/riscv/it8xxx2/it8xxx2_defconfig @@ -4,10 +4,10 @@ # Zephyr Kernel Configuration CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y +CONFIG_SOC_IT8XXX2=y # Platform Configuration -CONFIG_SOC_IT8XXX2=y -CONFIG_BOARD_CORSOLA=y +CONFIG_BOARD_IT8XXX2=y # SoC configuration CONFIG_AP=y @@ -67,7 +67,6 @@ CONFIG_PLATFORM_EC_POWER_BUTTON=y # Power Sequencing CONFIG_PLATFORM_EC_POWERSEQ=y CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y -CONFIG_PLATFORM_EC_POWERSEQ_IT8XXX2=y CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y @@ -82,9 +81,6 @@ CONFIG_PWM_ITE_IT8XXX2=y CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y -# Serial Host Interface (SHI) device. -CONFIG_CROS_SHI_IT8XXX2=y - # Timer configuration CONFIG_ITE_IT8XXX2_TIMER=y diff --git a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts index a1b61d02ec..251c6a4236 100644 --- a/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts +++ b/zephyr/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts @@ -242,6 +242,10 @@ clock-frequency = <1804800>; }; +&ite_uart1_wrapper { + status = "okay"; +}; + /* TEST1 */ &pwm0 { status = "okay"; diff --git a/zephyr/cmake/compiler/clang/compiler_flags.cmake b/zephyr/cmake/compiler/clang/compiler_flags.cmake index d247bd622d..815078a15a 100644 --- a/zephyr/cmake/compiler/clang/compiler_flags.cmake +++ b/zephyr/cmake/compiler/clang/compiler_flags.cmake @@ -7,4 +7,4 @@ include("${ZEPHYR_BASE}/cmake/compiler/clang/compiler_flags.cmake") # Disable -fno-freestanding. set_compiler_property(PROPERTY hosted) -check_set_compiler_property(APPEND PROPERTY warning_extended -Wunused-variable -Werror=unused-variable) +check_set_compiler_property(APPEND PROPERTY warning_extended -Wunused-variable -Werror=unused-variable -Werror=missing-braces) diff --git a/zephyr/drivers/cros_flash/Kconfig b/zephyr/drivers/cros_flash/Kconfig index 1d100a6068..05de5c5e5b 100644 --- a/zephyr/drivers/cros_flash/Kconfig +++ b/zephyr/drivers/cros_flash/Kconfig @@ -12,6 +12,19 @@ menuconfig CROS_FLASH_NPCX continue to use most of the existing flash memory processing code in ECOS. +if CROS_FLASH_NPCX + +config CROS_FLASH_NPCX_INIT_PRIORITY + int "Nuvoton NPCX flash driver priority for the Zephyr shim" + default 85 + help + This sets the priority of the NPCX flash driver for zephyr shim. + This driver depends on the SPI controller and SPI NOR flash drivers. + Its priority must be lower than CONFIG_SPI_INIT_PRIORITY and + CONFIG_SPI_NOR_INIT_PRIORITY. + +endif # CROS_FLASH_NPCX + config CROS_FLASH_IT8XXX2 bool "ITE IT81202 flash driver for the Zephyr shim" depends on SOC_FAMILY_RISCV_ITE diff --git a/zephyr/drivers/cros_flash/cros_flash_npcx.c b/zephyr/drivers/cros_flash/cros_flash_npcx.c index abeabcbf3d..4c6a6e5e3c 100644 --- a/zephyr/drivers/cros_flash/cros_flash_npcx.c +++ b/zephyr/drivers/cros_flash/cros_flash_npcx.c @@ -5,21 +5,17 @@ #define DT_DRV_COMPAT nuvoton_npcx_cros_flash -#include <dt-bindings/clock/npcx_clock.h> #include <drivers/cros_flash.h> -#include <drivers/clock_control.h> +#include <drivers/flash.h> #include <drivers/gpio.h> +#include <drivers/spi.h> #include <kernel.h> #include <logging/log.h> #include <soc.h> -#include <soc/nuvoton_npcx/reg_def_cros.h> -#include <sys/__assert.h> -#include "ec_tasks.h" + #include "flash.h" #include "gpio.h" -#include "soc_miwu.h" #include "spi_flash_reg.h" -#include "task.h" #include "../drivers/flash/spi_nor.h" LOG_MODULE_REGISTER(cros_flash, LOG_LEVEL_ERR); @@ -27,134 +23,93 @@ LOG_MODULE_REGISTER(cros_flash, LOG_LEVEL_ERR); static int all_protected; /* Has all-flash protection been requested? */ static int addr_prot_start; static int addr_prot_length; -static uint8_t flag_prot_inconsistent; static uint8_t saved_sr1; static uint8_t saved_sr2; -#define CMD_READ_STATUS_REG 0x05 -#define CMD_READ_STATUS_REG2 0x35 - -/* Device config */ -struct cros_flash_npcx_config { - /* flash interface unit base address */ - uintptr_t base; - /* clock configuration */ - struct npcx_clk_cfg clk_cfg; - /* Flash size (Unit:bytes) */ - int size; - /* pinmux configuration */ - const uint8_t alts_size; - const struct npcx_alt *alts_list; -}; - /* Device data */ struct cros_flash_npcx_data { - /* flag of flash write protection */ - bool write_protectied; - /* mutex of flash interface controller */ - struct k_sem lock_sem; + const struct device *flash_dev; + const struct device *spi_ctrl_dev; }; -/* TODO: Should we replace them with Kconfig variables */ -#define CONFIG_FLASH_WRITE_SIZE 0x1 /* minimum write size */ -#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256 /* one page size for write */ +static struct spi_config spi_cfg; -/* TODO: It should be defined in the spi_nor.h in the zephyr repository */ -#define SPI_NOR_CMD_FAST_READ 0x0B +#define FLASH_DEV DT_NODELABEL(int_flash) +#define SPI_CONTROLLER_DEV DT_NODELABEL(spi_fiu0) -/* Driver convenience defines */ -#define DRV_CONFIG(dev) ((const struct cros_flash_npcx_config *)(dev)->config) #define DRV_DATA(dev) ((struct cros_flash_npcx_data *)(dev)->data) -#define HAL_INSTANCE(dev) (struct fiu_reg *)(DRV_CONFIG(dev)->base) -/* cros ec flash local inline functions */ -static inline void cros_flash_npcx_mutex_lock(const struct device *dev) -{ - struct cros_flash_npcx_data *data = DRV_DATA(dev); +#define SPI_NOR_CMD_RDSR2 0x35 - k_sem_take(&data->lock_sem, K_FOREVER); -} - -static inline void cros_flash_npcx_mutex_unlock(const struct device *dev) -{ - struct cros_flash_npcx_data *data = DRV_DATA(dev); - - k_sem_give(&data->lock_sem); -} +/* cros ec flash local functions */ +static int cros_flash_npcx_get_status_reg(const struct device *dev, + uint8_t cmd_code, uint8_t *data) +{ + uint8_t opcode; + struct cros_flash_npcx_data *dev_data = DRV_DATA(dev); + + struct spi_buf spi_buf[2] = { + [0] = { + .buf = &opcode, + .len = 1, + }, + [1] = { + .buf = data, + .len = 1, + } + }; -static inline void cros_flash_npcx_set_address(const struct device *dev, - uint32_t qspi_addr) -{ - struct fiu_reg *const inst = HAL_INSTANCE(dev); - uint8_t *addr = (uint8_t *)&qspi_addr; + const struct spi_buf_set tx_set = { + .buffers = spi_buf, + .count = 2, + }; - /* Write 3 bytes address to UMA registers */ - inst->UMA_AB2 = addr[2]; - inst->UMA_AB1 = addr[1]; - inst->UMA_AB0 = addr[0]; -} + const struct spi_buf_set rx_set = { + .buffers = spi_buf, + .count = 2, + }; -static inline void cros_flash_npcx_cs_level(const struct device *dev, int level) -{ - struct fiu_reg *const inst = HAL_INSTANCE(dev); + if (data == 0) + return -EINVAL; - /* Set chip select to high/low level */ - if (level == 0) - inst->UMA_ECTS &= ~BIT(NPCX_UMA_ECTS_SW_CS1); - else - inst->UMA_ECTS |= BIT(NPCX_UMA_ECTS_SW_CS1); + opcode = cmd_code; + return spi_transceive(dev_data->spi_ctrl_dev, &spi_cfg, &tx_set, + &rx_set); } -static inline void cros_flash_npcx_exec_cmd(const struct device *dev, - uint8_t code, uint8_t cts) +static int cros_flash_npcx_wait_ready(const struct device *dev) { - struct fiu_reg *const inst = HAL_INSTANCE(dev); - -#ifdef CONFIG_ASSERT - struct cros_flash_npcx_data *data = DRV_DATA(dev); + int wait_period = 10; /* 10 us period t0 check status register */ + int timeout = (10 * USEC_PER_SEC) / wait_period; /* 10 seconds */ - /* Flash mutex must be held while executing UMA commands */ - __ASSERT((k_sem_count_get(&data->lock_sem) == 0), "UMA is not locked"); -#endif + do { + uint8_t reg; - /* set UMA_CODE */ - inst->UMA_CODE = code; - /* execute UMA flash transaction */ - inst->UMA_CTS = cts; - while (IS_BIT_SET(inst->UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) - ; -} + cros_flash_npcx_get_status_reg(dev, SPI_NOR_CMD_RDSR, ®); + if ((reg & SPI_NOR_WIP_BIT) == 0) + break; + k_usleep(wait_period); + } while (--timeout); /* Wait for busy bit clear */ -static inline void cros_flash_npcx_burst_read(const struct device *dev, - char *dst_data, int dst_size) -{ - struct fiu_reg *const inst = HAL_INSTANCE(dev); - - /* Burst read transaction */ - for (int idx = 0; idx < dst_size; idx++) { - /* 1101 0101 - EXEC, RD, NO CMD, NO ADDR, 4 bytes */ - inst->UMA_CTS = UMA_CODE_RD_BYTE(1); - /* wait for UMA to complete */ - while (IS_BIT_SET(inst->UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) - ; - /* Get read transaction results*/ - dst_data[idx] = inst->UMA_DB0; + if (timeout) { + return 0; + } else { + return -ETIMEDOUT; } } -static inline int cros_flash_npcx_wait_busy_bit_clear(const struct device *dev) +/* Check the BUSY bit is cleared and WE bit is set */ +static int cros_flash_npcx_wait_ready_and_we(const struct device *dev) { - struct fiu_reg *const inst = HAL_INSTANCE(dev); int wait_period = 10; /* 10 us period t0 check status register */ int timeout = (10 * USEC_PER_SEC) / wait_period; /* 10 seconds */ do { - /* Read status register */ - inst->UMA_CTS = UMA_CODE_RD_BYTE(1); - while (IS_BIT_SET(inst->UMA_CTS, NPCX_UMA_CTS_EXEC_DONE)) - ; - /* Status bit is clear */ - if ((inst->UMA_DB0 & SPI_NOR_WIP_BIT) == 0) + uint8_t reg; + + cros_flash_npcx_get_status_reg(dev, SPI_NOR_CMD_RDSR, ®); + if ((reg & SPI_NOR_WIP_BIT) == 0 && + (reg & SPI_NOR_WEL_BIT) != 0) break; k_usleep(wait_period); } while (--timeout); /* Wait for busy bit clear */ @@ -166,28 +121,21 @@ static inline int cros_flash_npcx_wait_busy_bit_clear(const struct device *dev) } } -/* cros ec flash local functions */ -static int cros_flash_npcx_wait_ready(const struct device *dev) -{ - int ret = 0; - - /* Drive CS to low */ - cros_flash_npcx_cs_level(dev, 0); - - /* Command for Read status register of flash */ - cros_flash_npcx_exec_cmd(dev, SPI_NOR_CMD_RDSR, UMA_CODE_CMD_ONLY); - /* Wait busy bit is clear */ - ret = cros_flash_npcx_wait_busy_bit_clear(dev); - /* Drive CS to low */ - cros_flash_npcx_cs_level(dev, 1); - - return ret; -} - static int cros_flash_npcx_set_write_enable(const struct device *dev) { - struct fiu_reg *const inst = HAL_INSTANCE(dev); int ret; + uint8_t opcode = SPI_NOR_CMD_WREN; + struct cros_flash_npcx_data *data = DRV_DATA(dev); + + struct spi_buf spi_buf = { + .buf = &opcode, + .len = 1, + }; + + const struct spi_buf_set tx_set = { + .buffers = &spi_buf, + .count = 1, + }; /* Wait for previous operation to complete */ ret = cros_flash_npcx_wait_ready(dev); @@ -195,117 +143,50 @@ static int cros_flash_npcx_set_write_enable(const struct device *dev) return ret; /* Write enable command */ - cros_flash_npcx_exec_cmd(dev, SPI_NOR_CMD_WREN, UMA_CODE_CMD_ONLY); - - /* Wait for flash is not busy */ - ret = cros_flash_npcx_wait_ready(dev); + ret = spi_transceive(data->spi_ctrl_dev, &spi_cfg, &tx_set, NULL); if (ret != 0) return ret; - if ((inst->UMA_DB0 & SPI_NOR_WEL_BIT) != 0) - return 0; - else - return -EINVAL; -} - -static void cros_flash_npcx_burst_write(const struct device *dev, - unsigned int dest_addr, - unsigned int bytes, - const char *src_data) -{ - /* Chip Select down */ - cros_flash_npcx_cs_level(dev, 0); - - /* Set write address */ - cros_flash_npcx_set_address(dev, dest_addr); - /* Start programming */ - cros_flash_npcx_exec_cmd(dev, SPI_NOR_CMD_PP, UMA_CODE_CMD_WR_ADR); - for (int i = 0; i < bytes; i++) { - cros_flash_npcx_exec_cmd(dev, *src_data, UMA_CODE_CMD_WR_ONLY); - src_data++; - } - - /* Chip Select up */ - cros_flash_npcx_cs_level(dev, 1); + /* Wait for flash is not busy */ + return cros_flash_npcx_wait_ready_and_we(dev); } -static int cros_flash_npcx_program_bytes(const struct device *dev, - uint32_t offset, uint32_t bytes, - const uint8_t *src_data) +static int cros_flash_npcx_set_status_reg(const struct device *dev, + uint8_t *data) { - int write_size; + uint8_t opcode = SPI_NOR_CMD_WRSR; int ret = 0; + struct cros_flash_npcx_data *dev_data = DRV_DATA(dev); + + struct spi_buf spi_buf[2] = { + [0] = { + .buf = &opcode, + .len = 1, + }, + [1] = { + .buf = data, + .len = 2, + } + }; - while (bytes > 0) { - /* Write length can not go beyond the end of the flash page */ - write_size = MIN(bytes, - CONFIG_FLASH_WRITE_IDEAL_SIZE - - (offset & - (CONFIG_FLASH_WRITE_IDEAL_SIZE - 1))); - - /* Enable write */ - ret = cros_flash_npcx_set_write_enable(dev); - if (ret != 0) - return ret; - - /* Executr UMA burst write transaction */ - cros_flash_npcx_burst_write(dev, offset, write_size, src_data); - - /* Wait write completed */ - ret = cros_flash_npcx_wait_ready(dev); - if (ret != 0) - return ret; - - src_data += write_size; - offset += write_size; - bytes -= write_size; - } - - return ret; -} - -static int cros_flash_npcx_get_status_reg(const struct device *dev, - char cmd_code, char *data) -{ - int ret = 0; - struct fiu_reg *const inst = HAL_INSTANCE(dev); + const struct spi_buf_set tx_set = { + .buffers = spi_buf, + .count = 2, + }; if (data == 0) { return -EINVAL; } - /* Lock flash interface device during reading status register */ - cros_flash_npcx_mutex_lock(dev); - - cros_flash_npcx_exec_cmd(dev, cmd_code, UMA_CODE_CMD_RD_BYTE(1)); - *data = inst->UMA_DB0; - /* Unlock flash interface device */ - cros_flash_npcx_mutex_unlock(dev); - - return ret; -} - -static int cros_flash_npcx_set_status_reg(const struct device *dev, char *data) -{ - int ret = 0; - struct fiu_reg *const inst = HAL_INSTANCE(dev); - - /* Lock flash interface device */ - cros_flash_npcx_mutex_lock(dev); /* Enable write */ ret = cros_flash_npcx_set_write_enable(dev); if (ret != 0) return ret; - inst->UMA_DB0 = data[0]; - inst->UMA_DB1 = data[1]; - /* Write status register 1/2 */ - cros_flash_npcx_exec_cmd(dev, SPI_NOR_CMD_WRSR, - UMA_CODE_CMD_WR_BYTE(2)); - /* Unlock flash interface device */ - cros_flash_npcx_mutex_unlock(dev); - - return ret; + ret = spi_transceive(dev_data->spi_ctrl_dev, &spi_cfg, &tx_set, NULL); + if (ret != 0) + return ret; + return cros_flash_npcx_wait_ready(dev); } static int cros_flash_npcx_write_protection_set(const struct device *dev, @@ -318,11 +199,7 @@ static int cros_flash_npcx_write_protection_set(const struct device *dev, LOG_ERR("WP can be disabled only via core domain reset "); return -ENOTSUP; } - /* Lock flash interface device */ - cros_flash_npcx_mutex_lock(dev); ret = npcx_pinctrl_flash_write_protect_set(); - /* Unlock flash interface device */ - cros_flash_npcx_mutex_unlock(dev); return ret; } @@ -334,56 +211,53 @@ static int cros_flash_npcx_write_protection_is_set(const struct device *dev) static int cros_flash_npcx_uma_lock(const struct device *dev, bool enable) { - struct fiu_reg *const inst = HAL_INSTANCE(dev); + struct cros_flash_npcx_data *data = DRV_DATA(dev); if (enable) { - inst->UMA_ECTS |= BIT(NPCX_UMA_ECTS_UMA_LOCK); + spi_cfg.operation |= SPI_LOCK_ON; } else { - inst->UMA_ECTS &= ~BIT(NPCX_UMA_ECTS_UMA_LOCK); + spi_cfg.operation &= ~SPI_LOCK_ON; } - return 0; + return spi_transceive(data->spi_ctrl_dev, &spi_cfg, NULL, NULL); } -static int flash_get_status1(const struct device *dev) +static void flash_get_status(const struct device *dev, uint8_t *sr1, + uint8_t *sr2) { - uint8_t reg; - - if (all_protected) - return saved_sr1; + if (all_protected) { + *sr1 = saved_sr1; + *sr2 = saved_sr2; + return; + } /* Lock physical flash operations */ crec_flash_lock_mapped_storage(1); - cros_flash_npcx_get_status_reg(dev, CMD_READ_STATUS_REG, ®); + /* Read status register1 */ + cros_flash_npcx_get_status_reg(dev, SPI_NOR_CMD_RDSR, sr1); + /* Read status register2 */ + cros_flash_npcx_get_status_reg(dev, SPI_NOR_CMD_RDSR2, sr2); /* Unlock physical flash operations */ crec_flash_lock_mapped_storage(0); - - return reg; } -static int flash_get_status2(const struct device *dev) +static int flash_set_status(const struct device *dev, uint8_t sr1, uint8_t sr2) { - uint8_t reg; + int rv; + uint8_t regs[2]; - if (all_protected) - return saved_sr1; + regs[0] = sr1; + regs[1] = sr2; /* Lock physical flash operations */ crec_flash_lock_mapped_storage(1); - - cros_flash_npcx_get_status_reg(dev, CMD_READ_STATUS_REG2, ®); - + rv = cros_flash_npcx_set_status_reg(dev, regs); /* Unlock physical flash operations */ crec_flash_lock_mapped_storage(0); - return reg; -} - -static int flash_write_status_reg(const struct device *dev, uint8_t *data) -{ - return cros_flash_npcx_set_status_reg(dev, data); + return rv; } static int is_int_flash_protected(const struct device *dev) @@ -408,8 +282,7 @@ static void flash_uma_lock(const struct device *dev, int enable) * Store SR1 / SR2 for later use since we're about to lock * out all access (including read access) to these regs. */ - saved_sr1 = flash_get_status1(dev); - saved_sr2 = flash_get_status2(dev); + flash_get_status(dev, &saved_sr1, &saved_sr2); } cros_flash_npcx_uma_lock(dev, enable); @@ -419,8 +292,6 @@ static void flash_uma_lock(const struct device *dev, int enable) static int flash_set_status_for_prot(const struct device *dev, int reg1, int reg2) { - uint8_t regs[2]; - /* * Writing SR regs will fail if our UMA lock is enabled. If WP * is deasserted then remove the lock and allow the write. @@ -444,15 +315,7 @@ static int flash_set_status_for_prot(const struct device *dev, int reg1, flash_protect_int_flash(dev, !gpio_get_level(GPIO_WP_L)); #endif /*_CONFIG_WP_ACTIVE_HIGH_*/ - /* Lock physical flash operations */ - crec_flash_lock_mapped_storage(1); - - regs[0] = reg1; - regs[1] = reg2; - flash_write_status_reg(dev, regs); - - /* Unlock physical flash operations */ - crec_flash_lock_mapped_storage(0); + flash_set_status(dev, reg1, reg2); spi_flash_reg_to_protect(reg1, reg2, &addr_prot_start, &addr_prot_length); @@ -478,14 +341,12 @@ static int flash_check_prot_reg(const struct device *dev, unsigned int offset, flash_protect_int_flash(dev, !gpio_get_level(GPIO_WP_L)); #endif /* CONFIG_WP_ACTIVE_HIGH */ - sr1 = flash_get_status1(dev); - sr2 = flash_get_status2(dev); - /* Invalid value */ if (offset + bytes > CONFIG_FLASH_SIZE_BYTES) return EC_ERROR_INVAL; /* Compute current protect range */ + flash_get_status(dev, &sr1, &sr2); rv = spi_flash_reg_to_protect(sr1, sr2, &start, &len); if (rv) return rv; @@ -501,14 +362,14 @@ static int flash_write_prot_reg(const struct device *dev, unsigned int offset, unsigned int bytes, int hw_protect) { int rv; - uint8_t sr1 = flash_get_status1(dev); - uint8_t sr2 = flash_get_status2(dev); + uint8_t sr1, sr2; /* Invalid values */ if (offset + bytes > CONFIG_FLASH_SIZE_BYTES) return EC_ERROR_INVAL; /* Compute desired protect range */ + flash_get_status(dev, &sr1, &sr2); rv = spi_flash_protect_to_reg(offset, bytes, &sr1, &sr2); if (rv) return rv; @@ -533,17 +394,33 @@ static int flash_check_prot_range(unsigned int offset, unsigned int bytes) return EC_SUCCESS; } +static void flash_set_quad_enable(const struct device *dev, bool enable) +{ + uint8_t sr1, sr2; + + flash_get_status(dev, &sr1, &sr2); + + /* If QE is the same value, return directly. */ + if (!!(sr2 & SPI_FLASH_SR2_QE) == enable) + return; + + if (enable) + sr2 |= SPI_FLASH_SR2_QE; + else + sr2 &= ~SPI_FLASH_SR2_QE; + flash_set_status(dev, sr1, sr2); +} + /* cros ec flash api functions */ static int cros_flash_npcx_init(const struct device *dev) { - const struct cros_flash_npcx_config *const config = DRV_CONFIG(dev); - struct cros_flash_npcx_data *data = DRV_DATA(dev); - - /* initialize mutux for flash interface controller */ - k_sem_init(&data->lock_sem, 1, 1); + /* Initialize UMA to unlocked */ + flash_uma_lock(dev, 0); - /* Configure pin-mux for FIU device */ - npcx_pinctrl_mux_configure(config->alts_list, config->alts_size, 1); + /* + * Disable flash quad enable to avoid /WP pin function is not + * available. */ + flash_set_quad_enable(dev, false); /* * Protect status registers of internal spi-flash if WP# is active @@ -555,45 +432,23 @@ static int cros_flash_npcx_init(const struct device *dev) flash_protect_int_flash(dev, !gpio_get_level(GPIO_WP_L)); #endif /*CONFIG_WP_ACTIVE_HIGH */ - /* Initialize UMA to unlocked */ - flash_uma_lock(dev, 0); - return 0; } +/* TODO(b/205175314): Migrate cros-flash driver to Zephyr flash driver) */ static int cros_flash_npcx_read(const struct device *dev, int offset, int size, char *dst_data) { - int ret = 0; - - /* Unlock flash interface device during reading flash */ - cros_flash_npcx_mutex_lock(dev); - - /* Chip Select down */ - cros_flash_npcx_cs_level(dev, 0); - - /* Set read address */ - cros_flash_npcx_set_address(dev, offset); - /* Start with fast read command (skip one dummy byte) */ - cros_flash_npcx_exec_cmd(dev, SPI_NOR_CMD_FAST_READ, - UMA_CODE_CMD_ADR_WR_BYTE(1)); - /* Execute burst read */ - cros_flash_npcx_burst_read(dev, dst_data, size); - - /* Chip Select up */ - cros_flash_npcx_cs_level(dev, 1); - - /* Unlock flash interface device */ - cros_flash_npcx_mutex_unlock(dev); + struct cros_flash_npcx_data *data = DRV_DATA(dev); - return ret; + return flash_read(data->flash_dev, offset, dst_data, size); } static int cros_flash_npcx_write(const struct device *dev, int offset, int size, const char *src_data) { - struct cros_flash_npcx_data *const data = DRV_DATA(dev); int ret = 0; + struct cros_flash_npcx_data *data = DRV_DATA(dev); /* check protection */ if (all_protected) @@ -603,47 +458,20 @@ static int cros_flash_npcx_write(const struct device *dev, int offset, int size, if (flash_check_prot_range(offset, size)) return EC_ERROR_ACCESS_DENIED; - /* Is write protection enabled? */ - if (data->write_protectied) { - return -EACCES; - } - /* Invalid data pointer? */ if (src_data == 0) { return -EINVAL; } - /* Unlock flash interface device during writing flash */ - cros_flash_npcx_mutex_lock(dev); - - while (size > 0) { - /* First write multiples of 256, then (size % 256) last */ - int write_len = - ((size % CONFIG_FLASH_WRITE_IDEAL_SIZE) == size) ? - size : - CONFIG_FLASH_WRITE_IDEAL_SIZE; - - ret = cros_flash_npcx_program_bytes(dev, offset, write_len, - src_data); - if (ret != 0) - break; - - src_data += write_len; - offset += write_len; - size -= write_len; - } - - /* Unlock flash interface device */ - cros_flash_npcx_mutex_unlock(dev); + ret = flash_write(data->flash_dev, offset, src_data, size); return ret; } static int cros_flash_npcx_erase(const struct device *dev, int offset, int size) { - const struct cros_flash_npcx_config *const config = DRV_CONFIG(dev); - struct cros_flash_npcx_data *const data = DRV_DATA(dev); int ret = 0; + struct cros_flash_npcx_data *data = DRV_DATA(dev); /* check protection */ if (all_protected) @@ -653,18 +481,6 @@ static int cros_flash_npcx_erase(const struct device *dev, int offset, int size) if (flash_check_prot_range(offset, size)) return EC_ERROR_ACCESS_DENIED; - /* Is write protection enabled? */ - if (data->write_protectied) { - return -EACCES; - } - /* affected region should be within device */ - if (offset < 0 || (offset + size) > config->size) { - LOG_ERR("Flash erase address or size exceeds expected values. " - "Addr: 0x%lx size %zu", - (long)offset, size); - return -EINVAL; - } - /* address must be aligned to erase size */ if ((offset % CONFIG_FLASH_ERASE_SIZE) != 0) { return -EINVAL; @@ -675,32 +491,7 @@ static int cros_flash_npcx_erase(const struct device *dev, int offset, int size) return -EINVAL; } - /* Unlock flash interface device during erasing flash */ - cros_flash_npcx_mutex_lock(dev); - - /* Alignment has been checked in upper layer */ - for (; size > 0; size -= CONFIG_FLASH_ERASE_SIZE, - offset += CONFIG_FLASH_ERASE_SIZE) { - - /* Enable write */ - ret = cros_flash_npcx_set_write_enable(dev); - if (ret != 0) - break; - - /* Set erase address */ - cros_flash_npcx_set_address(dev, offset); - /* Start erasing */ - cros_flash_npcx_exec_cmd(dev, SPI_NOR_CMD_BE, UMA_CODE_CMD_ADR); - - /* Wait erase completed */ - ret = cros_flash_npcx_wait_ready(dev); - if (ret != 0) { - break; - } - } - - /* Unlock flash interface device */ - cros_flash_npcx_mutex_unlock(dev); + ret = flash_erase(data->flash_dev, offset, size); return ret; } @@ -715,17 +506,28 @@ static int cros_flash_npcx_get_protect(const struct device *dev, int bank) static uint32_t cros_flash_npcx_get_protect_flags(const struct device *dev) { uint32_t flags = 0; + int rv; + uint8_t sr1, sr2; + unsigned int start, len; /* Check if WP region is protected in status register */ - if (flash_check_prot_reg(dev, WP_BANK_OFFSET * CONFIG_FLASH_BANK_SIZE, - WP_BANK_COUNT * CONFIG_FLASH_BANK_SIZE)) + rv = flash_check_prot_reg(dev, WP_BANK_OFFSET * CONFIG_FLASH_BANK_SIZE, + WP_BANK_COUNT * CONFIG_FLASH_BANK_SIZE); + if (rv == EC_ERROR_ACCESS_DENIED) flags |= EC_FLASH_PROTECT_RO_AT_BOOT; + else if (rv) + return EC_FLASH_PROTECT_ERROR_UNKNOWN; /* - * TODO: If status register protects a range, but SRP0 is not set, + * If the status register protects a range, but SRP0 is not set, + * or Quad Enable (QE) is set, * flags should indicate EC_FLASH_PROTECT_ERROR_INCONSISTENT. */ - if (flag_prot_inconsistent) + flash_get_status(dev, &sr1, &sr2); + rv = spi_flash_reg_to_protect(sr1, sr2, &start, &len); + if (rv) + return EC_FLASH_PROTECT_ERROR_UNKNOWN; + if (len && (!(sr1 & SPI_FLASH_SR1_SRP0) || (sr2 & SPI_FLASH_SR2_QE))) flags |= EC_FLASH_PROTECT_ERROR_INCONSISTENT; /* Read all-protected state from our shadow copy */ @@ -775,33 +577,31 @@ static int cros_flash_npcx_protect_now(const struct device *dev, int all) } static int cros_flash_npcx_get_jedec_id(const struct device *dev, - uint8_t *manufacturer, - uint16_t *device) + uint8_t *manufacturer, uint16_t *device) { - struct fiu_reg *const inst = HAL_INSTANCE(dev); + int ret; + uint8_t jedec_id[3]; + struct cros_flash_npcx_data *data = DRV_DATA(dev); /* Lock physical flash operations */ crec_flash_lock_mapped_storage(1); - /* Read manufacturer and device ID */ - cros_flash_npcx_exec_cmd(dev, - SPI_NOR_CMD_RDID, - UMA_CODE_CMD_RD_BYTE(3)); - - *manufacturer = inst->UMA_DB0; - *device = (inst->UMA_DB1 << 8) | inst->UMA_DB2; + ret = flash_read_jedec_id(data->flash_dev, jedec_id); + if (ret == 0) { + *manufacturer = jedec_id[0]; + *device = (jedec_id[1] << 8) | jedec_id[2]; + } /* Unlock physical flash operations */ crec_flash_lock_mapped_storage(0); - return EC_SUCCESS; + return ret; } -static int cros_flash_npcx_get_status(const struct device *dev, - uint8_t *sr1, uint8_t *sr2) +static int cros_flash_npcx_get_status(const struct device *dev, uint8_t *sr1, + uint8_t *sr2) { - *sr1 = flash_get_status1(dev); - *sr2 = flash_get_status2(dev); + flash_get_status(dev, sr1, sr2); return EC_SUCCESS; } @@ -822,34 +622,28 @@ static const struct cros_flash_driver_api cros_flash_npcx_driver_api = { static int flash_npcx_init(const struct device *dev) { - const struct cros_flash_npcx_config *const config = DRV_CONFIG(dev); - const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); + struct cros_flash_npcx_data *data = DRV_DATA(dev); - int ret; + data->flash_dev = DEVICE_DT_GET(FLASH_DEV); + if (!device_is_ready(data->flash_dev)) { + LOG_ERR("%s device not ready", data->flash_dev->name); + return -ENODEV; + } - /* Turn on device clock first and get source clock freq. */ - ret = clock_control_on(clk_dev, - (clock_control_subsys_t *)&config->clk_cfg); - if (ret < 0) { - LOG_ERR("Turn on FIU clock fail %d", ret); - return ret; + data->spi_ctrl_dev = DEVICE_DT_GET(SPI_CONTROLLER_DEV); + if (!device_is_ready(data->spi_ctrl_dev)) { + LOG_ERR("%s device not ready", data->spi_ctrl_dev->name); + return -ENODEV; } - return ret; + return EC_SUCCESS; } -static const struct npcx_alt cros_flash_alts[] = NPCX_DT_ALT_ITEMS_LIST(0); -static const struct cros_flash_npcx_config cros_flash_cfg = { - .base = DT_INST_REG_ADDR(0), - .clk_cfg = NPCX_DT_CLK_CFG_ITEM(0), - .size = DT_INST_REG_SIZE(0), - .alts_size = ARRAY_SIZE(cros_flash_alts), - .alts_list = cros_flash_alts, -}; - +#if CONFIG_CROS_FLASH_NPCX_INIT_PRIORITY <= CONFIG_SPI_NOR_INIT_PRIORITY +#error "CONFIG_CROS_FLASH_NPCX_INIT_PRIORITY must be greater than" \ + "CONFIG_SPI_NOR_INIT_PRIORITY." +#endif static struct cros_flash_npcx_data cros_flash_data; - -DEVICE_DT_INST_DEFINE(0, flash_npcx_init, NULL, &cros_flash_data, - &cros_flash_cfg, PRE_KERNEL_1, - CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, +DEVICE_DT_INST_DEFINE(0, flash_npcx_init, NULL, &cros_flash_data, NULL, + POST_KERNEL, CONFIG_CROS_FLASH_NPCX_INIT_PRIORITY, &cros_flash_npcx_driver_api); diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c index 522d48ff09..64753e0833 100644 --- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c +++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c @@ -91,9 +91,9 @@ BUILD_ASSERT(ARRAY_SIZE(spi_response_state) == SPI_STATE_COUNT); static void spi_set_state(int state) { - /* SPI slave state machine */ + /* SPI peripheral state machine */ shi_state = state; - /* Response spi slave state */ + /* Response spi peripheral state */ IT83XX_SPI_SPISRDR = spi_response_state[state]; } @@ -142,12 +142,12 @@ static void spi_response_host_data(uint8_t *out_msg_addr, int tx_size) /* * After writing data to Tx FIFO is finished, this bit will - * be to indicate the SPI slave controller. + * be to indicate the SPI peripheral controller. */ IT83XX_SPI_TXFCR = IT83XX_SPI_TXFS; /* End Tx FIFO access */ IT83XX_SPI_TXRXFAR = 0; - /* SPI slave read Tx FIFO */ + /* SPI peripheral read Tx FIFO */ IT83XX_SPI_FCR = IT83XX_SPI_SPISRTXF; } @@ -356,7 +356,7 @@ static int cros_shi_ite_init(const struct device *dev) spi_set_state(SPI_STATE_READY_TO_RECV); /* Interrupt status register(write one to clear) */ IT83XX_SPI_ISR = 0xff; - /* SPI slave controller enable (after settings are ready) */ + /* SPI peripheral controller enable (after settings are ready) */ IT83XX_SPI_SPISGCR = IT83XX_SPI_SPISCEN; /* Ensure spi chip select alt function is enabled. */ @@ -365,7 +365,7 @@ static int cros_shi_ite_init(const struct device *dev) config[i].alt_fun); } - /* Enable SPI slave interrupt */ + /* Enable SPI peripheral interrupt */ IRQ_CONNECT(DT_INST_IRQN(0), 0, shi_ite_int_handler, 0, 0); irq_enable(DT_INST_IRQN(0)); diff --git a/zephyr/dts/bindings/adc/named-adc.yaml b/zephyr/dts/bindings/adc/named-adc.yaml index 6f06d73b86..11df44f8d9 100644 --- a/zephyr/dts/bindings/adc/named-adc.yaml +++ b/zephyr/dts/bindings/adc/named-adc.yaml @@ -97,6 +97,10 @@ child-binding: - ADC_TEMP_SENSOR_DDR_SOC - ADC_TEMP_SENSOR_FAN - ADC_TEMP_SENSOR_PP3300_REGULATOR + - ADC_TEMP_SENSOR_1_DDR_SOC + - ADC_TEMP_SENSOR_2_AMBIENT + - ADC_TEMP_SENSOR_3_CHARGER + - ADC_TEMP_SENSOR_4_WWAN - ADC_VBUS - ADC_VBUS_C0 - ADC_VBUS_C1 diff --git a/zephyr/dts/bindings/cros_flash/nuvoton,npcx-cros-flash.yaml b/zephyr/dts/bindings/cros_flash/nuvoton,npcx-cros-flash.yaml index 139a6c6a9b..f67bf1fe5c 100644 --- a/zephyr/dts/bindings/cros_flash/nuvoton,npcx-cros-flash.yaml +++ b/zephyr/dts/bindings/cros_flash/nuvoton,npcx-cros-flash.yaml @@ -6,15 +6,3 @@ description: Nuvoton, NPCX-cros-flash node compatible: "nuvoton,npcx-cros-flash" include: cros-flash-controller.yaml - -properties: - reg: - required: true - - clocks: - required: true - - pinctrl-0: - type: phandles - required: true - description: configurations of pinmux controllers diff --git a/zephyr/dts/bindings/cros_pwr_signal/mt8192,power-signal-list.yaml b/zephyr/dts/bindings/cros_pwr_signal/mt8192,power-signal-list.yaml new file mode 100644 index 0000000000..b1dedb76c8 --- /dev/null +++ b/zephyr/dts/bindings/cros_pwr_signal/mt8192,power-signal-list.yaml @@ -0,0 +1,19 @@ +# Copyright 2021 Google LLC +# SPDX-License-Identifier: Apache-2.0 + +description: MediaTek, Power Signal List +compatible: "mt8192,power-signal-list" + +include: power-signal-list.yaml + +properties: + power-signals-required: + default: 3 + +child-binding: + properties: + power-enum-name: + enum: + - AP_IN_S3_L + - AP_WDT_ASSERTED + - PMIC_PWR_GOOD diff --git a/zephyr/dts/bindings/cros_pwr_signal/power-signal-list.yaml b/zephyr/dts/bindings/cros_pwr_signal/power-signal-list.yaml new file mode 100644 index 0000000000..89ad4f5d5e --- /dev/null +++ b/zephyr/dts/bindings/cros_pwr_signal/power-signal-list.yaml @@ -0,0 +1,24 @@ +# Copyright 2021 Google LLC +# SPDX-License-Identifier: Apache-2.0 + +description: Power Signal List + +properties: + power-signals-required: + description: + Number of power-signal children there should be for the current AP + type: int + +child-binding: + description: Power Signal List child node + properties: + power-gpio-pin: + description: + PHandle to the associated GPIO + type: phandle + required: true + power-enum-name: + description: + Enumeration values for power-signal-list + type: string + required: true diff --git a/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml b/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml new file mode 100644 index 0000000000..e2d45ca52f --- /dev/null +++ b/zephyr/dts/bindings/emul/cros,ps8xxx-emul.yaml @@ -0,0 +1,38 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Zephyr PS8xxx emulator + +compatible: "cros,ps8xxx-emul" + +include: base.yaml + +properties: + tcpci-i2c: + type: phandle + required: true + description: + Base TCPCI emulator. Has to be sibling of PS8xxx emulator. + + p0-i2c-addr: + type: int + required: true + description: + First hidden I2C address (PS8xxx emulator will register device with + that address) + + p1-i2c-addr: + type: int + required: true + description: + Second hidden I2C address (PS8xxx emulator will register device with + that address) + + gpio-i2c-addr: + type: int + required: false + default: 0 + description: + GPIO I2C address. When set to zero GPIO I2C device is not registered + by PS8xxx emulator. diff --git a/zephyr/dts/bindings/emul/cros,tcpci-emul.yaml b/zephyr/dts/bindings/emul/cros,tcpci-emul.yaml index 11be7cf4d8..3b218acd62 100644 --- a/zephyr/dts/bindings/emul/cros,tcpci-emul.yaml +++ b/zephyr/dts/bindings/emul/cros,tcpci-emul.yaml @@ -7,3 +7,10 @@ description: Zephyr TCPCI Emulator compatible: "cros,tcpci-emul" include: base.yaml + +properties: + alert_gpio: + type: phandle + required: false + description: + Reference to Alert# GPIO. diff --git a/zephyr/dts/bindings/emul/zephyr,syv682x.yaml b/zephyr/dts/bindings/emul/zephyr,syv682x.yaml index 75de7cf743..8652b42b82 100644 --- a/zephyr/dts/bindings/emul/zephyr,syv682x.yaml +++ b/zephyr/dts/bindings/emul/zephyr,syv682x.yaml @@ -7,3 +7,13 @@ description: Zephyr SYV682X Emulator compatible: "zephyr,syv682x-emul" include: base.yaml + +properties: + frs_en_gpio: + type: phandle + description: The GPIO that controls FRS enable on this device + required: true + alert_gpio: + type: phandle + description: The GPIO that receives the alert signal from this device + required: true diff --git a/zephyr/dts/bindings/gpio/cros,ioex-chip.yaml b/zephyr/dts/bindings/gpio/cros,ioex-chip.yaml new file mode 100644 index 0000000000..8ab297b035 --- /dev/null +++ b/zephyr/dts/bindings/gpio/cros,ioex-chip.yaml @@ -0,0 +1,50 @@ +description: IEOX chip definition + +compatible: "cros,ioex-chip" + +include: [base.yaml] + +properties: + i2c-port: + type: phandle + description: + Handle to the i2c named-port containing the IO expander chip + + i2c-addr: + type: int + required: true + description: + I2C address of chip + + flags: + type: int + required: true + description: + Value which represents IOEX_FLAGS_* or other internal flags + for IO expander chip. + + drv: + type: string + required: true + description: + CrOS EC driver used to communicate with chip + enum: + - "ccgxxf_ioexpander_drv" + - "it8801_ioexpander_drv" + - "nct38xx_ioexpander_drv" + - "pca9675_ioexpander_drv" + - "pcal6408_ioexpander_drv" + - "tca64xxa_ioexpander_drv" + + int-gpios: + type: phandle-array + required: false + description: + GPIO connected to the interrupt output signal of IO expander chip + + "#address-cells": + required: true + const: 1 + "#size-cells": + required: true + const: 0
\ No newline at end of file diff --git a/zephyr/dts/bindings/gpio/cros,ioex-port.yaml b/zephyr/dts/bindings/gpio/cros,ioex-port.yaml new file mode 100644 index 0000000000..bde3fde1ac --- /dev/null +++ b/zephyr/dts/bindings/gpio/cros,ioex-port.yaml @@ -0,0 +1,26 @@ +description: IEOX port definition + +compatible: "cros,ioex-port" + +include: [gpio-controller.yaml, base.yaml] + +properties: + reg: + required: true + description: + Number of port within IO expander + + "#gpio-cells": + required: true + const: 2 + description: + Number of parameters describing the pin + + ngpios: + required: true + description: + Number of pins per port + +gpio-cells: + - pin + - flags
\ No newline at end of file diff --git a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml index 2c2447d57d..2bc19d3ec4 100644 --- a/zephyr/dts/bindings/gpio/gpio-enum-name.yaml +++ b/zephyr/dts/bindings/gpio/gpio-enum-name.yaml @@ -8,8 +8,10 @@ properties: - GPIO_ACCEL_GYRO_INT_L - GPIO_AC_PRESENT - GPIO_ALS_RGB_INT_ODL + - GPIO_AP_EC_SYSRST_ODL - GPIO_AP_EC_WARM_RST_REQ - GPIO_AP_EC_WATCHDOG_L + - GPIO_AP_EC_WDTRST_L - GPIO_AP_IN_SLEEP_L - GPIO_AP_RST_L - GPIO_AP_SUSPEND @@ -31,15 +33,14 @@ properties: - GPIO_DP_MUX_SEL - GPIO_EC_ACCEL_INT - GPIO_EC_ALS_RGB_INT_L + - GPIO_EC_AP_DP_HPD_ODL - GPIO_EC_BL_EN_OD - - GPIO_EC_CHG_LED_W_C0 - - GPIO_EC_CHG_LED_Y_C0 - GPIO_EC_CHG_LED_B_C1 + - GPIO_EC_CHG_LED_W_C0 - GPIO_EC_CHG_LED_W_C1 + - GPIO_EC_CHG_LED_Y_C0 - GPIO_EC_CHG_LED_Y_C1 - GPIO_EC_DPBRDG_HPD_ODL - - GPIO_EC_I2C_SENSOR_SCL - - GPIO_EC_I2C_SENSOR_SDA - GPIO_EC_I2C0_SENSOR_SCL - GPIO_EC_I2C0_SENSOR_SDA - GPIO_EC_I2C1_USB_C0_SCL @@ -52,6 +53,8 @@ properties: - GPIO_EC_I2C5_BATTERY_SDA - GPIO_EC_I2C7_EEPROM_PWR_SCL_R - GPIO_EC_I2C7_EEPROM_PWR_SDA_R + - GPIO_EC_I2C_SENSOR_SCL + - GPIO_EC_I2C_SENSOR_SDA - GPIO_EC_IMU_INT_L - GPIO_EC_INT_L - GPIO_EC_PCH_SYS_PWROK @@ -65,34 +68,44 @@ properties: - GPIO_EC_WP_L - GPIO_EC_X_GPIO1 - GPIO_EC_X_GPIO3 + - GPIO_ENABLE_BACKLIGHT + - GPIO_ENTERING_RW - GPIO_EN_5V_USM - GPIO_EN_A_RAILS - GPIO_EN_EC_ID_ODL + - GPIO_EN_KEYBOARD_BACKLIGHT - GPIO_EN_PP3000_SD_U - GPIO_EN_PP3000_VMC_PMU - GPIO_EN_PP3300_A - GPIO_EN_PP5000 - GPIO_EN_PP5000_A - GPIO_EN_PP5000_FAN - - GPIO_EN_PP5000_USB_A0_VBUS - GPIO_EN_PP5000_USBA + - GPIO_EN_PP5000_USB_A0_VBUS + - GPIO_EN_PP5000_Z2 - GPIO_EN_PPVAR_VCCIN - GPIO_EN_PWR_A - GPIO_EN_PWR_PCORE_S0_R - GPIO_EN_PWR_S0_R + - GPIO_EN_S5_RAILS - GPIO_EN_SLP_Z + - GPIO_EN_ULP - GPIO_EN_USB_A_5V - - GPIO_ENABLE_BACKLIGHT - - GPIO_ENTERING_RW + - GPIO_HDMI_PRSNT_ODL - GPIO_HIBERNATE_L + - GPIO_I2C_A_SCL + - GPIO_I2C_A_SDA - GPIO_I2C_B_SCL - GPIO_I2C_B_SDA - GPIO_I2C_C_SCL - GPIO_I2C_C_SDA + - GPIO_I2C_D_SCL + - GPIO_I2C_D_SDA - GPIO_I2C_E_SCL - GPIO_I2C_E_SDA - GPIO_I2C_F_SCL - GPIO_I2C_F_SDA + - GPIO_IMVP9_VRRDY_OD - GPIO_KBD_KSO2 - GPIO_LID_ACCEL_INT_L - GPIO_LID_OPEN @@ -100,6 +113,7 @@ properties: - GPIO_PACKET_MODE_EN - GPIO_PCH_DSW_PWROK - GPIO_PCH_PWRBTN_L + - GPIO_PCH_PWROK - GPIO_PCH_RSMRST_L - GPIO_PCH_RTCRST - GPIO_PCH_SLP_S0_L @@ -108,16 +122,16 @@ properties: - GPIO_PCH_SLP_S5_L - GPIO_PCH_SLP_SUS_L - GPIO_PCH_SYS_PWROK + - GPIO_PGOOD_FAN - GPIO_PG_EC_ALL_SYS_PWRGD - GPIO_PG_EC_DSW_PWROK - GPIO_PG_EC_RSMRST_ODL - GPIO_PG_GROUPC_S0_OD - GPIO_PG_LPDDR4X_S3_OD - - GPIO_PG_MT6360_ODL - GPIO_PG_MT6315_GPU_ODL - GPIO_PG_MT6315_PROC_ODL + - GPIO_PG_MT6360_ODL - GPIO_PG_PP5000_A_ODL - - GPIO_PGOOD_FAN - GPIO_PMIC_EC_PWRGD - GPIO_PMIC_KPD_PWR_ODL - GPIO_PMIC_RESIN_L @@ -133,11 +147,11 @@ properties: - GPIO_SKU_ID1 - GPIO_SKU_ID2 - GPIO_SLP_SUS_L + - GPIO_SPI0_CS - GPIO_SPI_CLK_GPG6 - GPIO_SPI_CS_GPG7 - GPIO_SPI_MISO_GPG5 - GPIO_SPI_MOSI_GPG4 - - GPIO_SPI0_CS - GPIO_SWITCHCAP_ON - GPIO_SWITCHCAP_ON_L - GPIO_SWITCHCAP_PG @@ -146,20 +160,27 @@ properties: - GPIO_SYS_RST_ODL - GPIO_TABLET_MODE_L - GPIO_TRACKPAD_INT_GATE - - GPIO_USB_A_LOW_PWR_OD - GPIO_USB_A0_FAULT_ODL - GPIO_USB_A0_OC_ODL + - GPIO_USB_A_LOW_PWR_OD - GPIO_USB_C0_BC12_INT_L - GPIO_USB_C0_BC12_INT_ODL + - GPIO_USB_C0_C1_FAULT_ODL + - GPIO_USB_C0_DP_HPD - GPIO_USB_C0_FRS_EN - GPIO_USB_C0_OC_ODL - GPIO_USB_C0_PD_INT_ODL - GPIO_USB_C0_PD_RST_L + - GPIO_USB_C0_PPC_BC12_INT_ODL + - GPIO_USB_C0_PPC_FRSINFO - GPIO_USB_C0_PPC_INT_ODL - GPIO_USB_C0_SWCTL_INT_ODL - GPIO_USB_C0_TCPC_INT_ODL + - GPIO_USB_C0_TCPC_RST_L + - GPIO_USB_C1_BC12_CHARGER_INT_ODL - GPIO_USB_C1_BC12_INT_L - GPIO_USB_C1_BC12_INT_ODL + - GPIO_USB_C1_DP_HPD - GPIO_USB_C1_FRS_EN - GPIO_USB_C1_LS_EN - GPIO_USB_C1_MIX_INT_ODL @@ -170,6 +191,8 @@ properties: - GPIO_USB_C1_RT_RST_ODL - GPIO_USB_C1_SWCTL_INT_ODL - GPIO_USB_C1_TCPC_INT_ODL + - GPIO_USB_C1_TCPC_RST_L + - GPIO_VCCST_PWRGD_OD - GPIO_VBOB_EN - GPIO_VOLUME_DOWN_L - GPIO_VOLUME_UP_L diff --git a/zephyr/dts/bindings/gpio/ioex-enum-name.yaml b/zephyr/dts/bindings/gpio/ioex-enum-name.yaml new file mode 100644 index 0000000000..8c920c9114 --- /dev/null +++ b/zephyr/dts/bindings/gpio/ioex-enum-name.yaml @@ -0,0 +1,129 @@ +description: Named IOEXes parent node +properties: + enum-name: + type: string + description: + Names used for IO expanders pins + enum: + - IOEX_5V_DC_DC_MODE_CTRL + - IOEX_ATMEL_MISO + - IOEX_ATMEL_MOSI + - IOEX_ATMEL_RESET_L + - IOEX_ATMEL_SCLK + - IOEX_ATMEL_SS + - IOEX_BAT_LED_AMBER_L + - IOEX_BAT_LED_GREEN_FULL_L + - IOEX_BAT_LED_RED_L + - IOEX_BAT_LED_WHITE_L + - IOEX_BOARD_ID_DET0 + - IOEX_BOARD_ID_DET1 + - IOEX_BOARD_ID_DET2 + - IOEX_C1_CHARGER_LED_AMBER_DB + - IOEX_C1_CHARGER_LED_WHITE_DB + - IOEX_DAC_BUF1_LATCH_FAULT_L + - IOEX_DAC_BUF2_LATCH_FAULT_L + - IOEX_DONGLE_DET + - IOEX_DUT_CHG_EN + - IOEX_EN_PP3300_DP + - IOEX_EN_PP3300_ETH + - IOEX_EN_PP5000_ALT_3P3 + - IOEX_EN_PP5000_USB_A0_VBUS + - IOEX_EN_PP5000_USB_A1_VBUS_DB + - IOEX_EN_PWR_HDMI + - IOEX_EN_PWR_HDMI_DB + - IOEX_EN_USB_A0_5V + - IOEX_EN_USB_A1_5V_DB + - IOEX_EN_USB_A1_5V_DB_OPT1 + - IOEX_EN_USB_A1_5V_DB_OPT2 + - IOEX_EN_VOUT_BUF_CC1 + - IOEX_EN_VOUT_BUF_CC2 + - IOEX_FAULT_CLEAR_CC + - IOEX_HDMI_DATA_EN + - IOEX_HDMI_DATA_EN_DB + - IOEX_HDMI_POWER_EN_DB + - IOEX_HOST_CHRG_DET + - IOEX_HOST_OR_CHG_CTL + - IOEX_ID_1_USB_C0_FRS_EN + - IOEX_ID_1_USB_C0_OC_ODL + - IOEX_ID_1_USB_C0_RT_RST_ODL + - IOEX_ID_1_USB_C1_OC_ODL + - IOEX_ID_1_USB_C2_FRS_EN + - IOEX_ID_1_USB_C2_OC_ODL + - IOEX_ID_1_USB_C2_RT_RST_ODL + - IOEX_KB_BL_EN + - IOEX_LED_BLUE + - IOEX_LED_GREEN + - IOEX_LED_ORANGE + - IOEX_PP3300_DP_FAULT_L + - IOEX_PP5000_SRC_SEL + - IOEX_PPC_ID + - IOEX_PWR_LED_WHITE_L + - IOEX_SBU_FLIP_SEL + - IOEX_SBU_UART_SEL + - IOEX_SYS_PWR_IRQ_ODL + - IOEX_TCA_GPIO_DBG_LED_K_ODL + - IOEX_UART_18_SEL + - IOEX_USB3_A0_FAULT_L + - IOEX_USB3_A0_MUX_EN_L + - IOEX_USB3_A0_MUX_SEL + - IOEX_USB3_A0_PWR_EN + - IOEX_USB3_A1_FAULT_L + - IOEX_USB3_A1_MUX_SEL + - IOEX_USB3_A1_PWR_EN + - IOEX_USB_A0_CHARGE_EN_L + - IOEX_USB_A0_LIMIT_SDP + - IOEX_USB_A0_RETIMER_EN + - IOEX_USB_A0_RETIMER_RST + - IOEX_USB_A1_CHARGE_EN_DB_L + - IOEX_USB_A1_CHARGE_EN_DB_L_OPT1 + - IOEX_USB_A1_CHARGE_EN_DB_L_OPT2 + - IOEX_USB_A1_LIMIT_SDP_DB + - IOEX_USB_A1_RETIMER_EN + - IOEX_USB_A1_RETIMER_EN_OPT1 + - IOEX_USB_A1_RETIMER_EN_OPT2 + - IOEX_USB_A1_RETIMER_RST + - IOEX_USB_A1_RETIMER_RST_DB + - IOEX_USB_C0_BB_RETIMER_LS_EN + - IOEX_USB_C0_BB_RETIMER_RST + - IOEX_USB_C0_C1_OC + - IOEX_USB_C0_DATA_EN + - IOEX_USB_C0_FAULT_ODL + - IOEX_USB_C0_FRS_EN + - IOEX_USB_C0_OC_ODL + - IOEX_USB_C0_PPC_EN_L + - IOEX_USB_C0_PPC_ILIM_3A_EN + - IOEX_USB_C0_RT_RST_ODL + - IOEX_USB_C0_SBU_FLIP + - IOEX_USB_C0_TCPC_FASTSW_CTL_EN + - IOEX_USB_C0_USB_MUX_CNTRL_0 + - IOEX_USB_C0_USB_MUX_CNTRL_1 + - IOEX_USB_C1_BB_RETIMER_LS_EN + - IOEX_USB_C1_BB_RETIMER_RST + - IOEX_USB_C1_DATA_EN + - IOEX_USB_C1_FAULT_ODL + - IOEX_USB_C1_FRS_EN + - IOEX_USB_C1_HPD_IN_DB + - IOEX_USB_C1_IN_HPD + - IOEX_USB_C1_MUX_RST_DB + - IOEX_USB_C1_OC_ODL + - IOEX_USB_C1_POWER_SWITCH_ID + - IOEX_USB_C1_PPC_EN_L + - IOEX_USB_C1_PPC_ILIM_3A_EN + - IOEX_USB_C1_RT_RST_ODL + - IOEX_USB_C1_TCPC_FASTSW_CTL_EN + - IOEX_USB_C2_BB_RETIMER_LS_EN + - IOEX_USB_C2_BB_RETIMER_RST + - IOEX_USB_C2_C3_OC + - IOEX_USB_C2_FRS_EN + - IOEX_USB_C2_OC_ODL + - IOEX_USB_C2_RT_RST_ODL + - IOEX_USB_C2_USB_MUX_CNTRL_0 + - IOEX_USB_C2_USB_MUX_CNTRL_1 + - IOEX_USB_C3_BB_RETIMER_LS_EN + - IOEX_USB_C3_BB_RETIMER_RST + - IOEX_USB_DUTCHG_FLT_ODL + - IOEX_USBH_PWRDN_L + - IOEX_USERVO_FASTBOOT_MUX_SEL + - IOEX_USERVO_FAULT_L + - IOEX_USERVO_POWER_EN + - IOEX_VBUS_DISCHRG_EN diff --git a/zephyr/dts/bindings/gpio/named-ioexes.yaml b/zephyr/dts/bindings/gpio/named-ioexes.yaml new file mode 100644 index 0000000000..8fc2c022c0 --- /dev/null +++ b/zephyr/dts/bindings/gpio/named-ioexes.yaml @@ -0,0 +1,21 @@ +description: Named IOEXes parent node + +compatible: "named-ioexes" + +child-binding: + description: Named IOEXes child node + include: ioex-enum-name.yaml + properties: + gpios: + type: phandle-array + required: true + label: + required: true + type: string + description: | + Human readable string describing the net name connected + to the I/O expander pin. + "#gpio-cells": + type: int + required: false + const: 0 diff --git a/zephyr/dts/bindings/gpio_led/cros-ec,gpio-led-colors.yaml b/zephyr/dts/bindings/gpio_led/cros-ec,gpio-led-colors.yaml new file mode 100644 index 0000000000..35a0e2de2d --- /dev/null +++ b/zephyr/dts/bindings/gpio_led/cros-ec,gpio-led-colors.yaml @@ -0,0 +1,63 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: GPIO LED colors parent node + +compatible: "cros-ec,gpio-led-colors" + +child-binding: + description: LED Color nodes + properties: + charge-state: + description: If the LED color depends on charge state, this + property is used to describe it. + type: string + required: false + enum: + - PWR_STATE_CHARGE + - PWR_STATE_DISCHARGE + - PWR_STATE_ERROR + - PWR_STATE_IDLE + - PWR_STATE_CHARGE_NEAR_FULL + + chipset-state: + description: If the LED color depends on chipset state, this + property is used to describe it. + type: string + required: false + enum: + - POWER_S0 + - POWER_S3 + - POWER_S5 + + extra-flag: + description: If the LED color depends on additional factors + type: string + required: false + enum: + - NONE + - LED_CHFLAG_FORCE_IDLE + - LED_CHFLAG_DEFAULT + - LED_BATT_BELOW_10_PCT + - LED_BATT_ABOVE_10_PCT + + child-binding: + description: Color enum + properties: + led-color: + type: string + required: true + enum: + - LED_OFF + - LED_RED + - LED_GREEN + - LED_BLUE + - LED_YELLOW + - LED_WHITE + - LED_AMBER + period: + description: In case of blinking LEDs, amount of time in secs + the LED color is active + type: int + required: false diff --git a/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml b/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml index 2161c8c037..e27488c9a9 100644 --- a/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml +++ b/zephyr/dts/bindings/i2c/cros-ec-i2c-port-base.yaml @@ -44,6 +44,7 @@ properties: - I2C_PORT_USB_C1 - I2C_PORT_USB_C1_PPC - I2C_PORT_USB_C1_TCPC + - I2C_PORT_USB_MUX - I2C_PORT_USB_MUX0 - I2C_PORT_USB_MUX1 - I2C_PORT_VIRTUAL_BATTERY @@ -54,3 +55,8 @@ properties: description: Human readable string describing the device (used as device_get_binding() argument). + dynamic-speed: + type: boolean + required: false + description: + Enables run-time speed configuration. diff --git a/zephyr/dts/bindings/motionsense/driver/bmi160.yaml b/zephyr/dts/bindings/motionsense/driver/bmi160.yaml index 8f490254a3..6ca096d87a 100644 --- a/zephyr/dts/bindings/motionsense/driver/bmi160.yaml +++ b/zephyr/dts/bindings/motionsense/driver/bmi160.yaml @@ -10,7 +10,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "BMI160_ADDR0_FLAGS" default: "BMI160_ADDR0_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml index 77d6282d7f..cbd9e82f2d 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,bma255.yaml @@ -12,7 +12,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "BMA2x2_I2C_ADDR1_FLAGS" - "BMA2x2_I2C_ADDR2_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml b/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml index b90d824575..8aecc32077 100644 --- a/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml +++ b/zephyr/dts/bindings/motionsense/driver/cros-ec,kx022.yaml @@ -12,7 +12,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "KX022_ADDR0_FLAGS" - "KX022_ADDR1_FLAGS" diff --git a/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml b/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml index 2fc3d7eacd..ecad7ec1a7 100644 --- a/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml +++ b/zephyr/dts/bindings/motionsense/driver/tcs3400.yaml @@ -10,7 +10,7 @@ include: motionsense-sensor-base.yaml properties: i2c-spi-addr-flags: type: string - description: i2c address or SPI slave logic GPIO + description: i2c address or SPI peripheral logic GPIO enum: - "TCS3400_I2C_ADDR_FLAGS" default: "TCS3400_I2C_ADDR_FLAGS" diff --git a/zephyr/dts/bindings/temp/cros_ec_temp_sensor.yaml b/zephyr/dts/bindings/temp/cros_ec_temp_sensor.yaml index 288dc2d1c8..a60cdda954 100644 --- a/zephyr/dts/bindings/temp/cros_ec_temp_sensor.yaml +++ b/zephyr/dts/bindings/temp/cros_ec_temp_sensor.yaml @@ -36,6 +36,10 @@ properties: - TEMP_SENSOR_DDR_SOC - TEMP_SENSOR_FAN - TEMP_SENSOR_PP3300_REGULATOR + - TEMP_SENSOR_1_DDR_SOC + - TEMP_SENSOR_2_AMBIENT + - TEMP_SENSOR_3_CHARGER + - TEMP_SENSOR_4_WWAN temp_fan_off: type: int diff --git a/zephyr/dts/bindings/usbc/named-usbc-ports.yaml b/zephyr/dts/bindings/usbc/named-usbc-ports.yaml new file mode 100644 index 0000000000..c4a55ba153 --- /dev/null +++ b/zephyr/dts/bindings/usbc/named-usbc-ports.yaml @@ -0,0 +1,25 @@ +# Copyright (c) 2021 The Chromium OS Authors +# SPDX-License-Identifier: Apache-2.0 + +description: Named USB-C ports parent node + +compatible: "named-usbc-ports" + +include: base.yaml + +properties: + "#address-cells": + required: true + const: 1 + "#size-cells": + required: true + const: 0 + +child-binding: + description: Named USB-C port + properties: + reg: + type: array + required: true + description: | + USB-C port number to serialize devices used for USB-C communication diff --git a/zephyr/dts/bindings/usbc/pericom,pi3usb9201.yaml b/zephyr/dts/bindings/usbc/pericom,pi3usb9201.yaml new file mode 100644 index 0000000000..d72fa20a47 --- /dev/null +++ b/zephyr/dts/bindings/usbc/pericom,pi3usb9201.yaml @@ -0,0 +1,27 @@ +description: USBC BC1.2 + +compatible: "pericom,pi3usb9201" + +properties: + port: + type: phandle + required: true + description: | + I2C port used to communicate with controller + + irq: + type: phandles + required: true + description: | + GPIO interrupt from BC1.2 + + i2c-addr-flags: + type: string + default: "PI3USB9201_I2C_ADDR_3_FLAGS" + enum: + - "PI3USB9201_I2C_ADDR_0_FLAGS" + - "PI3USB9201_I2C_ADDR_1_FLAGS" + - "PI3USB9201_I2C_ADDR_2_FLAGS" + - "PI3USB9201_I2C_ADDR_3_FLAGS" + description: | + I2C address of controller diff --git a/zephyr/dts/bindings/usbc/ppc-chip.yaml b/zephyr/dts/bindings/usbc/ppc-chip.yaml new file mode 100644 index 0000000000..b5b2cedc03 --- /dev/null +++ b/zephyr/dts/bindings/usbc/ppc-chip.yaml @@ -0,0 +1,28 @@ +# Copyright (c) 2021 The Chromium OS Authors +# SPDX-License-Identifier: Apache-2.0 + +description: Power path chip + +properties: + port: + type: phandle + required: true + description: | + I2C port used to communicate with controller + + irq: + type: phandles + required: false + description: | + GPIO interrupt from PPC + + i2c-addr-flags: + type: string + description: | + I2C address of controller + + alternate-for: + type: phandle + description: | + Pointer to the primary PPC device that can be replaced at runtime + by this device. diff --git a/zephyr/dts/bindings/usbc/silergy,syv682x.yaml b/zephyr/dts/bindings/usbc/silergy,syv682x.yaml new file mode 100644 index 0000000000..51484e1792 --- /dev/null +++ b/zephyr/dts/bindings/usbc/silergy,syv682x.yaml @@ -0,0 +1,14 @@ +description: USBC PPC + +compatible: "silergy,syv682x" + +include: ppc-chip.yaml + +properties: + i2c-addr-flags: + default: "SYV682X_ADDR0_FLAGS" + enum: + - "SYV682X_ADDR0_FLAGS" + - "SYV682X_ADDR1_FLAGS" + - "SYV682X_ADDR2_FLAGS" + - "SYV682x_ADDR3_FLAGS" diff --git a/zephyr/dts/bindings/usbc/ti,sn5s330.yaml b/zephyr/dts/bindings/usbc/ti,sn5s330.yaml new file mode 100644 index 0000000000..664f888805 --- /dev/null +++ b/zephyr/dts/bindings/usbc/ti,sn5s330.yaml @@ -0,0 +1,14 @@ +description: USBC PPC + +compatible: "ti,sn5s330" + +include: ppc-chip.yaml + +properties: + i2c-addr-flags: + default: "SN5S330_ADDR0_FLAGS" + enum: + - "SN5S330_ADDR0_FLAGS" + - "SN5S330_ADDR1_FLAGS" + - "SN5S330_ADDR2_FLAGS" + - "SN5S330_ADDR3_FLAGS" diff --git a/zephyr/emul/CMakeLists.txt b/zephyr/emul/CMakeLists.txt index ce3ad191eb..030ae7cc51 100644 --- a/zephyr/emul/CMakeLists.txt +++ b/zephyr/emul/CMakeLists.txt @@ -19,3 +19,5 @@ zephyr_library_sources_ifdef(CONFIG_EMUL_ISL923X emul_isl923x.c) zephyr_library_sources_ifdef(CONFIG_EMUL_CLOCK_CONTROL emul_clock_control.c) zephyr_library_sources_ifdef(CONFIG_EMUL_TCPCI emul_tcpci.c) zephyr_library_sources_ifdef(CONFIG_EMUL_SN5S330 emul_sn5s330.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_PS8XXX emul_ps8xxx.c) +zephyr_library_sources_ifdef(CONFIG_EMUL_CHARGER emul_charger.c) diff --git a/zephyr/emul/Kconfig.ln9310 b/zephyr/emul/Kconfig.ln9310 index 5773cf3721..c9e3e6fbc9 100644 --- a/zephyr/emul/Kconfig.ln9310 +++ b/zephyr/emul/Kconfig.ln9310 @@ -8,6 +8,7 @@ menuconfig EMUL_LN9310 bool "LN9310 switchcap emulator" default $(dt_compat_enabled,$(DT_COMPAT_LN9310_EMUL)) depends on I2C_EMUL + depends on ASSERT help Enable the LN9310 emulator. This driver uses the emulated I2C bus. It is used to test the ln9310 driver. Emulator API is available in diff --git a/zephyr/emul/Kconfig.sn5s330 b/zephyr/emul/Kconfig.sn5s330 index aba3bb9028..bb3e5eeea8 100644 --- a/zephyr/emul/Kconfig.sn5s330 +++ b/zephyr/emul/Kconfig.sn5s330 @@ -8,6 +8,7 @@ menuconfig EMUL_SN5S330 bool "sn5s330 emulator" default $(dt_compat_enabled,$(DT_COMPAT_SN5S330_EMUL)) depends on I2C_EMUL + depends on ASSERT help Enable the sn5s330 emulator. This driver uses the emulated I2C bus. It is used to test the sn5s330 driver. Emulator API is available in diff --git a/zephyr/emul/Kconfig.tcpci b/zephyr/emul/Kconfig.tcpci index 2892458676..fc4b1bcda4 100644 --- a/zephyr/emul/Kconfig.tcpci +++ b/zephyr/emul/Kconfig.tcpci @@ -21,4 +21,18 @@ module = TCPCI_EMUL module-str = tcpci_emul source "subsys/logging/Kconfig.template.log_config" +config EMUL_PS8XXX + bool "Parade PS8XXX emulator" + help + Enable emulator for PS8XXX family of TCPC. This emulator is extenstion + for TCPCI emulator. PS8XXX specific API is available in + zephyr/include/emul/emul_tcpci.h + +config EMUL_CHARGER + bool "USB-C charger emulator" + help + Enable USB-C charger emulator which may be attached to TCPCI emulator. + API of charger emulator is available in + zephyr/include/emul/emul_charger.h + endif # EMUL_TCPCI diff --git a/zephyr/emul/emul_charger.c b/zephyr/emul/emul_charger.c new file mode 100644 index 0000000000..d584ab882b --- /dev/null +++ b/zephyr/emul/emul_charger.c @@ -0,0 +1,355 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <logging/log.h> +LOG_MODULE_REGISTER(charger_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); + +#include <zephyr.h> + +#include "common.h" +#include "emul/emul_charger.h" +#include "emul/emul_tcpci.h" +#include "usb_pd.h" + +/** Structure of message used by USB-C charger emulator */ +struct charger_emul_msg { + /** Reserved for k_fifo_* usage */ + void *fifo_reserved; + /** TCPCI emulator message */ + struct tcpci_emul_msg msg; + /** Time when message should be sent if message is delayed */ + uint64_t time; +}; + +/** + * @brief Allocate message + * + * @param size Size of message buffer + * + * @return Pointer to new message on success + * @return NULL on error + */ +static struct charger_emul_msg *charger_emul_alloc_msg(size_t size) +{ + struct charger_emul_msg *new_msg; + + new_msg = k_malloc(sizeof(struct charger_emul_msg)); + if (new_msg == NULL) { + return NULL; + } + + new_msg->msg.buf = k_malloc(size); + if (new_msg->msg.buf == NULL) { + k_free(new_msg); + return NULL; + } + + /* TCPCI message size count include type byte */ + new_msg->msg.cnt = size + 1; + + return new_msg; +} + +/** + * @brief Free message's memory + * + * @param msg Pointer to message + */ +static void charger_emul_free_msg(struct charger_emul_msg *msg) +{ + k_free(msg->msg.buf); + k_free(msg); +} + +/** + * @brief Set header of the message + * + * @param data Pointer to USB-C charger emulator + * @param msg Pointer to message + * @param type Type of message + * @param cnt Number of data objects + */ +static void charger_emul_set_header(struct charger_emul_data *data, + struct charger_emul_msg *msg, + int type, int cnt) +{ + /* Header msg id has only 3 bits and wraps around after 8 messages */ + uint16_t msg_id = data->msg_id & 0x7; + uint16_t header = PD_HEADER(type, PD_ROLE_SOURCE, PD_ROLE_UFP, msg_id, + cnt, PD_REV20, 0 /* ext */); + data->msg_id++; + + msg->msg.buf[1] = (header >> 8) & 0xff; + msg->msg.buf[0] = header & 0xff; +} + +/** + * @brief Work function which sends delayed messages + * + * @param work Pointer to work structure + */ +static void charger_emul_delayed_send(struct k_work *work) +{ + struct k_work_delayable *kwd = k_work_delayable_from_work(work); + struct charger_emul_data *data = CONTAINER_OF(kwd, + struct charger_emul_data, + delayed_send); + struct charger_emul_msg *msg; + uint64_t now; + int ec; + + while (!k_fifo_is_empty(&data->to_send)) { + /* + * It is safe to not check msg == NULL, because this thread is + * the only one consumer + */ + msg = k_fifo_peek_head(&data->to_send); + + now = k_uptime_get(); + if (now >= msg->time) { + k_fifo_get(&data->to_send, K_FOREVER); + ec = tcpci_emul_add_rx_msg(data->tcpci_emul, &msg->msg, + true /* send alert */); + if (ec) { + charger_emul_free_msg(msg); + } + } else { + k_work_reschedule(kwd, K_MSEC(msg->time - now)); + break; + } + } +} + +/** + * @brief Send message to TCPCI emulator or schedule message + * + * @param data Pointer to USB-C charger emulator + * @param msg Pointer to message to send + * @param delay Optional delay + * + * @return 0 on success + * @return -EINVAL on TCPCI emulator add RX message error + */ +static int charger_emul_send_msg(struct charger_emul_data *data, + struct charger_emul_msg *msg, uint64_t delay) +{ + uint64_t now; + int ec; + + if (delay == 0) { + ec = tcpci_emul_add_rx_msg(data->tcpci_emul, &msg->msg, true); + if (ec) { + charger_emul_free_msg(msg); + } + + return ec; + } + + now = k_uptime_get(); + msg->time = now + delay; + k_fifo_put(&data->to_send, msg); + /* + * This will change execution time of delayed_send only if it is not + * already scheduled + */ + k_work_schedule(&data->delayed_send, K_MSEC(delay)); + + return 0; +} + +/** + * @brief Send capability message which for now is hardcoded + * + * @param data Pointer to USB-C charger emulator + * @param delay Optional delay + * + * @return 0 on success + * @return -ENOMEM when there is no free memory for message + * @return -EINVAL on TCPCI emulator add RX message error + */ +static int charger_emul_send_capability_msg(struct charger_emul_data *data, + uint64_t delay) +{ + struct charger_emul_msg *msg; + + msg = charger_emul_alloc_msg(6); + if (msg == NULL) { + return -ENOMEM; + } + + /* Capability with 5v@3A */ + charger_emul_set_header(data, msg, PD_DATA_SOURCE_CAP, 1); + + /* Fixed supply (type of supply) 0xc0 */ + msg->msg.buf[5] = 0x00; + /* Dual role capable 0x20 */ + msg->msg.buf[5] |= 0x00; + /* Unconstrained power 0x08 */ + msg->msg.buf[5] |= 0x08; + + /* 5V on bits 19-10 */ + msg->msg.buf[4] = 0x1; + msg->msg.buf[3] = 0x90; + /* 3A on bits 9-0 */ + msg->msg.buf[3] |= 0x1; + msg->msg.buf[2] = 0x2c; + + /* Fill tcpci message structure */ + msg->msg.type = TCPCI_MSG_SOP; + + return charger_emul_send_msg(data, msg, delay); +} + +/** + * @brief Send control message with optional delay + * + * @param data Pointer to USB-C charger emulator + * @param type Type of message + * @param delay Optional delay + * + * @return 0 on success + * @return -ENOMEM when there is no free memory for message + * @return -EINVAL on TCPCI emulator add RX message error + */ +static int charger_emul_send_control_msg(struct charger_emul_data *data, + enum pd_ctrl_msg_type type, + uint64_t delay) +{ + struct charger_emul_msg *msg; + + msg = charger_emul_alloc_msg(2); + if (msg == NULL) { + return -ENOMEM; + } + + charger_emul_set_header(data, msg, type, 0); + + /* Fill tcpci message structure */ + msg->msg.type = TCPCI_MSG_SOP; + + return charger_emul_send_msg(data, msg, delay); +} + +/** + * @brief Function called when TCPM wants to transmit message. Accept received + * message and generate response. + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to partner operations structure + * @param tx_msg Pointer to TX message buffer + * @param type Type of message + * @param retry Count of retries + */ +static void charger_emul_transmit_op(const struct emul *emul, + const struct tcpci_emul_partner_ops *ops, + const struct tcpci_emul_msg *tx_msg, + enum tcpci_msg_type type, + int retry) +{ + struct charger_emul_data *data = CONTAINER_OF(ops, + struct charger_emul_data, + ops); + uint16_t header; + + /* Acknowledge that message was sent successfully */ + tcpci_emul_partner_msg_status(emul, TCPCI_EMUL_TX_SUCCESS); + + /* Handle only SOP messages */ + if (type != TCPCI_MSG_SOP) { + return; + } + + LOG_HEXDUMP_DBG(tx_msg->buf, tx_msg->cnt, "Charger received message"); + + header = (tx_msg->buf[1] << 8) | tx_msg->buf[0]; + + if (PD_HEADER_CNT(header)) { + /* Handle data message */ + switch (PD_HEADER_TYPE(header)) { + case PD_DATA_REQUEST: + charger_emul_send_control_msg(data, PD_CTRL_ACCEPT, 0); + /* PS ready after 15 ms */ + charger_emul_send_control_msg(data, PD_CTRL_PS_RDY, 15); + break; + case PD_DATA_VENDOR_DEF: + /* VDM (vendor defined message) - ignore */ + break; + default: + charger_emul_send_control_msg(data, PD_CTRL_REJECT, 0); + break; + } + } else { + /* Handle control message */ + switch (PD_HEADER_TYPE(header)) { + case PD_CTRL_GET_SOURCE_CAP: + charger_emul_send_capability_msg(data, 0); + break; + case PD_CTRL_GET_SINK_CAP: + charger_emul_send_control_msg(data, PD_CTRL_REJECT, 0); + break; + case PD_CTRL_DR_SWAP: + charger_emul_send_control_msg(data, PD_CTRL_REJECT, 0); + break; + case PD_CTRL_SOFT_RESET: + data->msg_id = 0; + charger_emul_send_control_msg(data, PD_CTRL_ACCEPT, 0); + /* Send capability after 15 ms to establish PD again */ + charger_emul_send_capability_msg(data, 15); + break; + default: + charger_emul_send_control_msg(data, PD_CTRL_REJECT, 0); + break; + } + } +} + +/** + * @brief Function called when TCPM consumes message. Free message that is no + * longer needed. + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to partner operations structure + * @param rx_msg Message that was consumed by TCPM + */ +static void charger_emul_rx_consumed_op( + const struct emul *emul, + const struct tcpci_emul_partner_ops *ops, + const struct tcpci_emul_msg *rx_msg) +{ + struct charger_emul_msg *msg = CONTAINER_OF(rx_msg, + struct charger_emul_msg, + msg); + + charger_emul_free_msg(msg); +} + +/** Check description in emul_charger.h */ +int charger_emul_connect_to_tcpci(struct charger_emul_data *data, + const struct emul *tcpci_emul) +{ + int ec; + + tcpci_emul_set_partner_ops(tcpci_emul, &data->ops); + ec = tcpci_emul_connect_partner(tcpci_emul, PD_ROLE_SOURCE, + TYPEC_CC_VOLT_RP_3_0, + TYPEC_CC_VOLT_OPEN, POLARITY_CC1); + if (ec) { + return ec; + } + + data->tcpci_emul = tcpci_emul; + + return charger_emul_send_capability_msg(data, 0); +} + +/** Check description in emul_charger.h */ +void charger_emul_init(struct charger_emul_data *data) +{ + k_work_init_delayable(&data->delayed_send, charger_emul_delayed_send); + k_fifo_init(&data->to_send); + + data->ops.transmit = charger_emul_transmit_op; + data->ops.rx_consumed = charger_emul_rx_consumed_op; +} diff --git a/zephyr/emul/emul_lis2dw12.c b/zephyr/emul/emul_lis2dw12.c index 07fba6091f..53c3a8d951 100644 --- a/zephyr/emul/emul_lis2dw12.c +++ b/zephyr/emul/emul_lis2dw12.c @@ -29,6 +29,8 @@ struct lis2dw12_emul_data { struct i2c_common_emul_data common; /** Emulated who-am-i register */ uint8_t who_am_i_reg; + /** Emulated ctrl1 register */ + uint8_t ctrl1_reg; /** Emulated ctrl2 register */ uint8_t ctrl2_reg; /** Soft reset count */ @@ -87,11 +89,16 @@ static int lis2dw12_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, __ASSERT_NO_MSG(bytes == 0); *val = data->who_am_i_reg; break; + case LIS2DW12_CTRL1_ADDR: + __ASSERT_NO_MSG(bytes == 0); + *val = data->ctrl1_reg; + break; case LIS2DW12_CTRL2_ADDR: __ASSERT_NO_MSG(bytes == 0); *val = data->ctrl2_reg; break; default: + __ASSERT(false, "No read handler for register 0x%02x", reg); return -EINVAL; } return 0; @@ -106,6 +113,9 @@ static int lis2dw12_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, case LIS2DW12_WHO_AM_I_REG: LOG_ERR("Can't write to who-am-i register"); return -EINVAL; + case LIS2DW12_CTRL1_ADDR: + data->ctrl1_reg = val; + break; case LIS2DW12_CTRL2_ADDR: __ASSERT_NO_MSG(bytes == 1); if ((val & LIS2DW12_SOFT_RESET_MASK) != 0) { @@ -115,6 +125,7 @@ static int lis2dw12_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, data->ctrl2_reg = val & ~LIS2DW12_SOFT_RESET_MASK; break; default: + __ASSERT(false, "No write handler for register 0x%02x", reg); return -EINVAL; } return 0; diff --git a/zephyr/emul/emul_ln9310.c b/zephyr/emul/emul_ln9310.c index 72d7f904ea..bc29fae432 100644 --- a/zephyr/emul/emul_ln9310.c +++ b/zephyr/emul/emul_ln9310.c @@ -216,13 +216,19 @@ void ln9310_emul_set_vin_gt_10v(const struct emul *emulator, bool is_gt_10v) bool ln9310_emul_is_init(const struct emul *emulator) { - struct ln9310_emul_data *data = emulator->data; + struct ln9310_emul_data *data = emulator->data; bool interrupts_unmasked = (data->int1_msk_reg & LN9310_INT1_MODE) == 0; bool min_switch_freq_set = (data->spare_0_reg & LN9310_SPARE_0_LB_MIN_FREQ_SEL_ON) != 0; - - return interrupts_unmasked && min_switch_freq_set; + bool functional_mode_switching_21_enabled = + (data->power_ctrl_reg & LN9310_PWR_OP_MODE_SWITCH21) != 0; + bool functional_mode_switching_31_enabled = + (data->power_ctrl_reg & LN9310_PWR_OP_MODE_SWITCH31) != 0; + + return interrupts_unmasked && min_switch_freq_set && + (functional_mode_switching_21_enabled || + functional_mode_switching_31_enabled); } enum battery_cell_type board_get_battery_cell_type(void) @@ -247,104 +253,87 @@ static int ln9310_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, { struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + __ASSERT(bytes == 1, "bytes 0x%x != 0x1 on reg 0x%x", bytes, reg); + switch (reg) { case LN9310_REG_INT1: - __ASSERT_NO_MSG(bytes == 1); data->int1_reg = val; break; case LN9310_REG_SYS_STS: - __ASSERT_NO_MSG(bytes == 1); data->sys_sts_reg = val; break; case LN9310_REG_INT1_MSK: - __ASSERT_NO_MSG(bytes == 1); data->int1_msk_reg = val; break; case LN9310_REG_STARTUP_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->startup_ctrl_reg = val; break; case LN9310_REG_LION_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->lion_ctrl_reg = val; break; case LN9310_REG_BC_STS_B: - __ASSERT_NO_MSG(bytes == 1); data->bc_sts_b_reg = val; break; case LN9310_REG_BC_STS_C: - LOG_ERR("Can't write to BC STS C register"); - return -EINVAL; + __ASSERT(false, + "Write to an unverified as safe " + "read-only register on 0x%x", + reg); + break; case LN9310_REG_CFG_0: - __ASSERT_NO_MSG(bytes == 1); data->cfg_0_reg = val; break; case LN9310_REG_CFG_4: - __ASSERT_NO_MSG(bytes == 1); data->cfg_4_reg = val; break; case LN9310_REG_CFG_5: - __ASSERT_NO_MSG(bytes == 1); data->cfg_5_reg = val; break; case LN9310_REG_PWR_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->power_ctrl_reg = val; break; case LN9310_REG_TIMER_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->timer_ctrl_reg = val; break; case LN9310_REG_LB_CTRL: - __ASSERT_NO_MSG(bytes = 1); data->lower_bound_ctrl_reg = val; break; case LN9310_REG_SPARE_0: - __ASSERT_NO_MSG(bytes == 1); data->spare_0_reg = val; break; case LN9310_REG_SWAP_CTRL_0: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_0_reg = val; break; case LN9310_REG_SWAP_CTRL_1: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_1_reg = val; break; case LN9310_REG_SWAP_CTRL_2: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_2_reg = val; break; case LN9310_REG_SWAP_CTRL_3: - __ASSERT_NO_MSG(bytes == 1); data->swap_ctrl_3_reg = val; break; case LN9310_REG_TRACK_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->track_ctrl_reg = val; break; case LN9310_REG_MODE_CHANGE_CFG: - __ASSERT_NO_MSG(bytes == 1); data->mode_change_cfg_reg = val; break; case LN9310_REG_SYS_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->sys_ctrl_reg = val; break; case LN9310_REG_FORCE_SC21_CTRL_1: - __ASSERT_NO_MSG(bytes == 1); data->force_sc21_ctrl_1_reg = val; break; case LN9310_REG_FORCE_SC21_CTRL_2: - __ASSERT_NO_MSG(bytes == 1); data->force_sc21_ctrl_2_reg = val; break; case LN9310_REG_TEST_MODE_CTRL: - __ASSERT_NO_MSG(bytes == 1); data->test_mode_ctrl_reg = val; break; default: - return -EINVAL; + __ASSERT(false, "Unimplemented Register Access Error on 0x%x", + reg); } mode_change(data); return 0; @@ -373,101 +362,79 @@ static int ln9310_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, { struct ln9310_emul_data *data = LN9310_DATA_FROM_I2C_EMUL(emul); + __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); + switch (reg) { case LN9310_REG_INT1: - __ASSERT_NO_MSG(bytes == 0); *val = data->int1_reg; break; case LN9310_REG_SYS_STS: - __ASSERT_NO_MSG(bytes == 0); *val = data->sys_sts_reg; break; case LN9310_REG_INT1_MSK: - __ASSERT_NO_MSG(bytes == 0); *val = data->int1_msk_reg; break; case LN9310_REG_STARTUP_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->startup_ctrl_reg; break; case LN9310_REG_LION_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->lion_ctrl_reg; break; case LN9310_REG_BC_STS_B: - __ASSERT_NO_MSG(bytes == 0); *val = data->bc_sts_b_reg; break; case LN9310_REG_BC_STS_C: - __ASSERT_NO_MSG(bytes == 0); *val = data->bc_sts_c_reg; break; case LN9310_REG_CFG_0: - __ASSERT_NO_MSG(bytes == 0); *val = data->cfg_0_reg; break; case LN9310_REG_CFG_4: - __ASSERT_NO_MSG(bytes == 0); *val = data->cfg_4_reg; break; case LN9310_REG_CFG_5: - __ASSERT_NO_MSG(bytes == 0); *val = data->cfg_5_reg; break; case LN9310_REG_PWR_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->power_ctrl_reg; break; case LN9310_REG_TIMER_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->timer_ctrl_reg; break; case LN9310_REG_LB_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->lower_bound_ctrl_reg; break; case LN9310_REG_SPARE_0: - __ASSERT_NO_MSG(bytes == 0); *val = data->spare_0_reg; break; case LN9310_REG_SWAP_CTRL_0: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_0_reg; break; case LN9310_REG_SWAP_CTRL_1: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_1_reg; break; case LN9310_REG_SWAP_CTRL_2: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_2_reg; break; case LN9310_REG_SWAP_CTRL_3: - __ASSERT_NO_MSG(bytes == 0); *val = data->swap_ctrl_3_reg; break; case LN9310_REG_TRACK_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->track_ctrl_reg; break; case LN9310_REG_MODE_CHANGE_CFG: - __ASSERT_NO_MSG(bytes == 0); *val = data->mode_change_cfg_reg; break; case LN9310_REG_SYS_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->sys_ctrl_reg; break; case LN9310_REG_FORCE_SC21_CTRL_1: - __ASSERT_NO_MSG(bytes == 0); *val = data->force_sc21_ctrl_1_reg; break; case LN9310_REG_FORCE_SC21_CTRL_2: - __ASSERT_NO_MSG(bytes == 0); *val = data->force_sc21_ctrl_2_reg; break; case LN9310_REG_TEST_MODE_CTRL: - __ASSERT_NO_MSG(bytes == 0); *val = data->test_mode_ctrl_reg; break; default: diff --git a/zephyr/emul/emul_ps8xxx.c b/zephyr/emul/emul_ps8xxx.c new file mode 100644 index 0000000000..0a8cc61fba --- /dev/null +++ b/zephyr/emul/emul_ps8xxx.c @@ -0,0 +1,577 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT cros_ps8xxx_emul + +#include <logging/log.h> +LOG_MODULE_REGISTER(ps8xxx_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); + +#include <device.h> +#include <emul.h> +#include <drivers/i2c.h> +#include <drivers/i2c_emul.h> + +#include "tcpm/tcpci.h" + +#include "emul/emul_common_i2c.h" +#include "emul/emul_ps8xxx.h" +#include "emul/emul_tcpci.h" + +#include "driver/tcpm/ps8xxx.h" + +#define PS8XXX_REG_MUX_IN_HPD_ASSERTION MUX_IN_HPD_ASSERTION_REG + +/** Run-time data used by the emulator */ +struct ps8xxx_emul_data { + /** Common I2C data used by "hidden" ports */ + struct i2c_common_emul_data p0_data; + struct i2c_common_emul_data p1_data; + struct i2c_common_emul_data gpio_data; + + /** Product ID of emulated device */ + int prod_id; + /** Pointer to TCPCI emulator that is base for this emulator */ + const struct emul *tcpci_emul; + + /** Chip revision used by PS8805 */ + uint8_t chip_rev; + /** Mux usb DCI configuration */ + uint8_t dci_cfg; + /** GPIO control register value */ + uint8_t gpio_ctrl; + /** HW revision used by PS8815 */ + uint16_t hw_rev; +}; + +/** Constant configuration of the emulator */ +struct ps8xxx_emul_cfg { + /** Phandle (name) of TCPCI emulator that is base for this emulator */ + const char *tcpci_emul; + + /** Common I2C configuration used by "hidden" ports */ + const struct i2c_common_emul_cfg p0_cfg; + const struct i2c_common_emul_cfg p1_cfg; + const struct i2c_common_emul_cfg gpio_cfg; +}; + +/** Check description in emul_ps8xxx.h */ +void ps8xxx_emul_set_chip_rev(const struct emul *emul, uint8_t chip_rev) +{ + struct ps8xxx_emul_data *data = emul->data; + + data->chip_rev = chip_rev; +} + +/** Check description in emul_ps8xxx.h */ +void ps8xxx_emul_set_hw_rev(const struct emul *emul, uint16_t hw_rev) +{ + struct ps8xxx_emul_data *data = emul->data; + + data->hw_rev = hw_rev; +} + +/** Check description in emul_ps8xxx.h */ +void ps8xxx_emul_set_gpio_ctrl(const struct emul *emul, uint8_t gpio_ctrl) +{ + struct ps8xxx_emul_data *data = emul->data; + + data->gpio_ctrl = gpio_ctrl; +} + +/** Check description in emul_ps8xxx.h */ +uint8_t ps8xxx_emul_get_gpio_ctrl(const struct emul *emul) +{ + struct ps8xxx_emul_data *data = emul->data; + + return data->gpio_ctrl; +} + +/** Check description in emul_ps8xxx.h */ +uint8_t ps8xxx_emul_get_dci_cfg(const struct emul *emul) +{ + struct ps8xxx_emul_data *data = emul->data; + + return data->dci_cfg; +} + +/** Check description in emul_ps8xxx.h */ +int ps8xxx_emul_set_product_id(const struct emul *emul, uint16_t product_id) +{ + struct ps8xxx_emul_data *data = emul->data; + + if (product_id != PS8805_PRODUCT_ID && + product_id != PS8815_PRODUCT_ID) { + LOG_ERR("Setting invalid product ID 0x%x", product_id); + return -EINVAL; + } + + data->prod_id = product_id; + tcpci_emul_set_reg(data->tcpci_emul, TCPC_REG_PRODUCT_ID, product_id); + + return 0; +} + +/** Check description in emul_ps8xxx.h */ +uint16_t ps8xxx_emul_get_product_id(const struct emul *emul) +{ + struct ps8xxx_emul_data *data = emul->data; + + return data->prod_id; +} + +const struct emul *ps8xxx_emul_get_tcpci(const struct emul *emul) +{ + struct ps8xxx_emul_data *data = emul->data; + + return data->tcpci_emul; +} + +/** Check description in emul_ps8xxx.h */ +struct i2c_emul *ps8xxx_emul_get_i2c_emul(const struct emul *emul, + enum ps8xxx_emul_port port) +{ + const struct ps8xxx_emul_cfg *cfg = emul->cfg; + struct ps8xxx_emul_data *data = emul->data; + + switch (port) { + case PS8XXX_EMUL_PORT_0: + return &data->p0_data.emul; + case PS8XXX_EMUL_PORT_1: + return &data->p1_data.emul; + case PS8XXX_EMUL_PORT_GPIO: + if (cfg->gpio_cfg.addr != 0) { + return &data->gpio_data.emul; + } else { + return NULL; + } + default: + return NULL; + } +} + +/** + * @brief Function called for each byte of read message + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to device operations structure + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already readded + * + * @return TCPCI_EMUL_CONTINUE to continue with default handler + * @return TCPCI_EMUL_DONE to immedietly return success + * @return TCPCI_EMUL_ERROR to immedietly return error + */ +static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_read_byte( + const struct emul *emul, + const struct tcpci_emul_dev_ops *ops, + int reg, uint8_t *val, int bytes) +{ + uint16_t reg_val; + + switch (reg) { + case PS8XXX_REG_FW_REV: + case PS8XXX_REG_I2C_DEBUGGING_ENABLE: + case PS8XXX_REG_MUX_IN_HPD_ASSERTION: + case PS8XXX_REG_BIST_CONT_MODE_BYTE0: + case PS8XXX_REG_BIST_CONT_MODE_BYTE1: + case PS8XXX_REG_BIST_CONT_MODE_BYTE2: + case PS8XXX_REG_BIST_CONT_MODE_CTR: + if (bytes != 0) { + LOG_ERR("Reading byte %d from 1 byte register 0x%x", + bytes, reg); + return TCPCI_EMUL_ERROR; + } + + tcpci_emul_get_reg(emul, reg, ®_val); + *val = reg_val & 0xff; + return TCPCI_EMUL_DONE; + default: + return TCPCI_EMUL_CONTINUE; + } +} + +/** + * @brief Function called for each byte of write message + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to device operations structure + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return TCPCI_EMUL_CONTINUE to continue with default handler + * @return TCPCI_EMUL_DONE to immedietly return success + * @return TCPCI_EMUL_ERROR to immedietly return error + */ +static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_write_byte( + const struct emul *emul, + const struct tcpci_emul_dev_ops *ops, + int reg, uint8_t val, int bytes) +{ + uint16_t prod_id; + + tcpci_emul_get_reg(emul, TCPC_REG_PRODUCT_ID, &prod_id); + + switch (reg) { + case PS8XXX_REG_RP_DETECT_CONTROL: + /* This register is present only on PS8815 */ + if (prod_id != PS8815_PRODUCT_ID) { + return TCPCI_EMUL_CONTINUE; + } + case PS8XXX_REG_I2C_DEBUGGING_ENABLE: + case PS8XXX_REG_MUX_IN_HPD_ASSERTION: + case PS8XXX_REG_BIST_CONT_MODE_BYTE0: + case PS8XXX_REG_BIST_CONT_MODE_BYTE1: + case PS8XXX_REG_BIST_CONT_MODE_BYTE2: + case PS8XXX_REG_BIST_CONT_MODE_CTR: + if (bytes != 1) { + LOG_ERR("Writing byte %d to 1 byte register 0x%x", + bytes, reg); + return TCPCI_EMUL_ERROR; + } + + tcpci_emul_set_reg(emul, reg, val); + return TCPCI_EMUL_DONE; + default: + return TCPCI_EMUL_CONTINUE; + } +} + +/** + * @brief Function called on the end of write message + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to device operations structure + * @param reg Register which is written + * @param msg_len Length of handled I2C message + * + * @return TCPCI_EMUL_CONTINUE to continue with default handler + * @return TCPCI_EMUL_DONE to immedietly return success + * @return TCPCI_EMUL_ERROR to immedietly return error + */ +static enum tcpci_emul_ops_resp ps8xxx_emul_tcpci_handle_write( + const struct emul *emul, + const struct tcpci_emul_dev_ops *ops, + int reg, int msg_len) +{ + uint16_t prod_id; + + tcpci_emul_get_reg(emul, TCPC_REG_PRODUCT_ID, &prod_id); + + switch (reg) { + case PS8XXX_REG_RP_DETECT_CONTROL: + /* This register is present only on PS8815 */ + if (prod_id != PS8815_PRODUCT_ID) { + return TCPCI_EMUL_CONTINUE; + } + case PS8XXX_REG_I2C_DEBUGGING_ENABLE: + case PS8XXX_REG_MUX_IN_HPD_ASSERTION: + case PS8XXX_REG_BIST_CONT_MODE_BYTE0: + case PS8XXX_REG_BIST_CONT_MODE_BYTE1: + case PS8XXX_REG_BIST_CONT_MODE_BYTE2: + case PS8XXX_REG_BIST_CONT_MODE_CTR: + return TCPCI_EMUL_DONE; + default: + return TCPCI_EMUL_CONTINUE; + } +} + +/** + * @brief Function called on reset + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to device operations structure + */ +static void ps8xxx_emul_tcpci_reset(const struct emul *emul, + struct tcpci_emul_dev_ops *ops) +{ + tcpci_emul_set_reg(emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, 0x31); + tcpci_emul_set_reg(emul, PS8XXX_REG_MUX_IN_HPD_ASSERTION, 0x00); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE0, 0xff); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE1, 0x0f); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_BYTE2, 0x00); + tcpci_emul_set_reg(emul, PS8XXX_REG_BIST_CONT_MODE_CTR, 0x00); +} + +/** TCPCI PS8xxx operations */ +static struct tcpci_emul_dev_ops ps8xxx_emul_ops = { + .read_byte = ps8xxx_emul_tcpci_read_byte, + .write_byte = ps8xxx_emul_tcpci_write_byte, + .handle_write = ps8xxx_emul_tcpci_handle_write, + .reset = ps8xxx_emul_tcpci_reset, +}; + +/** + * @brief Get port associated with given "hidden" I2C device + * + * @param i2c_emul Pointer to "hidden" I2C device + * + * @return Port associated with given I2C device + */ +static enum ps8xxx_emul_port ps8xxx_emul_get_port(struct i2c_emul *i2c_emul) +{ + const struct ps8xxx_emul_cfg *cfg; + const struct emul *emul; + + emul = i2c_emul->parent; + cfg = emul->cfg; + + if (cfg->p0_cfg.addr == i2c_emul->addr) { + return PS8XXX_EMUL_PORT_0; + } + + if (cfg->p1_cfg.addr == i2c_emul->addr) { + return PS8XXX_EMUL_PORT_1; + } + + if (cfg->gpio_cfg.addr != 0 && cfg->gpio_cfg.addr == i2c_emul->addr) { + return PS8XXX_EMUL_PORT_GPIO; + } + + return PS8XXX_EMUL_PORT_INVAL; +} + +/** + * @brief Function called for each byte of read message + * + * @param i2c_emul Pointer to PS8xxx emulator + * @param reg First byte of last write message + * @param val Pointer where byte to read should be stored + * @param bytes Number of bytes already readded + * + * @return 0 on success + * @return -EIO on invalid read request + */ +static int ps8xxx_emul_read_byte(struct i2c_emul *i2c_emul, int reg, + uint8_t *val, int bytes) +{ + struct ps8xxx_emul_data *data; + enum ps8xxx_emul_port port; + const struct emul *emul; + uint16_t i2c_dbg_reg; + + emul = i2c_emul->parent; + data = emul->data; + + tcpci_emul_get_reg(data->tcpci_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, + &i2c_dbg_reg); + /* There is no need to enable I2C debug on PS8815 */ + if (data->prod_id != PS8815_PRODUCT_ID && i2c_dbg_reg & 0x1) { + LOG_ERR("Accessing hidden i2c address without enabling debug"); + return -EIO; + } + + port = ps8xxx_emul_get_port(i2c_emul); + + /* This is only 2 bytes register so handle it separately */ + if (data->prod_id == PS8815_PRODUCT_ID && port == PS8XXX_EMUL_PORT_1 && + reg == PS8815_P1_REG_HW_REVISION) { + if (bytes > 1) { + LOG_ERR("Reading more than two bytes from HW rev reg"); + return -EIO; + } + + *val = (data->hw_rev >> (bytes * 8)) & 0xff; + return 0; + } + + if (bytes != 0) { + LOG_ERR("Reading more than one byte at once"); + return -EIO; + } + + switch (port) { + case PS8XXX_EMUL_PORT_0: + if (data->prod_id == PS8805_PRODUCT_ID && + reg == PS8805_P0_REG_CHIP_REVISION) { + *val = data->chip_rev; + return 0; + } + break; + case PS8XXX_EMUL_PORT_1: + /* DCI CFG is no available on PS8815 */ + if (data->prod_id != PS8815_PRODUCT_ID && + reg == PS8XXX_P1_REG_MUX_USB_DCI_CFG) { + *val = data->dci_cfg; + return 0; + } + case PS8XXX_EMUL_PORT_GPIO: + if (reg == PS8805_REG_GPIO_CONTROL) { + *val = data->gpio_ctrl; + return 0; + } + case PS8XXX_EMUL_PORT_INVAL: + LOG_ERR("Invalid I2C address"); + return -EIO; + } + + LOG_ERR("Reading from reg 0x%x which is WO or undefined", reg); + return -EIO; +} + +/** + * @brief Function called for each byte of write message + * + * @param i2c_emul Pointer to PS8xxx emulator + * @param reg First byte of write message + * @param val Received byte of write message + * @param bytes Number of bytes already received + * + * @return 0 on success + * @return -EIO on invalid write request + */ +static int ps8xxx_emul_write_byte(struct i2c_emul *i2c_emul, int reg, + uint8_t val, int bytes) +{ + struct ps8xxx_emul_data *data; + enum ps8xxx_emul_port port; + const struct emul *emul; + uint16_t i2c_dbg_reg; + + emul = i2c_emul->parent; + data = emul->data; + + tcpci_emul_get_reg(data->tcpci_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, + &i2c_dbg_reg); + /* There is no need to enable I2C debug on PS8815 */ + if (data->prod_id != PS8815_PRODUCT_ID && i2c_dbg_reg & 0x1) { + LOG_ERR("Accessing hidden i2c address without enabling debug"); + return -EIO; + } + + port = ps8xxx_emul_get_port(i2c_emul); + + if (bytes != 1) { + LOG_ERR("Writing more than one byte at once"); + return -EIO; + } + + switch (port) { + case PS8XXX_EMUL_PORT_0: + break; + case PS8XXX_EMUL_PORT_1: + /* DCI CFG is no available on PS8815 */ + if (data->prod_id != PS8815_PRODUCT_ID && + reg == PS8XXX_P1_REG_MUX_USB_DCI_CFG) { + data->dci_cfg = val; + return 0; + } + case PS8XXX_EMUL_PORT_GPIO: + if (reg == PS8805_REG_GPIO_CONTROL) { + data->gpio_ctrl = val; + return 0; + } + case PS8XXX_EMUL_PORT_INVAL: + LOG_ERR("Invalid I2C address"); + return -EIO; + } + + LOG_ERR("Writing to reg 0x%x which is RO or undefined", reg); + return -EIO; +} + +/** + * @brief Set up a new PS8xxx emulator + * + * This should be called for each PS8xxx device that needs to be + * emulated. It registers "hidden" I2C devices with the I2C emulation + * controller and set PS8xxx device operations to associated TCPCI emulator. + * + * @param emul Emulation information + * @param parent Device to emulate + * + * @return 0 indicating success (always) + */ +static int ps8xxx_emul_init(const struct emul *emul, + const struct device *parent) +{ + const struct ps8xxx_emul_cfg *cfg = emul->cfg; + struct ps8xxx_emul_data *data = emul->data; + const struct device *i2c_dev; + int ret; + + data->tcpci_emul = emul_get_binding(cfg->tcpci_emul); + i2c_dev = parent; + + data->p0_data.emul.api = &i2c_common_emul_api; + data->p0_data.emul.addr = cfg->p0_cfg.addr; + data->p0_data.emul.parent = emul; + data->p0_data.i2c = i2c_dev; + data->p0_data.cfg = &cfg->p0_cfg; + i2c_common_emul_init(&data->p0_data); + + data->p1_data.emul.api = &i2c_common_emul_api; + data->p1_data.emul.addr = cfg->p1_cfg.addr; + data->p1_data.emul.parent = emul; + data->p1_data.i2c = i2c_dev; + data->p1_data.cfg = &cfg->p1_cfg; + i2c_common_emul_init(&data->p1_data); + + ret = i2c_emul_register(i2c_dev, emul->dev_label, &data->p0_data.emul); + ret |= i2c_emul_register(i2c_dev, emul->dev_label, &data->p1_data.emul); + + if (cfg->gpio_cfg.addr != 0) { + data->gpio_data.emul.api = &i2c_common_emul_api; + data->gpio_data.emul.addr = cfg->gpio_cfg.addr; + data->gpio_data.emul.parent = emul; + data->gpio_data.i2c = i2c_dev; + data->gpio_data.cfg = &cfg->gpio_cfg; + i2c_common_emul_init(&data->gpio_data); + ret |= i2c_emul_register(i2c_dev, emul->dev_label, + &data->gpio_data.emul); + } + + tcpci_emul_set_dev_ops(data->tcpci_emul, &ps8xxx_emul_ops); + ps8xxx_emul_tcpci_reset(data->tcpci_emul, &ps8xxx_emul_ops); + + tcpci_emul_set_reg(data->tcpci_emul, TCPC_REG_PRODUCT_ID, + data->prod_id); + + return ret; +} + +#define PS8XXX_EMUL(n) \ + static struct ps8xxx_emul_data ps8xxx_emul_data_##n = { \ + .prod_id = PS8805_PRODUCT_ID, \ + .p0_data = { \ + .write_byte = ps8xxx_emul_write_byte, \ + .read_byte = ps8xxx_emul_read_byte, \ + }, \ + .p1_data = { \ + .write_byte = ps8xxx_emul_write_byte, \ + .read_byte = ps8xxx_emul_read_byte, \ + }, \ + .gpio_data = { \ + .write_byte = ps8xxx_emul_write_byte, \ + .read_byte = ps8xxx_emul_read_byte, \ + }, \ + }; \ + \ + static const struct ps8xxx_emul_cfg ps8xxx_emul_cfg_##n = { \ + .tcpci_emul = DT_LABEL(DT_INST_PHANDLE(n, tcpci_i2c)), \ + .p0_cfg = { \ + .i2c_label = DT_INST_BUS_LABEL(n), \ + .dev_label = DT_INST_LABEL(n), \ + .data = &ps8xxx_emul_data_##n.p0_data, \ + .addr = DT_INST_PROP(n, p0_i2c_addr), \ + }, \ + .p1_cfg = { \ + .i2c_label = DT_INST_BUS_LABEL(n), \ + .dev_label = DT_INST_LABEL(n), \ + .data = &ps8xxx_emul_data_##n.p1_data, \ + .addr = DT_INST_PROP(n, p1_i2c_addr), \ + }, \ + .gpio_cfg = { \ + .i2c_label = DT_INST_BUS_LABEL(n), \ + .dev_label = DT_INST_LABEL(n), \ + .data = &ps8xxx_emul_data_##n.gpio_data, \ + .addr = DT_INST_PROP(n, gpio_i2c_addr), \ + }, \ + }; \ + EMUL_DEFINE(ps8xxx_emul_init, DT_DRV_INST(n), \ + &ps8xxx_emul_cfg_##n, &ps8xxx_emul_data_##n) + +DT_INST_FOREACH_STATUS_OKAY(PS8XXX_EMUL) diff --git a/zephyr/emul/emul_smart_battery.c b/zephyr/emul/emul_smart_battery.c index 279e08719d..136d81cc35 100644 --- a/zephyr/emul/emul_smart_battery.c +++ b/zephyr/emul/emul_smart_battery.c @@ -586,20 +586,21 @@ static int sbat_emul_handle_read_msg(struct i2c_emul *emul, int reg) /* Handle commands which return block */ ret = sbat_emul_get_block_data(emul, reg, &blk, &len); - if (ret != 0) { - if (ret == 1) { - data->bat.error_code = STATUS_CODE_UNSUPPORTED; - LOG_ERR("Unknown read command (0x%x)", reg); - } - + if (ret < 0) { return -EIO; } + if (ret == 0) { + data->num_to_read = len + 1; + data->msg_buf[0] = len; + memcpy(&data->msg_buf[1], blk, len); + data->bat.error_code = STATUS_CODE_OK; + sbat_emul_append_pec(data, reg); - data->num_to_read = len + 1; - data->msg_buf[0] = len; - memcpy(&data->msg_buf[1], blk, len); - data->bat.error_code = STATUS_CODE_OK; - sbat_emul_append_pec(data, reg); + return 0; + } + + /* Command is unknown. Wait for custom handler before failing. */ + data->num_to_read = 0; return 0; } @@ -740,6 +741,13 @@ static int sbat_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, data = SBAT_DATA_FROM_I2C_EMUL(emul); + if (data->num_to_read == 0) { + data->bat.error_code = STATUS_CODE_UNSUPPORTED; + LOG_ERR("Unknown read command (0x%x)", reg); + + return -EIO; + } + if (bytes < data->num_to_read) { *val = data->msg_buf[bytes]; } diff --git a/zephyr/emul/emul_sn5s330.c b/zephyr/emul/emul_sn5s330.c index 44334ec71b..f6b3217372 100644 --- a/zephyr/emul/emul_sn5s330.c +++ b/zephyr/emul/emul_sn5s330.c @@ -30,6 +30,63 @@ struct sn5s330_emul_data { struct i2c_common_emul_data common; /** Emulated FUNC_SET1 register */ uint8_t func_set1_reg; + /** Emulated FUNC_SET2 register */ + uint8_t func_set2_reg; + /** Emulated FUNC_SET3 register */ + uint8_t func_set3_reg; + /** Emulated FUNC_SET4 register */ + uint8_t func_set4_reg; + /** Emulated FUNC_SET5 register */ + uint8_t func_set5_reg; + /** Emulated FUNC_SET6 register */ + uint8_t func_set6_reg; + /** Emulated FUNC_SET7 register */ + uint8_t func_set7_reg; + /** Emulated FUNC_SET8 register */ + uint8_t func_set8_reg; + /** Emulated FUNC_SET9 register */ + uint8_t func_set9_reg; + /** Emulated FUNC_SET10 register */ + uint8_t func_set10_reg; + /** Emulated FUNC_SET11 register */ + uint8_t func_set11_reg; + /** Emulated FUNC_SET12 register */ + uint8_t func_set12_reg; + /** Emulated INT_STATUS_REG1 register */ + uint8_t int_status_reg1; + /** Emulated INT_STATUS_REG2 register */ + uint8_t int_status_reg2; + /** Emulated INT_STATUS_REG3 register */ + uint8_t int_status_reg3; + /** Emulated INT_STATUS_REG4 register */ + /* + * TODO(b:205754232): Register name discrepancy + */ + uint8_t int_status_reg4; + /** Emulated INT_MASK_RISE_REG1 register */ + uint8_t int_mask_rise_reg1; + /** Emulated INT_MASK_RISE_REG2 register */ + uint8_t int_mask_rise_reg2; + /** Emulated INT_MASK_RISE_REG3 register */ + uint8_t int_mask_rise_reg3; + /** Emulated INT_MASK_FALL_REG1 register */ + uint8_t int_mask_fall_reg1; + /** Emulated INT_MASK_FALL_REG2 register */ + uint8_t int_mask_fall_reg2; + /** Emulated INT_MASK_FALL_REG3 register */ + uint8_t int_mask_fall_reg3; + /** Emulated INT_TRIP_RISE_REG1 register */ + uint8_t int_trip_rise_reg1; + /** Emulated INT_TRIP_RISE_REG2 register */ + uint8_t int_trip_rise_reg2; + /** Emulated INT_TRIP_RISE_REG3 register */ + uint8_t int_trip_rise_reg3; + /** Emulated INT_TRIP_FALL_REG1 register */ + uint8_t int_trip_fall_reg1; + /** Emulated INT_TRIP_FALL_REG2 register */ + uint8_t int_trip_fall_reg2; + /** Emulated INT_TRIP_FALL_REG3 register */ + uint8_t int_trip_fall_reg3; }; struct sn5s330_emul_cfg { @@ -46,7 +103,7 @@ struct i2c_emul *sn5s330_emul_to_i2c_emul(const struct emul *emul) int sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, uint32_t *val) { - struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + struct sn5s330_emul_data *data = emul->data; switch (reg) { case SN5S330_FUNC_SET1: @@ -63,13 +120,96 @@ static int sn5s330_emul_read_byte(struct i2c_emul *emul, int reg, uint8_t *val, { struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + __ASSERT(bytes == 0, "bytes 0x%x != 0x0 on reg 0x%x", bytes, reg); + switch (reg) { case SN5S330_FUNC_SET1: - __ASSERT_NO_MSG(bytes == 0); *val = data->func_set1_reg; break; + case SN5S330_FUNC_SET2: + *val = data->func_set2_reg; + break; + case SN5S330_FUNC_SET3: + *val = data->func_set3_reg; + break; + case SN5S330_FUNC_SET4: + *val = data->func_set4_reg; + break; + case SN5S330_FUNC_SET5: + *val = data->func_set5_reg; + break; + case SN5S330_FUNC_SET6: + *val = data->func_set6_reg; + break; + case SN5S330_FUNC_SET7: + *val = data->func_set7_reg; + break; + case SN5S330_FUNC_SET8: + *val = data->func_set8_reg; + break; + case SN5S330_FUNC_SET9: + *val = data->func_set9_reg; + break; + case SN5S330_FUNC_SET10: + *val = data->func_set10_reg; + break; + case SN5S330_FUNC_SET11: + *val = data->func_set11_reg; + break; + case SN5S330_FUNC_SET12: + *val = data->func_set12_reg; + break; + case SN5S330_INT_STATUS_REG1: + *val = data->int_status_reg1; + break; + case SN5S330_INT_STATUS_REG2: + *val = data->int_status_reg2; + break; + case SN5S330_INT_STATUS_REG3: + *val = data->int_status_reg3; + break; + case SN5S330_INT_STATUS_REG4: + *val = data->int_status_reg4; + break; + case SN5S330_INT_MASK_RISE_REG1: + *val = data->int_mask_rise_reg1; + break; + case SN5S330_INT_MASK_RISE_REG2: + *val = data->int_mask_rise_reg2; + break; + case SN5S330_INT_MASK_RISE_REG3: + *val = data->int_mask_rise_reg3; + break; + case SN5S330_INT_MASK_FALL_REG1: + *val = data->int_mask_fall_reg1; + break; + case SN5S330_INT_MASK_FALL_REG2: + *val = data->int_mask_fall_reg2; + break; + case SN5S330_INT_MASK_FALL_REG3: + *val = data->int_mask_fall_reg3; + break; + case SN5S330_INT_TRIP_RISE_REG1: + *val = data->int_trip_rise_reg1; + break; + case SN5S330_INT_TRIP_RISE_REG2: + *val = data->int_trip_rise_reg2; + break; + case SN5S330_INT_TRIP_RISE_REG3: + *val = data->int_trip_rise_reg3; + break; + case SN5S330_INT_TRIP_FALL_REG1: + *val = data->int_trip_fall_reg1; + break; + case SN5S330_INT_TRIP_FALL_REG2: + *val = data->int_trip_fall_reg2; + break; + case SN5S330_INT_TRIP_FALL_REG3: + *val = data->int_trip_fall_reg3; + break; default: - return -EINVAL; + __ASSERT(false, "Unimplemented Register Access Error on 0x%x", + reg); } return 0; @@ -80,18 +220,112 @@ static int sn5s330_emul_write_byte(struct i2c_emul *emul, int reg, uint8_t val, { struct sn5s330_emul_data *data = SN5S330_DATA_FROM_I2C_EMUL(emul); + __ASSERT(bytes == 1, "bytes 0x%x != 0x1 on reg 0x%x", bytes, reg); + switch (reg) { case SN5S330_FUNC_SET1: - __ASSERT_NO_MSG(bytes == 1); data->func_set1_reg = val; break; + case SN5S330_FUNC_SET2: + data->func_set2_reg = val; + break; + case SN5S330_FUNC_SET3: + data->func_set3_reg = val; + break; + case SN5S330_FUNC_SET4: + data->func_set4_reg = val; + break; + case SN5S330_FUNC_SET5: + data->func_set5_reg = val; + break; + case SN5S330_FUNC_SET6: + data->func_set6_reg = val; + break; + case SN5S330_FUNC_SET7: + data->func_set7_reg = val; + break; + case SN5S330_FUNC_SET8: + data->func_set8_reg = val; + break; + case SN5S330_FUNC_SET9: + data->func_set9_reg = val; + break; + case SN5S330_FUNC_SET10: + data->func_set10_reg = val; + break; + case SN5S330_FUNC_SET11: + data->func_set11_reg = val; + break; + case SN5S330_FUNC_SET12: + data->func_set12_reg = val; + break; + case SN5S330_INT_STATUS_REG1: + /* fallthrough */ + case SN5S330_INT_STATUS_REG2: + /* fallthrough */ + case SN5S330_INT_STATUS_REG3: + __ASSERT(false, + "Write to an unverified-as-safe read-only register on " + "0x%x", + reg); + /* fallthrough for checkpath */ + case SN5S330_INT_STATUS_REG4: + data->int_status_reg4 = val; + break; + case SN5S330_INT_MASK_RISE_REG1: + data->int_mask_rise_reg1 = val; + break; + case SN5S330_INT_MASK_RISE_REG2: + data->int_mask_rise_reg2 = val; + break; + case SN5S330_INT_MASK_RISE_REG3: + data->int_mask_rise_reg3 = val; + break; + case SN5S330_INT_MASK_FALL_REG1: + data->int_mask_fall_reg1 = val; + break; + case SN5S330_INT_MASK_FALL_REG2: + data->int_mask_fall_reg2 = val; + break; + case SN5S330_INT_MASK_FALL_REG3: + data->int_mask_fall_reg3 = val; + break; + case SN5S330_INT_TRIP_RISE_REG1: + data->int_trip_rise_reg1 = val; + break; + case SN5S330_INT_TRIP_RISE_REG2: + data->int_trip_rise_reg2 = val; + break; + case SN5S330_INT_TRIP_RISE_REG3: + data->int_trip_rise_reg3 = val; + break; + case SN5S330_INT_TRIP_FALL_REG1: + data->int_trip_fall_reg1 = val; + break; + case SN5S330_INT_TRIP_FALL_REG2: + data->int_trip_fall_reg2 = val; + break; + case SN5S330_INT_TRIP_FALL_REG3: + data->int_trip_fall_reg3 = val; + break; default: - return -EINVAL; + __ASSERT(false, "Unimplemented Register Access Error on 0x%x", + reg); } return 0; } +void sn5s330_emul_reset(const struct emul *emul) +{ + struct sn5s330_emul_data *data = emul->data; + struct i2c_common_emul_data common = data->common; + + /* Only Reset the sn5s330 Register Data */ + memset(data, 0, sizeof(struct sn5s330_emul_data)); + data->common = common; +} + static int emul_sn5s330_init(const struct emul *emul, const struct device *parent) { diff --git a/zephyr/emul/emul_syv682x.c b/zephyr/emul/emul_syv682x.c index 2bc18b7089..4527609270 100644 --- a/zephyr/emul/emul_syv682x.c +++ b/zephyr/emul/emul_syv682x.c @@ -6,6 +6,8 @@ #define DT_DRV_COMPAT zephyr_syv682x_emul #include <device.h> +#include <devicetree/gpio.h> +#include <drivers/gpio/gpio_emul.h> #include <emul.h> #include <drivers/i2c.h> #include <drivers/i2c_emul.h> @@ -25,6 +27,10 @@ struct syv682x_emul_data { struct i2c_emul emul; /** Smart battery device being emulated */ const struct device *i2c; + const struct device *frs_en_gpio_port; + gpio_pin_t frs_en_gpio_pin; + const struct device *alert_gpio_port; + gpio_pin_t alert_gpio_pin; /** Configuration information */ const struct syv682x_emul_cfg *cfg; /** Current state of all emulated SYV682x registers */ @@ -47,6 +53,15 @@ struct syv682x_emul_cfg { struct syv682x_emul_data *data; }; +/* Asserts or deasserts the interrupt signal to the EC. */ +static void syv682x_emul_set_alert(struct syv682x_emul_data *data, bool alert) +{ + int res = gpio_emul_input_set(data->alert_gpio_port, + /* The signal is inverted. */ + data->alert_gpio_pin, !alert); + __ASSERT_NO_MSG(res == 0); +} + int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) { struct syv682x_emul_data *data; @@ -60,38 +75,34 @@ int syv682x_emul_set_reg(struct i2c_emul *emul, int reg, uint8_t val) return 0; } -void syv682x_emul_set_status(struct i2c_emul *emul, uint8_t val) +void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, + uint8_t control_4) { - struct syv682x_emul_data *data; - - data = CONTAINER_OF(emul, struct syv682x_emul_data, emul); - data->status_cond = val; - data->reg[SYV682X_STATUS_REG] |= val; + uint8_t control_4_interrupt = control_4 & SYV682X_CONTROL_4_INT_MASK; + struct syv682x_emul_data *data = + CONTAINER_OF(emul, struct syv682x_emul_data, emul); + int frs_en_gpio = gpio_emul_output_get(data->frs_en_gpio_port, + data->frs_en_gpio_pin); - if (val & (SYV682X_STATUS_TSD | SYV682X_STATUS_OVP | - SYV682X_STATUS_OC_HV)) { - data->reg[SYV682X_CONTROL_1_REG] |= SYV682X_CONTROL_1_PWR_ENB; - } + __ASSERT_NO_MSG(frs_en_gpio >= 0); - /* - * TODO(b/190519131): Make this emulator trigger GPIO-based interrupts - * by itself based on the status. In real life, the device should turn - * the power path off when either of these conditions occurs, and they - * should quickly dissipate. If they somehow stay set, the device should - * interrupt continuously. - */ -} + /* Only assert FRS status if FRS is enabled. */ + if (!frs_en_gpio) + status &= ~SYV682X_STATUS_FRS; -void syv682x_emul_set_control_4(struct i2c_emul *emul, uint8_t val) -{ - struct syv682x_emul_data *data; - uint8_t val_interrupt = val & SYV682X_CONTROL_4_INT_MASK; + data->status_cond = status; + data->reg[SYV682X_STATUS_REG] |= status; - data = CONTAINER_OF(emul, struct syv682x_emul_data, emul); - data->control_4_cond = val_interrupt; - /* Only update the interrupting bits. */ + data->control_4_cond = control_4_interrupt; + /* Only update the interrupting bits of CONTROL_4. */ data->reg[SYV682X_CONTROL_4_REG] &= ~SYV682X_CONTROL_4_INT_MASK; - data->reg[SYV682X_CONTROL_4_REG] |= val_interrupt; + data->reg[SYV682X_CONTROL_4_REG] |= control_4_interrupt; + + /* These conditions disable the power path. */ + if (status & (SYV682X_STATUS_TSD | SYV682X_STATUS_OVP | + SYV682X_STATUS_OC_HV)) { + data->reg[SYV682X_CONTROL_1_REG] |= SYV682X_CONTROL_1_PWR_ENB; + } /* * Note: The description of CONTROL_4 suggests that setting VCONN_OC @@ -100,6 +111,16 @@ void syv682x_emul_set_control_4(struct i2c_emul *emul, uint8_t val) * current. The latter behavior is observed in practice, and this * emulator does not currently model it. */ + + /* VBAT_OVP disconnects CC and VCONN. */ + if (control_4_interrupt & SYV682X_CONTROL_4_VBAT_OVP) { + data->reg[SYV682X_CONTROL_4_REG] &= ~(SYV682X_CONTROL_4_CC1_BPS + | SYV682X_CONTROL_4_CC2_BPS + | SYV682X_CONTROL_4_VCONN1 + | SYV682X_CONTROL_4_VCONN2); + } + + syv682x_emul_set_alert(data, status | control_4_interrupt); } int syv682x_emul_get_reg(struct i2c_emul *emul, int reg, uint8_t *val) @@ -228,7 +249,7 @@ static struct i2c_emul_api syv682x_emul_api = { * @param emul Emulation information * @param parent Device to emulate * - * @return 0 indicating success (always) + * @return 0 on success or an error code on failure */ static int syv682x_emul_init(const struct emul *emul, const struct device *parent) @@ -244,18 +265,31 @@ static int syv682x_emul_init(const struct emul *emul, memset(data->reg, 0, sizeof(data->reg)); ret = i2c_emul_register(parent, emul->dev_label, &data->emul); + if (ret) + return ret; + + syv682x_emul_set_alert(data, false); return ret; } -#define SYV682X_EMUL(n) \ - static struct syv682x_emul_data syv682x_emul_data_##n = {}; \ - static const struct syv682x_emul_cfg syv682x_emul_cfg_##n = { \ - .i2c_label = DT_INST_BUS_LABEL(n), \ - .data = &syv682x_emul_data_##n, \ - .addr = DT_INST_REG_ADDR(n), \ - }; \ - EMUL_DEFINE(syv682x_emul_init, DT_DRV_INST(n), &syv682x_emul_cfg_##n, \ +#define SYV682X_EMUL(n) \ + static struct syv682x_emul_data syv682x_emul_data_##n = { \ + .frs_en_gpio_port = DEVICE_DT_GET(DT_GPIO_CTLR( \ + DT_INST_PROP(n, frs_en_gpio), gpios)), \ + .frs_en_gpio_pin = DT_GPIO_PIN( \ + DT_INST_PROP(n, frs_en_gpio), gpios), \ + .alert_gpio_port = DEVICE_DT_GET(DT_GPIO_CTLR( \ + DT_INST_PROP(n, alert_gpio), gpios)), \ + .alert_gpio_pin = DT_GPIO_PIN( \ + DT_INST_PROP(n, alert_gpio), gpios), \ + }; \ + static const struct syv682x_emul_cfg syv682x_emul_cfg_##n = { \ + .i2c_label = DT_INST_BUS_LABEL(n), \ + .data = &syv682x_emul_data_##n, \ + .addr = DT_INST_REG_ADDR(n), \ + }; \ + EMUL_DEFINE(syv682x_emul_init, DT_DRV_INST(n), &syv682x_emul_cfg_##n, \ &syv682x_emul_data_##n) DT_INST_FOREACH_STATUS_OKAY(SYV682X_EMUL) diff --git a/zephyr/emul/emul_tcpci.c b/zephyr/emul/emul_tcpci.c index c4d21ace78..b2c21c2ec4 100644 --- a/zephyr/emul/emul_tcpci.c +++ b/zephyr/emul/emul_tcpci.c @@ -12,6 +12,7 @@ LOG_MODULE_REGISTER(tcpci_emul, CONFIG_TCPCI_EMUL_LOG_LEVEL); #include <emul.h> #include <drivers/i2c.h> #include <drivers/i2c_emul.h> +#include <drivers/gpio/gpio_emul.h> #include "tcpm/tcpci.h" @@ -58,6 +59,10 @@ struct tcpci_emul_data { struct tcpci_emul_dev_ops *dev_ops; /** Callbacks for TCPCI partner */ struct tcpci_emul_partner_ops *partner; + + /** Reference to Alert# GPIO emulator. */ + const struct device *alert_gpio_port; + gpio_pin_t alert_gpio_pin; }; /** @@ -195,19 +200,33 @@ static bool tcpci_emul_check_int(const struct emul *emul) * * @param emul Pointer to TCPCI emulator * - * @return State of alert line + * @return 0 for success, or non-0 for errors. */ -static void tcpci_emul_alert_changed(const struct emul *emul) +static int tcpci_emul_alert_changed(const struct emul *emul) { struct tcpci_emul_data *data = emul->data; + int rc; + bool alert_is_active = tcpci_emul_check_int(emul); + + /** Trigger GPIO. */ + if (data->alert_gpio_port != NULL) { + /* Triggers on edge falling, so set to 0 when there is an alert. + */ + rc = gpio_emul_input_set(data->alert_gpio_port, + data->alert_gpio_pin, + alert_is_active ? 0 : 1); + if (rc != 0) + return rc; + } /* Nothing to do */ if (data->alert_callback == NULL) { - return; + return 0; } - data->alert_callback(emul, tcpci_emul_check_int(emul), + data->alert_callback(emul, alert_is_active, data->alert_callback_data); + return 0; } /** Check description in emul_tcpci.h */ @@ -216,6 +235,7 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, { struct tcpci_emul_data *data = emul->data; uint16_t dev_cap_2; + int rc; if (data->rx_msg == NULL) { tcpci_emul_get_reg(emul, TCPC_REG_DEV_CAP_2, &dev_cap_2); @@ -250,7 +270,9 @@ int tcpci_emul_add_rx_msg(const struct emul *emul, data->reg[TCPC_REG_ALERT] |= TCPC_REG_ALERT_RX_STATUS; - tcpci_emul_alert_changed(emul); + rc = tcpci_emul_alert_changed(emul); + if (rc != 0) + return rc; } rx_msg->next = NULL; @@ -284,6 +306,162 @@ void tcpci_emul_set_rev(const struct emul *emul, enum tcpci_emul_rev rev) } } +/** Check description in emul_tcpci.h */ +void tcpci_emul_set_dev_ops(const struct emul *emul, + struct tcpci_emul_dev_ops *dev_ops) +{ + struct tcpci_emul_data *data = emul->data; + + data->dev_ops = dev_ops; +} + +/** Check description in emul_tcpci.h */ +void tcpci_emul_set_alert_callback(const struct emul *emul, + tcpci_emul_alert_state_func alert_callback, + void *alert_callback_data) +{ + struct tcpci_emul_data *data = emul->data; + + data->alert_callback = alert_callback; + data->alert_callback_data = alert_callback_data; +} + +/** Check description in emul_tcpci.h */ +void tcpci_emul_set_partner_ops(const struct emul *emul, + struct tcpci_emul_partner_ops *partner) +{ + struct tcpci_emul_data *data = emul->data; + + data->partner = partner; +} + +/** + * @brief Get detected voltage for given CC resistor + * + * @param res CC pull resistor value + * @param volt Voltage applied by port partner + * + * @return Voltage visible at CC resistor side + */ +static enum tcpc_cc_voltage_status tcpci_emul_detected_volt_for_res( + enum tcpc_cc_pull res, + enum tcpc_cc_voltage_status volt) +{ + switch (res) { + case TYPEC_CC_RD: + switch (volt) { + /* As Rd we cannot detect another Rd or Ra */ + case TYPEC_CC_VOLT_RA: + case TYPEC_CC_VOLT_RD: + return TYPEC_CC_VOLT_OPEN; + default: + return volt; + } + case TYPEC_CC_RP: + switch (volt) { + /* As Rp we cannot detect another Rp */ + case TYPEC_CC_VOLT_RP_DEF: + case TYPEC_CC_VOLT_RP_1_5: + case TYPEC_CC_VOLT_RP_3_0: + return TYPEC_CC_VOLT_OPEN; + default: + return volt; + } + default: + /* As Ra or open we cannot detect anything */ + return TYPEC_CC_VOLT_OPEN; + } +} + +/** Check description in emul_tcpci.h */ +int tcpci_emul_connect_partner(const struct emul *emul, + enum pd_power_role partner_power_role, + enum tcpc_cc_voltage_status partner_cc1, + enum tcpc_cc_voltage_status partner_cc2, + enum tcpc_cc_polarity polarity) +{ + enum tcpc_cc_voltage_status cc1_v, cc2_v; + uint16_t cc_status, alert, role_ctrl; + enum tcpc_cc_pull cc1_r, cc2_r; + + if (polarity == POLARITY_CC1) { + cc1_v = partner_cc1; + cc2_v = partner_cc2; + } else { + cc1_v = partner_cc2; + cc2_v = partner_cc1; + } + + tcpci_emul_get_reg(emul, TCPC_REG_CC_STATUS, &cc_status); + if (TCPC_REG_CC_STATUS_LOOK4CONNECTION(cc_status)) { + /* Change resistors values in case of DRP toggling */ + if (partner_power_role == PD_ROLE_SOURCE) { + /* TCPCI is sink */ + cc1_r = TYPEC_CC_RD; + cc2_r = TYPEC_CC_RD; + } else { + /* TCPCI is src */ + cc1_r = TYPEC_CC_RP; + cc2_r = TYPEC_CC_RP; + } + } else { + /* Use role control resistors values otherwise */ + tcpci_emul_get_reg(emul, TCPC_REG_ROLE_CTRL, &role_ctrl); + cc1_r = TCPC_REG_ROLE_CTRL_CC1(role_ctrl); + cc2_r = TCPC_REG_ROLE_CTRL_CC2(role_ctrl); + } + + cc1_v = tcpci_emul_detected_volt_for_res(cc1_r, cc1_v); + cc2_v = tcpci_emul_detected_volt_for_res(cc2_r, cc2_v); + + /* If CC status is TYPEC_CC_VOLT_RP_*, then BIT(2) is ignored */ + cc_status = TCPC_REG_CC_STATUS_SET( + partner_power_role == PD_ROLE_SOURCE ? 1 : 0, + cc2_v, cc1_v); + tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, cc_status); + tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert); + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, + alert | TCPC_REG_ALERT_CC_STATUS); + + if (partner_power_role == PD_ROLE_SOURCE) { + /* Set TCPCI emulator VBUS to present (connected, above 4V) */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_VBUS_PRES | + TCPC_REG_POWER_STATUS_VBUS_DET); + } + + tcpci_emul_alert_changed(emul); + + return 0; +} + +/** Check description in emul_tcpci.h */ +void tcpci_emul_partner_msg_status(const struct emul *emul, + enum tcpci_emul_tx_status status) +{ + uint16_t alert; + uint16_t tx_status_alert; + + switch (status) { + case TCPCI_EMUL_TX_SUCCESS: + tx_status_alert = TCPC_REG_ALERT_TX_SUCCESS; + break; + case TCPCI_EMUL_TX_DISCARDED: + tx_status_alert = TCPC_REG_ALERT_TX_DISCARDED; + break; + case TCPCI_EMUL_TX_FAILED: + tx_status_alert = TCPC_REG_ALERT_TX_FAILED; + break; + default: + __ASSERT(0, "Invalid partner TX status 0x%x", status); + return; + } + + tcpci_emul_get_reg(emul, TCPC_REG_ALERT, &alert); + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, alert | tx_status_alert); + tcpci_emul_alert_changed(emul); +} + /** Mask reserved bits in each register of TCPCI */ static const uint8_t tcpci_emul_rsvd_mask[] = { [TCPC_REG_VENDOR_ID] = 0x00, @@ -392,8 +570,9 @@ static void tcpci_emul_reset_role_ctrl(const struct emul *emul) * are not changed. * * @param emul Pointer to TCPCI emulator + * @return 0 if successful */ -static void tcpci_emul_reset(const struct emul *emul) +static int tcpci_emul_reset(const struct emul *emul) { struct tcpci_emul_data *data = emul->data; @@ -438,15 +617,16 @@ static void tcpci_emul_reset(const struct emul *emul) data->dev_ops->reset(emul, data->dev_ops); } - tcpci_emul_alert_changed(emul); + return tcpci_emul_alert_changed(emul); } /** * @brief Set alert and fault registers to indicate i2c interface fault * * @param emul Pointer to TCPCI emulator + * @return 0 if successful */ -static void tcpci_emul_set_i2c_interface_err(const struct emul *emul) +static int tcpci_emul_set_i2c_interface_err(const struct emul *emul) { struct tcpci_emul_data *data = emul->data; @@ -454,7 +634,7 @@ static void tcpci_emul_set_i2c_interface_err(const struct emul *emul) TCPC_REG_FAULT_STATUS_I2C_INTERFACE_ERR; data->reg[TCPC_REG_ALERT + 1] |= TCPC_REG_ALERT_FAULT >> 8; - tcpci_emul_alert_changed(emul); + return tcpci_emul_alert_changed(emul); } /** @@ -581,6 +761,8 @@ static int tcpci_emul_read_byte(struct i2c_emul *i2c_emul, int reg, emul = i2c_emul->parent; data = TCPCI_DATA_FROM_I2C_EMUL(i2c_emul); + LOG_DBG("TCPCI 0x%x: read reg 0x%x", i2c_emul->addr, reg); + if (data->dev_ops && data->dev_ops->read_byte) { switch (data->dev_ops->read_byte(emul, data->dev_ops, reg, val, bytes)) { @@ -789,6 +971,8 @@ static int tcpci_emul_write_byte(struct i2c_emul *i2c_emul, int reg, static int tcpci_emul_handle_command(const struct emul *emul) { struct tcpci_emul_data *data = emul->data; + uint16_t role_ctrl; + uint16_t pwr_ctrl; switch (data->write_data & 0xff) { case TCPC_REG_COMMAND_RESET_TRANSMIT_BUF: @@ -799,12 +983,31 @@ static int tcpci_emul_handle_command(const struct emul *emul) data->rx_msg->idx = 0; } break; + case TCPC_REG_COMMAND_LOOK4CONNECTION: + tcpci_emul_get_reg(emul, TCPC_REG_ROLE_CTRL, &role_ctrl); + tcpci_emul_get_reg(emul, TCPC_REG_POWER_CTRL, &pwr_ctrl); + + /* + * Start DRP toggling only if auto discharge is disabled, + * DRP is enabled and CC1/2 are both Rp or Rd + */ + if (!(pwr_ctrl & TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT) + && TCPC_REG_ROLE_CTRL_DRP(role_ctrl) && + (TCPC_REG_ROLE_CTRL_CC1(role_ctrl) == + TCPC_REG_ROLE_CTRL_CC2(role_ctrl)) && + (TCPC_REG_ROLE_CTRL_CC1(role_ctrl) == TYPEC_CC_RP || + TCPC_REG_ROLE_CTRL_CC1(role_ctrl) == TYPEC_CC_RD)) { + /* Set Look4Connection and clear CC1/2 state */ + tcpci_emul_set_reg( + emul, TCPC_REG_CC_STATUS, + TCPC_REG_CC_STATUS_LOOK4CONNECTION_MASK); + } + break; case TCPC_REG_COMMAND_ENABLE_VBUS_DETECT: case TCPC_REG_COMMAND_SNK_CTRL_LOW: case TCPC_REG_COMMAND_SNK_CTRL_HIGH: case TCPC_REG_COMMAND_SRC_CTRL_LOW: case TCPC_REG_COMMAND_SRC_CTRL_HIGH: - case TCPC_REG_COMMAND_LOOK4CONNECTION: case TCPC_REG_COMMAND_I2CIDLE: break; default: @@ -845,6 +1048,42 @@ static int tcpci_emul_handle_transmit(const struct emul *emul) } /** + * @brief Load next rx message and inform partner which message was consumed + * by TCPC + * + * @param emul Pointer to TCPCI emulator + * + * @return 0 when there is no new message to load + * @return 1 when new rx message is loaded + */ +static int tcpci_emul_get_next_rx_msg(const struct emul *emul) +{ + struct tcpci_emul_data *data = emul->data; + struct tcpci_emul_msg *consumed_msg; + + if (data->rx_msg == NULL) { + return 0; + } + + consumed_msg = data->rx_msg; + data->rx_msg = consumed_msg->next; + + /* Inform partner */ + if (data->partner && data->partner->rx_consumed) { + data->partner->rx_consumed(emul, data->partner, consumed_msg); + } + + /* Prepare new loaded message */ + if (data->rx_msg) { + data->rx_msg->idx = 0; + + return 1; + } + + return 0; +} + +/** * @brief Handle I2C write message. It is checked if accessed register isn't RO * and reserved bits are set to 0. * @@ -865,6 +1104,7 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, bool inform_partner = false; bool alert_changed = false; int reg_bytes; + int rc; /* This write message was setting register before read */ if (msg_len == 1) { @@ -877,6 +1117,9 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, emul = i2c_emul->parent; data = TCPCI_DATA_FROM_I2C_EMUL(i2c_emul); + LOG_DBG("TCPCI 0x%x: write reg 0x%x val 0x%x", i2c_emul->addr, reg, + data->write_data); + if (data->dev_ops && data->dev_ops->handle_write) { switch (data->dev_ops->handle_write(emul, data->dev_ops, reg, msg_len)) { @@ -897,13 +1140,9 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, data->write_data &= ~TCPC_REG_ALERT_RX_BUF_OVF; if (data->write_data & TCPC_REG_ALERT_RX_STATUS) { data->write_data |= TCPC_REG_ALERT_RX_BUF_OVF; - /* Load next message if possible */ - if (data->rx_msg && data->rx_msg->next) { + /* Do not clear RX status if there is new message */ + if (tcpci_emul_get_next_rx_msg(emul)) { data->write_data &= ~TCPC_REG_ALERT_RX_STATUS; - data->rx_msg = data->rx_msg->next; - data->rx_msg->idx = 0; - } else { - data->rx_msg = NULL; } } /* fallthrough */ @@ -1017,7 +1256,9 @@ static int tcpci_emul_handle_write(struct i2c_emul *i2c_emul, int reg, tcpci_emul_set_reg(emul, reg, data->write_data); if (alert_changed) { - tcpci_emul_alert_changed(emul); + rc = tcpci_emul_alert_changed(emul); + if (rc != 0) + return rc; } if (inform_partner && data->partner && data->partner->control_change) { @@ -1079,10 +1320,10 @@ static int tcpci_emul_init(const struct emul *emul, const struct device *parent) i2c_common_emul_init(&data->common); ret = i2c_emul_register(parent, emul->dev_label, &data->common.emul); + if (ret != 0) + return ret; - tcpci_emul_reset(emul); - - return ret; + return tcpci_emul_reset(emul); } #define TCPCI_EMUL(n) \ @@ -1101,6 +1342,16 @@ static int tcpci_emul_init(const struct emul *emul, const struct device *parent) .read_byte = tcpci_emul_read_byte, \ .access_reg = tcpci_emul_access_reg, \ }, \ + .alert_gpio_port = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, alert_gpio), \ + (DEVICE_DT_GET(DT_GPIO_CTLR( \ + DT_INST_PROP(n, alert_gpio), gpios))), \ + (NULL)), \ + .alert_gpio_pin = COND_CODE_1( \ + DT_INST_NODE_HAS_PROP(n, alert_gpio), \ + (DT_GPIO_PIN(DT_INST_PROP(n, alert_gpio), \ + gpios)), \ + (0)), \ }; \ \ static const struct i2c_common_emul_cfg tcpci_emul_cfg_##n = { \ diff --git a/zephyr/firmware_builder.py b/zephyr/firmware_builder.py index 446ad20bee..78a202a56e 100755 --- a/zephyr/firmware_builder.py +++ b/zephyr/firmware_builder.py @@ -32,7 +32,6 @@ def build(opts): f.write(json_format.MessageToJson(metrics)) targets = [ - 'projects/kohaku', 'projects/posix-ec', 'projects/volteer/volteer', ] @@ -99,18 +98,14 @@ def bundle_firmware(opts): bundle_dir = get_bundle_dir(opts) zephyr_dir = pathlib.Path(__file__).parent platform_ec = zephyr_dir.resolve().parent - for project in zmake.project.find_projects(zephyr_dir): - build_dir = zmake.util.resolve_build_dir(platform_ec, - project.project_dir, None) + for project in zmake.project.find_projects(zephyr_dir).values(): + build_dir = platform_ec / "build" / "zephyr" / project.config.project_name artifacts_dir = build_dir / 'output' # TODO(kmshelton): Remove once the build command does not rely # on a pre-defined list of targets. if not artifacts_dir.is_dir(): continue - project_identifier = '_'.join( - project.project_dir. - parts[project.project_dir.parts.index('projects') + 1:]) - tarball_name = '{}.firmware.tbz2'.format(project_identifier) + tarball_name = '{}.firmware.tbz2'.format(project.config.project_name) tarball_path = bundle_dir.joinpath(tarball_name) cmd = ['tar', 'cvfj', tarball_path, '.'] subprocess.run(cmd, cwd=artifacts_dir, check=True) @@ -137,6 +132,10 @@ def test(opts): # proceeding. subprocess.run([zephyr_dir / 'zmake' / 'run_tests.sh'], check=True) + # Run formatting checks on all BUILD.py files. + config_files = zephyr_dir.rglob("**/BUILD.py") + subprocess.run(["black", "--diff", "--check", *config_files], check=True) + subprocess.run(['zmake', '-D', 'testall'], check=True) # Run the test with coverage also, as sometimes they behave differently. diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 1f8d0c6546..8767ee7c5b 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -60,6 +60,11 @@ }; }; + fiu0: cros-flash{ + compatible = "nuvoton,npcx-cros-flash"; + label = "INTERNAL_FLASH"; + }; + soc { cros_kb_raw: cros-kb-raw@400a3000 { @@ -109,14 +114,6 @@ label = "MTC"; }; - fiu0: cros-flash@40020000 { - compatible = "nuvoton,npcx-cros-flash"; - reg = <0x40020000 0x80000>; - clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL1 2>; - label = "FLASH_INTERFACE_UNIT0"; - pinctrl-0 = <>; - }; - shi: shi@4000f000 { compatible = "nuvoton,npcx-cros-shi"; reg = <0x4000f000 0x120>; diff --git a/zephyr/include/emul/emul_charger.h b/zephyr/include/emul/emul_charger.h new file mode 100644 index 0000000000..87303181e8 --- /dev/null +++ b/zephyr/include/emul/emul_charger.h @@ -0,0 +1,66 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for USB-C charger emulator + */ + +#ifndef __EMUL_CHARGER_H +#define __EMUL_CHARGER_H + +#include <emul.h> +#include "emul/emul_tcpci.h" + +/** + * @brief USB-C charger emulator backend API + * @defgroup charger_emul USB-C charger emulator + * @{ + * + * USB-C charger emulator can be attached to TCPCI emulator. It is able to + * respond to some TCPM messages. It always attach as source and present + * hardcoded set of source capabilities. + */ + +/** Structure describing charger emulator */ +struct charger_emul_data { + /** Operations used by TCPCI emulator */ + struct tcpci_emul_partner_ops ops; + /** Work used to send message with delay */ + struct k_work_delayable delayed_send; + /** Pointer to connected TCPCI emulator */ + const struct emul *tcpci_emul; + /** Queue for delayed messages */ + struct k_fifo to_send; + /** Next SOP message id */ + int msg_id; +}; + +/** + * @brief Initialise USB-C charger emulator. Need to be called before any other + * function. + * + * @param data Pointer to USB-C charger emulator + */ +void charger_emul_init(struct charger_emul_data *data); + +/** + * @brief Connect emulated device to TCPCI + * + * @param data Pointer to USB-C charger emulator + * @param tcpci_emul Poinetr to TCPCI emulator to connect + * + * @return 0 on success + * @return negative on TCPCI connect error or send source capabilities error + */ +int charger_emul_connect_to_tcpci(struct charger_emul_data *data, + const struct emul *tcpci_emul); + +/** + * @} + */ + +#endif /* __EMUL_CHARGER */ diff --git a/zephyr/include/emul/emul_ps8xxx.h b/zephyr/include/emul/emul_ps8xxx.h new file mode 100644 index 0000000000..110def22ec --- /dev/null +++ b/zephyr/include/emul/emul_ps8xxx.h @@ -0,0 +1,141 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * @file + * + * @brief Backend API for PS8xxx emulator + */ + +#ifndef __EMUL_PS8XXX_H +#define __EMUL_PS8XXX_H + +#include <emul.h> +#include <drivers/i2c.h> +#include <drivers/i2c_emul.h> + +/** + * @brief PS8xxx emulator backend API + * @defgroup ps8xxx_emul PS8xxx emulator + * @{ + * + * PS8xxx emulator is extension for the TCPCI emulator. It is able to emulate + * PS8805 and PS8815 devices. It registers "hidden" I2C devices with the I2C + * emulation controller. + * Application may alter emulator state: + * + * - call @ref ps8xxx_emul_set_product_id to select which device is emulated + * (PS8805 or PS8815) + * - call @ref ps8xxx_emul_get_tcpci to get TCPCI emulator pointer that is used + * as base for PS8xxx emulator. The pointer can be used in tcpci_emul_* + * functions. + * - call @ref ps8xxx_emul_get_i2c_emul to get "hidden" I2C device (port 0, 1 + * or GPIO) + * - call @ref ps8xxx_emul_set_chip_rev to set PS8805 chip revision + * - call @ref ps8xxx_emul_set_hw_rev to set PS8815 HW revision + * - call @ref ps8xxx_emul_set_gpio_ctrl to set GPIO control register + */ + +/** Types of "hidden" I2C devices */ +enum ps8xxx_emul_port { + PS8XXX_EMUL_PORT_0, + PS8XXX_EMUL_PORT_1, + PS8XXX_EMUL_PORT_GPIO, + PS8XXX_EMUL_PORT_INVAL, +}; + +/* For now all devices supported by this emulator has the same FW rev reg */ +#define PS8XXX_REG_FW_REV 0x82 + +/** + * @brief Get pointer to specific "hidden" I2C device + * + * @param emul Pointer to PS8xxx emulator + * @param port Select which "hidden" I2C device should be obtained + * + * @return NULL if given "hidden" I2C device cannot be found + * @return pointer to "hidden" I2C device + */ +struct i2c_emul *ps8xxx_emul_get_i2c_emul(const struct emul *emul, + enum ps8xxx_emul_port port); + +/** + * @brief Get pointer to TCPCI emulator that is base for PS8xxx emulator + * + * @param emul Pointer to PS8xxx emulator + * + * @return pointer to TCPCI emulator + */ +const struct emul *ps8xxx_emul_get_tcpci(const struct emul *emul); + +/** + * @brief Set value of chip revision register on PS8805 + * + * @param emul Pointer to PS8xxx emulator + * @param chip_rev Value to be set + */ +void ps8xxx_emul_set_chip_rev(const struct emul *emul, uint8_t chip_rev); + +/** + * @brief Set value of HW revision register on PS8815 + * + * @param emul Pointer to PS8xxx emulator + * @param hw_rev Value to be set + */ +void ps8xxx_emul_set_hw_rev(const struct emul *emul, uint16_t hw_rev); + +/** + * @brief Set value of GPIO control register + * + * @param emul Pointer to PS8xxx emulator + * @param gpio_ctrl Value to be set + */ +void ps8xxx_emul_set_gpio_ctrl(const struct emul *emul, uint8_t gpio_ctrl); + +/** + * @brief Get value of GPIO control register + * + * @param emul Pointer to PS8xxx emulator + * + * @return Value of GPIO control register + */ +uint8_t ps8xxx_emul_get_gpio_ctrl(const struct emul *emul); + +/** + * @brief Get value of mux usb DCI configuration register + * + * @param emul Pointer to PS8xxx emulator + * + * @return Value of mux usb DCI configuration register + */ +uint8_t ps8xxx_emul_get_dci_cfg(const struct emul *emul); + +/** + * @brief Set product ID of emulated PS8xxx device. This change behaviour + * of emulator to mimic that device. Currently supported are PS8805 and + * PS8815 + * + * @param emul Pointer to PS8xxx emulator + * @param product_id Value to be set + * + * @return 0 on success + * @return -EINVAL when unsupported product ID is selected + */ +int ps8xxx_emul_set_product_id(const struct emul *emul, uint16_t product_id); + +/** + * @brief Get product ID of emulated PS8xxx device + * + * @param emul Pointer to PS8xxx emulator + * + * @return Product ID of emulated PS8xxx device + */ +uint16_t ps8xxx_emul_get_product_id(const struct emul *emul); + +/** + * @} + */ + +#endif /* __EMUL_PS8XXX */ diff --git a/zephyr/include/emul/emul_sn5s330.h b/zephyr/include/emul/emul_sn5s330.h index ad6d0f04c1..00b473e206 100644 --- a/zephyr/include/emul/emul_sn5s330.h +++ b/zephyr/include/emul/emul_sn5s330.h @@ -27,4 +27,11 @@ struct i2c_emul *sn5s330_emul_to_i2c_emul(const struct emul *emul); */ int sn5s330_emul_peek_reg(const struct emul *emul, uint32_t reg, uint32_t *val); +/** + * @brief Reset the sn5s330 emulator + * + * @param emul The emulator to reset + */ +void sn5s330_emul_reset(const struct emul *emul); + #endif /* ZEPHYR_INCLUDE_EMUL_EMUL_SN5S330_H_ */ diff --git a/zephyr/include/emul/emul_syv682x.h b/zephyr/include/emul/emul_syv682x.h index 46580e8257..ebfa094d77 100644 --- a/zephyr/include/emul/emul_syv682x.h +++ b/zephyr/include/emul/emul_syv682x.h @@ -24,15 +24,16 @@ #define SYV682X_CONTROL_4_REG 0x04 /* Status Register */ -#define SYV682X_STATUS_OC_HV BIT(7) -#define SYV682X_STATUS_RVS BIT(6) -#define SYV682X_STATUS_OC_5V BIT(5) -#define SYV682X_STATUS_OVP BIT(4) -#define SYV682X_STATUS_FRS BIT(3) -#define SYV682X_STATUS_TSD BIT(2) -#define SYV682X_STATUS_VSAFE_5V BIT(1) -#define SYV682X_STATUS_VSAFE_0V BIT(0) -#define SYV682X_STATUS_INT_MASK 0xfc +#define SYV682X_STATUS_OC_HV BIT(7) +#define SYV682X_STATUS_RVS BIT(6) +#define SYV682X_STATUS_OC_5V BIT(5) +#define SYV682X_STATUS_OVP BIT(4) +#define SYV682X_STATUS_FRS BIT(3) +#define SYV682X_STATUS_TSD BIT(2) +#define SYV682X_STATUS_VSAFE_5V BIT(1) +#define SYV682X_STATUS_VSAFE_0V BIT(0) +#define SYV682X_STATUS_INT_MASK 0xfc +#define SYV682X_STATUS_NONE 0 /* Control Register 1 */ #define SYV682X_CONTROL_1_CH_SEL BIT(1) @@ -99,6 +100,7 @@ #define SYV682X_CONTROL_4_VCONN_OCP BIT(2) #define SYV682X_CONTROL_4_CC_FRS BIT(1) #define SYV682X_CONTROL_4_INT_MASK 0x0c +#define SYV682X_CONTROL_4_NONE 0 /** * @brief Get pointer to SYV682x emulator using device tree order number. @@ -110,24 +112,17 @@ struct i2c_emul *syv682x_emul_get(int ord); /** - * @brief Set the underlying interrupt conditions affecting the status register + * @brief Set the underlying interrupt conditions affecting the SYV682x * - * @param emul SYV682x emulator - * @param val A status register value corresponding to the underlying - * conditions - */ -void syv682x_emul_set_status(struct i2c_emul *emul, uint8_t val); - -/** - * @brief Set the underlying interrupt conditions affecting the control 4 - * register - * - * @param emul SYV682x emulator - * @param val A control 4 register value corresponding to the underlying - * conditions; only the bits in SYV682X_CONTROL_4_INT_MASK have an - * effect. + * @param emul SYV682x emulator + * @param status A status register value corresponding to the underlying + * conditions + * @param control_4 A control 4 register value corresponding to the underlying + * conditions; only the bits in SYV682X_CONTROL_4_INT_MASK have + * an effect. */ -void syv682x_emul_set_control_4(struct i2c_emul *emul, uint8_t val); +void syv682x_emul_set_condition(struct i2c_emul *emul, uint8_t status, + uint8_t control_4); /** * @brief Set value of a register of SYV682x diff --git a/zephyr/include/emul/emul_tcpci.h b/zephyr/include/emul/emul_tcpci.h index 9d4f2b8c42..7be5b2711c 100644 --- a/zephyr/include/emul/emul_tcpci.h +++ b/zephyr/include/emul/emul_tcpci.h @@ -77,6 +77,13 @@ enum tcpci_emul_rev { TCPCI_EMUL_REV2_0_VER1_1 }; +/** Status of TX message send to TCPCI emulator partner */ +enum tcpci_emul_tx_status { + TCPCI_EMUL_TX_SUCCESS, + TCPCI_EMUL_TX_DISCARDED, + TCPCI_EMUL_TX_FAILED +}; + /** TCPCI specific device operations. Not all of them need to be implemented. */ struct tcpci_emul_dev_ops { /** @@ -165,6 +172,17 @@ struct tcpci_emul_partner_ops { */ void (*control_change)(const struct emul *emul, const struct tcpci_emul_partner_ops *ops); + + /** + * @brief Function called when TCPM consumes message send by partner + * + * @param emul Pointer to TCPCI emulator + * @param ops Pointer to partner operations structure + * @param rx_msg Message that was consumed by TCPM + */ + void (*rx_consumed)(const struct emul *emul, + const struct tcpci_emul_partner_ops *ops, + const struct tcpci_emul_msg *rx_msg); }; /** @@ -232,6 +250,65 @@ struct tcpci_emul_msg *tcpci_emul_get_tx_msg(const struct emul *emul); void tcpci_emul_set_rev(const struct emul *emul, enum tcpci_emul_rev rev); /** + * @brief Set callbacks for specific TCPC device emulator + * + * @param emul Pointer to TCPCI emulator + * @param dev_ops Pointer to callbacks + */ +void tcpci_emul_set_dev_ops(const struct emul *emul, + struct tcpci_emul_dev_ops *dev_ops); + +/** + * @brief Set callback which is called when alert register is changed + * + * @param emul Pointer to TCPCI emulator + * @param alert_callback Pointer to callback + * @param alert_callback_data Pointer to data passed to callback as an argument + */ +void tcpci_emul_set_alert_callback(const struct emul *emul, + tcpci_emul_alert_state_func alert_callback, + void *alert_callback_data); + +/** + * @brief Set callbacks for port partner device emulator + * + * @param emul Pointer to TCPCI emulator + * @param partner Pointer to callbacks + */ +void tcpci_emul_set_partner_ops(const struct emul *emul, + struct tcpci_emul_partner_ops *partner); + +/** + * @brief Emulate connection of specific device to emulated TCPCI + * + * @param emul Pointer to TCPCI emulator + * @param partner_power_role Power role of connected partner (sink or source) + * @param partner_cc1 Voltage on partner CC1 line (usually Rd or Rp) + * @param partner_cc2 Voltage on partner CC2 line (usually open or Ra if active + * cable is emulated) + * @param polarity Polarity of plug. If POLARITY_CC1 then partner_cc1 is + * connected to TCPCI CC1 line. Otherwise partner_cc1 is + * connected to TCPCI CC2 line. + * + * @return 0 on success + * @return negative on error + */ +int tcpci_emul_connect_partner(const struct emul *emul, + enum pd_power_role partner_power_role, + enum tcpc_cc_voltage_status partner_cc1, + enum tcpc_cc_voltage_status partner_cc2, + enum tcpc_cc_polarity polarity); + +/** + * @brief Allows port partner to select if message was received correctly + * + * @param emul Pointer to TCPCI emulator + * @param status Status of sended message + */ +void tcpci_emul_partner_msg_status(const struct emul *emul, + enum tcpci_emul_tx_status status); + +/** * @} */ diff --git a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h index 8702502a13..c4d176851d 100644 --- a/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h +++ b/zephyr/include/soc/nuvoton_npcx/reg_def_cros.h @@ -57,101 +57,6 @@ struct kbs_reg { #define KBS_CFG_INDX_CDIV 4 /* Keyboard Scan Clock Divisor */ /* - * Flash Interface Unit (FIU) device registers - */ -struct fiu_reg { - /* 0x001: Burst Configuration */ - volatile uint8_t BURST_CFG; - /* 0x002: FIU Response Configuration */ - volatile uint8_t RESP_CFG; - volatile uint8_t reserved1[18]; - /* 0x014: SPI Flash Configuration */ - volatile uint8_t SPI_FL_CFG; - volatile uint8_t reserved2; - /* 0x016: UMA Code Byte */ - volatile uint8_t UMA_CODE; - /* 0x017: UMA Address Byte 0 */ - volatile uint8_t UMA_AB0; - /* 0x018: UMA Address Byte 1 */ - volatile uint8_t UMA_AB1; - /* 0x019: UMA Address Byte 2 */ - volatile uint8_t UMA_AB2; - /* 0x01A: UMA Data Byte 0 */ - volatile uint8_t UMA_DB0; - /* 0x01B: UMA Data Byte 1 */ - volatile uint8_t UMA_DB1; - /* 0x01C: UMA Data Byte 2 */ - volatile uint8_t UMA_DB2; - /* 0x01D: UMA Data Byte 3 */ - volatile uint8_t UMA_DB3; - /* 0x01E: UMA Control and Status */ - volatile uint8_t UMA_CTS; - /* 0x01F: UMA Extended Control and Status */ - volatile uint8_t UMA_ECTS; - /* 0x020: UMA Data Bytes 0-3 */ - volatile uint32_t UMA_DB0_3; - volatile uint8_t reserved3[2]; - /* 0x026: CRC Control Register */ - volatile uint8_t CRCCON; - /* 0x027: CRC Entry Register */ - volatile uint8_t CRCENT; - /* 0x028: CRC Initialization and Result Register */ - volatile uint32_t CRCRSLT; - volatile uint8_t reserved4[4]; - /* 0x030: FIU Read Command */ - volatile uint8_t FIU_RD_CMD; - volatile uint8_t reserved5; - /* 0x032: FIU Dummy Cycles */ - volatile uint8_t FIU_DMM_CYC; - /* 0x033: FIU Extended Configuration */ - volatile uint8_t FIU_EXT_CFG; -}; - -/* FIU register fields */ -#define NPCX_RESP_CFG_IAD_EN 0 -#define NPCX_RESP_CFG_DEV_SIZE_EX 2 -#define NPCX_UMA_CTS_A_SIZE 3 -#define NPCX_UMA_CTS_C_SIZE 4 -#define NPCX_UMA_CTS_RD_WR 5 -#define NPCX_UMA_CTS_DEV_NUM 6 -#define NPCX_UMA_CTS_EXEC_DONE 7 -#define NPCX_UMA_ECTS_SW_CS0 0 -#define NPCX_UMA_ECTS_SW_CS1 1 -#define NPCX_UMA_ECTS_SEC_CS 2 -#define NPCX_UMA_ECTS_UMA_LOCK 3 - -/* UMA fields selections */ -#define UMA_FLD_ADDR BIT(NPCX_UMA_CTS_A_SIZE) /* 3-bytes ADR field */ -#define UMA_FLD_NO_CMD BIT(NPCX_UMA_CTS_C_SIZE) /* No 1-Byte CMD field */ -#define UMA_FLD_WRITE BIT(NPCX_UMA_CTS_RD_WR) /* Write transaction */ -#define UMA_FLD_SHD_SL BIT(NPCX_UMA_CTS_DEV_NUM) /* Shared flash selected */ -#define UMA_FLD_EXEC BIT(NPCX_UMA_CTS_EXEC_DONE) - -#define UMA_FIELD_DATA_1 0x01 -#define UMA_FIELD_DATA_2 0x02 -#define UMA_FIELD_DATA_3 0x03 -#define UMA_FIELD_DATA_4 0x04 - -/* UMA code for transaction */ -#define UMA_CODE_CMD_ONLY (UMA_FLD_EXEC | UMA_FLD_SHD_SL) -#define UMA_CODE_CMD_ADR (UMA_FLD_EXEC | UMA_FLD_ADDR | \ - UMA_FLD_SHD_SL) -#define UMA_CODE_CMD_RD_BYTE(n) (UMA_FLD_EXEC | UMA_FIELD_DATA_##n | \ - UMA_FLD_SHD_SL) -#define UMA_CODE_RD_BYTE(n) (UMA_FLD_EXEC | UMA_FLD_NO_CMD | \ - UMA_FIELD_DATA_##n | UMA_FLD_SHD_SL) -#define UMA_CODE_CMD_WR_ONLY (UMA_FLD_EXEC | UMA_FLD_WRITE | \ - UMA_FLD_SHD_SL) -#define UMA_CODE_CMD_WR_BYTE(n) (UMA_FLD_EXEC | UMA_FLD_WRITE | \ - UMA_FIELD_DATA_##n | UMA_FLD_SHD_SL) -#define UMA_CODE_CMD_WR_ADR (UMA_FLD_EXEC | UMA_FLD_WRITE | UMA_FLD_ADDR | \ - UMA_FLD_SHD_SL) - -#define UMA_CODE_CMD_ADR_WR_BYTE(n) (UMA_FLD_EXEC | UMA_FLD_WRITE | \ - UMA_FLD_ADDR | UMA_FIELD_DATA_##n | \ - UMA_FLD_SHD_SL) - -/* * Monotonic Counter (MTC) device registers */ struct mtc_reg { diff --git a/zephyr/projects/asurada/hayato/BUILD.py b/zephyr/projects/asurada/hayato/BUILD.py new file mode 100644 index 0000000000..5d7ca230b3 --- /dev/null +++ b/zephyr/projects/asurada/hayato/BUILD.py @@ -0,0 +1,9 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_binman_project( + project_name="hayato", + zephyr_board="asurada", + dts_overlays=["battery.dts", "gpio.dts", "motionsense.dts", "pwm.dts"], +) diff --git a/zephyr/projects/asurada/hayato/gpio.dts b/zephyr/projects/asurada/hayato/gpio.dts index f04171651f..380df3103d 100644 --- a/zephyr/projects/asurada/hayato/gpio.dts +++ b/zephyr/projects/asurada/hayato/gpio.dts @@ -27,14 +27,15 @@ enum-name = "GPIO_AP_EC_WARM_RST_REQ"; label = "AP_EC_WARM_RST_REQ"; }; - ap_ec_watchdog_l { - gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + ap_ec_watchdog_l: ap_ec_watchdog_l { + gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8 | + GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_EC_WATCHDOG_L"; label = "AP_EC_WATCHDOG_L"; }; - ap_in_sleep_l { + ap_in_sleep_l: ap_in_sleep_l { gpios = <&gpiof 2 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; + GPIO_VOLTAGE_1P8 | GPIO_ACTIVE_LOW)>; enum-name = "GPIO_AP_IN_SLEEP_L"; label = "AP_IN_SLEEP_L"; }; @@ -44,9 +45,9 @@ enum-name = "GPIO_AP_XHCI_INIT_DONE"; label = "AP_XHCI_INIT_DONE"; }; - pmic_ec_pwrgd { + pmic_ec_pwrgd: pmic_ec_pwrgd { gpios = <&gpiof 3 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; + GPIO_VOLTAGE_1P8 | GPIO_ACTIVE_HIGH)>; enum-name = "GPIO_PMIC_EC_PWRGD"; label = "PMIC_EC_PWRGD"; }; @@ -327,6 +328,22 @@ &lid_open>; }; + power_signal_list: power-signal-list { + compatible = "mt8192,power-signal-list"; + pmic_pwr_good { + power-enum-name = "PMIC_PWR_GOOD"; + power-gpio-pin = <&pmic_ec_pwrgd>; + }; + ap_in_s3_l { + power-enum-name = "AP_IN_S3_L"; + power-gpio-pin = <&ap_in_sleep_l>; + }; + ap_wdt_asserted { + power-enum-name = "AP_WDT_ASSERTED"; + power-gpio-pin = <&ap_ec_watchdog_l>; + }; + }; + unused-pins { compatible = "unused-gpios"; diff --git a/zephyr/projects/asurada/hayato/include/gpio_map.h b/zephyr/projects/asurada/hayato/include/gpio_map.h index 5f01f290d2..eb99aeb2dc 100644 --- a/zephyr/projects/asurada/hayato/include/gpio_map.h +++ b/zephyr/projects/asurada/hayato/include/gpio_map.h @@ -9,11 +9,6 @@ #include <devicetree.h> #include <gpio_signal.h> -/* - * TODO(b:188674805) create a driver to pull this information from DeviceTree - */ -#include "power/mt8192.h" - #define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED #define GPIO_WP_L GPIO_UNIMPLEMENTED diff --git a/zephyr/projects/asurada/hayato/include/pwm_map.h b/zephyr/projects/asurada/hayato/include/pwm_map.h deleted file mode 100644 index 5cf7377f52..0000000000 --- a/zephyr/projects/asurada/hayato/include/pwm_map.h +++ /dev/null @@ -1,15 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_CHROME_PWM_MAP_H -#define __ZEPHYR_CHROME_PWM_MAP_H - -#include <devicetree.h> - -#include "config.h" - -#include "pwm/pwm.h" - -#endif /* __ZEPHYR_CHROME_PWM_MAP_H */ diff --git a/zephyr/projects/asurada/hayato/prj.conf b/zephyr/projects/asurada/hayato/prj.conf index 283ec57a07..065bfb44ac 100644 --- a/zephyr/projects/asurada/hayato/prj.conf +++ b/zephyr/projects/asurada/hayato/prj.conf @@ -95,6 +95,7 @@ CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT=2 CONFIG_PLATFORM_EC_USB_PD_LOGGING=y CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y diff --git a/zephyr/projects/asurada/hayato/zmake.yaml b/zephyr/projects/asurada/hayato/zmake.yaml deleted file mode 100644 index 3564019276..0000000000 --- a/zephyr/projects/asurada/hayato/zmake.yaml +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: asurada -dts-overlays: - - battery.dts - - gpio.dts - - motionsense.dts - - pwm.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: binman diff --git a/zephyr/projects/kohaku/zmake.yaml b/zephyr/projects/brya/brya/BUILD.py index 5875a955b0..70696c1f3f 100644 --- a/zephyr/projects/kohaku/zmake.yaml +++ b/zephyr/projects/brya/brya/BUILD.py @@ -2,10 +2,8 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -board: kohaku -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx +register_npcx_project( + project_name="brya", + zephyr_board="brya", + dts_overlays=["gpio.dts"], +) diff --git a/zephyr/projects/brya/brya/gpio.dts b/zephyr/projects/brya/brya/gpio.dts index a472d7b8f7..daaa2db547 100644 --- a/zephyr/projects/brya/brya/gpio.dts +++ b/zephyr/projects/brya/brya/gpio.dts @@ -53,7 +53,7 @@ label = "EC_KSO_02_INV"; }; pch_wake_odl { - gpios = <&gpiob 0 GPIO_ODR_HIGH>; + gpios = <&gpioc 0 GPIO_ODR_HIGH>; enum-name = "GPIO_EC_PCH_WAKE_ODL"; label = "EC_PCH_WAKE_R_ODL"; }; @@ -62,6 +62,91 @@ enum-name = "GPIO_EC_INT_L"; label = "EC_PCH_INT_ODL"; }; + pg_ec_dsw_pwrok { + gpios = <&gpioc 7 GPIO_INPUT>; + enum-name = "GPIO_PG_EC_DSW_PWROK"; + label = "PG_EC_DSW_PWROK"; + }; + en_s5_rails { + gpios = <&gpiob 6 GPIO_OUT_LOW>; + enum-name = "GPIO_EN_S5_RAILS"; + label = "EN_S5_RAILS"; + }; + sys_rst_odl { + gpios = <&gpioc 5 GPIO_ODR_HIGH>; + enum-name = "GPIO_SYS_RESET_L"; + label = "SYS_RST_ODL"; + }; + pg_ec_rsmrst_odl { + gpios = <&gpioe 2 GPIO_INPUT>; + enum-name = "GPIO_PG_EC_RSMRST_ODL"; + label = "PG_EC_RSMRST_ODL"; + }; + ec_pch_rsmrst_odl { + gpios = <&gpioa 6 GPIO_OUT_LOW>; + enum-name = "GPIO_PCH_RSMRST_L"; + label = "EC_PCH_RSMRST_ODL"; + }; + pg_ec_all_sys_pwrgd { + gpios = <&gpiof 4 GPIO_INPUT>; + enum-name = "GPIO_PG_EC_ALL_SYS_PWRGD"; + label = "PG_EC_ALL_SYS_PWRGD"; + }; + slp_s0_l { + gpios = <&gpiod 5 GPIO_INPUT>; + enum-name = "GPIO_PCH_SLP_S0_L"; + label = "SLP_S0_L"; + }; + slp_s3_l { + gpios = <&gpioa 5 GPIO_INPUT>; + enum-name = "GPIO_PCH_SLP_S3_L"; + label = "SLP_S3_L"; + }; + vccst_pwrgd_od { + gpios = <&gpioa 4 GPIO_ODR_LOW>; + enum-name = "GPIO_VCCST_PWRGD_OD"; + label = "VCCST_PWRGD_OD"; + }; + ec_prochot_odl { + gpios = <&gpio6 3 GPIO_ODR_HIGH>; + enum-name = "GPIO_CPU_PROCHOT"; + label = "EC_PROCHOT_ODL"; + }; + ec_pch_pwr_btn_odl { + gpios = <&gpioc 1 GPIO_ODR_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + label = "EC_PCH_PWR_BTN_ODL"; + }; + slp_sus_l { + gpios = <&gpiof 1 GPIO_INPUT>; + enum-name = "GPIO_SLP_SUS_L"; + label = "SLP_SUS_L"; + }; + pch_pwrok { + gpios = <&gpio7 2 GPIO_OUT_LOW>; + enum-name = "GPIO_PCH_PWROK"; + label = "PCH_PWROK"; + }; + ec_pch_sys_pwrok { + gpios = <&gpio3 7 GPIO_OUT_LOW>; + enum-name = "GPIO_EC_PCH_SYS_PWROK"; + label = "EC_PCH_SYS_PWROK"; + }; + imvp9_vrrdy_od { + gpios = <&gpio4 3 GPIO_INPUT>; + enum-name = "GPIO_IMVP9_VRRDY_OD"; + label = "IMVP9_VRRDY_OD"; + }; + ec_edp_bl_en { + gpios = <&gpiod 3 GPIO_OUT_HIGH>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + label = "EC_EDP_BL_EN"; + }; + ec_prochot_in_l { + gpios = <&gpiof 0 GPIO_INPUT>; + enum-name = "GPIO_EC_PROCHOT_IN_L"; + label = "EC_PROCHOT_IN_L"; + }; }; hibernate-wake-pins { diff --git a/zephyr/projects/brya/brya/include/gpio_map.h b/zephyr/projects/brya/brya/include/gpio_map.h index 2bc104c6b9..ab0224d0d4 100644 --- a/zephyr/projects/brya/brya/include/gpio_map.h +++ b/zephyr/projects/brya/brya/include/gpio_map.h @@ -27,11 +27,29 @@ * #define EC_CROS_GPIO_INTERRUPTS \ * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) */ +/* Helper macros for generating CROS_EC_GPIO_INTERRUPTS */ +#ifdef CONFIG_PLATFORM_EC_POWERSEQ +#define POWER_SIGNAL_INT(gpio, edge) \ + GPIO_INT(gpio, edge, power_signal_interrupt) +#define AP_PROCHOT_INT(gpio, edge) \ + GPIO_INT(gpio, edge, throttle_ap_prochot_input_interrupt) +#else +#define POWER_SIGNAL_INT(gpio, edge) +#define AP_PROCHOT_INT(gpio, edge) +#endif + + #define EC_CROS_GPIO_INTERRUPTS \ GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt) \ GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH, \ power_button_interrupt) \ GPIO_INT(GPIO_WP_L, GPIO_INT_EDGE_BOTH, switch_interrupt) \ - GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) - + GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ + POWER_SIGNAL_INT(GPIO_PCH_SLP_S0_L, GPIO_INT_EDGE_BOTH) \ + POWER_SIGNAL_INT(GPIO_PCH_SLP_S3_L, GPIO_INT_EDGE_BOTH) \ + POWER_SIGNAL_INT(GPIO_SLP_SUS_L, GPIO_INT_EDGE_BOTH) \ + POWER_SIGNAL_INT(GPIO_PG_EC_DSW_PWROK, GPIO_INT_EDGE_BOTH) \ + POWER_SIGNAL_INT(GPIO_PG_EC_RSMRST_ODL, GPIO_INT_EDGE_BOTH) \ + POWER_SIGNAL_INT(GPIO_PG_EC_ALL_SYS_PWRGD, GPIO_INT_EDGE_BOTH) \ + AP_PROCHOT_INT(GPIO_EC_PROCHOT_IN_L, GPIO_INT_EDGE_BOTH) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/brya/brya/prj.conf b/zephyr/projects/brya/brya/prj.conf index b9dd1de26f..ae8e6e0d2d 100644 --- a/zephyr/projects/brya/brya/prj.conf +++ b/zephyr/projects/brya/brya/prj.conf @@ -17,15 +17,28 @@ CONFIG_PLATFORM_EC_VBOOT_HASH=y CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y CONFIG_PLATFORM_EC_I2C=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=y + +# SoC configuration +CONFIG_AP=y +CONFIG_AP_X86_INTEL_ADL=y +CONFIG_FPU=y +CONFIG_ARM_MPU=y -# eSPI, note that PLATFORM_EC_ESPI needs to be explicitly enabled because -# CONFIG_AP is not yet enabled. CONFIG_ESPI=y CONFIG_PLATFORM_EC_ESPI=y +CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y # Host command CONFIG_PLATFORM_EC_HOSTCMD=y +# Temperature sensors +CONFIG_PLATFORM_EC_TEMP_SENSOR=y +CONFIG_PLATFORM_EC_THERMISTOR=y + +# Miscellaneous configs +CONFIG_PLATFORM_EC_HIBERNATE_PSL=y + # Keyboard CONFIG_PLATFORM_EC_KEYBOARD=y CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042=y @@ -39,7 +52,17 @@ CONFIG_PLATFORM_EC_WORKAROUND_FLASH_DOWNLOAD_API=y CONFIG_SYSCON=y # TODO(b/188605676): bring these features up -CONFIG_PLATFORM_EC_ADC=n CONFIG_PLATFORM_EC_BACKLIGHT_LID=n CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n + +# Power Sequencing +CONFIG_PLATFORM_EC_POWERSEQ=y +CONFIG_PLATFORM_EC_POWERSEQ_PP5000_CONTROL=n +CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540=y +CONFIG_PLATFORM_EC_POWERSEQ_RTC_RESET=n +CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y +CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y +# Treat 2nd reset from H1 as Power-On +CONFIG_PLATFORM_EC_BOARD_RESET_AFTER_POWER_ON=y +CONFIG_PLATFORM_EC_THROTTLE_AP=y diff --git a/zephyr/projects/corsola/BUILD.py b/zephyr/projects/corsola/BUILD.py new file mode 100644 index 0000000000..e5336aa1f8 --- /dev/null +++ b/zephyr/projects/corsola/BUILD.py @@ -0,0 +1,37 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Default chip is it8xxx2, some variants will use NPCX9X. + + +def register_corsola_project( + project_name, + chip="it8xxx2", + extra_dts_overlays=(), + extra_kconfig_files=(), +): + register_func = register_binman_project + if chip.startswith("npcx9"): + register_func = register_npcx_project + + register_func( + project_name=project_name, + zephyr_board=chip, + dts_overlays=[*extra_dts_overlays], + kconfig_files=[here / "prj.conf", *extra_kconfig_files], + ) + + +register_corsola_project( + "krabby", + extra_dts_overlays=[ + here / "adc_krabby.dts", + here / "battery_krabby.dts", + here / "gpio_krabby.dts", + here / "i2c_krabby.dts", + here / "motionsense_krabby.dts", + here / "pwm_krabby.dts", + ], + extra_kconfig_files=[here / "prj_krabby.conf"], +) diff --git a/zephyr/projects/corsola/krabby/CMakeLists.txt b/zephyr/projects/corsola/CMakeLists.txt index 4f605d3a5c..c237bae135 100644 --- a/zephyr/projects/corsola/krabby/CMakeLists.txt +++ b/zephyr/projects/corsola/CMakeLists.txt @@ -26,7 +26,8 @@ zephyr_library_sources( # Include selected EC source from the board zephyr_library_sources( + "${PLATFORM_EC_BOARD}/hooks.c" "${PLATFORM_EC_BOARD}/led.c") zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C - "src/i2c.c") + "src/krabby/i2c.c") diff --git a/zephyr/projects/corsola/adc_krabby.dts b/zephyr/projects/corsola/adc_krabby.dts new file mode 100644 index 0000000000..7f308c04f9 --- /dev/null +++ b/zephyr/projects/corsola/adc_krabby.dts @@ -0,0 +1,54 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-adc-channels { + compatible = "named-adc-channels"; + + adc_vbus_c0 { + label = "ADC_VBUS_C0"; + enum-name = "ADC_VBUS_C0"; + channel = <0>; + mul = <10>; + }; + adc_board_id0 { + label = "ADC_BOARD_ID_0"; + enum-name = "ADC_BOARD_ID_0"; + channel = <1>; + }; + adc_board_id1 { + label = "ADC_BOARD_ID_1"; + enum-name = "ADC_BOARD_ID_1"; + channel = <2>; + }; + adc_charger_amon_r { + label = "ADC_AMON_BMON"; + enum-name = "ADC_AMON_BMON"; + channel = <3>; + mul = <1000>; + div = <18>; + }; + adc_vbus_c1 { + label = "ADC_VBUS_C1"; + enum-name = "ADC_VBUS_C1"; + channel = <5>; + mul = <10>; + }; + adc_charger_pmon { + label = "ADC_PMON"; + enum-name = "ADC_PMON"; + channel = <6>; + }; + adc-psys { + label = "ADC_PSYS"; + enum-name = "ADC_PSYS"; + channel = <6>; + }; + }; +}; + +&adc0 { + status = "okay"; +}; diff --git a/zephyr/projects/corsola/krabby/battery.dts b/zephyr/projects/corsola/battery_krabby.dts index deb803bb8c..deb803bb8c 100644 --- a/zephyr/projects/corsola/krabby/battery.dts +++ b/zephyr/projects/corsola/battery_krabby.dts diff --git a/zephyr/projects/corsola/gpio_krabby.dts b/zephyr/projects/corsola/gpio_krabby.dts new file mode 100644 index 0000000000..29fc7dd879 --- /dev/null +++ b/zephyr/projects/corsola/gpio_krabby.dts @@ -0,0 +1,341 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + gpiox: gpio@0 { + status = "okay"; + compatible = "zephyr,gpio-emul"; + label = "GPIO_UNIMPLEMENTED"; + reg = <0x800 0x4>; + rising-edge; + falling-edge; + high-level; + low-level; + gpio-controller; + #gpio-cells = <2>; + }; + + named-gpios { + compatible = "named-gpios"; + + power_button_l: power_button_l { + gpios = <&gpioe 4 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + label = "POWER_BUTTON_L"; + }; + lid_open: lid_open { + gpios = <&gpioe 2 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + label = "LID_OPEN"; + }; + tablet_mode_l: tablet_mode_l { + gpios = <&gpioj 7 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + label = "TABLET_MODE_L"; + }; + ap_ec_warm_rst_req: ap_ec_warm_rst_req { + gpios = <&gpiod 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_AP_EC_WARM_RST_REQ"; + label = "AP_EC_WARM_RST_REQ"; + }; + ap_in_sleep_l: ap_in_sleep_l { + gpios = <&gpiob 6 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_AP_IN_SLEEP_L"; + label = "AP_IN_SLEEP_L"; + }; + base_imu_int_l: base_imu_int_l { + gpios = <&gpiom 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_BASE_IMU_INT_L"; + label = "BASE_IMU_INT_L"; + }; + lid_accel_int_l: lid_accel_int_l { + gpios = <&gpiom 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_LID_ACCEL_INT_L"; + label = "LID_ACCEL_INT_L"; + }; + volume_down_l: volume_down_l { + gpios = <&gpiod 5 GPIO_INPUT>; + enum-name = "GPIO_VOLUME_DOWN_L"; + label = "VOLUME_DOWN_L"; + }; + volume_up_l: volume_up_l { + gpios = <&gpiod 6 GPIO_INPUT>; + enum-name = "GPIO_VOLUME_UP_L"; + label = "VOLUME_UP_L"; + }; + ap_xhci_init_done: ap_xhci_init_done { + gpios = <&gpioj 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_AP_XHCI_INIT_DONE"; + label = "AP_XHCI_INIT_DONE"; + }; + ac_present: ac_present { + gpios = <&gpioe 5 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + label = "AC_PRESENT"; + }; + wp: wp { + gpios = <&gpioi 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_WP"; + label = "WP"; + }; + spi0_cs: spi0_cs { + gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_SPI0_CS"; + label = "SPI0_CS"; + }; + x_ec_gpio2: x_ec_gpio2 { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_ODR_HIGH)>; + enum-name = "GPIO_X_EC_GPIO2"; + label = "X_EC_GPIO2"; + }; + usb_c0_ppc_bc12_int_odl: usb_c0_ppc_bc12_int_odl { + gpios = <&gpiod 1 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PPC_BC12_INT_ODL"; + label = "USB_C0_PPC_BC12_INT_ODL"; + }; + usb_c1_bc12_charger_int_odl: usb_c1_bc12_charger_int_odl { + gpios = <&gpioj 4 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_BC12_CHARGER_INT_ODL"; + label = "USB_C1_BC12_CHARGER_INT_ODL"; + }; + ec_pmic_en_odl: ec_pmic_en_odl { + gpios = <&gpiod 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_PMIC_EN_ODL"; + label = "EC_PMIC_EN_ODL"; + }; + en_pp5000_z2: en_pp5000_z2 { + gpios = <&gpioc 6 GPIO_OUT_HIGH>; + enum-name = "GPIO_EN_PP5000_Z2"; + label = "EN_PP5000_Z2"; + }; + en_ulp: en_ulp { + gpios = <&gpioe 3 GPIO_OUT_LOW>; + enum-name = "GPIO_EN_ULP"; + label = "EN_ULP"; + }; + sys_rst_odl: sys_rst_odl { + gpios = <&gpiog 1 GPIO_ODR_LOW>; + enum-name = "GPIO_SYS_RST_ODL"; + label = "SYS_RST_ODL"; + }; + ec_bl_en_od: ec_bl_en_od { + gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_BL_EN_OD"; + label = "EC_BL_EN_OD"; + }; + ap_ec_sysrst_odl: ap_ec_sysrst_odl { + gpios = <&gpioj 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_AP_EC_SYSRST_ODL"; + label = "AP_EC_SYSRST_ODL"; + }; + ap_ec_wdtrst_l: ap_ec_wdtrst_l { + gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_AP_EC_WDTRST_L"; + label = "AP_EC_WDTRST_L"; + }; + ec_int_l: ec_int_l { + gpios = <&gpioe 6 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_EC_INT_L"; + label = "EC_INT_L"; + }; + dp_aux_path_sel: dp_aux_path_sel { + gpios = <&gpiog 0 GPIO_OUT_HIGH>; + enum-name = "GPIO_DP_AUX_PATH_SEL"; + label = "DP_AUX_PATH_SEL"; + }; + ec_ap_dp_hpd_odl: ec_ap_dp_hpd_odl { + gpios = <&gpioj 0 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_AP_DP_HPD_ODL"; + label = "EC_AP_DP_HPD_ODL"; + }; + en_pp5000_usb_a0_vbus: en_pp5000_usb_a0_vbus { + gpios = <&gpiob 7 GPIO_OUT_LOW>; + enum-name = "GPIO_EN_PP5000_USB_A0_VBUS"; + label = "EN_PP5000_USB_A0_VBUS"; + }; + usb_c0_ppc_frsinfo: usb_c0_ppc_frsinfo { + gpios = <&gpiof 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PPC_FRSINFO"; + label = "USB_C0_PPC_FRSINFO"; + }; + ec_batt_pres_odl: ec_batt_pres_odl { + gpios = <&gpioc 0 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + label = "BATT_PRES_ODL"; + }; + en_ec_id_odl: en_ec_id_odl { + gpios = <&gpioh 5 GPIO_ODR_LOW>; + enum-name = "GPIO_EN_EC_ID_ODL"; + label = "EN_EC_ID_ODL"; + }; + entering_rw: entering_rw { + gpios = <&gpioc 5 GPIO_OUT_LOW>; + enum-name = "GPIO_ENTERING_RW"; + label = "ENTERING_RW"; + }; + en_5v_usm: en_5v_usm { + gpios = <&gpiog 3 GPIO_OUT_LOW>; + enum-name = "GPIO_EN_5V_USM"; + label = "EN_5V_USM"; + }; + usb_a0_fault_odl: usb_a0_fault_odl { + gpios = <&gpioj 6 GPIO_INPUT>; + enum-name = "GPIO_USB_A0_FAULT_ODL"; + label = "USB_A0_FAULT_ODL"; + }; + i2c_a_scl: i2c_a_scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_I2C_A_SCL"; + label = "I2C_A_SCL"; + }; + i2c_a_sda: i2c_a_sda { + gpios = <&gpiob 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_I2C_A_SDA"; + label = "I2C_A_SDA"; + }; + i2c_b_scl: i2c_b_scl { + gpios = <&gpioc 1 GPIO_INPUT>; + enum-name = "GPIO_I2C_B_SCL"; + label = "I2C_B_SCL"; + }; + i2c_b_sda: i2c_b_sda { + gpios = <&gpioc 2 GPIO_INPUT>; + enum-name = "GPIO_I2C_B_SDA"; + label = "I2C_B_SDA"; + }; + i2c_c_scl: i2c_c_scl { + gpios = <&gpiof 6 GPIO_INPUT>; + enum-name = "GPIO_I2C_C_SCL"; + label = "I2C_C_SCL"; + }; + i2c_c_sda: i2c_c_sda { + gpios = <&gpiof 7 GPIO_INPUT>; + enum-name = "GPIO_I2C_C_SDA"; + label = "I2C_C_SDA"; + }; + i2c_d_scl: i2c_d_scl { + gpios = <&gpiof 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_I2C_D_SCL"; + label = "I2C_D_SCL"; + }; + i2c_d_sda: i2c_d_sda { + gpios = <&gpiof 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + enum-name = "GPIO_I2C_D_SDA"; + label = "I2C_D_SDA"; + }; + i2c_e_scl: i2c_e_scl { + gpios = <&gpioe 0 GPIO_INPUT>; + enum-name = "GPIO_I2C_E_SCL"; + label = "I2C_E_SCL"; + }; + i2c_e_sda: i2c_e_sda { + gpios = <&gpioe 7 GPIO_INPUT>; + enum-name = "GPIO_I2C_E_SDA"; + label = "I2C_E_SDA"; + }; + i2c_f_scl: i2c_f_scl { + gpios = <&gpioa 4 GPIO_INPUT>; + enum-name = "GPIO_I2C_F_SCL"; + label = "I2C_F_SCL"; + }; + i2c_f_sda: i2c_f_sda { + gpios = <&gpioa 5 GPIO_INPUT>; + enum-name = "GPIO_I2C_F_SDA"; + label = "I2C_F_SDA"; + }; + ec_x_gpio1: ec_x_gpio1 { + gpios = <&gpioh 4 GPIO_OUT_LOW>; + enum-name = "GPIO_EC_X_GPIO1"; + label = "EC_X_GPIO1"; + }; + ec_x_gpio3: ec_x_gpio3 { + gpios = <&gpioj 1 GPIO_INPUT>; + enum-name = "GPIO_EC_X_GPIO3"; + label = "EC_X_GPIO3"; + }; + hdmi_prsnt_odl: hdmi_prsnt_odl { + gpios = <&gpioj 3 GPIO_INPUT>; + enum-name = "GPIO_HDMI_PRSNT_ODL"; + label = "HDMI_PRSNT_ODL"; + }; + + /* pins used in power/mt8192, to be removed */ + ap_ec_watchdog_l: ap_ec_watchdog_l { + gpios = <&gpiox 0 GPIO_INPUT>; + enum-name = "GPIO_AP_EC_WATCHDOG_L"; + label = "AP_EC_WATCHDOG_L"; + }; + ec_pmic_watchdog_l: ec_pmic_watchdog_l { + gpios = <&gpiox 0 GPIO_INPUT>; + enum-name = "GPIO_EC_PMIC_WATCHDOG_L"; + label = "EC_PMIC_WATCHDOG_L"; + }; + pmic_ec_pwrgd: pmic_ec_pwrgd { + gpios = <&gpiox 0 GPIO_INPUT>; + enum-name = "GPIO_PMIC_EC_PWRGD"; + label = "PMIC_EC_PWRGD"; + }; + }; + + hibernate-wake-pins { + compatible = "cros-ec,hibernate-wake-pins"; + wakeup-pins = <&ac_present + &power_button_l + &lid_open>; + }; + + power_signal_list: power-signal-list { + compatible = "mt8192,power-signal-list"; + pmic_pwr_good { + power-enum-name = "PMIC_PWR_GOOD"; + power-gpio-pin = <&pmic_ec_pwrgd>; + }; + ap_in_s3_l { + power-enum-name = "AP_IN_S3_L"; + power-gpio-pin = <&ap_in_sleep_l>; + }; + ap_wdt_asserted { + power-enum-name = "AP_WDT_ASSERTED"; + power-gpio-pin = <&ap_ec_watchdog_l>; + }; + }; + + unused-pins { + compatible = "unused-gpios"; + + unused-gpios = + /* packet_mode_en */ + <&gpiod 4 GPIO_OUT_LOW>, + /* pg_pp5000_z2_od */ + <&gpiod 2 GPIO_INPUT>, + /* pg_mt6315_proc_b_odl */ + <&gpioe 1 GPIO_INPUT>, + /* ec_pen_chg_dis_odl */ + <&gpioh 3 GPIO_ODR_HIGH>, + /* ccd_mode_odl */ + <&gpioc 4 GPIO_INPUT>, + /* uart1_rx */ + <&gpiob 0 GPIO_INPUT>, + /* unnamed nc pins */ + <&gpioa 3 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpioa 6 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpioa 7 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpioc 3 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpiod 7 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpiof 1 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpioh 0 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpioh 6 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpioi 7 (GPIO_INPUT | GPIO_PULL_DOWN)>, + <&gpiom 6 (GPIO_INPUT | GPIO_PULL_DOWN)>, + /* spi_clk_gpg6 */ + <&gpiog 6 (GPIO_INPUT | GPIO_PULL_UP)>, + /* spi_mosi_gpg4 */ + <&gpiog 4 GPIO_OUT_LOW>, + /* spi_miso_gpg5 */ + <&gpiog 5 GPIO_OUT_LOW>, + /* spi_cs_gpg7 */ + <&gpiog 7 GPIO_OUT_LOW>; + }; +}; diff --git a/zephyr/projects/corsola/i2c_krabby.dts b/zephyr/projects/corsola/i2c_krabby.dts new file mode 100644 index 0000000000..7205bf19bc --- /dev/null +++ b/zephyr/projects/corsola/i2c_krabby.dts @@ -0,0 +1,102 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-i2c-ports { + compatible = "named-i2c-ports"; + + power { + i2c-port = <&i2c0>; + enum-name = "I2C_PORT_POWER"; + label = "POWER"; + }; + battery { + i2c-port = <&i2c0>; + remote-port = <0>; + enum-name = "I2C_PORT_BATTERY"; + label = "BATTERY"; + }; + virtual-battery { + i2c-port = <&i2c0>; + enum-name = "I2C_PORT_VIRTUAL_BATTERY"; + label = "VIRTUAL_BATTERY"; + }; + eeprom { + i2c-port = <&i2c0>; + enum-name = "I2C_PORT_EEPROM"; + label = "EEPROM"; + }; + charger { + i2c-port = <&i2c0>; + enum-name = "I2C_PORT_CHARGER"; + label = "CHARGER"; + }; + i2c_sensor: sensor { + i2c-port = <&i2c1>; + enum-name = "I2C_PORT_SENSOR"; + label = "SENSOR"; + }; + i2c-accel { + i2c-port = <&i2c1>; + enum-name = "I2C_PORT_ACCEL"; + label = "ACCEL"; + }; + ppc0 { + i2c-port = <&i2c2>; + enum-name = "I2C_PORT_PPC0"; + label = "PPC0"; + }; + ppc1 { + i2c-port = <&i2c4>; + enum-name = "I2C_PORT_PPC1"; + label = "PPC1"; + }; + usb-c0 { + i2c-port = <&i2c2>; + enum-name = "I2C_PORT_USB_C0"; + label = "USB_C0"; + }; + usb-c1 { + i2c-port = <&i2c4>; + enum-name = "I2C_PORT_USB_C1"; + label = "USB_C1"; + }; + usb-mux0 { + i2c-port = <&i2c2>; + enum-name = "I2C_PORT_USB_MUX0"; + label = "USB_MUX0"; + }; + usb-mux1 { + i2c-port = <&i2c4>; + enum-name = "I2C_PORT_USB_MUX1"; + label = "USB_MUX1"; + }; + }; + +}; + +&i2c0 { + /* EC_I2C_PWR_CBI */ + status = "okay"; + clock-frequency = <I2C_BITRATE_STANDARD>; +}; + +&i2c1 { + /* EC_I2C_SENSOR */ + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c2 { + /* EC_I2C_USB_C0 */ + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c4 { + /* EC_I2C_USB_C1 */ + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; diff --git a/zephyr/projects/corsola/krabby/include/gpio_map.h b/zephyr/projects/corsola/include/gpio_map.h index 5f01f290d2..9122c85ffc 100644 --- a/zephyr/projects/corsola/krabby/include/gpio_map.h +++ b/zephyr/projects/corsola/include/gpio_map.h @@ -9,11 +9,6 @@ #include <devicetree.h> #include <gpio_signal.h> -/* - * TODO(b:188674805) create a driver to pull this information from DeviceTree - */ -#include "power/mt8192.h" - #define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED #define GPIO_WP_L GPIO_UNIMPLEMENTED @@ -21,6 +16,11 @@ #define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L #endif +/* TODO: remove after icm426xx driver added */ +static inline void motion_interrupt(enum gpio_signal signal) +{ +} + /* * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. * @@ -37,39 +37,33 @@ * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) */ #define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(GPIO_LID_OPEN, \ - GPIO_INT_EDGE_BOTH, lid_interrupt) \ GPIO_INT(GPIO_POWER_BUTTON_L, \ GPIO_INT_EDGE_BOTH, power_button_interrupt) \ - GPIO_INT(GPIO_EC_IMU_INT_L, \ - GPIO_INT_EDGE_FALLING, bmi160_interrupt) \ - GPIO_INT(GPIO_LID_ACCEL_INT_L, \ - GPIO_INT_EDGE_FALLING, lis2dw12_interrupt) \ + GPIO_INT(GPIO_LID_OPEN, \ + GPIO_INT_EDGE_BOTH, lid_interrupt) \ GPIO_INT(GPIO_TABLET_MODE_L, \ GPIO_INT_EDGE_BOTH, gmr_tablet_switch_isr) \ - GPIO_INT(GPIO_USB_C0_PPC_INT_ODL, \ - GPIO_INT_EDGE_BOTH, ppc_interrupt) \ - GPIO_INT(GPIO_USB_C0_BC12_INT_ODL, \ - GPIO_INT_EDGE_FALLING, bc12_interrupt) \ - GPIO_INT(GPIO_USB_C1_BC12_INT_L, \ - GPIO_INT_EDGE_FALLING, bc12_interrupt) \ - GPIO_INT(GPIO_AC_PRESENT, \ - GPIO_INT_EDGE_BOTH, extpower_interrupt) \ - GPIO_INT(GPIO_X_EC_GPIO2, \ - GPIO_INT_EDGE_FALLING, x_ec_interrupt) \ - GPIO_INT(GPIO_AP_XHCI_INIT_DONE, \ - GPIO_INT_EDGE_BOTH, usb_a0_interrupt) \ - GPIO_INT(GPIO_AP_EC_WATCHDOG_L, \ - GPIO_INT_EDGE_BOTH, chipset_watchdog_interrupt) \ + GPIO_INT(GPIO_AP_EC_WARM_RST_REQ, \ + GPIO_INT_EDGE_RISING, chipset_reset_request_interrupt) \ GPIO_INT(GPIO_AP_IN_SLEEP_L, \ GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ - GPIO_INT(GPIO_PMIC_EC_PWRGD, \ - GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ - GPIO_INT(GPIO_AP_EC_WARM_RST_REQ, \ - GPIO_INT_EDGE_RISING, chipset_reset_request_interrupt) \ + GPIO_INT(GPIO_BASE_IMU_INT_L, \ + GPIO_INT_EDGE_FALLING, motion_interrupt) \ + GPIO_INT(GPIO_LID_ACCEL_INT_L, \ + GPIO_INT_EDGE_FALLING, lis2dw12_interrupt) \ + GPIO_INT(GPIO_VOLUME_DOWN_L, \ + GPIO_INT_EDGE_BOTH, button_interrupt) \ + GPIO_INT(GPIO_VOLUME_UP_L, \ + GPIO_INT_EDGE_BOTH, button_interrupt) \ + GPIO_INT(GPIO_AP_XHCI_INIT_DONE, \ + GPIO_INT_EDGE_BOTH, usb_a0_interrupt) \ + GPIO_INT(GPIO_AC_PRESENT, \ + GPIO_INT_EDGE_BOTH, extpower_interrupt) \ + GPIO_INT(GPIO_WP, \ + GPIO_INT_EDGE_BOTH, switch_interrupt) \ GPIO_INT(GPIO_SPI0_CS, \ - GPIO_INT_EDGE_FALLING, spi_event) - -#define GPIO_EN_PP5000 GPIO_EN_PP5000_A + GPIO_INT_EDGE_FALLING, spi_event) \ + GPIO_INT(GPIO_X_EC_GPIO2, \ + GPIO_INT_EDGE_BOTH, x_ec_interrupt) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/corsola/krabby/include/i2c_map.h b/zephyr/projects/corsola/include/i2c_map.h index 898d5c398c..898d5c398c 100644 --- a/zephyr/projects/corsola/krabby/include/i2c_map.h +++ b/zephyr/projects/corsola/include/i2c_map.h diff --git a/zephyr/projects/corsola/kingler/BUILD.py b/zephyr/projects/corsola/kingler/BUILD.py new file mode 100644 index 0000000000..5a4b9722ea --- /dev/null +++ b/zephyr/projects/corsola/kingler/BUILD.py @@ -0,0 +1,9 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="kingler", + zephyr_board="npcx9", + dts_overlays=["battery.dts", "gpio.dts", "i2c.dts"], +) diff --git a/zephyr/projects/kohaku/CMakeLists.txt b/zephyr/projects/corsola/kingler/CMakeLists.txt index 5a8c045731..33e56afc0e 100644 --- a/zephyr/projects/kohaku/CMakeLists.txt +++ b/zephyr/projects/corsola/kingler/CMakeLists.txt @@ -5,6 +5,6 @@ cmake_minimum_required(VERSION 3.13.1) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(kohaku) +project(kingler) zephyr_library_include_directories(include) diff --git a/zephyr/projects/corsola/kingler/battery.dts b/zephyr/projects/corsola/kingler/battery.dts new file mode 100644 index 0000000000..02a6d0d3b9 --- /dev/null +++ b/zephyr/projects/corsola/kingler/battery.dts @@ -0,0 +1,12 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + batteries { + default_battery: aec_5477109 { + compatible = "aec,5477109"; + }; + }; +}; diff --git a/zephyr/projects/corsola/kingler/gpio.dts b/zephyr/projects/corsola/kingler/gpio.dts new file mode 100644 index 0000000000..638e95c9fb --- /dev/null +++ b/zephyr/projects/corsola/kingler/gpio.dts @@ -0,0 +1,337 @@ +/ { + named-gpios { + compatible = "named-gpios"; + + ec_wp_l { + gpios = <&gpio5 0 GPIO_INPUT>; + label = "EC_WP_L"; + enum-name = "GPIO_WP_L"; + }; + ccd_mode_odl { + gpios = <&gpioc 6 GPIO_ODR_HIGH>; + label = "CCD_MODE_ODL"; + }; + ec_gsc_packet_mode { + gpios = <&gpiob 1 GPIO_OUT_LOW>; + label = "EC_GSC_PACKET_MODE"; + }; + mech_pwr_btn_odl { + gpios = <&gpiod 2 GPIO_INPUT>; + label = "MECH_PWR_BTN_ODL"; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + ec_pwr_btn_odl { + gpios = <&gpio0 1 GPIO_INPUT>; + label = "EC_PWR_BTN_ODL"; + enum-name = "GPIO_EC_PWR_BTN_ODL"; + }; + slp_s3_l { + gpios = <&gpio6 1 GPIO_INPUT>; + label = "SLP_S3_L"; + enum-name = "GPIO_PCH_SLP_S3_L"; + }; + slp_s5_l { + gpios = <&gpio7 2 GPIO_INPUT>; + label = "SLP_S5_L"; + enum-name = "GPIO_PCH_SLP_S5_L"; + }; + slp_s3_s0i3_l { + gpios = <&gpio7 4 GPIO_INPUT>; + label = "SLP_S3_S0I3_L"; + enum-name = "GPIO_PCH_SLP_S0_L"; + }; + pg_pwr_s5 { + gpios = <&gpioc 0 GPIO_INPUT>; + label = "PG_PWR_S5"; + enum-name = "GPIO_S5_PGOOD"; + }; + pg_pcore_s0_r_od { + gpios = <&gpiob 6 GPIO_INPUT>; + label = "PG_PCORE_S0_R_OD"; + enum-name = "GPIO_S0_PGOOD"; + }; + acok_od { + gpios = <&gpio0 0 GPIO_INPUT>; + label = "ACOK_OD"; + enum-name = "GPIO_AC_PRESENT"; + }; + ec_pcore_int_odl { + gpios = <&gpiof 0 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_PCORE_INT_ODL"; + enum-name = "GPIO_EC_PCORE_INT_ODL"; + }; + pg_groupc_s0_od { + gpios = <&gpioa 3 GPIO_INPUT>; + label = "PG_GROUPC_S0_OD"; + enum-name = "GPIO_PG_GROUPC_S0_OD"; + }; + pg_lpddr4x_s3_od { + gpios = <&gpio9 5 GPIO_INPUT>; + label = "PG_LPDDR4X_S3_OD"; + enum-name = "GPIO_PG_LPDDR4X_S3_OD"; + }; + en_pwr_s5 { + gpios = <&gpiob 7 GPIO_OUT_LOW>; + label = "EN_PWR_S5"; + enum-name = "GPIO_EN_PWR_A"; + }; + en_pwr_s0_r { + gpios = <&gpiof 1 GPIO_OUT_LOW>; + label = "EN_PWR_S0_R"; + enum-name = "GPIO_EN_PWR_S0_R"; + }; + en_pwr_pcore_s0_r { + gpios = <&gpioe 1 GPIO_OUT_LOW>; + label = "EN_PWR_PCORE_S0_R"; + enum-name = "GPIO_EN_PWR_PCORE_S0_R"; + }; + ec_entering_rw { + gpios = <&gpio6 6 GPIO_OUT_LOW>; + label = "EC_ENTERING_RW"; + enum-name = "GPIO_ENTERING_RW"; + }; + ec_sys_rst_l { + gpios = <&gpio7 6 GPIO_ODR_HIGH>; + label = "EC_SYS_RST_L"; + enum-name = "GPIO_SYS_RESET_L"; + }; + ec_soc_rsmrst_l { + gpios = <&gpioc 5 GPIO_OUT_LOW>; + label = "EC_SOC_RSMRST_L"; + enum-name = "GPIO_PCH_RSMRST_L"; + }; + ec_clr_cmos { + gpios = <&gpioa 1 GPIO_OUT_LOW>; + label = "EC_CLR_CMOS"; + }; + ec_mem_event { + gpios = <&gpioa 5 GPIO_OUT_LOW>; + label = "EC_MEM_EVENT"; + }; + ec_soc_pwr_btn_l { + gpios = <&gpio6 3 GPIO_OUT_HIGH>; + label = "EC_SOC_PWR_BTN_L"; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + ec_soc_pwr_good { + gpios = <&gpiod 3 GPIO_OUT_LOW>; + label = "EC_SOC_PWR_GOOD"; + enum-name = "GPIO_PCH_SYS_PWROK"; + }; + ec_soc_wake_l { + gpios = <&gpio0 3 GPIO_OUT_HIGH>; + label = "EC_SOC_WAKE_L"; + enum-name = "GPIO_EC_PCH_WAKE_ODL"; + }; + ec_soc_int_l { + gpios = <&gpio8 3 GPIO_OUT_HIGH>; + label = "EC_SOC_INT_L"; + }; + prochot_odl { + gpios = <&gpiod 5 GPIO_ODR_HIGH>; + label = "PROCHOT_ODL"; + enum-name = "GPIO_CPU_PROCHOT"; + }; + soc_alert_ec_l { + gpios = <&gpioe 2 GPIO_INPUT>; + label = "SOC_ALERT_EC_L"; + }; + soc_thermtrip_odl { + gpios = <&gpioe 5 GPIO_INPUT>; + label = "SOC_THERMTRIP_ODL"; + }; + usb_c0_tcpc_int_odl { + gpios = <&gpioe 0 GPIO_INPUT>; + label = "USB_C0_TCPC_INT_ODL"; + }; + usb_c1_tcpc_int_odl { + gpios = <&gpioc 7 GPIO_INPUT>; + label = "USB_C1_TCPC_INT_ODL"; + }; + usb_c0_ppc_int_odl { + gpios = <&gpio7 5 GPIO_INPUT>; + label = "USB_C0_PPC_INT_ODL"; + }; + usb_c1_ppc_int_odl { + gpios = <&gpiod 4 GPIO_INPUT>; + label = "USB_C1_PPC_INT_ODL"; + }; + usb_c0_bc12_int_odl { + gpios = <&gpioa 4 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "USB_C0_BC12_INT_ODL"; + }; + usb_c1_bc12_int_odl { + gpios = <&gpio9 6 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "USB_C1_BC12_INT_ODL"; + }; + usb_c0_c1_fault_odl { + gpios = <&gpio7 3 GPIO_ODR_HIGH>; + label = "USB_C0_C1_FAULT_ODL"; + }; + usb_c0_tcpc_rst_l { + gpios = <&gpio3 4 GPIO_OUT_HIGH>; + label = "USB_C0_TCPC_RST_L"; + }; + usb_c1_tcpc_rst_l { + gpios = <&gpio3 7 GPIO_OUT_HIGH>; + label = "USB_C1_TCPC_RST_L"; + }; + usb_c0_hpd { + gpios = <&gpiof 5 GPIO_OUT_LOW>; + label = "USB_C0_HPD"; + }; + usb_c1_hpd { + gpios = <&gpiof 4 GPIO_OUT_LOW>; + label = "USB_C1_HPD"; + }; + 3axis_int_l { + gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_DOWN)>; + label = "3AXIS_INT_L"; + }; + lid_open { + gpios = <&gpio0 2 GPIO_INPUT>; + label = "LID_OPEN"; + enum-name = "GPIO_LID_OPEN"; + }; + voldn_btn_odl { + gpios = <&gpioa 7 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "VOLDN_BTN_ODL"; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + volup_btn_odl { + gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "VOLUP_BTN_ODL"; + enum-name = "GPIO_VOLUME_UP_L"; + }; + ec_batt_pres_odl { + gpios = <&gpio9 4 GPIO_INPUT>; + label = "EC_BATT_PRES_ODL"; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + ec_disable_disp_bl { + gpios = <&gpioa 6 GPIO_OUT_HIGH>; + label = "EC_DISABLE_DISP_BL"; + }; + ec_i2c_usb_a0_c0_scl { + gpios = <&gpiob 5 GPIO_INPUT>; + label = "EC_I2C_USB_A0_C0_SCL"; + }; + ec_i2c_usb_a0_c0_sda { + gpios = <&gpiob 4 GPIO_INPUT>; + label = "EC_I2C_USB_A0_C0_SDA"; + }; + ec_i2c_usb_a1_c1_scl { + gpios = <&gpio9 0 GPIO_INPUT>; + label = "EC_I2C_USB_A1_C1_SCL"; + }; + ec_i2c_usb_a1_c1_sda { + gpios = <&gpio8 7 GPIO_INPUT>; + label = "EC_I2C_USB_A1_C1_SDA"; + }; + ec_i2c_batt_scl { + gpios = <&gpio9 2 GPIO_INPUT>; + label = "EC_I2C_BATT_SCL"; + }; + ec_i2c_batt_sda { + gpios = <&gpio9 1 GPIO_INPUT>; + label = "EC_I2C_BATT_SDA"; + }; + ec_i2c_usbc_mux_scl { + gpios = <&gpiod 1 GPIO_INPUT>; + label = "EC_I2C_USBC_MUX_SCL"; + }; + ec_i2c_usbc_mux_sda { + gpios = <&gpiod 0 GPIO_INPUT>; + label = "EC_I2C_USBC_MUX_SDA"; + }; + ec_i2c_power_scl { + gpios = <&gpiof 3 GPIO_INPUT>; + label = "EC_I2C_POWER_SCL"; + }; + ec_i2c_power_sda { + gpios = <&gpiof 2 GPIO_INPUT>; + label = "EC_I2C_POWER_SDA"; + }; + ec_i2c_cbi_scl { + gpios = <&gpio3 3 GPIO_INPUT>; + label = "EC_I2C_CBI_SCL"; + }; + ec_i2c_cbi_sda { + gpios = <&gpio3 6 GPIO_INPUT>; + label = "EC_I2C_CBI_SDA"; + }; + ec_i2c_sensor_scl { + gpios = <&gpioe 4 GPIO_INPUT>; + label = "EC_I2C_SENSOR_SCL"; + }; + ec_i2c_sensor_sda { + gpios = <&gpioe 3 GPIO_INPUT>; + label = "EC_I2C_SENSOR_SDA"; + }; + ec_i2c_soc_sic { + gpios = <&gpiob 3 GPIO_INPUT>; + label = "EC_I2C_SOC_SIC"; + }; + ec_i2c_soc_sid { + gpios = <&gpiob 2 GPIO_INPUT>; + label = "EC_I2C_SOC_SID"; + }; + en_kb_bl { + gpios = <&gpio9 7 GPIO_OUT_HIGH>; + label = "EN_KB_BL"; + }; + ec_kso_02_inv { + gpios = <&gpio1 7 GPIO_OUT_LOW>; + label = "EC_KSO_02_INV"; + enum-name = "GPIO_KBD_KSO2"; + }; + ec_espi_rst_l { + gpios = <&gpio5 4 GPIO_PULL_UP>; + label = "EC_ESPI_RST_L"; + }; + 6axis_int_l { + gpios = <&gpioa 0 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "6AXIS_INT_L"; + }; + tablet_mode { + gpios = <&gpioc 1 GPIO_INPUT>; + label = "TABLET_MODE"; + }; + ec_gpio56 { + gpios = <&gpio5 6 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_GPIO56"; + }; + ec_ps2_clk { + gpios = <&gpio6 7 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_PS2_CLK"; + }; + ec_ps2_dat { + gpios = <&gpio7 0 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_PS2_DAT"; + }; + ec_ps2_rst { + gpios = <&gpio6 2 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_PS2_RST"; + }; + ec_gpiob0 { + gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_GPIOB0"; + }; + ec_gpio81 { + gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_GPIO81"; + }; + ec_flprg2 { + gpios = <&gpio8 6 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_FLPRG2"; + }; + ec_psl_gpo { + gpios = <&gpiod 7 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_PSL_GPO"; + }; + ec_pwm7 { + gpios = <&gpio6 0 (GPIO_INPUT | GPIO_PULL_UP)>; + label = "EC_PWM7"; + }; + }; +}; diff --git a/zephyr/projects/corsola/kingler/i2c.dts b/zephyr/projects/corsola/kingler/i2c.dts new file mode 100644 index 0000000000..699c4b9b7b --- /dev/null +++ b/zephyr/projects/corsola/kingler/i2c.dts @@ -0,0 +1,38 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + i2c-0 = &i2c0_0; + i2c-1 = &i2c1_0; + i2c-2 = &i2c2_0; + i2c-3 = &i2c3_0; + i2c-4 = &i2c4_1; + i2c-5 = &i2c5_0; + i2c-7 = &i2c7_0; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + + battery { + i2c-port = <&i2c2_0>; + remote-port = <0>; + enum-name = "I2C_PORT_BATTERY"; + label = "BATTERY"; + }; + }; + + +}; + +&i2c2_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_STANDARD>; +}; + +&i2c_ctrl2 { + status = "okay"; +}; diff --git a/zephyr/projects/corsola/kingler/include/gpio_map.h b/zephyr/projects/corsola/kingler/include/gpio_map.h new file mode 100644 index 0000000000..025bb78743 --- /dev/null +++ b/zephyr/projects/corsola/kingler/include/gpio_map.h @@ -0,0 +1,29 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_GPIO_MAP_H +#define __ZEPHYR_GPIO_MAP_H + +#include <devicetree.h> +#include <gpio_signal.h> + +/* + * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. + * + * Each GPIO_INT requires three parameters: + * gpio_signal - The enum gpio_signal for the interrupt gpio + * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) + * handler - The platform/ec interrupt handler. + * + * Ensure that this files includes all necessary headers to declare all + * referenced handler functions. + * + * For example, one could use the follow definition: + * #define EC_CROS_GPIO_INTERRUPTS \ + * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) + */ +#define EC_CROS_GPIO_INTERRUPTS + +#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/kohaku/prj.conf b/zephyr/projects/corsola/kingler/prj.conf index 06e296c4ce..d09697de5d 100644 --- a/zephyr/projects/kohaku/prj.conf +++ b/zephyr/projects/corsola/kingler/prj.conf @@ -5,33 +5,48 @@ CONFIG_CROS_EC=y CONFIG_PLATFORM_EC=y CONFIG_SHIMMED_TASKS=y - CONFIG_ESPI=y -CONFIG_I2C=y + +# Shell features +CONFIG_SHELL_HELP=y +CONFIG_SHELL_HISTORY=y +CONFIG_SHELL_TAB_AUTOCOMPLETION=y +CONFIG_KERNEL_SHELL=y CONFIG_PLATFORM_EC_VBOOT_EFS2=n # Power sequencing CONFIG_AP=y -CONFIG_AP_X86_INTEL_CML=y -CONFIG_PLATFORM_EC_POWERSEQ=y -CONFIG_PLATFORM_EC_POWERSEQ_S0IX=y # Power button CONFIG_PLATFORM_EC_POWER_BUTTON=y # External power +CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y +CONFIG_PLATFORM_EC_BACKLIGHT_LID=n # Lid switch CONFIG_PLATFORM_EC_LID_SWITCH=y -CONFIG_PLATFORM_EC_KEYBOARD=n -CONFIG_CROS_KB_RAW_NPCX=n +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD=y +CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y + +CONFIG_SYSCON=y + +# Battery +CONFIG_PLATFORM_EC_BATTERY=y +CONFIG_PLATFORM_EC_BATTERY_SMART=y +CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y +CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=n +CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y + +CONFIG_PLATFORM_EC_CHARGER=n +CONFIG_PLATFORM_EC_USBC=n # This is not yet supported CONFIG_PLATFORM_EC_ADC=n CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n - -CONFIG_SYSCON=y diff --git a/zephyr/projects/corsola/krabby/gpio.dts b/zephyr/projects/corsola/krabby/gpio.dts deleted file mode 100644 index f04171651f..0000000000 --- a/zephyr/projects/corsola/krabby/gpio.dts +++ /dev/null @@ -1,347 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/ { - named-gpios { - compatible = "named-gpios"; - - power_button_l: power_button_l { - gpios = <&gpioe 4 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_POWER_BUTTON_L"; - label = "POWER_BUTTON_L"; - }; - lid_open: lid_open { - gpios = <&gpioe 2 GPIO_INPUT>; - enum-name = "GPIO_LID_OPEN"; - label = "LID_OPEN"; - }; - tablet_mode_l { - gpios = <&gpioj 7 GPIO_INPUT>; - enum-name = "GPIO_TABLET_MODE_L"; - label = "TABLET_MODE_L"; - }; - ap_ec_warm_rst_req { - gpios = <&gpiod 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_AP_EC_WARM_RST_REQ"; - label = "AP_EC_WARM_RST_REQ"; - }; - ap_ec_watchdog_l { - gpios = <&gpioc 7 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_AP_EC_WATCHDOG_L"; - label = "AP_EC_WATCHDOG_L"; - }; - ap_in_sleep_l { - gpios = <&gpiof 2 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_AP_IN_SLEEP_L"; - label = "AP_IN_SLEEP_L"; - }; - ap-xhci-init-done { - gpios = <&gpiod 2 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_AP_XHCI_INIT_DONE"; - label = "AP_XHCI_INIT_DONE"; - }; - pmic_ec_pwrgd { - gpios = <&gpiof 3 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_PMIC_EC_PWRGD"; - label = "PMIC_EC_PWRGD"; - }; - gpio_accel_gyro_int_l: base_imu_int_l { - gpios = <&gpioj 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EC_IMU_INT_L"; - label = "BASE_IMU_INT_L"; - }; - lid_accel_int_l { - gpios = <&gpioj 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_LID_ACCEL_INT_L"; - label = "LID_ACCEL_INT_L"; - }; - als_rgb_int_odl { - gpios = <&gpiof 0 GPIO_INPUT>; - enum-name = "GPIO_ALS_RGB_INT_ODL"; - label = "ALS_RGB_INT_ODL"; - }; - usb_c0_ppc_int_odl { - gpios = <&gpiod 1 GPIO_INPUT>; - enum-name = "GPIO_USB_C0_PPC_INT_ODL"; - label = "USB_C0_PPC_INT_ODL"; - }; - usb_c0_bc12_int_odl { - gpios = <&gpioj 6 GPIO_INPUT>; - enum-name = "GPIO_USB_C0_BC12_INT_ODL"; - label = "USB_C0_BC12_INT_ODL"; - }; - usb_c1_bc12_int_l { - gpios = <&gpioj 4 GPIO_INPUT>; - enum-name = "GPIO_USB_C1_BC12_INT_L"; - label = "USB_C1_BC12_INT_L"; - }; - volume_down_l { - gpios = <&gpiod 5 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_VOLUME_DOWN_L"; - label = "VOLUME_DOWN_L"; - }; - volume_up_l { - gpios = <&gpiod 6 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_VOLUME_UP_L"; - label = "VOLUME_UP_L"; - }; - ac_present: ac_present { - gpios = <&gpioe 5 GPIO_INPUT>; - enum-name = "GPIO_AC_PRESENT"; - label = "AC_PRESENT"; - }; - wp { - gpios = <&gpioi 4 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_WP"; - label = "WP"; - }; - spi0_cs { - gpios = <&gpiom 5 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_SPI0_CS"; - label = "SPI0_CS"; - }; - x_ec_gpio2 { - gpios = <&gpiob 2 GPIO_ODR_HIGH>; - enum-name = "GPIO_X_EC_GPIO2"; - label = "X_EC_GPIO2"; - }; - ec_pmic_en_odl { - gpios = <&gpiod 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EC_PMIC_EN_ODL"; - label = "EC_PMIC_EN_ODL"; - }; - ec_pmic_watchdog_l { - gpios = <&gpioh 0 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EC_PMIC_WATCHDOG_L"; - label = "EC_PMIC_WATCHDOG_L"; - }; - en_pp5000_a { - gpios = <&gpioc 6 GPIO_OUT_HIGH>; - enum-name = "GPIO_EN_PP5000_A"; - label = "EN_PP5000_A"; - }; - pg_mt6315_proc_odl { - gpios = <&gpioe 1 GPIO_INPUT>; - enum-name = "GPIO_PG_MT6315_PROC_ODL"; - label = "PG_MT6315_PROC_ODL"; - }; - pg_mt6360_odl { - gpios = <&gpiof 1 GPIO_INPUT>; - enum-name = "GPIO_PG_MT6360_ODL"; - label = "PG_MT6360_ODL"; - }; - pg_pp5000_a_odl { - gpios = <&gpioa 6 GPIO_INPUT>; - enum-name = "GPIO_PG_PP5000_A_ODL"; - label = "PG_PP5000_A_ODL"; - }; - en_slp_z { - gpios = <&gpioe 3 GPIO_OUT_LOW>; - enum-name = "GPIO_EN_SLP_Z"; - label = "EN_SLP_Z"; - }; - sys_rst_odl { - gpios = <&gpiob 6 GPIO_ODR_LOW>; - enum-name = "GPIO_SYS_RST_ODL"; - label = "SYS_RST_ODL"; - }; - ec_bl_en_od { - gpios = <&gpiob 5 (GPIO_ODR_LOW | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EC_BL_EN_OD"; - label = "EC_BL_EN_OD"; - }; - ec_int_l { - gpios = <&gpioe 6 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EC_INT_L"; - label = "EC_INT_L"; - }; - dp_aux_path_sel { - gpios = <&gpiog 0 GPIO_OUT_HIGH>; - enum-name = "GPIO_DP_AUX_PATH_SEL"; - label = "DP_AUX_PATH_SEL"; - }; - ec_dpbrdg_hpd_odl { - gpios = <&gpioj 0 (GPIO_ODR_HIGH | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EC_DPBRDG_HPD_ODL"; - label = "EC_DPBRDG_HPD_ODL"; - }; - en_pp5000_usb_a0_vbus { - gpios = <&gpiob 7 GPIO_OUT_LOW>; - enum-name = "GPIO_EN_PP5000_USB_A0_VBUS"; - label = "EN_PP5000_USB_A0_VBUS"; - }; - usb_c0_frs_en { - gpios = <&gpioh 3 GPIO_OUT_LOW>; - enum-name = "GPIO_USB_C0_FRS_EN"; - label = "USB_C0_FRS_EN"; - }; - ec_batt_pres_odl { - gpios = <&gpioc 0 GPIO_INPUT>; - enum-name = "GPIO_BATT_PRES_ODL"; - label = "EC_BATT_PRES_ODL"; - }; - bc12_det_en { - gpios = <&gpioj 5 GPIO_OUT_LOW>; - enum-name = "GPIO_BC12_DET_EN"; - label = "BC12_DET_EN"; - }; - en_ec_id_odl { - gpios = <&gpioh 5 GPIO_ODR_LOW>; - enum-name = "GPIO_EN_EC_ID_ODL"; - label = "EN_EC_ID_ODL"; - }; - entering_rw { - gpios = <&gpioc 5 GPIO_OUT_LOW>; - enum-name = "GPIO_ENTERING_RW"; - label = "ENTERING_RW"; - }; - en_5v_usm { - gpios = <&gpiod 7 GPIO_OUT_LOW>; - enum-name = "GPIO_EN_5V_USM"; - label = "EN_5V_USM"; - }; - i2c_b_scl { - gpios = <&gpiob 3 GPIO_INPUT>; - enum-name = "GPIO_I2C_B_SCL"; - label = "I2C_B_SCL"; - }; - i2c_b_sda { - gpios = <&gpiob 4 GPIO_INPUT>; - enum-name = "GPIO_I2C_B_SDA"; - label = "I2C_B_SDA"; - }; - i2c_c_scl { - gpios = <&gpioc 1 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_I2C_C_SCL"; - label = "I2C_C_SCL"; - }; - i2c_c_sda { - gpios = <&gpioc 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_I2C_C_SDA"; - label = "I2C_C_SDA"; - }; - i2c_e_scl { - gpios = <&gpioe 0 GPIO_INPUT>; - enum-name = "GPIO_I2C_E_SCL"; - label = "I2C_E_SCL"; - }; - i2c_e_sda { - gpios = <&gpioe 7 GPIO_INPUT>; - enum-name = "GPIO_I2C_E_SDA"; - label = "I2C_E_SDA"; - }; - i2c_f_scl { - gpios = <&gpiof 6 GPIO_INPUT>; - enum-name = "GPIO_I2C_F_SCL"; - label = "I2C_F_SCL"; - }; - i2c_f_sda { - gpios = <&gpiof 7 GPIO_INPUT>; - enum-name = "GPIO_I2C_F_SDA"; - label = "I2C_F_SDA"; - }; - ec_x_gpio1 { - gpios = <&gpioh 4 GPIO_OUT_LOW>; - enum-name = "GPIO_EC_X_GPIO1"; - label = "EC_X_GPIO1"; - }; - ec_x_gpio3 { - gpios = <&gpioj 1 GPIO_INPUT>; - enum-name = "GPIO_EC_X_GPIO3"; - label = "EC_X_GPIO3"; - }; - set_vmc_volt_at_1v8 { - gpios = <&gpiod 4 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_SET_VMC_VOLT_AT_1V8"; - label = "SET_VMC_VOLT_AT_1V8"; - }; - en_pp3000_vmc_pmu { - gpios = <&gpiod 2 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EN_PP3000_VMC_PMU"; - label = "EN_PP3000_VMC_PMU"; - }; - packet_mode_en { - gpios = <&gpioa 3 (GPIO_INPUT | GPIO_PULL_DOWN)>; - enum-name = "GPIO_PACKET_MODE_EN"; - label = "PACKET_MODE_EN"; - }; - usb_a0_fault_odl { - gpios = <&gpioa 7 GPIO_INPUT>; - enum-name = "GPIO_USB_A0_FAULT_ODL"; - label = "USB_A0_FAULT_ODL"; - }; - charger_prochot_odl { - gpios = <&gpioc 3 GPIO_INPUT>; - enum-name = "GPIO_CHARGER_PROCHOT_ODL"; - label = "CHARGER_PROCHOT_ODL"; - }; - pg_mt6315_gpu_odl { - gpios = <&gpioh 6 GPIO_INPUT>; - enum-name = "GPIO_PG_MT6315_GPU_ODL"; - label = "PG_MT6315_GPU_ODL"; - }; - en_pp3000_sd_u { - gpios = <&gpiog 1 (GPIO_INPUT | GPIO_PULL_DOWN | - GPIO_VOLTAGE_1P8)>; - enum-name = "GPIO_EN_PP3000_SD_U"; - label = "EN_PP3000_SD_U"; - }; - ccd_mode_odl { - gpios = <&gpioc 4 GPIO_INPUT>; - enum-name = "GPIO_CCD_MODE_ODL"; - label = "CCD_MODE_ODL"; - }; - spi_clk_gpg6 { - gpios = <&gpiog 6 (GPIO_INPUT | GPIO_PULL_UP)>; - enum-name = "GPIO_SPI_CLK_GPG6"; - label = "SPI_CLK_GPG6"; - }; - spi_mosi_gpg4 { - gpios = <&gpiog 4 GPIO_OUT_LOW>; - enum-name = "GPIO_SPI_MOSI_GPG4"; - label = "SPI_MOSI_GPG4"; - }; - spi_miso_gpg5 { - gpios = <&gpiog 5 GPIO_OUT_LOW>; - enum-name = "GPIO_SPI_MISO_GPG5"; - label = "SPI_MISO_GPG5"; - }; - spi_cs_gpg7 { - gpios = <&gpiog 7 GPIO_OUT_LOW>; - enum-name = "GPIO_SPI_CS_GPG7"; - label = "SPI_CS_GPG7"; - }; - }; - - hibernate-wake-pins { - compatible = "cros-ec,hibernate-wake-pins"; - wakeup-pins = <&ac_present - &power_button_l - &lid_open>; - }; - - unused-pins { - compatible = "unused-gpios"; - - unused-gpios = - /* uart1_rx */ - <&gpiob 0 GPIO_INPUT>, - /* nc_gpg3 */ - <&gpiog 3 GPIO_OUT_LOW>, - /* nc_gpi7 */ - <&gpioi 7 GPIO_OUT_LOW>, - /* nc_gpm2 */ - <&gpiom 2 (GPIO_INPUT | GPIO_PULL_DOWN)>, - /* nc_gpm3 */ - <&gpiom 3 (GPIO_INPUT | GPIO_PULL_DOWN)>, - /* nc_gpm6 */ - <&gpiom 6 (GPIO_INPUT | GPIO_PULL_DOWN)>; - }; -}; diff --git a/zephyr/projects/corsola/krabby/zmake.yaml b/zephyr/projects/corsola/krabby/zmake.yaml deleted file mode 100644 index 29c1599f9d..0000000000 --- a/zephyr/projects/corsola/krabby/zmake.yaml +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: corsola -dts-overlays: - - battery.dts - - gpio.dts - - motionsense.dts - - pwm.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: binman diff --git a/zephyr/projects/corsola/krabby/motionsense.dts b/zephyr/projects/corsola/motionsense_krabby.dts index 10128b0838..00434e6be9 100644 --- a/zephyr/projects/corsola/krabby/motionsense.dts +++ b/zephyr/projects/corsola/motionsense_krabby.dts @@ -150,7 +150,7 @@ * list of GPIO interrupts that have to * be enabled at initial stage */ - sensor-irqs = <&gpio_accel_gyro_int_l>; + sensor-irqs = <&base_imu_int_l>; /* list of sensors in force mode */ accel-force-mode-sensors = <&lid_accel>; }; diff --git a/zephyr/projects/corsola/prj.conf b/zephyr/projects/corsola/prj.conf new file mode 100644 index 0000000000..80f1d03d96 --- /dev/null +++ b/zephyr/projects/corsola/prj.conf @@ -0,0 +1,3 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. diff --git a/zephyr/projects/corsola/krabby/prj.conf b/zephyr/projects/corsola/prj_krabby.conf index 646e96453f..ad86923679 100644 --- a/zephyr/projects/corsola/krabby/prj.conf +++ b/zephyr/projects/corsola/prj_krabby.conf @@ -9,7 +9,7 @@ CONFIG_SHIMMED_TASKS=y # Bring up options CONFIG_KERNEL_SHELL=y CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y -CONFIG_PLATFORM_EC_CONSOLE_USES_PRINTK=y +CONFIG_GPIO_EMUL=y # Battery CONFIG_PLATFORM_EC_BATTERY=y @@ -53,6 +53,14 @@ CONFIG_PLATFORM_EC_LED_ONOFF_STATES_BAT_LOW=10 # MKBP event mask CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK=y CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK=y +CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y + +# Keyboard +CONFIG_PLATFORM_EC_KEYBOARD=y +CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y +CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y +CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y +CONFIG_PLATFORM_EC_CMD_BUTTON=y # Sensors CONFIG_PLATFORM_EC_MOTIONSENSE=y @@ -79,7 +87,6 @@ CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1 CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y CONFIG_PLATFORM_EC_BC12_DETECT_MT6360=y CONFIG_PLATFORM_EC_BC12_SINGLE_DRIVER=n -CONFIG_PLATFORM_EC_MT6360_BC12_GPIO=y CONFIG_PLATFORM_EC_SMBUS_PEC=y CONFIG_PLATFORM_EC_USBC_PPC_DEDICATED_INT=y CONFIG_PLATFORM_EC_USBC_PPC_SYV682C=y @@ -96,6 +103,7 @@ CONFIG_PLATFORM_EC_USB_PD_ITE_ACTIVE_PORT_COUNT=2 CONFIG_PLATFORM_EC_USB_PD_LOGGING=y CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2=y CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n CONFIG_PLATFORM_EC_USB_PD_TCPM_ITE_ON_CHIP=y CONFIG_PLATFORM_EC_USB_PD_TCPM_TCPCI=y CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_PPC=y diff --git a/zephyr/projects/corsola/krabby/pwm.dts b/zephyr/projects/corsola/pwm_krabby.dts index f86448cc8e..f86448cc8e 100644 --- a/zephyr/projects/corsola/krabby/pwm.dts +++ b/zephyr/projects/corsola/pwm_krabby.dts diff --git a/zephyr/projects/corsola/krabby/src/i2c.c b/zephyr/projects/corsola/src/krabby/i2c.c index 12f626847c..12f626847c 100644 --- a/zephyr/projects/corsola/krabby/src/i2c.c +++ b/zephyr/projects/corsola/src/krabby/i2c.c diff --git a/zephyr/projects/guybrush/BUILD.py b/zephyr/projects/guybrush/BUILD.py new file mode 100644 index 0000000000..03f3abe37f --- /dev/null +++ b/zephyr/projects/guybrush/BUILD.py @@ -0,0 +1,9 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="guybrush", + zephyr_board="npcx9", + dts_overlays=["battery.dts", "fan.dts", "gpio.dts", "i2c.dts", "pwm.dts"], +) diff --git a/zephyr/projects/guybrush/CMakeLists.txt b/zephyr/projects/guybrush/CMakeLists.txt index b565aad308..30e8b8c611 100644 --- a/zephyr/projects/guybrush/CMakeLists.txt +++ b/zephyr/projects/guybrush/CMakeLists.txt @@ -9,9 +9,11 @@ project(guybrush) zephyr_library_include_directories(include) -set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/guybrush" CACHE PATH - "Path to the platform/ec baseboard directory") -set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/guybrush" CACHE PATH - "Path to the platform/ec board directory") - zephyr_library_sources("power_signals.c") + +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC + "usbc_config.c" + "usb_pd_policy.c") + +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_LED_COMMON + "led.c") diff --git a/zephyr/projects/guybrush/fan.dts b/zephyr/projects/guybrush/fan.dts new file mode 100644 index 0000000000..7ab15229e1 --- /dev/null +++ b/zephyr/projects/guybrush/fan.dts @@ -0,0 +1,29 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-fans { + compatible = "named-fans"; + + fan_0 { + label = "FAN_0"; + pwm = <&pwm_fan>; + rpm_min = <1000>; + rpm_start = <1000>; + rpm_max = <6500>; + tach = <&tach1>; + pgood_gpio = <&gpio_s0_pgood>; + }; + }; +}; + +/* Tachemeter for fan speed measurement */ +&tach1 { + status = "okay"; + pinctrl-0 = <&alt3_ta1_sl1>; /* Use TA1 as input pin */ + port = <NPCX_TACH_PORT_A>; /* port-A is selected */ + sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */ + pulses-per-round = <2>; /* number of pulses per round of encoder */ +}; diff --git a/zephyr/projects/guybrush/gpio.dts b/zephyr/projects/guybrush/gpio.dts index 638e95c9fb..8781885759 100644 --- a/zephyr/projects/guybrush/gpio.dts +++ b/zephyr/projects/guybrush/gpio.dts @@ -45,7 +45,7 @@ label = "PG_PWR_S5"; enum-name = "GPIO_S5_PGOOD"; }; - pg_pcore_s0_r_od { + gpio_s0_pgood: pg_pcore_s0_r_od { gpios = <&gpiob 6 GPIO_INPUT>; label = "PG_PCORE_S0_R_OD"; enum-name = "GPIO_S0_PGOOD"; @@ -143,46 +143,57 @@ usb_c0_tcpc_int_odl { gpios = <&gpioe 0 GPIO_INPUT>; label = "USB_C0_TCPC_INT_ODL"; + enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; }; usb_c1_tcpc_int_odl { gpios = <&gpioc 7 GPIO_INPUT>; label = "USB_C1_TCPC_INT_ODL"; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; }; usb_c0_ppc_int_odl { gpios = <&gpio7 5 GPIO_INPUT>; label = "USB_C0_PPC_INT_ODL"; + enum-name = "GPIO_USB_C0_PPC_INT_ODL"; }; usb_c1_ppc_int_odl { gpios = <&gpiod 4 GPIO_INPUT>; label = "USB_C1_PPC_INT_ODL"; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; }; usb_c0_bc12_int_odl { gpios = <&gpioa 4 (GPIO_INPUT | GPIO_PULL_UP)>; label = "USB_C0_BC12_INT_ODL"; + enum-name = "GPIO_USB_C0_BC12_INT_ODL"; }; usb_c1_bc12_int_odl { gpios = <&gpio9 6 (GPIO_INPUT | GPIO_PULL_UP)>; label = "USB_C1_BC12_INT_ODL"; + enum-name = "GPIO_USB_C1_BC12_INT_ODL"; }; usb_c0_c1_fault_odl { gpios = <&gpio7 3 GPIO_ODR_HIGH>; label = "USB_C0_C1_FAULT_ODL"; + enum-name = "GPIO_USB_C0_C1_FAULT_ODL"; }; usb_c0_tcpc_rst_l { gpios = <&gpio3 4 GPIO_OUT_HIGH>; label = "USB_C0_TCPC_RST_L"; + enum-name = "GPIO_USB_C0_TCPC_RST_L"; }; usb_c1_tcpc_rst_l { gpios = <&gpio3 7 GPIO_OUT_HIGH>; label = "USB_C1_TCPC_RST_L"; + enum-name = "GPIO_USB_C1_TCPC_RST_L"; }; usb_c0_hpd { gpios = <&gpiof 5 GPIO_OUT_LOW>; label = "USB_C0_HPD"; + enum-name = "GPIO_USB_C0_DP_HPD"; }; usb_c1_hpd { gpios = <&gpiof 4 GPIO_OUT_LOW>; label = "USB_C1_HPD"; + enum-name = "GPIO_USB_C1_DP_HPD"; }; 3axis_int_l { gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_DOWN)>; @@ -279,6 +290,7 @@ en_kb_bl { gpios = <&gpio9 7 GPIO_OUT_HIGH>; label = "EN_KB_BL"; + enum-name = "GPIO_EN_KEYBOARD_BACKLIGHT"; }; ec_kso_02_inv { gpios = <&gpio1 7 GPIO_OUT_LOW>; diff --git a/zephyr/projects/guybrush/i2c.dts b/zephyr/projects/guybrush/i2c.dts index 699c4b9b7b..7b4c0753bc 100644 --- a/zephyr/projects/guybrush/i2c.dts +++ b/zephyr/projects/guybrush/i2c.dts @@ -17,17 +17,59 @@ named-i2c-ports { compatible = "named-i2c-ports"; + i2c_tcpc0: tcpc0 { + i2c-port = <&i2c0_0>; + enum-name = "I2C_PORT_TCPC0"; + label = "TCPC0"; + }; + + i2c_tcpc1: tcpc1 { + i2c-port = <&i2c1_0>; + enum-name = "I2C_PORT_TCPC1"; + label = "TCPC1"; + }; + battery { i2c-port = <&i2c2_0>; remote-port = <0>; enum-name = "I2C_PORT_BATTERY"; label = "BATTERY"; }; + + usb_mux { + i2c-port = <&i2c3_0>; + enum-name = "I2C_PORT_USB_MUX"; + label = "USB_MUX"; + }; + + charger { + i2c-port = <&i2c4_1>; + enum-name = "I2C_PORT_CHARGER"; + label = "CHARGER"; + }; }; }; +&i2c0_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c_ctrl0 { + status = "okay"; +}; + +&i2c1_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c_ctrl1 { + status = "okay"; +}; + &i2c2_0 { status = "okay"; clock-frequency = <I2C_BITRATE_STANDARD>; @@ -36,3 +78,21 @@ &i2c_ctrl2 { status = "okay"; }; + +&i2c3_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c_ctrl3 { + status = "okay"; +}; + +&i2c4_1 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c_ctrl4 { + status = "okay"; +}; diff --git a/zephyr/projects/guybrush/include/gpio_map.h b/zephyr/projects/guybrush/include/gpio_map.h index 5af244bead..77abf0919a 100644 --- a/zephyr/projects/guybrush/include/gpio_map.h +++ b/zephyr/projects/guybrush/include/gpio_map.h @@ -37,27 +37,38 @@ enum power_signal { * #define EC_CROS_GPIO_INTERRUPTS \ * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) */ -#define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt) \ - GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ - GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH, \ - power_button_interrupt) \ - GPIO_INT(GPIO_EC_PWR_BTN_ODL, GPIO_INT_EDGE_BOTH, \ - power_button_interrupt) \ - GPIO_INT(GPIO_PCH_SLP_S3_L, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0) \ - GPIO_INT(GPIO_PCH_SLP_S5_L, GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(GPIO_PCH_SLP_S0_L, GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(GPIO_S5_PGOOD, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0) \ - GPIO_INT(GPIO_S0_PGOOD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ - GPIO_INT(GPIO_EC_PCORE_INT_ODL, GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(GPIO_PG_GROUPC_S0_OD, GPIO_INT_EDGE_BOTH, \ - baseboard_en_pwr_pcore_s0) \ - GPIO_INT(GPIO_PG_LPDDR4X_S3_OD, GPIO_INT_EDGE_BOTH, \ - baseboard_en_pwr_pcore_s0) \ - GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt) \ - GPIO_INT(GPIO_VOLUME_DOWN_L, GPIO_INT_EDGE_BOTH, button_interrupt) +#define EC_CROS_GPIO_INTERRUPTS \ + GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt) \ + GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ + GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH, \ + power_button_interrupt) \ + GPIO_INT(GPIO_EC_PWR_BTN_ODL, GPIO_INT_EDGE_BOTH, \ + power_button_interrupt) \ + GPIO_INT(GPIO_PCH_SLP_S3_L, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0) \ + GPIO_INT(GPIO_PCH_SLP_S5_L, GPIO_INT_EDGE_BOTH, \ + power_signal_interrupt) \ + GPIO_INT(GPIO_PCH_SLP_S0_L, GPIO_INT_EDGE_BOTH, \ + power_signal_interrupt) \ + GPIO_INT(GPIO_S5_PGOOD, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0) \ + GPIO_INT(GPIO_S0_PGOOD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ + GPIO_INT(GPIO_EC_PCORE_INT_ODL, GPIO_INT_EDGE_BOTH, \ + power_signal_interrupt) \ + GPIO_INT(GPIO_PG_GROUPC_S0_OD, GPIO_INT_EDGE_BOTH, \ + baseboard_en_pwr_pcore_s0) \ + GPIO_INT(GPIO_PG_LPDDR4X_S3_OD, GPIO_INT_EDGE_BOTH, \ + baseboard_en_pwr_pcore_s0) \ + GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt) \ + GPIO_INT(GPIO_USB_C0_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C1_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C0_PPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + ppc_interrupt) \ + GPIO_INT(GPIO_USB_C1_PPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + ppc_interrupt) \ + GPIO_INT(GPIO_USB_C0_BC12_INT_ODL, GPIO_INT_EDGE_FALLING, \ + bc12_interrupt) \ + GPIO_INT(GPIO_USB_C1_BC12_INT_ODL, GPIO_INT_EDGE_FALLING, \ + bc12_interrupt) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/guybrush/led.c b/zephyr/projects/guybrush/led.c new file mode 100644 index 0000000000..6a2a2e4609 --- /dev/null +++ b/zephyr/projects/guybrush/led.c @@ -0,0 +1,103 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Guybrush specific PWM LED settings. + */ + +#include "common.h" +#include "led_onoff_states.h" +#include "led_common.h" +#include "gpio.h" +#include "hooks.h" +#include "pwm.h" + +/* Note PWM LEDs are active low */ +#define LED_OFF_LVL 1 +#define LED_ON_LVL 0 + +/* Define our PWM_CH values for zephyr */ +#define PWM_CH_LED_CHRG PWM_CHANNEL(DT_NODELABEL(led_charge)) +#define PWM_CH_LED_FULL PWM_CHANNEL(DT_NODELABEL(led_full)) + +#define CPRINTS(format, args...) cprints(CC_PWM, format, ## args) + +__override const int led_charge_lvl_1 = 5; + +__override const int led_charge_lvl_2 = 97; + +__override struct led_descriptor + led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES] = { + [STATE_CHARGING_LVL_1] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_LVL_2] = {{EC_LED_COLOR_AMBER, LED_INDEFINITE} }, + [STATE_CHARGING_FULL_CHARGE] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, + [STATE_DISCHARGE_S0] = {{EC_LED_COLOR_WHITE, LED_INDEFINITE} }, + [STATE_DISCHARGE_S3] = {{EC_LED_COLOR_WHITE, 1 * LED_ONE_SEC}, + {LED_OFF, 1 * LED_ONE_SEC} }, + [STATE_DISCHARGE_S5] = {{LED_OFF, LED_INDEFINITE} }, + [STATE_BATTERY_ERROR] = {{EC_LED_COLOR_AMBER, 1 * LED_ONE_SEC}, + {LED_OFF, 1 * LED_ONE_SEC} }, + [STATE_FACTORY_TEST] = {{EC_LED_COLOR_AMBER, 2 * LED_ONE_SEC}, + {EC_LED_COLOR_WHITE, 2 * LED_ONE_SEC} }, +}; + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED, +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +__override void led_set_color_battery(enum ec_led_colors color) +{ + switch (color) { + case EC_LED_COLOR_AMBER: + pwm_enable(PWM_CH_LED_CHRG, LED_ON_LVL); + pwm_enable(PWM_CH_LED_FULL, LED_OFF_LVL); + break; + case EC_LED_COLOR_WHITE: + pwm_enable(PWM_CH_LED_CHRG, LED_OFF_LVL); + pwm_enable(PWM_CH_LED_FULL, LED_ON_LVL); + break; + case LED_OFF: + pwm_enable(PWM_CH_LED_CHRG, LED_OFF_LVL); + pwm_enable(PWM_CH_LED_FULL, LED_OFF_LVL); + break; + default: /* Unsupported colors */ + CPRINTS("Unsupported LED color: %d", color); + pwm_enable(PWM_CH_LED_CHRG, LED_OFF_LVL); + pwm_enable(PWM_CH_LED_FULL, LED_OFF_LVL); + break; + } +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + brightness_range[EC_LED_COLOR_AMBER] = 1; + brightness_range[EC_LED_COLOR_WHITE] = 1; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (led_id == EC_LED_ID_BATTERY_LED) { + if (brightness[EC_LED_COLOR_WHITE] != 0) + led_set_color_battery(EC_LED_COLOR_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + led_set_color_battery(EC_LED_COLOR_AMBER); + else + led_set_color_battery(LED_OFF); + } else { + CPRINTS("Unsupported LED set: %d", led_id); + return EC_ERROR_INVAL; + } + + return EC_SUCCESS; +} + +static void pwm_led_duty_init(void) +{ + pwm_set_duty(PWM_CH_LED_CHRG, 100); + pwm_set_duty(PWM_CH_LED_FULL, 100); +} +DECLARE_HOOK(HOOK_INIT, pwm_led_duty_init, HOOK_PRIO_INIT_PWM + 1); diff --git a/zephyr/projects/guybrush/prj.conf b/zephyr/projects/guybrush/prj.conf index ce31304d3f..5adf663ad3 100644 --- a/zephyr/projects/guybrush/prj.conf +++ b/zephyr/projects/guybrush/prj.conf @@ -30,14 +30,32 @@ CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y CONFIG_PLATFORM_EC_BACKLIGHT_LID=n +# Fan +CONFIG_PLATFORM_EC_FAN=y +CONFIG_SENSOR=y +CONFIG_SENSOR_SHELL=n +CONFIG_TACH_NPCX=y + +# LEDs +CONFIG_PLATFORM_EC_LED_COMMON=y +CONFIG_PLATFORM_EC_LED_ONOFF_STATES=y + # Lid switch +CONFIG_PLATFORM_EC_LID_ANGLE=y +CONFIG_PLATFORM_EC_LID_ANGLE_UPDATE=y CONFIG_PLATFORM_EC_LID_SWITCH=y # Keyboard CONFIG_PLATFORM_EC_KEYBOARD=y CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y +CONFIG_PLATFORM_EC_PWM_KBLIGHT=y CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y +# PWM +CONFIG_PWM=y +CONFIG_PWM_SHELL=n +CONFIG_PLATFORM_EC_PWM=y + CONFIG_SYSCON=y # Battery @@ -47,10 +65,40 @@ CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=n CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y -CONFIG_PLATFORM_EC_CHARGER=n -CONFIG_PLATFORM_EC_USBC=n +# Charger +CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC=y +CONFIG_PLATFORM_EC_CHARGER_INPUT_CURRENT=512 +CONFIG_PLATFORM_EC_CHARGER_ISL9241=y +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 +CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20 +CONFIG_PLATFORM_EC_CHARGER_MIN_POWER_MW_FOR_POWER_ON=50000 + +# USB-C +CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201=y +CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y +CONFIG_PLATFORM_EC_USBC_PPC_AOZ1380=y +CONFIG_PLATFORM_EC_USBC_RETIMER_ANX7451=y +CONFIG_PLATFORM_EC_USBC_RETIMER_PS8811=y +CONFIG_PLATFORM_EC_USBC_RETIMER_PS8818=y +CONFIG_PLATFORM_EC_USBC_SS_MUX_DFP_ONLY=y +CONFIG_PLATFORM_EC_USB_MUX_AMD_FP6=y +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=y +CONFIG_PLATFORM_EC_USB_DRP_ACC_TRYSRC=y +CONFIG_PLATFORM_EC_USB_PID=0x504D +CONFIG_PLATFORM_EC_USB_PD_5V_EN_CUSTOM=y +CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_TCPC=y +CONFIG_PLATFORM_EC_USB_PD_DP_HPD_GPIO=y +CONFIG_PLATFORM_EC_USB_PD_LOGGING=y +CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT=2 +CONFIG_PLATFORM_EC_USB_PD_REV30=y +CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE=n +CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX=y +CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_PD_USB4=n +CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y # This is not yet supported -CONFIG_PLATFORM_EC_ADC=n CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n diff --git a/zephyr/projects/guybrush/pwm.dts b/zephyr/projects/guybrush/pwm.dts new file mode 100644 index 0000000000..dd9fc94eaa --- /dev/null +++ b/zephyr/projects/guybrush/pwm.dts @@ -0,0 +1,55 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + named-pwms { + compatible = "named-pwms"; + + pwm_fan: fan { + pwms = <&pwm0 0 0>; + label = "FAN"; + frequency = <25000>; + }; + kblight: kblight { + pwms = <&pwm1 0 0>; + label = "KBLIGHT"; + frequency = <100>; + }; + led_charge: led_charge { + pwms = <&pwm2 0 0>; + label = "LED_CHARGE"; + frequency = <100>; + }; + led_full: led_full { + pwms = <&pwm3 0 0>; + label = "LED_FULL"; + frequency = <100>; + }; + }; +}; + +/* Fan control */ +&pwm0 { + status = "okay"; + drive-open-drain; +}; + +/* Keyboard backlight */ +&pwm1 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; +}; + +/* Amber charging LED */ +&pwm2 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; +}; + +/* Green full LED */ +&pwm3 { + status = "okay"; + clock-bus = "NPCX_CLOCK_BUS_LFCLK"; +}; diff --git a/zephyr/projects/guybrush/usb_pd_policy.c b/zephyr/projects/guybrush/usb_pd_policy.c new file mode 100644 index 0000000000..0aa21293fe --- /dev/null +++ b/zephyr/projects/guybrush/usb_pd_policy.c @@ -0,0 +1,89 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Shared USB-C policy for Zork boards */ + +#include "charge_manager.h" +#include "chipset.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "ec_commands.h" +#include "gpio.h" +#include "ioexpander.h" +#include "system.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usbc_ppc.h" +#include "util.h" + +int pd_check_vconn_swap(int port) +{ + /* + * Do not allow vconn swap 5V rail is off + * S5_PGOOD depends on PG_PP5000_S5 being asserted, + * so GPIO_S5_PGOOD is a reasonable proxy for PP5000_S5 + */ + return gpio_get_level(GPIO_S5_PGOOD); +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS. */ + ppc_vbus_source_enable(port, 0); + + /* Enable discharge if we were previously sourcing 5V */ + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + /* Disable charging. */ + rv = ppc_vbus_sink_enable(port, 0); + if (rv) + return rv; + + if (IS_ENABLED(CONFIG_USB_PD_DISCHARGE)) + pd_set_vbus_discharge(port, 0); + + /* Provide Vbus. */ + rv = ppc_vbus_source_enable(port, 1); + if (rv) + return rv; + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +__override int board_pd_set_frs_enable(int port, int enable) +{ + /* + * Both PPCs require the FRS GPIO to be set as soon as FRS capability + * is established. + * + * TODO: Set IOEX_USB_C0_TCPC_FASTSW_CTL_EN + */ + return EC_SUCCESS; +} + +/* Used by Vbus discharge common code with CONFIG_USB_PD_DISCHARGE */ +int board_vbus_source_enabled(int port) +{ + return tcpm_get_src_ctrl(port); +} + +/* Used by USB charger task with CONFIG_USB_PD_5V_EN_CUSTOM */ +int board_is_sourcing_vbus(int port) +{ + return board_vbus_source_enabled(port); +} diff --git a/zephyr/projects/guybrush/usbc_config.c b/zephyr/projects/guybrush/usbc_config.c new file mode 100644 index 0000000000..43484d6751 --- /dev/null +++ b/zephyr/projects/guybrush/usbc_config.c @@ -0,0 +1,638 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Guybrush family-specific USB-C configuration */ + +#include "cros_board_info.h" +#include "battery_fuel_gauge.h" +#include "charge_manager.h" +#include "charge_ramp.h" +#include "charge_state_v2.h" +#include "charge_state.h" +#include "charger.h" +#include "driver/bc12/pi3usb9201.h" +#include "driver/charger/isl9241.h" +#include "driver/ppc/aoz1380.h" +#include "driver/ppc/nx20p348x.h" +#include "driver/retimer/anx7491.h" +#include "driver/retimer/ps8811.h" +#include "driver/retimer/ps8818.h" +#include "driver/tcpm/nct38xx.h" +#include "driver/usb_mux/anx7451.h" +#include "driver/usb_mux/amd_fp6.h" +#include "gpio.h" +#include "hooks.h" +#include "power.h" +#include "usb_mux.h" +#include "usb_pd_tcpm.h" +#include "usbc_ppc.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* USB-A ports */ +enum usba_port { + USBA_PORT_A0 = 0, + USBA_PORT_A1, + USBA_PORT_COUNT +}; + +/* USB-C ports */ +enum usbc_port { + USBC_PORT_C0 = 0, + USBC_PORT_C1, + USBC_PORT_COUNT +}; +BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT); + +static void reset_nct38xx_port(int port); + +const struct charger_config_t chg_chips[] = { + { + .i2c_port = I2C_PORT_CHARGER, + .i2c_addr_flags = ISL9241_ADDR_FLAGS, + .drv = &isl9241_drv, + }, +}; + +const struct tcpc_config_t tcpc_config[] = { + [USBC_PORT_C0] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_TCPC0, + .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0, + }, + [USBC_PORT_C1] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_TCPC1, + .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_MAX_COUNT); + +/* TODO: usb_port_enable expander pins */ + +static void usbc_interrupt_init(void) +{ + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); + + /* Enable TCPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + + /* Enable BC 1.2 interrupts */ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); + + /* TODO: Enable SBU fault interrupts (io expander )*/ +} +DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_INIT_I2C + 1); + +struct ppc_config_t ppc_chips[] = { + [USBC_PORT_C0] = { + /* Device does not talk I2C */ + .drv = &aoz1380_drv + }, + + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_TCPC1, + .i2c_addr_flags = NX20P3483_ADDR1_FLAGS, + .drv = &nx20p348x_drv + }, +}; +BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + [USBC_PORT_C0] = { + .i2c_port = I2C_PORT_TCPC0, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + + [USBC_PORT_C1] = { + .i2c_port = I2C_PORT_TCPC1, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == CONFIG_USB_PD_PORT_MAX_COUNT); + +/* + * .init is not necessary here because it has nothing + * to do. Primary mux will handle mux state so .get is + * not needed as well. usb_mux.c can handle the situation + * properly. + */ +static int fsusb42umx_set_mux(const struct usb_mux*, mux_state_t, bool *); +struct usb_mux_driver usbc0_sbu_mux_driver = { + .set = fsusb42umx_set_mux, +}; + +/* + * Since FSUSB42UMX is not a i2c device, .i2c_port and + * .i2c_addr_flags are not required here. + */ +struct usb_mux usbc0_sbu_mux = { + .usb_port = USBC_PORT_C0, + .driver = &usbc0_sbu_mux_driver, +}; + +__overridable int board_c1_ps8818_mux_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + CPRINTSUSB("C1: PS8818 mux using default tuning"); + return 0; +} + +struct usb_mux usbc1_ps8818 = { + .usb_port = USBC_PORT_C1, + .i2c_port = I2C_PORT_TCPC1, + .flags = USB_MUX_FLAG_RESETS_IN_G3, + .i2c_addr_flags = PS8818_I2C_ADDR_FLAGS, + .driver = &ps8818_usb_retimer_driver, + .board_set = &board_c1_ps8818_mux_set, +}; + +/* + * ANX7491(A1) and ANX7451(C1) are on the same i2c bus. Both default + * to 0x29 for the USB i2c address. This moves ANX7451(C1) USB i2c + * address to 0x2A. ANX7491(A1) will stay at the default 0x29. + */ +uint16_t board_anx7451_get_usb_i2c_addr(const struct usb_mux *me) +{ + ASSERT(me->usb_port == USBC_PORT_C1); + return 0x2a; +} + +__overridable int board_c1_anx7451_mux_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + CPRINTSUSB("C1: ANX7451 mux using default tuning"); + return 0; +} + +struct usb_mux usbc1_anx7451 = { + .usb_port = USBC_PORT_C1, + .i2c_port = I2C_PORT_TCPC1, + .flags = USB_MUX_FLAG_RESETS_IN_G3, + .i2c_addr_flags = ANX7491_I2C_ADDR3_FLAGS, + .driver = &anx7451_usb_mux_driver, + .board_set = &board_c1_anx7451_mux_set, +}; + +struct usb_mux usb_muxes[] = { + [USBC_PORT_C0] = { + .usb_port = USBC_PORT_C0, + .i2c_port = I2C_PORT_USB_MUX, + .i2c_addr_flags = AMD_FP6_C0_MUX_I2C_ADDR, + .driver = &amd_fp6_usb_mux_driver, + .next_mux = &usbc0_sbu_mux, + }, + [USBC_PORT_C1] = { + .usb_port = USBC_PORT_C1, + .i2c_port = I2C_PORT_USB_MUX, + .i2c_addr_flags = AMD_FP6_C4_MUX_I2C_ADDR, + .driver = &amd_fp6_usb_mux_driver, + /* .next_mux = filled in by setup_mux based on fw_config */ + } +}; +BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == CONFIG_USB_PD_PORT_MAX_COUNT); + +/* TODO: ioex_config */ + +/* + * USB C0 port SBU mux use standalone FSUSB42UMX + * chip and it needs a board specific driver. + * Overall, it will use chained mux framework. + */ +static int fsusb42umx_set_mux(const struct usb_mux *me, mux_state_t mux_state, + bool *ack_required) +{ + /* This driver does not use host command ACKs */ + *ack_required = false; + + /* TODO: set IOEX_USB_C0_SBU_FLIP */ + return EC_SUCCESS; +} + +static void setup_mux(void) +{ + /* TODO: Fill in C1 mux based on CBI */ + CPRINTSUSB("C1: Setting ANX7451 mux"); + usb_muxes[USBC_PORT_C1].next_mux = &usbc1_anx7451; +} +DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); + +int board_set_active_charge_port(int port) +{ + int is_valid_port = (port >= 0 && + port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + int rv; + + if (port == CHARGE_PORT_NONE) { + CPRINTSUSB("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * If this port had booted in dead battery mode, go + * ahead and reset it so EN_SNK responds properly. + */ + if (nct38xx_get_boot_type(i) == + NCT38XX_BOOT_DEAD_BATTERY) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + } + + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } else if (!is_valid_port) { + return EC_ERROR_INVAL; + } + + /* + * Check if we can reset any ports in dead battery mode + * + * The NCT3807 may continue to keep EN_SNK low on the dead battery port + * and allow a dangerous level of voltage to pass through to the initial + * charge port (see b/183660105). We must reset the ports if we have + * sufficient battery to do so, which will bring EN_SNK back under + * normal control. + */ + rv = EC_SUCCESS; + for (i = 0; i < board_get_usb_pd_port_count(); i++) { + if (nct38xx_get_boot_type(i) == NCT38XX_BOOT_DEAD_BATTERY) { + CPRINTSUSB("Found dead battery on %d", i); + /* + * If we have battery, get this port reset ASAP. + * This means temporarily rejecting charge manager + * sets to it. + */ + if (pd_is_battery_capable()) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + + if (port == i) + rv = EC_ERROR_INVAL; + } else if (port != i) { + /* + * If other port is selected and in dead battery + * mode, reset this port. Otherwise, reject + * change because we'll brown out. + */ + if (nct38xx_get_boot_type(port) == + NCT38XX_BOOT_DEAD_BATTERY) { + reset_nct38xx_port(i); + pd_set_error_recovery(i); + } else { + rv = EC_ERROR_INVAL; + } + } + } + } + + if (rv != EC_SUCCESS) + return rv; + + /* Check if the port is sourcing VBUS. */ + if (tcpm_get_src_ctrl(port)) { + CPRINTSUSB("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTSUSB("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTSUSB("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTSUSB("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +/* + * In the AOZ1380 PPC, there are no programmable features. We use + * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 + * current limits. + */ +int board_aoz1380_set_vbus_source_current_limit(int port, + enum tcpc_rp_value rp) +{ + int rv = EC_SUCCESS; + + /* TODO: Set IOEX_USB_C0_PPC_ILIM_3A_EN */ + return rv; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), + charge_mv); +} + +/* TODO: sbu_fault_interrupt from io expander */ + +/* Round up 3250 max current to multiple of 128mA for ISL9241 AC prochot. */ +#define GUYBRUSH_AC_PROCHOT_CURRENT_MA 3328 +static void set_ac_prochot(void) +{ + isl9241_set_ac_prochot(CHARGER_SOLO, GUYBRUSH_AC_PROCHOT_CURRENT_MA); +} +DECLARE_HOOK(HOOK_INIT, set_ac_prochot, HOOK_PRIO_DEFAULT); + +void tcpc_alert_event(enum gpio_signal signal) +{ + int port; + + switch (signal) { + case GPIO_USB_C0_TCPC_INT_ODL: + port = 0; + break; + case GPIO_USB_C1_TCPC_INT_ODL: + port = 1; + break; + default: + return; + } + + schedule_deferred_pd_interrupt(port); +} + +static void reset_nct38xx_port(int port) +{ + enum gpio_signal reset_gpio_l; + + if (port == USBC_PORT_C0) + reset_gpio_l = GPIO_USB_C0_TCPC_RST_L; + else if (port == USBC_PORT_C1) + reset_gpio_l = GPIO_USB_C1_TCPC_RST_L; + else + /* Invalid port: do nothing */ + return; + + gpio_set_level(reset_gpio_l, 0); + msleep(NCT38XX_RESET_HOLD_DELAY_MS); + gpio_set_level(reset_gpio_l, 1); + nct38xx_reset_notify(port); + if (NCT3807_RESET_POST_DELAY_MS != 0) + msleep(NCT3807_RESET_POST_DELAY_MS); +} + + +void board_reset_pd_mcu(void) +{ + /* Reset TCPC0 */ + reset_nct38xx_port(USBC_PORT_C0); + + /* Reset TCPC1 */ + reset_nct38xx_port(USBC_PORT_C1); +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + /* + * Check which port has the ALERT line set and ignore if that TCPC has + * its reset line active. + */ + if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C0_TCPC_RST_L) != 0) + status |= PD_STATUS_TCPC_ALERT_0; + } + + if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C1_TCPC_RST_L) != 0) + status |= PD_STATUS_TCPC_ALERT_1; + } + + return status; +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + aoz1380_interrupt(USBC_PORT_C0); + break; + + case GPIO_USB_C1_PPC_INT_ODL: + nx20p348x_interrupt(USBC_PORT_C1); + break; + + default: + break; + } +} + +void bc12_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); + break; + + case GPIO_USB_C1_BC12_INT_ODL: + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); + break; + + default: + break; + } +} + +/** + * Return if VBUS is sagging too low + * + * For legacy BC1.2 charging with CONFIG_CHARGE_RAMP_SW, ramp up input current + * until voltage drops to 4.5V. Don't go lower than this to be kind to the + * charger (see b/67964166). + */ +#define BC12_MIN_VOLTAGE 4500 +int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state) +{ + int voltage = 0; + int rv; + + rv = charger_get_vbus_voltage(port, &voltage); + + if (rv) { + CPRINTSUSB("%s rv=%d", __func__, rv); + return 0; + } + + /* + * b/168569046: The ISL9241 sometimes incorrectly reports 0 for unknown + * reason, causing ramp to stop at 0.5A. Workaround this by ignoring 0. + * This partly defeats the point of ramping, but will still catch + * VBUS below 4.5V and above 0V. + */ + if (voltage == 0) { + CPRINTSUSB("%s vbus=0", __func__); + return 0; + } + + if (voltage < BC12_MIN_VOLTAGE) + CPRINTSUSB("%s vbus=%d", __func__, voltage); + + return voltage < BC12_MIN_VOLTAGE; +} + +#define SAFE_RESET_VBUS_DELAY_MS 900 +#define SAFE_RESET_VBUS_MV 5000 +void board_hibernate(void) +{ + int port; + + /* + * If we are charging, then drop the Vbus level down to 5V to ensure + * that we don't get locked out of the 6.8V OVLO for our PPCs in + * dead-battery mode. This is needed when the TCPC/PPC rails go away. + * (b/79218851, b/143778351, b/147007265) + */ + port = charge_manager_get_active_charge_port(); + if (port != CHARGE_PORT_NONE) { + pd_request_source_voltage(port, SAFE_RESET_VBUS_MV); + + /* Give PD task and PPC chip time to get to 5V */ + msleep(SAFE_RESET_VBUS_DELAY_MS); + } + + /* Try to put our battery fuel gauge into sleep mode */ + if (battery_sleep_fuel_gauge() != EC_SUCCESS) + cprints(CC_SYSTEM, "Failed to send battery sleep command"); +} + +__overridable enum ec_error_list +board_a1_ps8811_retimer_init(const struct usb_mux *me) +{ + return EC_SUCCESS; +} + +static int baseboard_a1_ps8811_retimer_init(const struct usb_mux *me) +{ + int rv; + int tries = 2; + + do { + int val; + + rv = ps8811_i2c_read(me, PS8811_REG_PAGE1, + PS8811_REG1_USB_BEQ_LEVEL, &val); + } while (rv && --tries); + + if (rv) { + CPRINTSUSB("A1: PS8811 retimer not detected!"); + return rv; + } + CPRINTSUSB("A1: PS8811 retimer detected"); + rv = board_a1_ps8811_retimer_init(me); + if (rv) + CPRINTSUSB("A1: Error during PS8811 setup rv:%d", rv); + return rv; +} + +/* + * PS8811 is just a type-A USB retimer, reusing mux structure for + * convenience. + */ +const struct usb_mux usba1_ps8811 = { + .usb_port = USBA_PORT_A1, + .i2c_port = I2C_PORT_TCPC1, + .i2c_addr_flags = PS8811_I2C_ADDR_FLAGS3, + .board_init = &baseboard_a1_ps8811_retimer_init, +}; + +__overridable enum ec_error_list +board_a1_anx7491_retimer_init(const struct usb_mux *me) +{ + return EC_SUCCESS; +} + +static int baseboard_a1_anx7491_retimer_init(const struct usb_mux *me) +{ + int rv; + int tries = 2; + + do { + int val; + + rv = i2c_read8(me->i2c_port, me->i2c_addr_flags, 0, &val); + } while (rv && --tries); + if (rv) { + CPRINTSUSB("A1: ANX7491 retimer not detected!"); + return rv; + } + CPRINTSUSB("A1: ANX7491 retimer detected"); + rv = board_a1_anx7491_retimer_init(me); + if (rv) + CPRINTSUSB("A1: Error during ANX7491 setup rv:%d", rv); + return rv; +} + +/* + * ANX7491 is just a type-A USB retimer, reusing mux structure for + * convenience. + */ +const struct usb_mux usba1_anx7491 = { + .usb_port = USBA_PORT_A1, + .i2c_port = I2C_PORT_TCPC1, + .i2c_addr_flags = ANX7491_I2C_ADDR0_FLAGS, + .board_init = &baseboard_a1_anx7491_retimer_init, +}; + +void baseboard_a1_retimer_setup(void) +{ + struct usb_mux a1_retimer; + + /* TODO: Support PS8811 retimer through CBI */ + a1_retimer = usba1_anx7491; + a1_retimer.board_init(&a1_retimer); +} +DECLARE_DEFERRED(baseboard_a1_retimer_setup); + +void board_overcurrent_event(int port, int is_overcurrented) +{ + switch (port) { + case USBC_PORT_C0: + case USBC_PORT_C1: + gpio_set_level(GPIO_USB_C0_C1_FAULT_ODL, !is_overcurrented); + break; + + default: + break; + } +} diff --git a/zephyr/projects/guybrush/zmake.yaml b/zephyr/projects/guybrush/zmake.yaml deleted file mode 100644 index 581cc87521..0000000000 --- a/zephyr/projects/guybrush/zmake.yaml +++ /dev/null @@ -1,15 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: npcx9 -dts-overlays: - - battery.dts - - gpio.dts - - i2c.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/projects/herobrine/herobrine_npcx9/BUILD.py b/zephyr/projects/herobrine/herobrine_npcx9/BUILD.py new file mode 100644 index 0000000000..f5daa3c9b6 --- /dev/null +++ b/zephyr/projects/herobrine/herobrine_npcx9/BUILD.py @@ -0,0 +1,16 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="herobrine_npcx9", + zephyr_board="herobrine_npcx9", + dts_overlays=[ + "gpio.dts", + "battery.dts", + "i2c.dts", + "motionsense.dts", + "switchcap.dts", + "usbc.dts", + ], +) diff --git a/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts b/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts index 516009942d..152f033db4 100644 --- a/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts +++ b/zephyr/projects/herobrine/herobrine_npcx9/gpio.dts @@ -27,12 +27,12 @@ enum-name = "GPIO_USB_C1_SWCTL_INT_ODL"; label = "USB_C1_SWCTL_INT_ODL"; }; - usb_c0_bc12_int_l { + gpio_usb_c0_bc12_int_l: usb_c0_bc12_int_l { gpios = <&gpio6 1 (GPIO_INPUT | GPIO_PULL_UP)>; enum-name = "GPIO_USB_C0_BC12_INT_L"; label = "USB_C0_BC12_INT_L"; }; - usb_c1_bc12_int_l { + gpio_usb_c1_bc12_int_l: usb_c1_bc12_int_l { gpios = <&gpio8 2 (GPIO_INPUT | GPIO_PULL_UP)>; enum-name = "GPIO_USB_C1_BC12_INT_L"; label = "USB_C1_BC12_INT_L"; diff --git a/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts b/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts index 93de10c100..44bc9c6707 100644 --- a/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts +++ b/zephyr/projects/herobrine/herobrine_npcx9/i2c.dts @@ -17,7 +17,7 @@ named-i2c-ports { compatible = "named-i2c-ports"; - power { + i2c_power: power { i2c-port = <&i2c0_0>; enum-name = "I2C_PORT_POWER"; label = "POWER"; @@ -38,12 +38,12 @@ enum-name = "I2C_PORT_CHARGER"; label = "CHARGER"; }; - tcpc0 { + i2c_tcpc0: tcpc0 { i2c-port = <&i2c1_0>; enum-name = "I2C_PORT_TCPC0"; label = "TCPC0"; }; - tcpc1 { + i2c_tcpc1: tcpc1 { i2c-port = <&i2c2_0>; enum-name = "I2C_PORT_TCPC1"; label = "TCPC1"; @@ -53,7 +53,7 @@ enum-name = "I2C_PORT_RTC"; label = "RTC"; }; - eeprom { + i2c_eeprom: eeprom { i2c-port = <&i2c5_0>; enum-name = "I2C_PORT_EEPROM"; label = "EEPROM"; diff --git a/zephyr/projects/herobrine/herobrine_npcx9/include/pwm_map.h b/zephyr/projects/herobrine/herobrine_npcx9/include/pwm_map.h deleted file mode 100644 index e704b6d6d3..0000000000 --- a/zephyr/projects/herobrine/herobrine_npcx9/include/pwm_map.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_PWM_MAP_H -#define __ZEPHYR_PWM_MAP_H - -#include <devicetree.h> - -#include "pwm/pwm.h" - -#define PWM_CH_KBLIGHT NAMED_PWM(kblight) -#define PWM_CH_DISPLIGHT NAMED_PWM(displight) - -#endif /* __ZEPHYR_PWM_MAP_H */ diff --git a/zephyr/projects/herobrine/herobrine_npcx9/prj.conf b/zephyr/projects/herobrine/herobrine_npcx9/prj.conf index 765c396308..aeb9f6e36f 100644 --- a/zephyr/projects/herobrine/herobrine_npcx9/prj.conf +++ b/zephyr/projects/herobrine/herobrine_npcx9/prj.conf @@ -51,9 +51,6 @@ CONFIG_PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION=y CONFIG_PLATFORM_EC_CHIPSET_RESET_HOOK=y CONFIG_PLATFORM_EC_CHIPSET_RESUME_INIT_HOOK=y -# TODO(b:193719620): Enable EC EFS2. -CONFIG_PLATFORM_EC_VBOOT_EFS2=n - # MKBP event mask CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK=y CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK=y @@ -121,6 +118,7 @@ CONFIG_PLATFORM_EC_USB_PD_REV30=n CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805=y CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n CONFIG_PLATFORM_EC_USB_PD_LOGGING=y CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB=y diff --git a/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c b/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c index 72b3df14fd..20536752f2 100644 --- a/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c +++ b/zephyr/projects/herobrine/herobrine_npcx9/src/usbc_config.c @@ -5,7 +5,6 @@ /* Herobrine board-specific USB-C configuration */ -#include "bc12/pi3usb9201_public.h" #include "charger.h" #include "charger/isl923x_public.h" #include "charge_manager.h" @@ -25,6 +24,7 @@ #include "usb_mux.h" #include "usbc_ocp.h" #include "usbc_ppc.h" +#include "usbc/ppc.h" #define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) #define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) @@ -49,16 +49,6 @@ void tcpc_alert_event(enum gpio_signal signal) schedule_deferred_pd_interrupt(port); } -void usb0_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); -} - -void usb1_evt(enum gpio_signal signal) -{ - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); -} - static void usba_oc_deferred(void) { /* Use next number after all USB-C ports to indicate the USB-A port */ @@ -93,14 +83,11 @@ void ppc_interrupt(enum gpio_signal signal) { switch (signal) { case GPIO_USB_C0_SWCTL_INT_ODL: - if (board_has_syv_ppc()) - syv682x_interrupt(0); - else - sn5s330_interrupt(0); + ppc_chips[0].drv->interrupt(0); break; case GPIO_USB_C1_SWCTL_INT_ODL: - sn5s330_interrupt(1); + ppc_chips[1].drv->interrupt(1); break; default: @@ -154,27 +141,6 @@ enum ec_status charger_profile_override_set_param(uint32_t param, return EC_RES_INVALID_PARAM; } -/* Power Path Controller */ -struct ppc_config_t ppc_chips[] = { - { - .i2c_port = I2C_PORT_TCPC0, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv - }, - { - .i2c_port = I2C_PORT_TCPC1, - .i2c_addr_flags = SN5S330_ADDR0_FLAGS, - .drv = &sn5s330_drv - }, -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -static const struct ppc_config_t ppc_syv682x_port0 = { - .i2c_port = I2C_PORT_TCPC0, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, - .drv = &syv682x_drv, -}; - /* TCPC mux configuration */ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { { @@ -219,33 +185,15 @@ const int usb_port_enable[USB_PORT_COUNT] = { GPIO_EN_USB_A_5V, }; -/* BC1.2 */ -const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - { - .i2c_port = I2C_PORT_POWER, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, - { - .i2c_port = I2C_PORT_EEPROM, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, - }, -}; - /* Initialize board USC-C things */ static void board_init_usbc(void) { - /* Enable BC1.2 interrupts */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); - /* Enable USB-A overcurrent interrupt */ gpio_enable_interrupt(GPIO_USB_A0_OC_ODL); /* Configure the PPC driver */ if (board_has_syv_ppc()) - memcpy(&ppc_chips[0], - &ppc_syv682x_port0, - sizeof(struct ppc_config_t)); + PPC_ENABLE_ALTERNATE(ppc_port0_syv); } DECLARE_HOOK(HOOK_INIT, board_init_usbc, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/herobrine/herobrine_npcx9/usbc.dts b/zephyr/projects/herobrine/herobrine_npcx9/usbc.dts new file mode 100644 index 0000000000..c910c8ec03 --- /dev/null +++ b/zephyr/projects/herobrine/herobrine_npcx9/usbc.dts @@ -0,0 +1,54 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + usbc { + compatible = "named-usbc-ports"; + #address-cells = <1>; + #size-cells = <0>; + port0: usbc-port@0 { + reg = <0>; + bc12 { + compatible = "pericom,pi3usb9201"; + status = "okay"; + irq = <&gpio_usb_c0_bc12_int_l>; + port = <&i2c_power>; + i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + }; + ppc_port0: ppc { + compatible = "ti,sn5s330"; + status = "okay"; + port = <&i2c_tcpc0>; + i2c-addr-flags = "SN5S330_ADDR0_FLAGS"; + }; + }; + + port1: usbc-port@1 { + reg = <1>; + bc12 { + compatible = "pericom,pi3usb9201"; + status = "okay"; + irq = <&gpio_usb_c1_bc12_int_l>; + port = <&i2c_eeprom>; + i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS"; + }; + ppc { + compatible = "ti,sn5s330"; + status = "okay"; + port = <&i2c_tcpc1>; + i2c-addr-flags = "SN5S330_ADDR0_FLAGS"; + }; + }; + }; + usbc-alt-chips { + ppc_port0_syv: ppc-port0 { + compatible = "silergy,syv682x"; + status = "okay"; + port = <&i2c_tcpc0>; + i2c-addr-flags = "SYV682X_ADDR0_FLAGS"; + alternate-for = <&ppc_port0>; + }; + }; +}; diff --git a/zephyr/projects/herobrine/herobrine_npcx9/zmake.yaml b/zephyr/projects/herobrine/herobrine_npcx9/zmake.yaml deleted file mode 100644 index 12c00396e4..0000000000 --- a/zephyr/projects/herobrine/herobrine_npcx9/zmake.yaml +++ /dev/null @@ -1,17 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: herobrine_npcx9 -dts-overlays: - - gpio.dts - - battery.dts - - i2c.dts - - motionsense.dts - - switchcap.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/projects/it8xxx2_evb/BUILD.py b/zephyr/projects/it8xxx2_evb/BUILD.py new file mode 100644 index 0000000000..c7a0da1784 --- /dev/null +++ b/zephyr/projects/it8xxx2_evb/BUILD.py @@ -0,0 +1,8 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_raw_project( + project_name="it8xxx2_evb", + zephyr_board="it8xxx2_evb", +) diff --git a/zephyr/projects/it8xxx2_evb/include/pwm_map.h b/zephyr/projects/it8xxx2_evb/include/pwm_map.h deleted file mode 100644 index 5386a85cbd..0000000000 --- a/zephyr/projects/it8xxx2_evb/include/pwm_map.h +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_CHROME_PWM_MAP_H -#define __ZEPHYR_CHROME_PWM_MAP_H - -#include <devicetree.h> - -#include "config.h" - -#include "pwm/pwm.h" - -/* - * TODO(b/177452529): eliminate the dependency on enum pwm_channel - * and configure this information directly from the device tree. - */ -#define PWM_CH_WITH_DSLEEP_FLAG NAMED_PWM(test1) - -#endif /* __ZEPHYR_CHROME_PWM_MAP_H */ diff --git a/zephyr/projects/kohaku/include/gpio_map.h b/zephyr/projects/kohaku/include/gpio_map.h deleted file mode 100644 index 05fc93d5d5..0000000000 --- a/zephyr/projects/kohaku/include/gpio_map.h +++ /dev/null @@ -1,48 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <devicetree.h> -#include <gpio_signal.h> - -/* Cometlake power sequencing requires this definition */ -#define PP5000_PGOOD_POWER_SIGNAL_MASK POWER_SIGNAL_MASK(X86_PP5000_A_PGOOD) - -/* - * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. - * - * Each GPIO_INT requires three parameters: - * gpio_signal - The enum gpio_signal for the interrupt gpio - * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) - * handler - The platform/ec interrupt handler. - * - * Ensure that this files includes all necessary headers to declare all - * referenced handler functions. - * - * For example, one could use the follow definition: - * #define EC_CROS_GPIO_INTERRUPTS \ - * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) - */ -#define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(NAMED_GPIO(lid_open), GPIO_INT_EDGE_BOTH, lid_interrupt) \ - GPIO_INT(NAMED_GPIO(power_button_l), GPIO_INT_EDGE_BOTH, \ - power_button_interrupt) \ - GPIO_INT(NAMED_GPIO(acok_od), GPIO_INT_EDGE_BOTH, extpower_interrupt) \ - GPIO_INT(NAMED_GPIO(slp_s0_l), GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(NAMED_GPIO(slp_s3_l), GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(NAMED_GPIO(slp_s4_l), GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(NAMED_GPIO(pg_ec_rsmrst_l), GPIO_INT_EDGE_BOTH, \ - intel_x86_rsmrst_signal_interrupt) \ - GPIO_INT(NAMED_GPIO(pg_ec_all_sys_pwrgd), GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(NAMED_GPIO(pp5000_a_pg_od), GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/npcx_evb/npcx7/BUILD.py b/zephyr/projects/npcx_evb/npcx7/BUILD.py new file mode 100644 index 0000000000..9b9789c3d9 --- /dev/null +++ b/zephyr/projects/npcx_evb/npcx7/BUILD.py @@ -0,0 +1,9 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="npcx7", + zephyr_board="npcx7_evb", + dts_overlays=["gpio.dts", "pwm.dts", "fan.dts", "keyboard.dts"], +) diff --git a/zephyr/projects/npcx_evb/npcx7/include/pwm_map.h b/zephyr/projects/npcx_evb/npcx7/include/pwm_map.h deleted file mode 100644 index 62bf822099..0000000000 --- a/zephyr/projects/npcx_evb/npcx7/include/pwm_map.h +++ /dev/null @@ -1,15 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_PWM_MAP_H -#define __ZEPHYR_PWM_MAP_H - -#include <devicetree.h> - -#include "pwm/pwm.h" - -#define PWM_CH_KBLIGHT NAMED_PWM(kblight) - -#endif /* __ZEPHYR_PWM_MAP_H */ diff --git a/zephyr/projects/npcx_evb/npcx7/pwm.dts b/zephyr/projects/npcx_evb/npcx7/pwm.dts index 144b4d96b9..73312f684c 100644 --- a/zephyr/projects/npcx_evb/npcx7/pwm.dts +++ b/zephyr/projects/npcx_evb/npcx7/pwm.dts @@ -12,7 +12,7 @@ label = "FAN"; frequency = <25000>; }; - kblight { + kblight: kblight { pwms = <&pwm2 0 0>; label = "KBLIGHT"; frequency = <10000>; diff --git a/zephyr/projects/npcx_evb/npcx7/zmake.yaml b/zephyr/projects/npcx_evb/npcx7/zmake.yaml deleted file mode 100644 index cbc95f36c8..0000000000 --- a/zephyr/projects/npcx_evb/npcx7/zmake.yaml +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: npcx7_evb -dts-overlays: - - gpio.dts - - pwm.dts - - fan.dts - - keyboard.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/projects/npcx_evb/npcx9/BUILD.py b/zephyr/projects/npcx_evb/npcx9/BUILD.py new file mode 100644 index 0000000000..afd6816af9 --- /dev/null +++ b/zephyr/projects/npcx_evb/npcx9/BUILD.py @@ -0,0 +1,9 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="npcx9", + zephyr_board="npcx9_evb", + dts_overlays=["gpio.dts", "pwm.dts", "fan.dts", "keyboard.dts"], +) diff --git a/zephyr/projects/npcx_evb/npcx9/include/pwm_map.h b/zephyr/projects/npcx_evb/npcx9/include/pwm_map.h deleted file mode 100644 index 62bf822099..0000000000 --- a/zephyr/projects/npcx_evb/npcx9/include/pwm_map.h +++ /dev/null @@ -1,15 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_PWM_MAP_H -#define __ZEPHYR_PWM_MAP_H - -#include <devicetree.h> - -#include "pwm/pwm.h" - -#define PWM_CH_KBLIGHT NAMED_PWM(kblight) - -#endif /* __ZEPHYR_PWM_MAP_H */ diff --git a/zephyr/projects/npcx_evb/npcx9/pwm.dts b/zephyr/projects/npcx_evb/npcx9/pwm.dts index 144b4d96b9..73312f684c 100644 --- a/zephyr/projects/npcx_evb/npcx9/pwm.dts +++ b/zephyr/projects/npcx_evb/npcx9/pwm.dts @@ -12,7 +12,7 @@ label = "FAN"; frequency = <25000>; }; - kblight { + kblight: kblight { pwms = <&pwm2 0 0>; label = "KBLIGHT"; frequency = <10000>; diff --git a/zephyr/projects/npcx_evb/npcx9/zmake.yaml b/zephyr/projects/npcx_evb/npcx9/zmake.yaml deleted file mode 100644 index b71dc4b8f6..0000000000 --- a/zephyr/projects/npcx_evb/npcx9/zmake.yaml +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: npcx9_evb -dts-overlays: - - gpio.dts - - pwm.dts - - fan.dts - - keyboard.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/boards/arm/kohaku/board.cmake b/zephyr/projects/posix-ec/BUILD.py index a204305534..b94d087642 100644 --- a/zephyr/boards/arm/kohaku/board.cmake +++ b/zephyr/projects/posix-ec/BUILD.py @@ -2,4 +2,4 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -set(NPCX_IMAGE_FILE ${PROJECT_BINARY_DIR}/zephyr.npcx.bin) +register_host_project(project_name="posix-ec") diff --git a/zephyr/projects/posix-ec/CMakeLists.txt b/zephyr/projects/posix-ec/CMakeLists.txt index c4ac80228d..e5287b0b17 100644 --- a/zephyr/projects/posix-ec/CMakeLists.txt +++ b/zephyr/projects/posix-ec/CMakeLists.txt @@ -4,7 +4,5 @@ # SPDX-License-Identifier: Apache-2.0 cmake_minimum_required(VERSION 3.13.1) -set(BOARD native_posix) - find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) project(posix-ec) diff --git a/zephyr/projects/posix-ec/zmake.yaml b/zephyr/projects/posix-ec/zmake.yaml deleted file mode 100644 index ce14ef9f7d..0000000000 --- a/zephyr/projects/posix-ec/zmake.yaml +++ /dev/null @@ -1,7 +0,0 @@ -board: native_posix -supported-toolchains: - - llvm - - host -supported-zephyr-versions: - - v2.7 -output-type: elf diff --git a/zephyr/projects/trogdor/lazor/BUILD.py b/zephyr/projects/trogdor/lazor/BUILD.py new file mode 100644 index 0000000000..d59b4d427a --- /dev/null +++ b/zephyr/projects/trogdor/lazor/BUILD.py @@ -0,0 +1,15 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="lazor", + zephyr_board="trogdor", + dts_overlays=[ + "battery.dts", + "gpio.dts", + "keyboard.dts", + "led.dts", + "motionsense.dts", + ], +) diff --git a/zephyr/projects/trogdor/lazor/include/pwm_map.h b/zephyr/projects/trogdor/lazor/include/pwm_map.h deleted file mode 100644 index e704b6d6d3..0000000000 --- a/zephyr/projects/trogdor/lazor/include/pwm_map.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_PWM_MAP_H -#define __ZEPHYR_PWM_MAP_H - -#include <devicetree.h> - -#include "pwm/pwm.h" - -#define PWM_CH_KBLIGHT NAMED_PWM(kblight) -#define PWM_CH_DISPLIGHT NAMED_PWM(displight) - -#endif /* __ZEPHYR_PWM_MAP_H */ diff --git a/zephyr/projects/trogdor/lazor/led.dts b/zephyr/projects/trogdor/lazor/led.dts new file mode 100644 index 0000000000..6d3fd69964 --- /dev/null +++ b/zephyr/projects/trogdor/lazor/led.dts @@ -0,0 +1,96 @@ +/ { + gpio-led { + compatible = "gpio-led-behavior"; + + gpio-led-colors { + compatible = "cros-ec,gpio-led-colors"; + + power-state-charge { + charge-state = "PWR_STATE_CHARGE"; + + color-0 { + led-color = "LED_AMBER"; + }; + }; + + power-state-discharge-s0 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S0"; + + color-0 { + led-color = "LED_BLUE"; + }; + }; + + power-state-discharge-s3 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S3"; + + /* Amber 1 sec, off 3 sec */ + color-0 { + led-color = "LED_AMBER"; + period = <1>; + }; + color-1 { + led-color = "LED_OFF"; + period = <3>; + }; + }; + + power-state-discharge-s5 { + charge-state = "PWR_STATE_DISCHARGE"; + chipset-state = "POWER_S5"; + + color-0 { + led-color = "LED_OFF"; + }; + }; + + power-state-error { + charge-state = "PWR_STATE_ERROR"; + + /* Amber 1 sec, off 1 sec */ + color-0 { + led-color = "LED_AMBER"; + period = <1>; + }; + color-1 { + led-color = "LED_OFF"; + period = <1>; + }; + }; + + power-state-near-full { + charge-state = "PWR_STATE_CHARGE_NEAR_FULL"; + + color-0 { + led-color = "LED_BLUE"; + }; + }; + + power-state-idle-forced { + charge-state = "PWR_STATE_IDLE"; + extra-flag = "LED_CHFLAG_FORCE_IDLE"; + + /* Blue 2 sec, Amber 2 sec */ + color-0 { + led-color = "LED_BLUE"; + period = <2>; + }; + color-1 { + led-color = "LED_AMBER"; + period = <2>; + }; + }; + + power-state-idle-default { + charge-state = "PWR_STATE_IDLE"; + extra-flag = "LED_CHFLAG_DEFAULT"; + + color-0 { + led-color = "LED_BLUE"; + }; + }; + }; + }; +}; diff --git a/zephyr/projects/trogdor/lazor/prj.conf b/zephyr/projects/trogdor/lazor/prj.conf index 53a9d70432..59ab01cc0a 100644 --- a/zephyr/projects/trogdor/lazor/prj.conf +++ b/zephyr/projects/trogdor/lazor/prj.conf @@ -108,6 +108,7 @@ CONFIG_PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805=y CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n CONFIG_PLATFORM_EC_USB_PD_LOGGING=y CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB=y diff --git a/zephyr/projects/trogdor/lazor/src/led.c b/zephyr/projects/trogdor/lazor/src/led.c index e4b34576c8..6921068aa0 100644 --- a/zephyr/projects/trogdor/lazor/src/led.c +++ b/zephyr/projects/trogdor/lazor/src/led.c @@ -14,14 +14,21 @@ #include "hooks.h" #include "host_command.h" #include "led_common.h" +#include "power.h" #include "system.h" #include "util.h" +#include <devicetree.h> +#include <logging/log.h> +LOG_MODULE_REGISTER(gpio_led, LOG_LEVEL_ERR); + #define LED_ONE_SEC (1000 / HOOK_TICK_INTERVAL_MS) #define BAT_LED_ON 1 #define BAT_LED_OFF 0 +#define GPIO_LED_NODE DT_PATH(gpio_led, gpio_led_colors) + const enum ec_led_id supported_led_ids[] = { EC_LED_ID_BATTERY_LED, }; @@ -61,67 +68,225 @@ int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) return EC_SUCCESS; } -static void board_led_set_battery(void) +struct led_color_node_t { + int led_color; + int acc_period; +}; + +enum led_extra_flag_t { + NONE = 0, + LED_CHFLAG_FORCE_IDLE, + LED_CHFLAG_DEFAULT, + LED_BATT_BELOW_10_PCT, + LED_BATT_ABOVE_10_PCT, +}; + +/* + * Currently 4 different colors are supported for blinking LED, each of which + * can have different periods. Each period slot is the accumulation of previous + * periods as described below. Last slot is the total accumulation which is + * used as a dividing factor to calculate ticks to switch color + * Eg LED_COLOR_1 1 sec, LED_COLOR_2 2 sec, LED_COLOR_3 3 sec, LED_COLOR_4 3 sec + * period_1 = 1, period_2 = 1 + 2, period_3 = 1 + 2 + 3, period_4 =1 + 2 + 3 + 3 + * ticks -> 0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 1, 2 and so on (ticks % 9) + * 0 < period_1 -> LED_COLOR_1 for 1 sec + * 1, 2 < period_2 -> LED_COLOR_2 for 2 secs + * 3, 4, 5 < period_3 -> LED_COLOR_3 for 3 secs + * 6, 7, 8 < period_4 -> LED_COLOR_4 for 3 secs + */ +#define MAX_COLOR 4 + +struct node_prop_t { + enum charge_state pwr_state; + enum power_state chipset_state; + enum led_extra_flag_t led_extra_flag; + struct led_color_node_t led_colors[MAX_COLOR]; +}; + +/* + * acc_period is the accumulated period value of all color-x children + * led_colors[0].acc_period = period value of color-0 node + * led_colors[1].acc_period = period value of color-0 + color-1 nodes + * led_colors[2].acc_period = period value of color-0 + color-1 + color-2 nodes + * and so on. If period prop or color node doesn't exist, period val is 0 + */ + +#define PERIOD_VAL(id) COND_CODE_1(DT_NODE_HAS_PROP(id, period), \ + (DT_PROP(id, period)), \ + (0)) + +#define LED_PERIOD(color_num, state_id) \ + PERIOD_VAL(DT_CHILD(state_id, color_##color_num)) + +#define LED_PLUS_PERIOD(color_num, state_id) \ + + LED_PERIOD(color_num, state_id) + +#define ACC_PERIOD(color_num, state_id) \ + (0 UTIL_LISTIFY(color_num, LED_PLUS_PERIOD, state_id)) + +#define GET_PROP(id, prop) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, prop), \ + (DT_STRING_UPPER_TOKEN(id, prop)), \ + (0)) + +#define LED_COLOR_INIT(color_num, color_num_plus_one, state_id) \ +{ \ + .led_color = GET_PROP(DT_CHILD(state_id, color_##color_num), \ + led_color), \ + .acc_period = ACC_PERIOD(color_num_plus_one, state_id) \ +} + +/* Initialize node_array struct with prop listed in dts */ +#define SET_LED_VALUES(state_id) \ +{ \ + .pwr_state = GET_PROP(state_id, charge_state), \ + .chipset_state = GET_PROP(state_id, chipset_state), \ + .led_extra_flag = GET_PROP(state_id, extra_flag), \ + .led_colors = {LED_COLOR_INIT(0, 1, state_id), \ + LED_COLOR_INIT(1, 2, state_id), \ + LED_COLOR_INIT(2, 3, state_id), \ + LED_COLOR_INIT(3, 4, state_id), \ + } \ +}, + +struct node_prop_t node_array[] = { + DT_FOREACH_CHILD(GPIO_LED_NODE, SET_LED_VALUES) +}; + +static enum power_state get_chipset_state(void) { - static int battery_ticks; - int color = LED_OFF; - int period = 0; - uint32_t chflags = charge_get_flags(); + enum power_state chipset_state = 0; - battery_ticks++; + /* + * Only covers subset of power states as other states don't + * alter LED behavior + */ + if (chipset_in_state(CHIPSET_STATE_ON)) + /* S0 */ + chipset_state = POWER_S0; + else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) + /* S3 */ + chipset_state = POWER_S3; + else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + /* S5 */ + chipset_state = POWER_S5; - switch (charge_get_state()) { - case PWR_STATE_CHARGE: - /* Always indicate amber on when charging. */ - color = LED_AMBER; - break; - case PWR_STATE_DISCHARGE: - if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) { - /* Discharging in S3: Amber 1 sec, off 3 sec */ - period = (1 + 3) * LED_ONE_SEC; - battery_ticks = battery_ticks % period; - if (battery_ticks < 1 * LED_ONE_SEC) - color = LED_AMBER; - else - color = LED_OFF; - } else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) { - /* Discharging in S5: off */ - color = LED_OFF; - } else if (chipset_in_state(CHIPSET_STATE_ON)) { - /* Discharging in S0: Blue on */ - color = LED_BLUE; + return chipset_state; +} + +static bool find_node_with_extra_flag(int i) +{ + uint32_t chflags = charge_get_flags(); + bool found_node = false; + + switch (node_array[i].led_extra_flag) { + case LED_CHFLAG_FORCE_IDLE: + case LED_CHFLAG_DEFAULT: + if (chflags & CHARGE_FLAG_FORCE_IDLE) { + if (node_array[i].led_extra_flag == + LED_CHFLAG_FORCE_IDLE) + found_node = true; + } else { + if (node_array[i].led_extra_flag == LED_CHFLAG_DEFAULT) + found_node = true; } break; - case PWR_STATE_ERROR: - /* Battery error: Amber 1 sec, off 1 sec */ - period = (1 + 1) * LED_ONE_SEC; - battery_ticks = battery_ticks % period; - if (battery_ticks < 1 * LED_ONE_SEC) - color = LED_AMBER; - else - color = LED_OFF; - break; - case PWR_STATE_CHARGE_NEAR_FULL: - /* Full Charged: Blue on */ - color = LED_BLUE; - break; - case PWR_STATE_IDLE: /* External power connected in IDLE */ - if (chflags & CHARGE_FLAG_FORCE_IDLE) { - /* Factory mode: Blue 2 sec, Amber 2 sec */ - period = (2 + 2) * LED_ONE_SEC; - battery_ticks = battery_ticks % period; - if (battery_ticks < 2 * LED_ONE_SEC) - color = LED_BLUE; - else - color = LED_AMBER; - } else - color = LED_BLUE; + case LED_BATT_BELOW_10_PCT: + case LED_BATT_ABOVE_10_PCT: + if (charge_get_percent() < 10) { + if (node_array[i].led_extra_flag == + LED_BATT_BELOW_10_PCT) + found_node = true; + } else { + if (node_array[i].led_extra_flag != + LED_BATT_ABOVE_10_PCT) + found_node = true; + } break; default: - /* Other states don't alter LED behavior */ + LOG_ERR("Invalid led extra flag %d", + node_array[i].led_extra_flag); break; } + return found_node; +} + +static int find_node(void) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(node_array); i++) { + /* Check if this node depends on power state */ + if (node_array[i].pwr_state != PWR_STATE_UNCHANGE) { + enum charge_state pwr_state = charge_get_state(); + + if (node_array[i].pwr_state != pwr_state) + continue; + } + + /* Check if this node depends on chipset state */ + if (node_array[i].chipset_state != 0) { + enum power_state chipset_state = + get_chipset_state(); + + /* Continue at current index as nodes are in sequence */ + if (node_array[i].chipset_state != chipset_state) + continue; + } + + /* Check if the node depends on any special flags */ + if (node_array[i].led_extra_flag != NONE) + if (!find_node_with_extra_flag(i)) + continue; + + /* We found the node */ + return i; + } + + /* + * Didn't find a valid node that matches all the properties + * Return -1 to signify error + */ + return -1; +} + +#define GET_PERIOD(n_idx, c_idx) node_array[n_idx].led_colors[c_idx].acc_period +#define GET_COLOR(n_idx, c_idx) node_array[n_idx].led_colors[c_idx].led_color + +static int find_color(int node_idx, int ticks) +{ + int color_idx = 0; + + /* If period value at index 0 is not 0, it's a blinking LED */ + if (GET_PERIOD(node_idx, 0) != 0) { + /* Period is accumulated at the last index */ + ticks = ticks % GET_PERIOD(node_idx, MAX_COLOR - 1); + + for (color_idx = 0; color_idx < MAX_COLOR; color_idx++) { + if (GET_PERIOD(node_idx, color_idx) < ticks) + break; + } + } + + return GET_COLOR(node_idx, color_idx); +} + +static void board_led_set_color(void) +{ + int color = LED_OFF; + int node = 0; + static int ticks; + + ticks++; + + node = find_node(); + + if (node < 0) + LOG_ERR("Invalid node id, node with matching prop not found"); + else + color = find_color(node, ticks); + led_set_color(color); } @@ -129,7 +294,7 @@ static void board_led_set_battery(void) static void led_tick(void) { if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) - board_led_set_battery(); + board_led_set_color(); } DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); @@ -143,7 +308,7 @@ void led_control(enum ec_led_id led_id, enum ec_led_state state) if (state == LED_STATE_RESET) { led_auto_control(EC_LED_ID_BATTERY_LED, 1); - board_led_set_battery(); + board_led_set_color(); return; } diff --git a/zephyr/projects/trogdor/lazor/zmake.yaml b/zephyr/projects/trogdor/lazor/zmake.yaml deleted file mode 100644 index 1e62541de8..0000000000 --- a/zephyr/projects/trogdor/lazor/zmake.yaml +++ /dev/null @@ -1,16 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: trogdor -dts-overlays: - - battery.dts - - gpio.dts - - keyboard.dts - - motionsense.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/projects/brya/brya/zmake.yaml b/zephyr/projects/trogdor/trogdor/BUILD.py index 851b7f8a3f..03a71a66a1 100644 --- a/zephyr/projects/brya/brya/zmake.yaml +++ b/zephyr/projects/trogdor/trogdor/BUILD.py @@ -2,12 +2,8 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -board: brya -dts-overlays: - - gpio.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx +register_npcx_project( + project_name="trogdor", + zephyr_board="trogdor", + dts_overlays=["gpio.dts", "battery.dts", "motionsense.dts"], +) diff --git a/zephyr/projects/trogdor/trogdor/include/pwm_map.h b/zephyr/projects/trogdor/trogdor/include/pwm_map.h deleted file mode 100644 index e704b6d6d3..0000000000 --- a/zephyr/projects/trogdor/trogdor/include/pwm_map.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_PWM_MAP_H -#define __ZEPHYR_PWM_MAP_H - -#include <devicetree.h> - -#include "pwm/pwm.h" - -#define PWM_CH_KBLIGHT NAMED_PWM(kblight) -#define PWM_CH_DISPLIGHT NAMED_PWM(displight) - -#endif /* __ZEPHYR_PWM_MAP_H */ diff --git a/zephyr/projects/trogdor/trogdor/prj.conf b/zephyr/projects/trogdor/trogdor/prj.conf index 5c1342e573..e2d944c196 100644 --- a/zephyr/projects/trogdor/trogdor/prj.conf +++ b/zephyr/projects/trogdor/trogdor/prj.conf @@ -103,6 +103,7 @@ CONFIG_PLATFORM_EC_USB_PD_REV30=n CONFIG_PLATFORM_EC_USB_PD_TCPC_LOW_POWER=y CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805=y CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG=n +CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG=n CONFIG_PLATFORM_EC_USB_PD_LOGGING=y CONFIG_PLATFORM_EC_USB_PORT_POWER_DUMB=y diff --git a/zephyr/projects/trogdor/trogdor/zmake.yaml b/zephyr/projects/trogdor/trogdor/zmake.yaml deleted file mode 100644 index fbd8ff3382..0000000000 --- a/zephyr/projects/trogdor/trogdor/zmake.yaml +++ /dev/null @@ -1,15 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: trogdor -dts-overlays: - - gpio.dts - - battery.dts - - motionsense.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/projects/it8xxx2_evb/zmake.yaml b/zephyr/projects/volteer/delbin/BUILD.py index f39dda1238..fd933cc8d1 100644 --- a/zephyr/projects/it8xxx2_evb/zmake.yaml +++ b/zephyr/projects/volteer/delbin/BUILD.py @@ -2,10 +2,8 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -board: it8xxx2_evb -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: raw +register_npcx_project( + project_name="delbin", + zephyr_board="volteer", + dts_overlays=["gpio.dts", "motionsense.dts"], +) diff --git a/zephyr/projects/volteer/delbin/zmake.yaml b/zephyr/projects/volteer/delbin/zmake.yaml deleted file mode 100644 index 25480e3c7f..0000000000 --- a/zephyr/projects/volteer/delbin/zmake.yaml +++ /dev/null @@ -1,14 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: volteer -dts-overlays: - - gpio.dts - - motionsense.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/projects/volteer/volteer/BUILD.py b/zephyr/projects/volteer/volteer/BUILD.py new file mode 100644 index 0000000000..3dbcb5ce28 --- /dev/null +++ b/zephyr/projects/volteer/volteer/BUILD.py @@ -0,0 +1,19 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_npcx_project( + project_name="volteer", + zephyr_board="volteer", + dts_overlays=[ + "bb_retimer.dts", + "cbi_eeprom.dts", + "fan.dts", + "gpio.dts", + "keyboard.dts", + "motionsense.dts", + "pwm.dts", + "pwm_leds.dts", + "usbc.dts", + ], +) diff --git a/zephyr/projects/volteer/volteer/gpio.dts b/zephyr/projects/volteer/volteer/gpio.dts index 3f679fc7b5..06381d6492 100644 --- a/zephyr/projects/volteer/volteer/gpio.dts +++ b/zephyr/projects/volteer/volteer/gpio.dts @@ -108,7 +108,7 @@ enum-name = "GPIO_USB_C1_PPC_INT_ODL"; label = "USB_C1_PPC_INT_ODL"; }; - usb_c0_bc12_int_odl { + gpio_usb_c0_bc12_int_odl: usb_c0_bc12_int_odl { gpios = <&gpioe 4 GPIO_INPUT>; enum-name = "GPIO_USB_C0_BC12_INT_ODL"; label = "USB_C0_BC12_INT_ODL"; @@ -119,7 +119,7 @@ enum-name = "GPIO_USB_C1_MIX_INT_ODL"; label = "USB_C1_MIX_INT_ODL"; }; - usb_c1_bc12_int_odl { + gpio_usb_c1_bc12_int_odl: usb_c1_bc12_int_odl { #gpio-cells = <0>; gpios = <&gpio0 3 GPIO_INPUT>; enum-name = "GPIO_USB_C1_BC12_INT_ODL"; diff --git a/zephyr/projects/volteer/volteer/include/pwm_map.h b/zephyr/projects/volteer/volteer/include/pwm_map.h deleted file mode 100644 index 144a4e5710..0000000000 --- a/zephyr/projects/volteer/volteer/include/pwm_map.h +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_CHROME_PWM_MAP_H -#define __ZEPHYR_CHROME_PWM_MAP_H - -#include <devicetree.h> - -#include "config.h" - -#include "pwm/pwm.h" - -/* - * TODO(b/177452529): eliminate the dependency on enum pwm_channel - * and configure this information directly from the device tree. - */ - -#define PWM_CH_KBLIGHT NAMED_PWM(kblight) - -#endif /* __ZEPHYR_CHROME_PWM_MAP_H */ diff --git a/zephyr/projects/volteer/volteer/pwm.dts b/zephyr/projects/volteer/volteer/pwm.dts index f8a0fef7df..ec581f2caf 100644 --- a/zephyr/projects/volteer/volteer/pwm.dts +++ b/zephyr/projects/volteer/volteer/pwm.dts @@ -31,7 +31,7 @@ label = "LED4_SIDESEL"; frequency = <2400>; }; - kblight { + kblight: kblight { pwms = <&pwm3 0 0>; label = "KBLIGHT"; frequency = <2400>; diff --git a/zephyr/projects/volteer/volteer/usbc.dts b/zephyr/projects/volteer/volteer/usbc.dts new file mode 100644 index 0000000000..35035e8bf1 --- /dev/null +++ b/zephyr/projects/volteer/volteer/usbc.dts @@ -0,0 +1,19 @@ +/ { + usbc { + port0: usbc-port0 { + bc12 { + compatible = "pericom,pi3usb9201"; + port = <&i2c_usb_c0>; + irq = <&gpio_usb_c0_bc12_int_odl>; + }; + }; + + port1: usbc-port1 { + bc12 { + compatible = "pericom,pi3usb9201"; + port = <&i2c_usb_c1>; + irq = <&gpio_usb_c1_bc12_int_odl>; + }; + }; + }; +}; diff --git a/zephyr/projects/volteer/volteer/zmake.yaml b/zephyr/projects/volteer/volteer/zmake.yaml deleted file mode 100644 index 7382d98440..0000000000 --- a/zephyr/projects/volteer/volteer/zmake.yaml +++ /dev/null @@ -1,20 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: volteer -dts-overlays: - - bb_retimer.dts - - cbi_eeprom.dts - - fan.dts - - gpio.dts - - keyboard.dts - - motionsense.dts - - pwm.dts - - pwm_leds.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.7 -output-type: npcx diff --git a/zephyr/shim/chip/CMakeLists.txt b/zephyr/shim/chip/CMakeLists.txt index 5c76a4163a..59b5a6c739 100644 --- a/zephyr/shim/chip/CMakeLists.txt +++ b/zephyr/shim/chip/CMakeLists.txt @@ -6,7 +6,5 @@ if (DEFINED CONFIG_SOC_FAMILY_NPCX) add_subdirectory(npcx) elseif (DEFINED CONFIG_SOC_FAMILY_RISCV_ITE) add_subdirectory(it8xxx2) -elseif (DEFINED CONFIG_SOC_POSIX) - add_subdirectory(posix) endif() diff --git a/zephyr/shim/chip/npcx/CMakeLists.txt b/zephyr/shim/chip/npcx/CMakeLists.txt index d3cd4b48fd..585b072ea8 100644 --- a/zephyr/shim/chip/npcx/CMakeLists.txt +++ b/zephyr/shim/chip/npcx/CMakeLists.txt @@ -13,7 +13,6 @@ zephyr_library_include_directories(include) zephyr_library_sources(clock.c) zephyr_library_sources(gpio.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c) zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_NPCX keyboard_raw.c) zephyr_library_sources_ifdef(CONFIG_CROS_SHI_NPCX shi.c) zephyr_library_sources_ifdef(CONFIG_CROS_EC system.c) diff --git a/zephyr/shim/chip/npcx/espi.c b/zephyr/shim/chip/npcx/espi.c deleted file mode 100644 index 2115f388d6..0000000000 --- a/zephyr/shim/chip/npcx/espi.c +++ /dev/null @@ -1,53 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <device.h> -#include <sys/util.h> - -#include "drivers/espi.h" -#include "soc_espi.h" -#include "zephyr_espi_shim.h" - -bool is_acpi_command(uint32_t data) -{ - struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; - - return acpi->type; -} - -uint32_t get_acpi_value(uint32_t data) -{ - struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; - - return acpi->data; -} - -bool is_8042_ibf(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->evt & HOST_KBC_EVT_IBF; -} - -bool is_8042_obe(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->evt & HOST_KBC_EVT_OBE; -} - -uint32_t get_8042_type(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->type; -} - -uint32_t get_8042_data(uint32_t data) -{ - struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; - - return kbc->data; -} diff --git a/zephyr/shim/chip/posix/espi.c b/zephyr/shim/chip/posix/espi.c deleted file mode 100644 index cf348744d7..0000000000 --- a/zephyr/shim/chip/posix/espi.c +++ /dev/null @@ -1,49 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include <sys/util.h> -#include "zephyr_espi_shim.h" - -#define ACPI_TYPE_POS 0U -#define ACPI_DATA_POS 8U - -/* 8042 event data format */ -#define POSIX_8042_EVT_POS 16U -#define POSIX_8042_DATA_POS 8U -#define POSIX_8042_TYPE_POS 0U - -/* 8042 event type format */ -#define POSIX_8042_EVT_IBF BIT(0) -#define POSIX_8042_EVT_OBE BIT(1) - -bool is_acpi_command(uint32_t data) -{ - return (data >> ACPI_TYPE_POS) & 0x01; -} - -uint32_t get_acpi_value(uint32_t data) -{ - return (data >> ACPI_TYPE_POS) & 0xff; -} - -bool is_POSIX_8042_ibf(uint32_t data) -{ - return (data >> POSIX_8042_EVT_POS) & POSIX_8042_EVT_IBF; -} - -bool is_POSIX_8042_obe(uint32_t data) -{ - return (data >> POSIX_8042_EVT_POS) & POSIX_8042_EVT_OBE; -} - -uint32_t get_POSIX_8042_type(uint32_t data) -{ - return (data >> POSIX_8042_TYPE_POS) & 0xFF; -} - -uint32_t get_POSIX_8042_data(uint32_t data) -{ - return (data >> POSIX_8042_DATA_POS) & 0xFF; -} diff --git a/zephyr/shim/include/board.h b/zephyr/shim/include/board.h index df3ef33c0e..a1059eb426 100644 --- a/zephyr/shim/include/board.h +++ b/zephyr/shim/include/board.h @@ -11,6 +11,9 @@ /* Included shimed version of gpio signal. */ #include "gpio_signal.h" +/* Include shimmed version of power signal */ +#include "power/power.h" + /* Include board specific gpio mapping/aliases if named_pgios node exists */ #if DT_NODE_EXISTS(DT_PATH(named_gpios)) #include "gpio_map.h" @@ -22,7 +25,7 @@ #endif #ifdef CONFIG_PWM -#include "pwm_map.h" +#include "pwm/pwm.h" #endif /* Include board specific sensor configuration if motionsense is enabled */ diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 0548b3ba5d..d6185043d6 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -152,6 +152,19 @@ #endif /* CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE */ +#undef CONFIG_BATTERY_V1 +#ifdef CONFIG_PLATFORM_EC_BATTERY_V1 +#define CONFIG_BATTERY_V1 +#endif + +#undef CONFIG_BATTERY_V2 +#ifdef CONFIG_PLATFORM_EC_BATTERY_V2 +#define CONFIG_BATTERY_V2 +#endif + +#undef CONFIG_BATTERY_COUNT +#define CONFIG_BATTERY_COUNT CONFIG_PLATFORM_EC_BATTERY_COUNT + #undef CONFIG_BATTERY_SMART #ifdef CONFIG_PLATFORM_EC_BATTERY_SMART #define CONFIG_BATTERY_SMART @@ -174,6 +187,11 @@ #define CONFIG_CMD_I2C_SPEED #endif +#undef CONFIG_HOSTCMD_I2C_CONTROL +#ifdef CONFIG_PLATFORM_EC_HOSTCMD_I2C_CONTROL +#define CONFIG_HOSTCMD_I2C_CONTROL +#endif + #undef CONFIG_BATTERY_PRESENT_CUSTOM #ifdef CONFIG_PLATFORM_EC_BATTERY_PRESENT_CUSTOM #define CONFIG_BATTERY_PRESENT_CUSTOM @@ -290,6 +308,11 @@ #define CONFIG_CHIPSET_RESUME_INIT_HOOK #endif +#undef CONFIG_CHIP_INIT_ROM_REGION +#ifdef CONFIG_PLATFORM_EC_CHIP_INIT_ROM_REGION +#define CONFIG_CHIP_INIT_ROM_REGION +#endif + #ifdef CONFIG_PLATFORM_EC_EXTPOWER_GPIO #define CONFIG_EXTPOWER_GPIO @@ -311,7 +334,7 @@ #ifdef CONFIG_PLATFORM_EC_ESPI #ifdef CONFIG_PLATFORM_EC_HOSTCMD -#define CONFIG_HOSTCMD_ESPI +#define CONFIG_HOST_INTERFACE_ESPI #endif /* eSPI signals */ @@ -353,6 +376,22 @@ #define CONFIG_RO_SIZE CONFIG_CROS_EC_RO_SIZE #define CONFIG_RW_SIZE CONFIG_CROS_EC_RW_SIZE +/* + * ROM resident area in flash used to store data objects that are not copied + * into code RAM. Enable using the CONFIG_CHIP_INIT_ROM_REGION option. + */ +#define CONFIG_RO_ROM_RESIDENT_MEM_OFF CONFIG_RO_SIZE +#define CONFIG_RO_ROM_RESIDENT_SIZE \ + (CONFIG_EC_PROTECTED_STORAGE_SIZE - CONFIG_RO_SIZE) + +/* + * RW firmware in program memory - Identical to RO, only one image loaded at + * a time. + */ +#define CONFIG_RW_ROM_RESIDENT_MEM_OFF CONFIG_RW_SIZE +#define CONFIG_RW_ROM_RESIDENT_SIZE \ + (CONFIG_EC_WRITABLE_STORAGE_SIZE - CONFIG_RW_SIZE) + /* Flash settings */ #undef CONFIG_EXTERNAL_STORAGE #undef CONFIG_INTERNAL_STORAGE @@ -531,6 +570,7 @@ #ifdef CONFIG_PLATFORM_EC_PWM_KBLIGHT #define CONFIG_PWM_KBLIGHT #define CONFIG_KEYBOARD_BACKLIGHT +#define PWM_CH_KBLIGHT PWM_CHANNEL(DT_NODELABEL(kblight)) #endif #undef CONFIG_LED_COMMON @@ -567,6 +607,7 @@ #undef CONFIG_PWM_DISPLIGHT #ifdef CONFIG_PLATFORM_EC_PWM_DISPLIGHT #define CONFIG_PWM_DISPLIGHT +#define PWM_CH_DISPLIGHT PWM_CHANNEL(DT_NODELABEL(displight)) #endif #undef CONFIG_CPU_PROCHOT_ACTIVE_LOW @@ -941,6 +982,11 @@ #define CONFIG_USB_DRP_ACC_TRYSRC #endif +#undef CONFIG_USB_PD_TCPM_NCT38XX +#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_NCT38XX +#define CONFIG_USB_PD_TCPM_NCT38XX +#endif + #undef CONFIG_USB_PD_TCPM_PS8751 #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8751 #define CONFIG_USB_PD_TCPM_PS8751 @@ -1020,6 +1066,16 @@ #define CONFIG_USBC_PPC #endif +#undef CONFIG_USBC_PPC_AOZ1380 +#ifdef CONFIG_PLATFORM_EC_USBC_PPC_AOZ1380 +#define CONFIG_USBC_PPC_AOZ1380 +#endif + +#undef CONFIG_USBC_PPC_NX20P3483 +#ifdef CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483 +#define CONFIG_USBC_PPC_NX20P3483 +#endif + #undef CONFIG_USBC_PPC_SN5S330 #ifdef CONFIG_PLATFORM_EC_USBC_PPC_SN5S330 #define CONFIG_USBC_PPC_SN5S330 @@ -1046,15 +1102,14 @@ #endif #undef CONFIG_USB_PD_TCPC_RUNTIME_CONFIG -#undef CONFIG_USB_MUX_RUNTIME_CONFIG #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG #define CONFIG_USB_PD_TCPC_RUNTIME_CONFIG +#endif +#undef CONFIG_USB_MUX_RUNTIME_CONFIG #ifdef CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG #define CONFIG_USB_MUX_RUNTIME_CONFIG -#endif /* CONFIG_PLATFORM_EC_USB_MUX_RUNTIME_CONFIG */ - -#endif /* CONFIG_PLATFORM_EC_USB_PD_TCPC_RUNTIME_CONFIG */ +#endif #undef CONFIG_USB_PD_ALT_MODE #ifdef CONFIG_PLATFORM_EC_USB_PD_ALT_MODE @@ -1109,6 +1164,11 @@ #define CONFIG_USBC_RETIMER_PS8811 #endif +#undef CONFIG_USBC_RETIMER_PS8818 +#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_PS8818 +#define CONFIG_USBC_RETIMER_PS8818 +#endif + #undef CONFIG_USBC_SS_MUX #ifdef CONFIG_PLATFORM_EC_USBC_SS_MUX #define CONFIG_USBC_SS_MUX @@ -1119,6 +1179,11 @@ #define CONFIG_USBC_SS_MUX_DFP_ONLY #endif +#undef CONFIG_USB_MUX_AMD_FP6 +#ifdef CONFIG_PLATFORM_EC_USB_MUX_AMD_FP6 +#define CONFIG_USB_MUX_AMD_FP6 +#endif + #undef CONFIG_USB_MUX_IT5205 #ifdef CONFIG_PLATFORM_EC_USB_MUX_IT5205 #define CONFIG_USB_MUX_IT5205 @@ -1129,6 +1194,11 @@ #define CONFIG_USB_MUX_PS8743 #endif +#undef CONFIG_USB_MUX_TUSB1044 +#ifdef CONFIG_PLATFORM_EC_USB_MUX_TUSB1044 +#define CONFIG_USB_MUX_TUSB1044 +#endif + #undef CONFIG_USB_MUX_VIRTUAL #ifdef CONFIG_PLATFORM_EC_USB_MUX_VIRTUAL #define CONFIG_USB_MUX_VIRTUAL @@ -1425,6 +1495,11 @@ #define CONFIG_SOFTWARE_PANIC #endif +#undef CONFIG_PANIC_CONSOLE_OUTPUT +#ifdef CONFIG_PLATFORM_EC_PANIC_CONSOLE_OUTPUT +#define CONFIG_PANIC_CONSOLE_OUTPUT +#endif + #undef CONFIG_CMD_CRASH #ifdef CONFIG_PLATFORM_EC_CONSOLE_CMD_CRASH #define CONFIG_CMD_CRASH @@ -1639,12 +1714,61 @@ #define CONFIG_CHARGER_BQ25720 #endif -#undef CONFIG_CHARGER_BQ25720_VSYS_TH2_DV +#undef CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM #ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25720_VSYS_TH2_DV +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV #define CONFIG_CHARGER_BQ25720_VSYS_TH2_DV \ CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_TH2_DV #endif +#undef CONFIG_CHARGER_BQ25720_VSYS_UVP_CUSTOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_UVP_CUSTOM +#define CONFIG_CHARGER_BQ25720_VSYS_UVP_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25720_VSYS_UVP +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_UVP +#define CONFIG_CHARGER_BQ25720_VSYS_UVP \ + CONFIG_PLATFORM_EC_CHARGER_BQ25720_VSYS_UVP +#endif + +#undef CONFIG_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM +#define CONFIG_CHARGER_BQ25720_IDCHG_DEG2_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25720_IDCHG_DEG2 +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_IDCHG_DEG2 +#define CONFIG_CHARGER_BQ25720_IDCHG_DEG2 \ + CONFIG_PLATFORM_EC_CHARGER_BQ25720_IDCHG_DEG2 +#endif + +#undef CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_IDCHG_TH2_CUSTOM +#define CONFIG_CHARGER_BQ25720_IDCHG_TH2_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25720_IDCHG_TH2 +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_IDCHG_TH2 +#define CONFIG_CHARGER_BQ25720_IDCHG_TH2 \ + CONFIG_PLATFORM_EC_CHARGER_BQ25720_IDCHG_TH2 +#endif + +#undef CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM +#define CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV +#define CONFIG_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV \ + CONFIG_PLATFORM_EC_CHARGER_BQ25710_VSYS_MIN_VOLTAGE_MV +#endif + #undef CONFIG_HIBERNATE_PSL #ifdef CONFIG_PLATFORM_EC_HIBERNATE_PSL #define CONFIG_HIBERNATE_PSL @@ -1656,6 +1780,74 @@ CONFIG_PLATFORM_EC_BATTERY_DEVICE_CHEMISTRY #endif +#undef CONFIG_CHARGER_BQ25710_PSYS_SENSING +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PSYS_SENSING +#define CONFIG_CHARGER_BQ25710_PSYS_SENSING +#endif + +#undef CONFIG_CHARGER_BQ25710_CMP_REF_1P2 +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_CMP_REF_1P2 +#define CONFIG_CHARGER_BQ25710_CMP_REF_1P2 +#endif + +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#define CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG_CUSTOM +#endif + +#undef CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG +#define CONFIG_CHARGER_BQ25710_PKPWR_TOVLD_DEG \ + CONFIG_PLATFORM_EC_CHARGER_BQ25710_PKPWR_TOVLD_DEG +#endif + +#undef CONFIG_CHARGER_BQ25710_EN_ACOC +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_EN_ACOC +#define CONFIG_CHARGER_BQ25710_EN_ACOC +#endif + +#undef CONFIG_CHARGER_BQ25710_ACOC_VTH_1P33 +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_ACOC_VTH_1P33 +#define CONFIG_CHARGER_BQ25710_ACOC_VTH_1P33 +#endif + +#undef CONFIG_CHARGER_BQ25710_BATOC_VTH_MINIMUM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_BATOC_VTH_MINIMUM +#define CONFIG_CHARGER_BQ25710_BATOC_VTH_MINIMUM +#endif + +#undef CONFIG_CHARGER_BQ25710_SENSE_RESISTOR +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR \ + CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR +#endif + +#undef CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR_AC +#define CONFIG_CHARGER_BQ25710_SENSE_RESISTOR_AC \ + CONFIG_PLATFORM_EC_CHARGER_BQ25710_SENSE_RESISTOR_AC +#endif + +#undef CONFIG_CHARGER_BQ25710_PP_INOM +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PP_INOM +#define CONFIG_CHARGER_BQ25710_PP_INOM +#endif + +#undef CONFIG_CHARGER_BQ25710_PP_BATPRES +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PP_BATPRES +#define CONFIG_CHARGER_BQ25710_PP_BATPRES +#endif + +#undef CONFIG_CHARGER_BQ25710_PP_ACOK +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25710_PP_ACOK +#define CONFIG_CHARGER_BQ25710_PP_ACOK +#endif + +#undef CONFIG_CHARGER_BQ25720_PP_IDCHG2 +#ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720_PP_IDCHG2 +#define CONFIG_CHARGER_BQ25720_PP_IDCHG2 +#endif + #undef CONFIG_CHARGER_DISCHARGE_ON_AC #ifdef CONFIG_PLATFORM_EC_CHARGER_DISCHARGE_ON_AC #define CONFIG_CHARGER_DISCHARGE_ON_AC @@ -1825,4 +2017,8 @@ #define CONFIG_AMD_STT #endif +#ifdef CONFIG_PLATFORM_EC_IOEX_CROS_DRV +#define CONFIG_IO_EXPANDER_SUPPORT_GET_PORT +#endif + #endif /* __CROS_EC_CONFIG_CHIP_H */ diff --git a/zephyr/shim/include/gpio/gpio.h b/zephyr/shim/include/gpio/gpio.h index 18089e8a8e..dabf1d375e 100644 --- a/zephyr/shim/include/gpio/gpio.h +++ b/zephyr/shim/include/gpio/gpio.h @@ -9,6 +9,21 @@ #include <device.h> #include <devicetree.h> +/* + * Validate interrupt flags are valid for the Zephyr GPIO driver. + */ +#define IS_GPIO_INTERRUPT_FLAG(flag, mask) ((flag & mask) == mask) +#define VALID_GPIO_INTERRUPT_FLAG(flag) \ + (IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_RISING) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_FALLING) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_BOTH) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_LOW) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_HIGH) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_TO_INACTIVE) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_TO_ACTIVE) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_INACTIVE) || \ + IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_ACTIVE)) + /* Information about each unused pin in the 'unused-pins' device tree node. */ struct unused_pin_config { /* Device name of a unused gpio pin */ diff --git a/zephyr/shim/include/power/power.h b/zephyr/shim/include/power/power.h new file mode 100644 index 0000000000..d5e03f68fa --- /dev/null +++ b/zephyr/shim/include/power/power.h @@ -0,0 +1,83 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_CHROME_POWER_POWER_H +#define ZEPHYR_CHROME_POWER_POWER_H + +#include <devicetree.h> + +#define POWER_SIGNAL_LIST_NODE \ + DT_NODELABEL(power_signal_list) + +#define SYSTEM_DT_POWER_SIGNAL_CONFIG \ + DT_NODE_EXISTS(POWER_SIGNAL_LIST_NODE) + +#if (SYSTEM_DT_POWER_SIGNAL_CONFIG) + +#define GEN_POWER_SIGNAL_STRUCT_ENTRY_GPIO(cid) \ + DT_STRING_UPPER_TOKEN( \ + DT_PROP( \ + cid, \ + power_gpio_pin \ + ), \ + enum_name \ + ) +#define GEN_POWER_SIGNAL_STRUCT_ENTRY_FLAGS(cid) \ +( \ + DT_GPIO_FLAGS( \ + DT_PROP( \ + cid, \ + power_gpio_pin \ + ), \ + gpios \ + ) & GPIO_ACTIVE_LOW \ + ? POWER_SIGNAL_ACTIVE_LOW \ + : POWER_SIGNAL_ACTIVE_HIGH \ +) +#define GEN_POWER_SIGNAL_STRUCT_ENTRY_NAME(cid) \ + DT_PROP( \ + cid, \ + power_enum_name \ + ) + +#define GEN_POWER_SIGNAL_STRUCT_ENTRY(cid) \ +{ \ + .gpio = GEN_POWER_SIGNAL_STRUCT_ENTRY_GPIO(cid), \ + .flags = GEN_POWER_SIGNAL_STRUCT_ENTRY_FLAGS(cid), \ + .name = GEN_POWER_SIGNAL_STRUCT_ENTRY_NAME(cid) \ +} +#define GEN_POWER_SIGNAL_STRUCT(cid) \ + [GEN_POWER_SIGNAL_ENUM_ENTRY(cid)] = \ + GEN_POWER_SIGNAL_STRUCT_ENTRY(cid), + + +#define GEN_POWER_SIGNAL_ENUM_ENTRY(cid) \ + DT_STRING_UPPER_TOKEN( \ + cid, \ + power_enum_name \ + ) +#define GEN_POWER_SIGNAL_ENUM_ENTRY_COMMA(cid) \ + GEN_POWER_SIGNAL_ENUM_ENTRY(cid), + +enum power_signal { + DT_FOREACH_CHILD( + POWER_SIGNAL_LIST_NODE, + GEN_POWER_SIGNAL_ENUM_ENTRY_COMMA) + POWER_SIGNAL_COUNT +}; + +/* + * Verify the number of required power-signals are specified in + * the DeviceTree + */ +#define POWER_SIGNALS_REQUIRED \ + DT_PROP( \ + POWER_SIGNAL_LIST_NODE, \ + power_signals_required \ + ) +BUILD_ASSERT(POWER_SIGNALS_REQUIRED == POWER_SIGNAL_COUNT); + +#endif /* SYSTEM_DT_POWER_SIGNAL_CONFIG */ +#endif /* ZEPHYR_CHROME_POWER_POWER_H */ diff --git a/zephyr/shim/include/shimmed_task_id.h b/zephyr/shim/include/shimmed_task_id.h index f56edf0806..d58a462631 100644 --- a/zephyr/shim/include/shimmed_task_id.h +++ b/zephyr/shim/include/shimmed_task_id.h @@ -12,6 +12,18 @@ typedef uint8_t task_id_t; /* + * Bitmask of port enable bits, expanding to a value like `BIT(0) | BIT(2) | 0`. + */ +#define PD_INT_SHARED_PORT_MASK ( \ + FOR_EACH_NONEMPTY_TERM(BIT, (|), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_0_SHARED, (0)), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_1_SHARED, (1)), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_2_SHARED, (2)), \ + IF_ENABLED(CONFIG_PLATFORM_EC_USB_PD_PORT_3_SHARED, (3)), \ + ) 0 \ +) + +/* * Highest priority on bottom -- same as in platform/ec. List of CROS_EC_TASK * items. See CONFIG_TASK_LIST in platform/ec's config.h for more information. * For tests that want their own custom tasks, use CONFIG_HAS_TEST_TASKS and not @@ -19,9 +31,6 @@ typedef uint8_t task_id_t; */ #ifdef CONFIG_SHIMMED_TASKS #define CROS_EC_TASK_LIST \ - COND_CODE_1(HAS_TASK_HOOKS, \ - (CROS_EC_TASK(HOOKS, hook_task, 0, \ - CONFIG_TASK_HOOKS_STACK_SIZE)), ()) \ COND_CODE_1(HAS_TASK_CHG_RAMP, \ (CROS_EC_TASK(CHG_RAMP, chg_ramp_task, 0, \ CONFIG_TASK_CHG_RAMP_STACK_SIZE)), ()) \ @@ -67,6 +76,10 @@ typedef uint8_t task_id_t; COND_CODE_1(HAS_TASK_PD_C3, \ (CROS_EC_TASK(PD_C3, pd_task, 0, \ CONFIG_TASK_PD_STACK_SIZE)), ()) \ + IF_ENABLED(CONFIG_HAS_TASK_PD_INT_SHARED, \ + (CROS_EC_TASK(PD_INT_SHARED, pd_shared_alert_task, \ + PD_INT_SHARED_PORT_MASK, \ + CONFIG_TASK_PD_INT_STACK_SIZE))) \ COND_CODE_1(HAS_TASK_PD_INT_C0, \ (CROS_EC_TASK(PD_INT_C0, pd_interrupt_handler_task, 0, \ CONFIG_TASK_PD_INT_STACK_SIZE)), ()) \ diff --git a/zephyr/shim/include/shimmed_tasks.h b/zephyr/shim/include/shimmed_tasks.h index 631b3fcb16..4db1672a30 100644 --- a/zephyr/shim/include/shimmed_tasks.h +++ b/zephyr/shim/include/shimmed_tasks.h @@ -18,10 +18,6 @@ #define HAS_TASK_CHIPSET 1 #endif /* CONFIG_HAS_TASK_CHIPSET */ -#ifdef CONFIG_HAS_TASK_HOOKS -#define HAS_TASK_HOOKS 1 -#endif /* CONFIG_HAS_TASK_HOOKS */ - #ifdef CONFIG_HAS_TASK_HOSTCMD #define HAS_TASK_HOSTCMD 1 #define CONFIG_HOSTCMD_EVENTS diff --git a/zephyr/shim/include/usbc/ppc.h b/zephyr/shim/include/usbc/ppc.h new file mode 100644 index 0000000000..a59436712b --- /dev/null +++ b/zephyr/shim/include/usbc/ppc.h @@ -0,0 +1,40 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_CHROME_USBC_PPC_H +#define ZEPHYR_CHROME_USBC_PPC_H + +#include <device.h> +#include <devicetree.h> +#include "usbc/ppc_sn5s330.h" +#include "usbc/ppc_syv682x.h" + +#define PPC_ID(id) DT_CAT(PPC_, id) +#define PPC_ID_WITH_COMMA(id) PPC_ID(id), +#define PPC_USBC_PORT(id) DT_REG_ADDR(DT_PARENT(id)) +#define PPC_ALT_FOR(alt_id) PPC_USBC_PORT(DT_PHANDLE(alt_id, alternate_for)) + +#define PPC_ALT_ENUM(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), \ + (PPC_ID_WITH_COMMA(id)), ()) + +enum ppc_chips_alt_id { + DT_FOREACH_STATUS_OKAY(SN5S330_COMPAT, PPC_ALT_ENUM) + DT_FOREACH_STATUS_OKAY(SYV682X_COMPAT, PPC_ALT_ENUM) + PPC_CHIP_ALT_COUNT +}; + +extern struct ppc_config_t ppc_chips_alt[]; + +#define PPC_ENABLE_ALTERNATE(nodelabel) \ + do { \ + BUILD_ASSERT(DT_NODE_EXISTS(DT_NODELABEL(nodelabel)), \ + "PPC alternate node does not exist"); \ + memcpy(&ppc_chips[PPC_ALT_FOR(DT_NODELABEL(nodelabel))], \ + &ppc_chips_alt[PPC_ID(DT_NODELABEL(nodelabel))], \ + sizeof(struct ppc_config_t)); \ + } while (0) + +#endif /* ZEPHYR_CHROME_USBC_PPC_H */ diff --git a/zephyr/shim/include/usbc/ppc_sn5s330.h b/zephyr/shim/include/usbc/ppc_sn5s330.h new file mode 100644 index 0000000000..1c48777107 --- /dev/null +++ b/zephyr/shim/include/usbc/ppc_sn5s330.h @@ -0,0 +1,15 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ppc/sn5s330_public.h" + +#define SN5S330_COMPAT ti_sn5s330 + +#define PPC_CHIP_SN5S330(id) \ + { \ + .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ + .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags), \ + .drv = &sn5s330_drv \ + }, diff --git a/zephyr/shim/include/usbc/ppc_syv682x.h b/zephyr/shim/include/usbc/ppc_syv682x.h new file mode 100644 index 0000000000..8a14237fea --- /dev/null +++ b/zephyr/shim/include/usbc/ppc_syv682x.h @@ -0,0 +1,15 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ppc/syv682x_public.h" + +#define SYV682X_COMPAT silergy_syv682x + +#define PPC_CHIP_SYV682X(id) \ + { \ + .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ + .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags), \ + .drv = &syv682x_drv, \ + }, diff --git a/zephyr/shim/include/zephyr_gpio_signal.h b/zephyr/shim/include/zephyr_gpio_signal.h index 6c90db81f4..e3a3752723 100644 --- a/zephyr/shim/include/zephyr_gpio_signal.h +++ b/zephyr/shim/include/zephyr_gpio_signal.h @@ -43,15 +43,35 @@ BUILD_ASSERT(GPIO_COUNT < GPIO_LIMIT); GPIO_SIGNAL(DT_PHANDLE(DT_NODELABEL(label), prop)) /* - * While we don't support IO expanders at the moment, multiple - * platform/ec headers (e.g., espi.h) require some of these constants - * to be defined. Define them as a compatibility measure. + * Define enums for IO expanders and signals */ +#define IOEX_SIGNAL(id) DT_STRING_UPPER_TOKEN(id, enum_name) +#define IOEX_SIGNAL_WITH_COMMA(id) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, enum_name), (IOEX_SIGNAL(id), ), ()) enum ioex_signal { IOEX_SIGNAL_START = GPIO_LIMIT + 1, - IOEX_SIGNAL_END = IOEX_SIGNAL_START, + /* Used to ensure that the first IOEX signal is same as start */ + __IOEX_PLACEHOLDER = GPIO_LIMIT, +#if DT_NODE_EXISTS(DT_PATH(named_ioexes)) + DT_FOREACH_CHILD(DT_PATH(named_ioexes), IOEX_SIGNAL_WITH_COMMA) +#endif + IOEX_SIGNAL_END, IOEX_LIMIT = 0x1FFF, }; BUILD_ASSERT(IOEX_SIGNAL_END < IOEX_LIMIT); +#undef IOEX_SIGNAL_WITH_COMMA +#undef IOEX_SIGNAL + #define IOEX_COUNT (IOEX_SIGNAL_END - IOEX_SIGNAL_START) + +#define IOEXPANDER_ID_EXPAND(id) ioex_chip_##id +#define IOEXPANDER_ID(id) IOEXPANDER_ID_EXPAND(id) +#define IOEXPANDER_ID_FROM_INST_WITH_COMMA(id) IOEXPANDER_ID(id), +enum ioexpander_id { + DT_FOREACH_STATUS_OKAY(cros_ioex_chip, + IOEXPANDER_ID_FROM_INST_WITH_COMMA) + CONFIG_IO_EXPANDER_PORT_COUNT +}; + +#undef IOEXPANDER_ID_FROM_INST_WITH_COMMA diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index e30671c6d6..0c795f6b9b 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -6,6 +6,7 @@ zephyr_library_sources(console.c) zephyr_library_sources(crc.c) zephyr_library_sources(gpio.c) zephyr_library_sources(gpio_id.c) +zephyr_library_sources(power.c) if (DEFINED CONFIG_ARCH_POSIX) zephyr_library_sources(ztest_system.c) @@ -27,6 +28,9 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_HOOKS hooks.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_HOSTCMD host_command.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE console_buffer.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX ioex.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_IOEX_CROS_DRV + ioex_drv.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD keyboard_raw.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_KEYBOARD keyscan.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_MKBP_EVENT mkbp_event.c) @@ -46,3 +50,6 @@ zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_TIMER hwtimer.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_I2C i2c.c) zephyr_library_sources_ifdef(CONFIG_SHIMMED_TASKS tasks.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_WATCHDOG watchdog.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201 + bc12_pi3usb9201.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC ppc.c) diff --git a/zephyr/shim/src/bc12_pi3usb9201.c b/zephyr/shim/src/bc12_pi3usb9201.c new file mode 100644 index 0000000000..a55b6f394b --- /dev/null +++ b/zephyr/shim/src/bc12_pi3usb9201.c @@ -0,0 +1,60 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT pericom_pi3usb9201 + +#include <devicetree.h> +#include "bc12/pi3usb9201_public.h" +#include "hooks.h" +#include "task.h" +#include "usb_charge.h" +#include "usb_pd.h" + + +#if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) + +BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 0, + "No compatible BC1.2 instance found"); + +#define USBC_PORT_BC12(inst) \ + { \ + .i2c_port = I2C_PORT(DT_PHANDLE(DT_DRV_INST(inst), port)), \ + .i2c_addr_flags = DT_STRING_UPPER_TOKEN( \ + DT_DRV_INST(inst), i2c_addr_flags), \ + }, + +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + DT_INST_FOREACH_STATUS_OKAY(USBC_PORT_BC12) +}; + +#define BC12_GPIO_ENABLE_INTERRUPT(inst) \ + do { \ + if (DT_INST_NODE_HAS_PROP(inst, irq)) { \ + gpio_enable_interrupt( \ + GPIO_SIGNAL(DT_INST_PHANDLE(inst, irq))); \ + } \ + } while (0); + +static void bc12_enable_irqs(void) +{ + DT_INST_FOREACH_STATUS_OKAY(BC12_GPIO_ENABLE_INTERRUPT) +} +DECLARE_HOOK(HOOK_INIT, bc12_enable_irqs, HOOK_PRIO_DEFAULT); + +#if DT_INST_NODE_HAS_PROP(0, irq) +void usb0_evt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); +} +#endif + +#if DT_INST_NODE_HAS_PROP(1, irq) +void usb1_evt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); +} +#endif + +#endif /* DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) */ diff --git a/zephyr/shim/src/console.c b/zephyr/shim/src/console.c index 3fc3896ec2..ef5e20687a 100644 --- a/zephyr/shim/src/console.c +++ b/zephyr/shim/src/console.c @@ -109,6 +109,14 @@ int uart_shell_stop(void) return event.signal->result; } +#ifdef SHELL_DEFAULT_BACKEND_CONFIG_FLAGS +static const struct shell_backend_config_flags shell_cfg_flags = + SHELL_DEFAULT_BACKEND_CONFIG_FLAGS; +#else +/* TODO(b/205884929): Drop after we drop support for v2.7 */ +static const bool shell_cfg_flags; +#endif + static void shell_init_from_work(struct k_work *work) { bool log_backend = CONFIG_SHELL_BACKEND_SERIAL_LOG_LEVEL > 0; @@ -122,8 +130,8 @@ static void shell_init_from_work(struct k_work *work) } /* Initialize the shell and re-enable both RX and TX */ - shell_init(shell_backend_uart_get_ptr(), uart_shell_dev, false, - log_backend, level); + shell_init(shell_backend_uart_get_ptr(), uart_shell_dev, + shell_cfg_flags, log_backend, level); uart_irq_rx_enable(uart_shell_dev); uart_irq_tx_enable(uart_shell_dev); @@ -217,7 +225,7 @@ int uart_tx_char_raw(void *context, int c) void uart_write_char(char c) { - printk("%c", c); + uart_poll_out(uart_shell_dev, c); if (IS_ENABLED(CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE)) console_buf_notify_chars(&c, 1); @@ -272,15 +280,7 @@ static void zephyr_print(const char *buff, size_t size) if (k_is_in_isr() || shell_zephyr->ctx->state != SHELL_STATE_ACTIVE) { printk("%s", buff); } else { - /* - * On some platforms, shell_* functions are not as fast - * as printk and they need the added speed to avoid - * timeouts. - */ - if (IS_ENABLED(CONFIG_PLATFORM_EC_CONSOLE_USES_PRINTK)) - printk("%s", buff); - else - shell_fprintf(shell_zephyr, SHELL_NORMAL, "%s", buff); + shell_fprintf(shell_zephyr, SHELL_NORMAL, "%s", buff); if (IS_ENABLED(CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE)) console_buf_notify_chars(buff, size); } diff --git a/zephyr/shim/src/console_buffer.c b/zephyr/shim/src/console_buffer.c index 427ae47768..191306c80e 100644 --- a/zephyr/shim/src/console_buffer.c +++ b/zephyr/shim/src/console_buffer.c @@ -13,6 +13,7 @@ static char console_buf[CONFIG_PLATFORM_EC_HOSTCMD_CONSOLE_BUF_SIZE]; static uint32_t previous_snapshot_idx; static uint32_t current_snapshot_idx; +static uint32_t head_idx; static uint32_t tail_idx; static inline uint32_t next_idx(uint32_t cur_idx) @@ -42,6 +43,8 @@ void console_buf_notify_chars(const char *s, size_t len) /* Check if we are starting to overwrite our snapshot * heads */ + if (new_tail == head_idx) + head_idx = next_idx(head_idx); if (new_tail == previous_snapshot_idx) previous_snapshot_idx = next_idx(previous_snapshot_idx); @@ -62,7 +65,7 @@ enum ec_status uart_console_read_buffer_init(void) return EC_RES_TIMEOUT; previous_snapshot_idx = current_snapshot_idx; - current_snapshot_idx = tail_idx; + current_snapshot_idx = head_idx; k_mutex_unlock(&console_write_lock); diff --git a/zephyr/shim/src/espi.c b/zephyr/shim/src/espi.c index 12027a6399..f3d80e2071 100644 --- a/zephyr/shim/src/espi.c +++ b/zephyr/shim/src/espi.c @@ -561,3 +561,45 @@ int zephyr_shim_setup_espi(void) return 0; } + +bool is_acpi_command(uint32_t data) +{ + struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; + + return acpi->type; +} + +uint32_t get_acpi_value(uint32_t data) +{ + struct espi_evt_data_acpi *acpi = (struct espi_evt_data_acpi *)&data; + + return acpi->data; +} + +bool is_8042_ibf(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->evt & HOST_KBC_EVT_IBF; +} + +bool is_8042_obe(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->evt & HOST_KBC_EVT_OBE; +} + +uint32_t get_8042_type(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->type; +} + +uint32_t get_8042_data(uint32_t data) +{ + struct espi_evt_data_kbc *kbc = (struct espi_evt_data_kbc *)&data; + + return kbc->data; +} diff --git a/zephyr/shim/src/flash.c b/zephyr/shim/src/flash.c index d5a94ff28b..15e32269d2 100644 --- a/zephyr/shim/src/flash.c +++ b/zephyr/shim/src/flash.c @@ -184,4 +184,9 @@ SHELL_CMD_REGISTER(flashchip, NULL, "Information about flash chip", CONFIG_PLATFORM_EC_GPIO_INIT_PRIORITY #error "Flash must be initialized after GPIOs" #endif +#if CONFIG_PLATFORM_EC_FLASH_INIT_PRIORITY <= \ + CONFIG_CROS_FLASH_NPCX_INIT_PRIORITY +#error "CONFIG_PLATFORM_EC_FLASH_INIT_PRIORITY must be greater than" \ + "CONFIG_CROS_FLASH_NPCX_INIT_PRIORITY." +#endif SYS_INIT(flash_dev_init, POST_KERNEL, CONFIG_PLATFORM_EC_FLASH_INIT_PRIORITY); diff --git a/zephyr/shim/src/gpio.c b/zephyr/shim/src/gpio.c index 9440b3f3ca..4535674978 100644 --- a/zephyr/shim/src/gpio.c +++ b/zephyr/shim/src/gpio.c @@ -69,18 +69,6 @@ struct gpio_signal_callback { /* * Validate interrupt flags are valid for the Zephyr GPIO driver. */ -#define IS_GPIO_INTERRUPT_FLAG(flag, mask) ((flag & mask) == mask) -#define VALID_GPIO_INTERRUPT_FLAG(flag) \ - (IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_RISING) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_FALLING) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_BOTH) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_LOW) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_HIGH) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_TO_INACTIVE) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_EDGE_TO_ACTIVE) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_INACTIVE) || \ - IS_GPIO_INTERRUPT_FLAG(flag, GPIO_INT_LEVEL_ACTIVE)) - #define GPIO_INT(sig, f, cb) \ BUILD_ASSERT(VALID_GPIO_INTERRUPT_FLAG(f), \ STRINGIFY(sig) " is not using Zephyr interrupt flags"); @@ -247,11 +235,23 @@ void gpio_set_level_verbose(enum console_channel channel, (GPIO_OPEN_DRAIN | GPIO_PULL_UP | GPIO_PULL_DOWN | GPIO_INPUT | \ GPIO_OUTPUT) -static int convert_from_zephyr_flags(const gpio_flags_t zephyr) +#define FLAGS_HANDLED_FROM_ZEPHYR \ + (GPIO_DISCONNECTED | GPIO_OPEN_DRAIN | GPIO_PULL_UP | GPIO_PULL_DOWN | \ + GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH | GPIO_INPUT | \ + GPIO_OUTPUT | GPIO_INT_ENABLE | GPIO_INT_EDGE | GPIO_INT_HIGH_1 | \ + GPIO_INT_LOW_0 | GPIO_VOLTAGE_1P8) + +#define FLAGS_HANDLED_TO_ZEPHYR \ + (GPIO_FLAG_NONE | GPIO_OPEN_DRAIN | GPIO_PULL_UP | GPIO_PULL_DOWN | \ + GPIO_LOW | GPIO_HIGH | GPIO_INPUT | GPIO_OUTPUT | GPIO_INT_F_RISING | \ + GPIO_INT_F_FALLING | GPIO_INT_F_LOW | GPIO_INT_F_HIGH | \ + GPIO_SEL_1P8V) + +int convert_from_zephyr_flags(const gpio_flags_t zephyr) { /* Start out with the bits that are the same. */ int ec_flags = zephyr & GPIO_CONVERSION_SAME_BITS; - gpio_flags_t unhandled_flags = zephyr & ~GPIO_CONVERSION_SAME_BITS; + gpio_flags_t unhandled_flags = zephyr & (~FLAGS_HANDLED_FROM_ZEPHYR); /* TODO(b/173789980): handle conversion of more bits? */ if (unhandled_flags) { @@ -259,14 +259,38 @@ static int convert_from_zephyr_flags(const gpio_flags_t zephyr) unhandled_flags); } + if (zephyr & GPIO_DISCONNECTED) + ec_flags |= GPIO_FLAG_NONE; + if (zephyr & GPIO_OUTPUT_INIT_LOW) + ec_flags |= GPIO_LOW; + if (zephyr & GPIO_OUTPUT_INIT_HIGH) + ec_flags |= GPIO_HIGH; + + if (zephyr & GPIO_INT_ENABLE) { + if (zephyr & GPIO_INT_EDGE) { + if (zephyr & GPIO_INT_HIGH_1) + ec_flags |= GPIO_INT_F_RISING; + if (zephyr & GPIO_INT_LOW_0) + ec_flags |= GPIO_INT_F_FALLING; + } else { + if (zephyr & GPIO_INT_LOW_0) + ec_flags |= GPIO_INT_F_LOW; + if (zephyr & GPIO_INT_HIGH_1) + ec_flags |= GPIO_INT_F_HIGH; + } + } + + if (zephyr & GPIO_VOLTAGE_1P8) + ec_flags |= GPIO_SEL_1P8V; + return ec_flags; } -static gpio_flags_t convert_to_zephyr_flags(int ec_flags) +gpio_flags_t convert_to_zephyr_flags(int ec_flags) { /* Start out with the bits that are the same. */ gpio_flags_t zephyr_flags = ec_flags & GPIO_CONVERSION_SAME_BITS; - int unhandled_flags = ec_flags & ~GPIO_CONVERSION_SAME_BITS; + int unhandled_flags = ec_flags & (~FLAGS_HANDLED_TO_ZEPHYR); /* TODO(b/173789980): handle conversion of more bits? */ if (unhandled_flags) { @@ -274,6 +298,25 @@ static gpio_flags_t convert_to_zephyr_flags(int ec_flags) unhandled_flags); } + if (ec_flags & GPIO_FLAG_NONE) + zephyr_flags |= GPIO_DISCONNECTED; + if (ec_flags & GPIO_LOW) + zephyr_flags |= GPIO_OUTPUT_INIT_LOW; + if (ec_flags & GPIO_HIGH) + zephyr_flags |= GPIO_OUTPUT_INIT_HIGH; + if (ec_flags & GPIO_INT_F_RISING) + zephyr_flags |= GPIO_INT_ENABLE + | GPIO_INT_EDGE | GPIO_INT_HIGH_1; + if (ec_flags & GPIO_INT_F_FALLING) + zephyr_flags |= GPIO_INT_ENABLE + | GPIO_INT_EDGE | GPIO_INT_LOW_0; + if (ec_flags & GPIO_INT_F_LOW) + zephyr_flags |= GPIO_INT_ENABLE | GPIO_INT_LOW_0; + if (ec_flags & GPIO_INT_F_HIGH) + zephyr_flags |= GPIO_INT_ENABLE | GPIO_INT_HIGH_1; + if (ec_flags & GPIO_SEL_1P8V) + zephyr_flags |= GPIO_VOLTAGE_1P8; + return zephyr_flags; } diff --git a/zephyr/shim/src/hooks.c b/zephyr/shim/src/hooks.c index 79a611812f..57a0b7965b 100644 --- a/zephyr/shim/src/hooks.c +++ b/zephyr/shim/src/hooks.c @@ -13,37 +13,68 @@ #include "task.h" #include "timer.h" -int hook_call_deferred(const struct deferred_data *data, int us) +static void hook_second_work(struct k_work *work); +static void hook_tick_work(struct k_work *work); + +static struct zephyr_shim_hook_list *hook_registry[HOOK_TYPE_COUNT]; + +static K_WORK_DELAYABLE_DEFINE(hook_seconds_work_data, hook_second_work); +static K_WORK_DELAYABLE_DEFINE(hook_ticks_work_data, hook_tick_work); + +static void work_queue_error(const void *data, int rv) { - struct k_work_delayable *work = data->work; - int rv = 0; + cprints(CC_HOOK, + "Warning: deferred call not submitted, " + "deferred_data=0x%pP, err=%d", + data, rv); +} - if (us == -1) { - k_work_cancel_delayable(work); - } else if (us >= 0) { - rv = k_work_reschedule(work, K_USEC(us)); - if (rv == -EINVAL) { - /* Already processing or completed. */ - return 0; - } else if (rv < 0) { - cprints(CC_HOOK, - "Warning: deferred call not submitted, " - "deferred_data=0x%pP, err=%d", - data, rv); - } - } else { - return EC_ERROR_PARAM2; - } +static void hook_second_work(struct k_work *work) +{ + int rv; - return rv; + hook_notify(HOOK_SECOND); + + rv = k_work_reschedule(&hook_seconds_work_data, K_SECONDS(1)); + if (rv < 0) + work_queue_error(&hook_seconds_work_data, rv); } -static struct zephyr_shim_hook_list *hook_registry[HOOK_TYPE_COUNT]; +static void hook_tick_work(struct k_work *work) +{ + int rv; + + hook_notify(HOOK_TICK); + + rv = k_work_reschedule(&hook_ticks_work_data, + K_USEC(HOOK_TICK_INTERVAL)); + if (rv < 0) + work_queue_error(&hook_ticks_work_data, rv); +} + +static void check_hook_task_priority(void) +{ + k_tid_t thread = &k_sys_work_q.thread; + + /* + * Numerically lower priorities take precedence, so verify the hook + * related threads cannot preempt any of the shimmed tasks. + */ + if (k_thread_priority_get(thread) < (TASK_ID_COUNT - 1)) + cprintf(CC_HOOK, + "ERROR: %s has priority %d but must be >= %d\n", + k_thread_name_get(thread), + k_thread_priority_get(thread), (TASK_ID_COUNT - 1)); +} +DECLARE_HOOK(HOOK_INIT, check_hook_task_priority, HOOK_PRIO_FIRST); static int zephyr_shim_setup_hooks(const struct device *unused) { + int rv; + STRUCT_SECTION_FOREACH(zephyr_shim_hook_list, entry) { - struct zephyr_shim_hook_list **loc = &hook_registry[entry->type]; + struct zephyr_shim_hook_list **loc = + &hook_registry[entry->type]; /* Find the correct place to put the entry in the registry. */ while (*loc && (*loc)->priority < entry->priority) @@ -55,6 +86,16 @@ static int zephyr_shim_setup_hooks(const struct device *unused) *loc = entry; } + /* Startup the HOOK_TICK and HOOK_SECOND recurring work */ + rv = k_work_reschedule(&hook_seconds_work_data, K_SECONDS(1)); + if (rv < 0) + work_queue_error(&hook_seconds_work_data, rv); + + rv = k_work_reschedule(&hook_ticks_work_data, + K_USEC(HOOK_TICK_INTERVAL)); + if (rv < 0) + work_queue_error(&hook_ticks_work_data, rv); + return 0; } @@ -68,55 +109,24 @@ void hook_notify(enum hook_type type) p->routine(); } -static void check_hook_task_priority(k_tid_t thread) -{ - /* - * Numerically lower priorities take precedence, so verify the hook - * related threads cannot preempt any of the shimmed tasks. - */ - if (k_thread_priority_get(thread) < (TASK_ID_COUNT - 1)) - cprintf(CC_HOOK, - "ERROR: %s has priority %d but must be >= %d\n", - k_thread_name_get(thread), - k_thread_priority_get(thread), (TASK_ID_COUNT - 1)); -} - -void hook_task(void *u) +int hook_call_deferred(const struct deferred_data *data, int us) { - /* Periodic hooks will be called first time through the loop */ - static uint64_t last_second = -SECOND; - static uint64_t last_tick = -HOOK_TICK_INTERVAL; - - /* - * Verify deferred routines are run at the lowest priority. - */ - check_hook_task_priority(&k_sys_work_q.thread); - check_hook_task_priority(k_current_get()); - - while (1) { - uint64_t t = get_time().val; - int next = 0; - - if (t - last_tick >= HOOK_TICK_INTERVAL) { - hook_notify(HOOK_TICK); - last_tick = t; - } + struct k_work_delayable *work = data->work; + int rv = 0; - if (t - last_second >= SECOND) { - hook_notify(HOOK_SECOND); - last_second = t; + if (us == -1) { + k_work_cancel_delayable(work); + } else if (us >= 0) { + rv = k_work_reschedule(work, K_USEC(us)); + if (rv == -EINVAL) { + /* Already processing or completed. */ + return 0; + } else if (rv < 0) { + work_queue_error(data, rv); } - - /* Calculate when next tick needs to occur */ - t = get_time().val; - if (last_tick + HOOK_TICK_INTERVAL > t) - next = last_tick + HOOK_TICK_INTERVAL - t; - - /* - * Sleep until next tick, unless we've already exceeded - * HOOK_TICK_INTERVAL. - */ - if (next > 0) - task_wait_event(next); + } else { + return EC_ERROR_PARAM2; } + + return rv; } diff --git a/zephyr/shim/src/i2c.c b/zephyr/shim/src/i2c.c index 11f9e03ed4..40d94e6462 100644 --- a/zephyr/shim/src/i2c.c +++ b/zephyr/shim/src/i2c.c @@ -4,6 +4,7 @@ */ #include <sys/util.h> +#include <drivers/i2c.h> #include "console.h" #include "i2c.h" @@ -26,10 +27,15 @@ #define INIT_REMOTE_PORTS(id) \ [I2C_PORT(id)] = DT_PROP_OR(id, remote_port, -1), -#define I2C_PORT_INIT(id) \ - { \ - .name = DT_LABEL(id), \ - .port = I2C_PORT(id), \ +#define I2C_PORT_FLAGS(id) \ + COND_CODE_1(DT_PROP(id, dynamic_speed), (I2C_PORT_FLAG_DYNAMIC_SPEED), \ + (0)) + +#define I2C_PORT_INIT(id) \ + { \ + .name = DT_LABEL(id), \ + .port = I2C_PORT(id), \ + .flags = I2C_PORT_FLAGS(id), \ }, /* * Long term we will not need these, for now they're needed to get things to @@ -140,3 +146,59 @@ static int command_i2c_portmap(int argc, char **argv) DECLARE_CONSOLE_COMMAND(i2c_portmap, command_i2c_portmap, NULL, "Show I2C port mapping"); #endif /* CONFIG_PLATFORM_EC_CONSOLE_CMD_I2C_PORTMAP */ + +int chip_i2c_set_freq(int port, enum i2c_freq freq) +{ + uint32_t dev_config; + uint32_t speed; + int ret = EC_SUCCESS; + + switch (freq) { + case I2C_FREQ_100KHZ: + speed = I2C_SPEED_STANDARD; + break; + case I2C_FREQ_400KHZ: + speed = I2C_SPEED_FAST; + break; + case I2C_FREQ_1000KHZ: + speed = I2C_SPEED_FAST_PLUS; + break; + default: + return EC_ERROR_INVAL; + } + + ret = i2c_get_config(i2c_get_device_for_port(port), &dev_config); + if (!ret) { + dev_config &= ~I2C_SPEED_MASK; + dev_config |= I2C_SPEED_SET(speed); + ret = i2c_configure(i2c_get_device_for_port(port), dev_config); + } + + return ret; +} + +enum i2c_freq chip_i2c_get_freq(int port) +{ + uint32_t dev_config; + int ret = EC_SUCCESS; + const struct device *dev = i2c_get_device_for_port(port); + + if (dev == NULL) + return I2C_FREQ_COUNT; + + ret = i2c_get_config(dev, &dev_config); + + if (ret) + return I2C_FREQ_COUNT; + + switch (I2C_SPEED_GET(dev_config)) { + case I2C_SPEED_STANDARD: + return I2C_FREQ_100KHZ; + case I2C_SPEED_FAST: + return I2C_FREQ_400KHZ; + case I2C_SPEED_FAST_PLUS: + return I2C_FREQ_1000KHZ; + default: + return I2C_FREQ_COUNT; + } +} diff --git a/zephyr/shim/src/ioex.c b/zephyr/shim/src/ioex.c new file mode 100644 index 0000000000..e01f959b65 --- /dev/null +++ b/zephyr/shim/src/ioex.c @@ -0,0 +1,372 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <device.h> +#include <devicetree.h> +#include <init.h> +#include <kernel.h> +#include <logging/log.h> +#include "gpio.h" +#include "gpio/gpio.h" +#include "i2c.h" +#include "ioexpander.h" +#include "system.h" +#include "util.h" + +#if DT_NODE_EXISTS(DT_PATH(named_ioexes)) + +LOG_MODULE_REGISTER(ioex_shim, LOG_LEVEL_ERR); + +struct ioex_gpio_config { + /* IOEX signal name */ + const char *name; + /* Device pointer to GPIO driver */ + const struct device *dev; + /* Bit number of the pin on the IOEX port */ + gpio_pin_t pin; + /* From DTS, excludes interrupts flags */ + gpio_flags_t init_flags; + /* + * Index of CrOS IO expander chip + * If IO expander uses CrOS EC driver, this value will be one + * of the possible from enum ioexpander_id + * otherwise, if using the Zephyr GPIO driver, this will be -1 + */ + int cros_drv_index; + /* Port of IO expander. Valid only if ioex field is not -1 */ + int port; +}; + +#define IOEX_IS_CROS_DRV(config) (config->cros_drv_index >= 0) + +struct ioex_int_config { + const enum ioex_signal signal; + const gpio_flags_t flags; + + void (*const handler)(enum gpio_signal); + struct gpio_callback callback; +}; + +/* Check IOEX interrupts flags */ +#define IOEX_INT(sig, f, cb) \ + BUILD_ASSERT(VALID_GPIO_INTERRUPT_FLAG(f), \ + STRINGIFY(sig) " is not using Zephyr interrupt flags"); +#ifdef EC_CROS_IOEX_INTERRUPTS +EC_CROS_IOEX_INTERRUPTS +#endif +#undef IOEX_INT + +/* Declare handlers */ +#ifdef EC_CROS_IOEX_INTERRUPTS +#define IOEX_INT(arg_signal, arg_flags, arg_handler) \ + void arg_handler(enum gpio_signal); +EC_CROS_IOEX_INTERRUPTS +#undef IOEX_INT +#endif /* EC_CROS_IOEX_INTERRUPTS */ + +#define IOEX_INT(arg_signal, arg_flags, arg_handler) \ +{ \ + .signal = arg_signal, \ + .flags = arg_flags, \ + .handler = arg_handler, \ +}, + +struct ioex_int_config ioex_int_configs[] = { +#ifdef EC_CROS_IOEX_INTERRUPTS + EC_CROS_IOEX_INTERRUPTS +#endif +}; +#undef IOEX_INT + +#define CHIP_FROM_GPIO(id) DT_PARENT(DT_GPIO_CTLR(id, gpios)) + +#define IOEX_GPIO_CONFIG(id) \ + { \ + .name = DT_LABEL(id), \ + .dev = DEVICE_DT_GET(DT_PHANDLE(id, gpios)), \ + .pin = DT_GPIO_PIN(id, gpios), \ + .init_flags = DT_GPIO_FLAGS(id, gpios), \ + .cros_drv_index = \ + COND_CODE_1(DT_NODE_HAS_COMPAT(CHIP_FROM_GPIO(id), \ + cros_ioex_chip), \ + (IOEXPANDER_ID(CHIP_FROM_GPIO(id)), ), \ + (-1,)) \ + .port = DT_REG_ADDR(DT_GPIO_CTLR(id, gpios)) \ + }, + +#define IOEX_INIT_FLAGS(id) 0, + +static const struct ioex_gpio_config ioex_gpio_configs[] = { + DT_FOREACH_CHILD(DT_PATH(named_ioexes), IOEX_GPIO_CONFIG) +}; + +static gpio_flags_t ioex_signals_flags[] = { + DT_FOREACH_CHILD(DT_PATH(named_ioexes), IOEX_INIT_FLAGS) +}; +BUILD_ASSERT(ARRAY_SIZE(ioex_signals_flags) == IOEX_COUNT); + +int signal_is_ioex(int signal) +{ + return ((signal >= IOEX_SIGNAL_START) && (signal < IOEX_SIGNAL_END)); +} + +static struct ioex_int_config *get_interrupt_from_signal( + enum ioex_signal signal) +{ + for (size_t i = 0; i < ARRAY_SIZE(ioex_int_configs); i++) { + if (ioex_int_configs[i].signal == signal) + return &ioex_int_configs[i]; + } + + LOG_ERR("No interrupt defined for GPIO %s", + ioex_gpio_configs[signal - IOEX_SIGNAL_START].name); + + return NULL; +} + +static const struct ioex_gpio_config *ioex_get_signal_info( + enum ioex_signal signal) +{ + const struct ioex_gpio_config *g; + + ASSERT(signal_is_ioex(signal)); + + g = ioex_gpio_configs + signal - IOEX_SIGNAL_START; + + if (IOEX_IS_CROS_DRV(g) && + !(ioex_config[g->cros_drv_index].flags & IOEX_FLAGS_INITIALIZED)) { + LOG_ERR("ioex %s disabled", g->name); + return NULL; + } + + return g; +} + +int ioex_enable_interrupt(enum ioex_signal signal) +{ + struct ioex_int_config *cfg = get_interrupt_from_signal(signal); + int offset = (signal - IOEX_SIGNAL_START); + int res; + + if (!cfg) + return EC_ERROR_PARAM1; + + res = gpio_pin_interrupt_configure(ioex_gpio_configs[offset].dev, + ioex_gpio_configs[offset].pin, + (cfg->flags | GPIO_INT_ENABLE) + & ~GPIO_INT_DISABLE); + + if (res) + LOG_ERR("Can't enable interrupt on %s", + ioex_gpio_configs[offset].name); + + return res; +} + +int ioex_disable_interrupt(enum ioex_signal signal) +{ + struct ioex_int_config *cfg = get_interrupt_from_signal(signal); + int offset = (signal - IOEX_SIGNAL_START); + int res; + + if (!cfg) + return EC_ERROR_PARAM1; + + res = gpio_pin_interrupt_configure(ioex_gpio_configs[offset].dev, + ioex_gpio_configs[offset].pin, + GPIO_INT_DISABLE); + + if (res) + LOG_ERR("Can't disable interrupt on %s", + ioex_gpio_configs[offset].name); + + return res; +} + +int ioex_get_flags(enum ioex_signal signal, int *flags) +{ + if (!signal_is_ioex(signal)) + return EC_ERROR_INVAL; + + *flags = convert_from_zephyr_flags( + ioex_signals_flags[signal - IOEX_SIGNAL_START]); + + return EC_SUCCESS; +} + +int ioex_set_flags(enum ioex_signal signal, int flags) +{ + const struct ioex_gpio_config *g = ioex_get_signal_info(signal); + + if (g == NULL) + return EC_ERROR_INVAL; + + if (gpio_pin_configure(g->dev, + g->pin, + convert_to_zephyr_flags(flags)) < 0) { + return EC_ERROR_UNKNOWN; + } + + ioex_signals_flags[signal - IOEX_SIGNAL_START] = + convert_to_zephyr_flags(flags); + + return EC_SUCCESS; +} + +int ioex_get_level(enum ioex_signal signal, int *val) +{ + const struct ioex_gpio_config *g = ioex_get_signal_info(signal); + int res; + + if (g == NULL) + return EC_ERROR_INVAL; + + res = gpio_pin_get_raw(g->dev, g->pin); + if (res < 0) + return EC_ERROR_UNKNOWN; + + *val = res; + + return EC_SUCCESS; +} + +int ioex_set_level(enum ioex_signal signal, int value) +{ + const struct ioex_gpio_config *g = ioex_get_signal_info(signal); + int res; + + if (g == NULL) + return EC_ERROR_INVAL; + + res = gpio_pin_set_raw(g->dev, g->pin, value); + if (res) + return EC_ERROR_UNKNOWN; + + return EC_SUCCESS; +} + +int ioex_get_port(int ioex, int port, int *val) +{ + return EC_ERROR_UNIMPLEMENTED; +} + +static void ioex_isr(const struct device *port, + struct gpio_callback *cb, + gpio_port_pins_t pins) +{ + struct ioex_int_config *cfg = + CONTAINER_OF(cb, struct ioex_int_config, callback); + + cfg->handler(cfg->signal); +} + +int ioex_init(int ioex) +{ + const struct ioexpander_drv *drv = ioex_config[ioex].drv; + int rv; + + if (ioex_config[ioex].flags & IOEX_FLAGS_INITIALIZED) + return EC_SUCCESS; + + if (drv->init != NULL) { + rv = drv->init(ioex); + if (rv != EC_SUCCESS) + return rv; + } + + ioex_config[ioex].flags |= IOEX_FLAGS_INITIALIZED; + + return EC_SUCCESS; +} + +static int ioex_init_default(const struct device *unused) +{ + int ret; + int i; + + ARG_UNUSED(unused); + + for (i = 0; i < CONFIG_IO_EXPANDER_PORT_COUNT; i++) { + /* IO Expander has been initialized, skip re-initializing */ + if (ioex_config[i].flags & (IOEX_FLAGS_INITIALIZED | + IOEX_FLAGS_DEFAULT_INIT_DISABLED)) + continue; + + ret = ioex_init(i); + if (ret) + LOG_ERR("Can't initialize ioex %d", i); + } + + /* + * Set all IO expander GPIOs to default flags according to the setting + * in device tree + */ + for (i = 0; i < IOEX_COUNT; i++) { + const struct ioex_gpio_config *g = + ioex_get_signal_info(IOEX_SIGNAL_START + i); + int flags; + + if (!g) + continue; + + flags = g->init_flags; + /* Late-sysJump should not set the output levels */ + if (system_jumped_late()) + flags &= ~(GPIO_LOW | GPIO_HIGH); + + ret = gpio_pin_configure(g->dev, g->pin, flags); + if (ret) + LOG_ERR("Can't configure %s", g->name); + + ioex_signals_flags[i] = g->init_flags; + } + + /* Init interrupts */ + for (i = 0; i < ARRAY_SIZE(ioex_int_configs); i++) { + int offset = ioex_int_configs[i].signal - IOEX_SIGNAL_START; + + gpio_init_callback(&ioex_int_configs[i].callback, + ioex_isr, + BIT(ioex_gpio_configs[offset].pin)); + ret = gpio_add_callback(ioex_gpio_configs[offset].dev, + &ioex_int_configs[i].callback); + if (ret) + LOG_ERR("Can't add callback to %s", + ioex_gpio_configs[offset].name); + } + + return 0; +} +SYS_INIT(ioex_init_default, POST_KERNEL, CONFIG_PLATFORM_EC_IOEX_INIT_PRIORITY); + +const char *ioex_get_name(enum ioex_signal signal) +{ + const struct ioex_gpio_config *g = ioex_get_signal_info(signal); + + if (g == NULL) + return NULL; + + return g->name; +} + +int ioex_get_ioex_flags(enum ioex_signal signal, int *val) +{ + const struct ioex_gpio_config *g = ioex_get_signal_info(signal); + + if (g == NULL) + return EC_ERROR_INVAL; + + if (!IOEX_IS_CROS_DRV(g)) { + /* Zephyr gpio drivers are initialized by internal subsystem */ + *val = IOEX_FLAGS_INITIALIZED; + return EC_SUCCESS; + } + + *val = ioex_config[g->cros_drv_index].flags; + + return EC_SUCCESS; +} + +#endif diff --git a/zephyr/shim/src/ioex_drv.c b/zephyr/shim/src/ioex_drv.c new file mode 100644 index 0000000000..a6075de59a --- /dev/null +++ b/zephyr/shim/src/ioex_drv.c @@ -0,0 +1,381 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#define DT_DRV_COMPAT cros_ioex_port +#define DT_DRV_COMPAT_CHIP cros_ioex_chip + +#include <device.h> +#include <drivers/gpio.h> +#include <drivers/i2c.h> +#include <errno.h> +#include <gpio/gpio_utils.h> +#include <init.h> +#include <kernel.h> +#include <logging/log.h> +#include <sys/byteorder.h> +#include <sys/util.h> +#include "common.h" +#include "config.h" +#include "i2c.h" +#include "ioexpander.h" + +/* Include drivers if enabled */ +#ifdef CONFIG_PLATFORM_EC_IOEX_CCGXXF +#include "driver/tcpm/ccgxxf.h" +#endif +#ifdef CONFIG_PLATFORM_EC_IOEX_IT8801 +#include "driver/ioexpander/it8801.h" +#endif +#ifdef CONFIG_PLATFORM_EC_IOEX_NCT38XX +#include "driver/tcpm/nct38xx.h" +#endif +#ifdef CONFIG_PLATFORM_EC_IOEX_PCA9675 +#include "driver/ioexpander/pca9675.h" +#endif +#ifdef CONFIG_PLATFORM_EC_IOEX_PCAL6408 +#include "driver/ioexpander/pcal6408.h" +#endif +#ifdef CONFIG_PLATFORM_EC_IOEX_TCA64XXA +#include "driver/ioexpander/tca64xxa.h" +#endif + +LOG_MODULE_REGISTER(cros_ioex_port, CONFIG_GPIO_LOG_LEVEL); + +struct ioex_drv_data { + const struct device *dev; + int ioex; + int port; + + sys_slist_t callbacks; + struct k_work worker; + + const struct device *int_gpio_dev; + gpio_pin_t int_gpio_pin; + gpio_flags_t int_gpio_flags; + struct gpio_callback int_gpio_callback; + gpio_port_value_t cached_values; + gpio_port_value_t pin_trig_edge_rising; + gpio_port_value_t pin_trig_edge_falling; + gpio_port_value_t pin_trig_level_zero; + gpio_port_value_t pin_trig_level_one; +}; + +static int shim_ioex_pin_configure(const struct device *dev, gpio_pin_t pin, + gpio_flags_t flags) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int res; + + res = cfg->drv->set_flags_by_mask(drv_data->ioex, drv_data->port, + BIT(pin), + convert_from_zephyr_flags(flags)); + if (res) + return -EIO; + + return 0; +} + +static int shim_ioex_port_get_raw(const struct device *dev, + gpio_port_value_t *value) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int res; + + res = cfg->drv->get_port(drv_data->ioex, drv_data->port, value); + if (res) + return -EIO; + + return 0; +} + +static int shim_ioex_port_set_masked_raw(const struct device *dev, + gpio_port_pins_t mask, + gpio_port_value_t value) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int res; + + res = cfg->drv->set_level(drv_data->ioex, drv_data->port, mask, value); + if (res) + return -EIO; + + return 0; +} + +static int shim_ioex_port_set_bits_raw(const struct device *dev, + gpio_port_pins_t pins) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int res; + + res = cfg->drv->set_level(drv_data->ioex, drv_data->port, pins, 1); + if (res) + return -EIO; + + return 0; +} + +static int shim_ioex_port_clear_bits_raw(const struct device *dev, + gpio_port_pins_t pins) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int res; + + res = cfg->drv->set_level(drv_data->ioex, drv_data->port, pins, 0); + if (res) + return -EIO; + + return 0; +} + +static int shim_ioex_port_toggle_bits(const struct device *dev, + gpio_port_pins_t pins) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int to_set; + int to_clr; + int res; + int val; + + res = cfg->drv->get_port(drv_data->ioex, drv_data->port, &val); + if (res) + return -EIO; + + to_set = (~val) & pins; + to_clr = val & pins; + + res = cfg->drv->set_level(drv_data->ioex, drv_data->port, to_set, 1); + if (res) + return -EIO; + + res = cfg->drv->set_level(drv_data->ioex, drv_data->port, to_clr, 0); + if (res) + return -EIO; + + return 0; +} + +static int shim_ioex_pin_interrupt_configure(const struct device *dev, + gpio_pin_t pin, + enum gpio_int_mode mode, + enum gpio_int_trig trig) +{ + const struct ioexpander_config_t *cfg = dev->config; + struct ioex_drv_data *drv_data = dev->data; + int flags; + int res; + + if (!drv_data->int_gpio_dev) { + LOG_ERR("Trying to enable interrupt on ioex %d without " + "defined IO expander interrupt pin", + drv_data->ioex); + return -EIO; + } + + res = cfg->drv->get_flags_by_mask(drv_data->ioex, drv_data->port, + BIT(pin), &flags); + if (res) + return -EIO; + + flags |= convert_from_zephyr_flags(mode | trig); + + res = cfg->drv->set_flags_by_mask(drv_data->ioex, drv_data->port, + BIT(pin), flags); + if (res) + return -EIO; + + if (!cfg->drv->enable_interrupt) { + LOG_ERR("Trying to enable interrupt on ioex %d which doesn't " + "support interrupts", + drv_data->ioex); + return -EIO; + } + + res = cfg->drv->enable_interrupt(drv_data->ioex, drv_data->port, + BIT(pin), (mode & GPIO_INT_ENABLE)); + if (res) + return -EIO; + + if (mode == GPIO_INT_MODE_DISABLED) { + drv_data->pin_trig_edge_rising &= ~BIT(pin); + drv_data->pin_trig_edge_falling &= ~BIT(pin); + drv_data->pin_trig_level_zero &= ~BIT(pin); + drv_data->pin_trig_level_one &= ~BIT(pin); + } else if (mode == GPIO_INT_MODE_EDGE) { + if (trig & GPIO_INT_LOW_0) + drv_data->pin_trig_edge_falling |= BIT(pin); + if (trig & GPIO_INT_HIGH_1) + drv_data->pin_trig_edge_rising |= BIT(pin); + } else { + if (trig & GPIO_INT_LOW_0) + drv_data->pin_trig_level_zero |= BIT(pin); + if (trig & GPIO_INT_HIGH_1) + drv_data->pin_trig_level_one |= BIT(pin); + } + + return 0; +} + +static void shim_ioex_isr(const struct device *dev, + struct gpio_callback *callback, gpio_port_pins_t pins) +{ + struct ioex_drv_data *drv_data = + CONTAINER_OF(callback, struct ioex_drv_data, int_gpio_callback); + + k_work_submit(&drv_data->worker); +} + +static void shim_ioex_worker(struct k_work *worker) +{ + struct ioex_drv_data *drv_data = + CONTAINER_OF(worker, struct ioex_drv_data, worker); + const struct ioexpander_drv *drv = ioex_config[drv_data->ioex].drv; + int interrupted_pins_level = 0; + int interrupted_pins_edge = 0; + int interrupted_pins = 0; + int current_values; + int changed_pins; + + if (drv_data->ioex < 0) { + LOG_ERR("Invalid int IOEX"); + return; + } + + if (!drv->get_port) { + LOG_ERR("IO expander doesn't support get_port function"); + return; + } + + if (drv->get_port(drv_data->ioex, drv_data->port, ¤t_values)) { + LOG_ERR("Couldn't get int ioex values"); + return; + } + + changed_pins = current_values ^ drv_data->cached_values; + + /* Edge rising */ + interrupted_pins_edge |= (changed_pins & current_values) & + drv_data->pin_trig_edge_rising; + /* Edge falling */ + interrupted_pins_edge |= (changed_pins & (~current_values)) & + drv_data->pin_trig_edge_falling; + /* Level 1 */ + interrupted_pins_level |= + (current_values & drv_data->pin_trig_level_one); + /* Level 0 */ + interrupted_pins_level |= + ((~current_values) & drv_data->pin_trig_level_zero); + + interrupted_pins = (interrupted_pins_edge | interrupted_pins_level); + gpio_fire_callbacks(&drv_data->callbacks, drv_data->dev, + interrupted_pins); + + drv_data->cached_values = current_values; + + /* Recalling this function will simulate interrupts triggered by + * logic level instead of level change (edge). + * Function will be called repeatedly until the level change to value + * not triggering the interrupt. + */ + if (interrupted_pins_level) + k_work_submit(worker); +} + +static int shim_ioex_init(const struct device *dev) +{ + struct ioex_drv_data *drv_data = dev->data; + + drv_data->dev = dev; + + /* IO expander may have specified GPIO pin that should trigger + * interrupt handling routines for signals on this IO expander. + * If this GPIO is specified, it should be configured as interrupt + * pin and should have callback assigned to it. + */ + if (drv_data->int_gpio_dev) { + int res; + + res = gpio_pin_configure(drv_data->int_gpio_dev, + drv_data->int_gpio_pin, + drv_data->int_gpio_flags | GPIO_INPUT); + if (res) + return -EIO; + + gpio_init_callback(&drv_data->int_gpio_callback, shim_ioex_isr, + BIT(drv_data->int_gpio_pin)); + + res = gpio_add_callback(drv_data->int_gpio_dev, + &drv_data->int_gpio_callback); + if (res) + return -EIO; + + k_work_init(&drv_data->worker, shim_ioex_worker); + } + + return 0; +} + +static int shim_ioex_manage_callback(const struct device *dev, + struct gpio_callback *callback, + bool enable) +{ + struct ioex_drv_data *drv_data = dev->data; + + return gpio_manage_callback(&drv_data->callbacks, callback, enable); +} + +static const struct gpio_driver_api api_table = { + .pin_configure = shim_ioex_pin_configure, + .port_get_raw = shim_ioex_port_get_raw, + .port_set_masked_raw = shim_ioex_port_set_masked_raw, + .port_set_bits_raw = shim_ioex_port_set_bits_raw, + .port_clear_bits_raw = shim_ioex_port_clear_bits_raw, + .port_toggle_bits = shim_ioex_port_toggle_bits, + .pin_interrupt_configure = shim_ioex_pin_interrupt_configure, + .manage_callback = shim_ioex_manage_callback, +}; + +#define IOEX_INIT_CONFIG_ELEM(id) \ + { \ + .i2c_host_port = I2C_PORT(DT_PHANDLE(id, i2c_port)), \ + .i2c_addr_flags = DT_PROP(id, i2c_addr), \ + .drv = &DT_STRING_TOKEN(id, drv), \ + .flags = DT_PROP(id, flags), \ + }, + +#define IOEX_INIT_DATA(idx) \ + { \ + .ioex = IOEXPANDER_ID(DT_PARENT(DT_DRV_INST(idx))), \ + .port = DT_REG_ADDR(DT_DRV_INST(idx)), \ + COND_CODE_1( \ + DT_NODE_HAS_PROP(DT_PARENT(DT_DRV_INST(idx)), \ + int_gpios), \ + (.int_gpio_dev = DEVICE_DT_GET(DT_PHANDLE( \ + DT_PARENT(DT_DRV_INST(idx)), int_gpios)), \ + .int_gpio_pin = DT_GPIO_PIN( \ + DT_PARENT(DT_DRV_INST(idx)), int_gpios), \ + .int_gpio_flags = DT_GPIO_FLAGS( \ + DT_PARENT(DT_DRV_INST(idx)), int_gpios), ), \ + ()) \ + } + +struct ioexpander_config_t ioex_config[] = { DT_FOREACH_STATUS_OKAY( + DT_DRV_COMPAT_CHIP, IOEX_INIT_CONFIG_ELEM) }; + +#define GPIO_PORT_INIT(idx) \ + static struct ioex_drv_data ioex_##idx##_data = IOEX_INIT_DATA(idx); \ + DEVICE_DT_INST_DEFINE( \ + idx, shim_ioex_init, NULL, &ioex_##idx##_data, \ + &ioex_config[IOEXPANDER_ID(DT_PARENT(DT_DRV_INST(idx)))], \ + POST_KERNEL, CONFIG_PLATFORM_EC_IOEX_INIT_PRIORITY, \ + &api_table); + +DT_INST_FOREACH_STATUS_OKAY(GPIO_PORT_INIT) diff --git a/zephyr/shim/src/power.c b/zephyr/shim/src/power.c new file mode 100644 index 0000000000..6d09dba9d3 --- /dev/null +++ b/zephyr/shim/src/power.c @@ -0,0 +1,21 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <sys/util.h> + +#include "console.h" +#include "power.h" +#include "power/power.h" + +#if (SYSTEM_DT_POWER_SIGNAL_CONFIG) + +const struct power_signal_info power_signal_list[] = { + DT_FOREACH_CHILD( + POWER_SIGNAL_LIST_NODE, + GEN_POWER_SIGNAL_STRUCT) +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +#endif /* SYSTEM_DT_POWER_SIGNAL_CONFIG */ diff --git a/zephyr/shim/src/ppc.c b/zephyr/shim/src/ppc.c new file mode 100644 index 0000000000..33d27c294b --- /dev/null +++ b/zephyr/shim/src/ppc.c @@ -0,0 +1,44 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <devicetree.h> +#include "usbc_ppc.h" +#include "usbc/ppc_sn5s330.h" +#include "usbc/ppc_syv682x.h" +#include "usbc/ppc.h" + +#if DT_HAS_COMPAT_STATUS_OKAY(SN5S330_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(SYV682X_COMPAT) + +#define PPC_CHIP_PRIM(id, fn) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), (), \ + (PPC_CHIP_ELE_PRIM(id, fn))) + +#define PPC_CHIP_ALT(id, fn) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), \ + (PPC_CHIP_ELE_ALT(id, fn)), ()) + +#define PPC_CHIP_ELE_PRIM(id, fn) [PPC_USBC_PORT(id)] = fn(id) + +#define PPC_CHIP_ELE_ALT(id, fn) [PPC_ID(id)] = fn(id) + +/* Power Path Controller */ +struct ppc_config_t ppc_chips[] = { + DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_PRIM, + PPC_CHIP_SN5S330) + DT_FOREACH_STATUS_OKAY_VARGS(SYV682X_COMPAT, PPC_CHIP_PRIM, + PPC_CHIP_SYV682X) +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* Alt Power Path Controllers */ +struct ppc_config_t ppc_chips_alt[] = { + DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_ALT, + PPC_CHIP_SN5S330) + DT_FOREACH_STATUS_OKAY_VARGS(SYV682X_COMPAT, PPC_CHIP_ALT, + PPC_CHIP_SYV682X) +}; + +#endif /* #if DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/shim/src/tasks.c b/zephyr/shim/src/tasks.c index 95fe952976..9c6f655a5c 100644 --- a/zephyr/shim/src/tasks.c +++ b/zephyr/shim/src/tasks.c @@ -83,6 +83,7 @@ struct task_ctx_dyn { #endif /* CONFIG_THREAD_NAME */ #define TASK_TEST(_name, _entry, _parameter, _size) \ CROS_EC_TASK(_name, _entry, _parameter, _size) +/* Note: no static entry is required for sysworkq, as it isn't started here */ const static struct task_ctx_static shimmed_tasks_static[TASK_ID_COUNT] = { CROS_EC_TASK_LIST #ifdef TEST_BUILD @@ -90,7 +91,10 @@ const static struct task_ctx_static shimmed_tasks_static[TASK_ID_COUNT] = { #endif }; -static struct task_ctx_dyn shimmed_tasks_dyn[TASK_ID_COUNT]; +/* In dynamic tasks, allocate one extra spot for the sysworkq */ +static struct task_ctx_dyn shimmed_tasks_dyn[TASK_ID_COUNT + 1]; + +#define TASK_ID_SYSWORKQ TASK_ID_COUNT static int tasks_started; #undef CROS_EC_TASK @@ -98,18 +102,12 @@ static int tasks_started; task_id_t task_get_current(void) { - for (size_t i = 0; i < TASK_ID_COUNT; ++i) { + /* Include sysworkq entry in search for the task ID */ + for (size_t i = 0; i < TASK_ID_COUNT + 1; ++i) { if (shimmed_tasks_dyn[i].zephyr_tid == k_current_get()) return i; } -#if defined(HAS_TASK_HOOKS) - /* Hooks ID should be returned for deferred calls */ - if (k_current_get() == &k_sys_work_q.thread) { - return TASK_ID_HOOKS; - } -#endif /* HAS_TASK_HOOKS */ - __ASSERT(false, "Task index out of bound"); return 0; } @@ -287,6 +285,7 @@ void set_test_runner_tid(void) void start_ec_tasks(void) { + /* Initialize all EC tasks, which does not include the sysworkq entry */ for (size_t i = 0; i < TASK_ID_COUNT; ++i) { struct task_ctx_dyn *const ctx_dyn = &shimmed_tasks_dyn[i]; const struct task_ctx_static *const ctx_static = @@ -318,6 +317,10 @@ void start_ec_tasks(void) 0, K_NO_WAIT); } + + /* Create an entry for sysworkq we can send events to */ + shimmed_tasks_dyn[TASK_ID_COUNT].zephyr_tid = &k_sys_work_q.thread; + tasks_started = 1; } @@ -330,10 +333,10 @@ int init_signals(const struct device *unused) { ARG_UNUSED(unused); - for (size_t i = 0; i < TASK_ID_COUNT; ++i) { + /* Initialize event structures for all entries, including sysworkq */ + for (size_t i = 0; i < TASK_ID_COUNT + 1; ++i) { struct task_ctx_dyn *const ctx = &shimmed_tasks_dyn[i]; - /* Initialize the new_event structure */ k_poll_signal_init(&ctx->new_event); } @@ -363,11 +366,19 @@ void task_enable_irq(int irq) arch_irq_enable(irq); } -inline int in_interrupt_context(void) +inline bool in_interrupt_context(void) { return k_is_in_isr(); } +inline bool in_deferred_context(void) +{ + /* + * Deferred calls run in the sysworkq. + */ + return (task_get_current() == TASK_ID_SYSWORKQ); +} + #if IS_ENABLED(CONFIG_KERNEL_SHELL) && IS_ENABLED(CONFIG_THREAD_MONITOR) static int taskinfo(const struct shell *shell, size_t argc, char **argv) { diff --git a/zephyr/shim/chip/posix/CMakeLists.txt b/zephyr/test/accel_cal/BUILD.py index 70e8b6269a..bb50fd4301 100644 --- a/zephyr/shim/chip/posix/CMakeLists.txt +++ b/zephyr/test/accel_cal/BUILD.py @@ -2,4 +2,4 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_ESPI espi.c)
\ No newline at end of file +register_host_test("accel_cal") diff --git a/zephyr/test/accel_cal/zmake.yaml b/zephyr/test/accel_cal/zmake.yaml deleted file mode 100644 index e28a79e670..0000000000 --- a/zephyr/test/accel_cal/zmake.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true diff --git a/zephyr/boards/arm/kohaku/Kconfig.defconfig b/zephyr/test/base32/BUILD.py index 83b97d8ef7..67e7c50089 100644 --- a/zephyr/boards/arm/kohaku/Kconfig.defconfig +++ b/zephyr/test/base32/BUILD.py @@ -2,9 +2,4 @@ # Use of this source code is governed by a BSD-style license that can be # found in the LICENSE file. -if BOARD_KOHAKU - -config BOARD - default "kohaku" - -endif # BOARD_KOHAKU +register_host_test("base32") diff --git a/zephyr/test/base32/zmake.yaml b/zephyr/test/base32/zmake.yaml deleted file mode 100644 index fa16329e9c..0000000000 --- a/zephyr/test/base32/zmake.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true diff --git a/zephyr/test/crc/BUILD.py b/zephyr/test/crc/BUILD.py new file mode 100644 index 0000000000..17136be0ce --- /dev/null +++ b/zephyr/test/crc/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("crc") diff --git a/zephyr/test/crc/zmake.yaml b/zephyr/test/crc/zmake.yaml deleted file mode 100644 index fa16329e9c..0000000000 --- a/zephyr/test/crc/zmake.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true diff --git a/zephyr/test/drivers/BUILD.py b/zephyr/test/drivers/BUILD.py new file mode 100644 index 0000000000..1653103526 --- /dev/null +++ b/zephyr/test/drivers/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("drivers", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/drivers/README.md b/zephyr/test/drivers/README.md index 8ea3dcdde1..1d264a4f67 100644 --- a/zephyr/test/drivers/README.md +++ b/zephyr/test/drivers/README.md @@ -44,7 +44,7 @@ Build the test Then run gdb ``` -(chroot) gdb build/zephyr/test/drivers/build-singleimage/zephyr/zephyr.exe +(chroot) gdb build/zephyr/test-drivers/build-singleimage/zephyr/zephyr.exe # Set breakpoints, run, etc. ``` diff --git a/zephyr/test/drivers/include/gpio_map.h b/zephyr/test/drivers/include/gpio_map.h index 1f67138bd2..35a31119ed 100644 --- a/zephyr/test/drivers/include/gpio_map.h +++ b/zephyr/test/drivers/include/gpio_map.h @@ -20,6 +20,11 @@ #define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_PG_EC_DSW_PWROK #define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) + GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ + GPIO_INT(GPIO_USB_C0_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C1_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C1_PPC_INT_ODL, GPIO_INT_EDGE_FALLING, ppc_alert) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/test/drivers/include/stubs.h b/zephyr/test/drivers/include/stubs.h index f942cd086a..448d6c883b 100644 --- a/zephyr/test/drivers/include/stubs.h +++ b/zephyr/test/drivers/include/stubs.h @@ -3,6 +3,9 @@ * found in the LICENSE file. */ +#ifndef __TEST_DRIVERS_STUBS_H +#define __TEST_DRIVERS_STUBS_H + #include "power.h" enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; @@ -11,3 +14,12 @@ enum usbc_port { USBC_PORT_C0 = 0, USBC_PORT_C1, USBC_PORT_COUNT }; extern struct usb_mux usbc1_virtual_usb_mux; void set_mock_power_state(enum power_state state); + +/** + * @brief Set product ID that should be returned by board_get_ps8xxx_product_id + * + * @param product_id ID of PS8xxx product which is emulated + */ +void board_set_ps8xxx_product_id(uint16_t product_id); + +#endif /* __TEST_DRIVERS_STUBS_H */ diff --git a/zephyr/test/drivers/include/tcpci_test_common.h b/zephyr/test/drivers/include/tcpci_test_common.h new file mode 100644 index 0000000000..dbdfd04dcf --- /dev/null +++ b/zephyr/test/drivers/include/tcpci_test_common.h @@ -0,0 +1,178 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __TCPCI_TEST_COMMON_H +#define __TCPCI_TEST_COMMON_H + +#include "stubs.h" + +/** + * @brief Check TCPC register value using zassert API + * + * @param emul Pointer to TCPCI emulator + * @param reg TCPC register address to check + * @param exp_val Expected value of register + * @param line Line number to print in case of failure + */ +void check_tcpci_reg_f(const struct emul *emul, int reg, uint16_t exp_val, + int line); +#define check_tcpci_reg(emul, reg, exp_val) \ + check_tcpci_reg_f((emul), (reg), (exp_val), __LINE__) + +/** + * @brief Test TCPCI init and vbus level callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_init(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI release callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_release(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI get cc callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_get_cc(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI set cc callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_set_cc(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI set polarity callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_set_polarity(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI set vconn callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_set_vconn(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI set msg header callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_set_msg_header(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI rx and sop prime enable callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI get raw message from TCPC callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_get_rx_message_raw(const struct emul *emul, + enum usbc_port port); + +/** + * @brief Test TCPCI transmitting message from TCPC callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_transmit(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI alert callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_alert(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI alert RX message callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI auto discharge on disconnect callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_auto_discharge(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI drp toggle callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_drp_toggle(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI get chip info callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_get_chip_info(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI enter low power mode callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_low_power_mode(const struct emul *emul, enum usbc_port port); + +/** + * @brief Test TCPCI set bist test mode callback + * + * @param emul Pointer to TCPCI emulator + * @param port Select USBC port that will be used to obtain tcpm_drv from + * tcpc_config + */ +void test_tcpci_set_bist_mode(const struct emul *emul, enum usbc_port port); + +#endif /* __TCPCI_TEST_COMMON_H */ diff --git a/zephyr/test/drivers/include/test_mocks.h b/zephyr/test/drivers/include/test_mocks.h new file mode 100644 index 0000000000..fe63eea0d3 --- /dev/null +++ b/zephyr/test/drivers/include/test_mocks.h @@ -0,0 +1,80 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <fff.h> + +/* + * Convenience macros + */ + +/** + * @brief Helper macro for inspecting the argument history of a given + * fake. Counts number of times the fake was called with a given + * argument. + * @param FAKE - FFF-provided fake structure (no pointers). + * @param ARG_NUM - Zero-based index of the argument to compare. + * @param VAL - Expression the argument must equal. + * @return Returns the number of times a call was made to the fake + * where the argument `ARG_NUM` equals `VAL`. + */ +#define MOCK_COUNT_CALLS_WITH_ARG_VALUE(FAKE, ARG_NUM, VAL) \ + ({ \ + int count = 0; \ + for (int i = 0; i < (FAKE).call_count; i++) { \ + if ((FAKE).arg##ARG_NUM##_history[i] == (VAL)) { \ + count++; \ + } \ + } \ + count; \ + }) + +/** + * @brief Helper macro for asserting that a certain register write occurred. + * Used when wrapping an I2C emulator mock write function in FFF. Prints + * useful error messages when the assertion fails. + * @param FAKE - name of the fake whose arg history to insepct. Do not include + * '_fake' at the end. + * @param CALL_NUM - Index in to the call history that this write should have + * occurred at. Zero based. + * @param EXPECTED_REG - The register address that was supposed to be written. + * @param EXPECTED_VAL - The 8-bit value that was supposed to be written, or + * `MOCK_IGNORE_VALUE` to suppress this check. + */ +#define MOCK_ASSERT_I2C_WRITE(FAKE, CALL_NUM, EXPECTED_REG, EXPECTED_VAL) \ + do { \ + zassert_true((CALL_NUM) < FAKE##_fake.call_count, \ + "Call #%d did not occur (%d I2C writes total)", \ + (CALL_NUM), FAKE##_fake.call_count); \ + zassert_equal( \ + FAKE##_fake.arg1_history[(CALL_NUM)], (EXPECTED_REG), \ + "Expected I2C write #%d to register 0x%02x (" \ + #EXPECTED_REG ") but wrote to reg 0x%02x", \ + (CALL_NUM), (EXPECTED_REG), \ + FAKE##_fake.arg1_history[(CALL_NUM)]); \ + if (EXPECTED_VAL != MOCK_IGNORE_VALUE) { \ + zassert_equal( \ + FAKE##_fake.arg2_history[(CALL_NUM)], \ + (EXPECTED_VAL), \ + "Expected I2C write #%d to register 0x%02x (" \ + #EXPECTED_REG ") to write 0x%02x (" \ + #EXPECTED_VAL ") but wrote 0x%02x", \ + (CALL_NUM), (EXPECTED_REG), (EXPECTED_VAL), \ + FAKE##_fake.arg2_history[(CALL_NUM)]); \ + } \ + } while (0) + +/** @brief Value to pass to MOCK_ASSERT_I2C_WRITE to ignore the actual value + * written. + */ +#define MOCK_IGNORE_VALUE (-1) + +/* + * Mock declarations + */ + +/* Mocks for common/init_rom.c */ +DECLARE_FAKE_VALUE_FUNC(const void *, init_rom_map, const void *, int); +DECLARE_FAKE_VOID_FUNC(init_rom_unmap, const void *, int); +DECLARE_FAKE_VALUE_FUNC(int, init_rom_copy, int, int, int); diff --git a/zephyr/test/drivers/overlay.dts b/zephyr/test/drivers/overlay.dts index 96fc7de31a..569dedae78 100644 --- a/zephyr/test/drivers/overlay.dts +++ b/zephyr/test/drivers/overlay.dts @@ -59,6 +59,36 @@ enum-name = "GPIO_USB_C1_RT_RST_ODL"; label = "USB_C1_RT_RST_ODL"; }; + gpio_usb_c1_frs_en: usb_c1_frs_en { + gpios = <&gpio0 8 (GPIO_OUT_LOW)>; + enum-name = "GPIO_USB_C1_FRS_EN"; + label = "USB_C1_FRS_EN"; + }; + usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { + gpios = <&gpio0 9 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; + label = "USB_C0_TCPC_INT_ODL"; + }; + usb_c1_tcpc_int_odl: usb_c1_tcpc_int_odl { + gpios = <&gpio0 10 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; + label = "USB_C1_TCPC_INT_ODL"; + }; + usb_c0_tcpc_rst_l { + gpios = <&gpio0 11 (GPIO_OUT_HIGH | GPIO_INPUT)>; + enum-name = "GPIO_USB_C0_TCPC_RST_L"; + label = "USB_C0_TCPC_RST_L"; + }; + usb_c1_tcpc_rst_l { + gpios = <&gpio0 12 (GPIO_OUT_HIGH | GPIO_INPUT)>; + enum-name = "GPIO_USB_C1_TCPC_RST_L"; + label = "USB_C1_TCPC_RST_L"; + }; + gpio_usb_c1_ppc_int: usb_c1_ppc_int { + gpios = <&gpio0 13 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PPC_INT_ODL"; + label = "GPIO_USB_C1_PPC_INT_ODL"; + }; }; named-i2c-ports { compatible = "named-i2c-ports"; @@ -69,7 +99,7 @@ label = "USB_C0"; }; usb-c1 { - i2c-port = <&i2c0>; + i2c-port = <&i2c1>; enum-name = "I2C_PORT_USB_C1"; label = "USB_C1"; }; @@ -432,8 +462,8 @@ }; /* - * Second i2c bus is required, because there is already device with - * address 0x68 on the first bus + * Second i2c bus is required, because there are already devices with + * addresses 0x68, 0xb and 0x9 on the first bus */ i2c1: i2c@400 { status = "okay"; @@ -444,15 +474,21 @@ reg = <0x400 4>; label = "I2C_1"; - accel_bmi160: bmi160@68 { - compatible = "zephyr,bmi"; - reg = <0x68>; - label = "BMI160"; - device-model = "BMI_EMUL_160"; - error-on-ro-write; - error-on-wo-read; - error-on-reserved-bit-write; - simulate-command-exec-time; + tcpci_ps8xxx_emul: tcpci_ps8xxx_emul@b { + compatible = "cros,tcpci-emul"; + status = "okay"; + reg = <0xb>; + label = "TCPCI_PS8XXX_EMUL"; + alert_gpio = <&usb_c1_tcpc_int_odl>; + }; + + ps8xxx_emul: ps8xxx_emul { + compatible = "cros,ps8xxx-emul"; + tcpci-i2c = <&tcpci_ps8xxx_emul>; + p0-i2c-addr = <0x8>; + p1-i2c-addr = <0x9>; + gpio-i2c-addr = <0x1a>; + label = "PS8XXX_EMUL"; }; tcs_emul: tcs@39 { @@ -463,6 +499,34 @@ error-on-reserved-bit-write; error-on-msb-first-access; }; + + syv682x_emul: syv682x@41 { + compatible = "zephyr,syv682x-emul"; + reg = <0x41>; + label = "SYV682X_EMUL"; + frs_en_gpio = <&gpio_usb_c1_frs_en>; + alert_gpio = <&gpio_usb_c1_ppc_int>; + }; + + usb_c1_bb_retimer_emul: bbretimer@42 { + compatible = "cros,bb-retimer-emul"; + reg = <0x42>; + label = "USB_C1_BB_RETIMER"; + vendor = "BB_RETIMER_VENDOR_ID_1"; + error-on-ro-write; + error-on-reserved-bit-write; + }; + + accel_bmi160: bmi160@68 { + compatible = "zephyr,bmi"; + reg = <0x68>; + label = "BMI160"; + device-model = "BMI_EMUL_160"; + error-on-ro-write; + error-on-wo-read; + error-on-reserved-bit-write; + simulate-command-exec-time; + }; }; clock: clock { @@ -481,7 +545,7 @@ }; &gpio0 { - ngpios = <8>; + ngpios = <14>; }; &i2c0 { @@ -526,12 +590,6 @@ label = "SN5S330_EMUL"; }; - syv682x_emul: syv682x@41 { - compatible = "zephyr,syv682x-emul"; - reg = <0x41>; - label = "SYV682X_EMUL"; - }; - accel_bmi260: bmi260@68 { compatible = "zephyr,bmi"; reg = <0x68>; @@ -543,15 +601,6 @@ simulate-command-exec-time; }; - usb_c1_bb_retimer_emul: bbretimer@42 { - compatible = "cros,bb-retimer-emul"; - reg = <0x42>; - label = "USB_C1_BB_RETIMER"; - vendor = "BB_RETIMER_VENDOR_ID_1"; - error-on-ro-write; - error-on-reserved-bit-write; - }; - ln9310: ln9310@80 { compatible = "cros,ln9310-emul"; status = "okay"; @@ -585,6 +634,7 @@ status = "okay"; reg = <0x82>; label = "TCPCI_EMUL"; + alert_gpio = <&usb_c0_tcpc_int_odl>; }; }; diff --git a/zephyr/test/drivers/prj.conf b/zephyr/test/drivers/prj.conf index e0fc1b9233..ed41ea5357 100644 --- a/zephyr/test/drivers/prj.conf +++ b/zephyr/test/drivers/prj.conf @@ -39,6 +39,7 @@ CONFIG_EMUL_BMA255=y CONFIG_EMUL_BMI=y CONFIG_EMUL_TCS3400=y CONFIG_EMUL_BB_RETIMER=y +CONFIG_EMUL_PS8XXX=y CONFIG_PLATFORM_EC_POWERSEQ=y @@ -58,7 +59,10 @@ CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10 CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=10 CONFIG_PLATFORM_EC_CHARGER_ISL9238=y CONFIG_PLATFORM_EC_CHARGER_ISL9241=y +CONFIG_PLATFORM_EC_CHIP_INIT_ROM_REGION=y CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_CHARGER=y +CONFIG_PLATFORM_EC_USB_PD_FRS=y +CONFIG_PLATFORM_EC_USB_PD_FRS_PPC=y CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y CONFIG_PLATFORM_EC_HOSTCMD=y CONFIG_PLATFORM_EC_USB_PD_TCPM_TUSB422=y @@ -79,6 +83,12 @@ CONFIG_PLATFORM_EC_ACCEL_FIFO=y CONFIG_PLATFORM_EC_SENSOR_TIGHT_TIMESTAMPS=y CONFIG_PLATFORM_EC_ALS_TCS3400=y CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_MUX=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8805_FORCE_DID=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_PS8815_FORCE_DID=y +CONFIG_PLATFORM_EC_USB_PD_TCPM_MULTI_PS8XXX=y CONFIG_ESPI=y CONFIG_ESPI_EMUL=y diff --git a/zephyr/test/drivers/src/bmi160.c b/zephyr/test/drivers/src/bmi160.c index ceb55896eb..080ec2ab96 100644 --- a/zephyr/test/drivers/src/bmi160.c +++ b/zephyr/test/drivers/src/bmi160.c @@ -10,6 +10,7 @@ #include "i2c.h" #include "emul/emul_bmi.h" #include "emul/emul_common_i2c.h" +#include "test_mocks.h" #include "motion_sense_fifo.h" #include "driver/accelgyro_bmi160.h" @@ -1848,6 +1849,230 @@ static void test_bmi_gyr_fifo(void) NULL); } +/** Test reading from compass via `bmi160_sec_raw_read8()` */ +static void test_bmi_sec_raw_read8(void) +{ + struct motion_sensor_t *ms = &motion_sensors[BMI_ACC_SENSOR_ID]; + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + + uint8_t expected_read_value = 0xAA; + uint8_t requested_reg_addr = 0x55; + uint8_t actual_reg_addr; + int actual_read_value; + int ret; + + bmi_emul_set_reg(emul, BMI160_MAG_I2C_READ_DATA, expected_read_value); + + ret = bmi160_sec_raw_read8(ms->port, ms->i2c_spi_addr_flags, + requested_reg_addr, &actual_read_value); + + /* Verify return value */ + zassert_equal(ret, EC_RES_SUCCESS, "Expected return code %d but got %d", + EC_RES_SUCCESS, ret); + + /* Verify the correct value was read */ + zassert_equal(expected_read_value, actual_read_value, + "Read value $%02x but expected to read $%02x", + actual_read_value, expected_read_value); + + /* Verify the intended register address was read */ + actual_reg_addr = bmi_emul_get_reg(emul, BMI160_MAG_I2C_READ_ADDR); + zassert_equal(requested_reg_addr, actual_reg_addr, + "Read reg $%02x but expected to read $%02x", + actual_reg_addr, requested_reg_addr); +} + +/** Test writing to compass via `bmi160_sec_raw_write8()` */ +static void test_bmi_sec_raw_write8(void) +{ + struct motion_sensor_t *ms = &motion_sensors[BMI_ACC_SENSOR_ID]; + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + + uint8_t expected_write_value = 0xAB; + uint8_t requested_reg_addr = 0x56; + uint8_t actual_reg_addr; + int actual_written_value; + int ret; + + ret = bmi160_sec_raw_write8(ms->port, ms->i2c_spi_addr_flags, + requested_reg_addr, expected_write_value); + + /* Verify return value */ + zassert_equal(ret, EC_RES_SUCCESS, "Expected return code %d but got %d", + EC_RES_SUCCESS, ret); + + /* Verify the correct value was written */ + actual_written_value = + bmi_emul_get_reg(emul, BMI160_MAG_I2C_WRITE_DATA); + zassert_equal(expected_write_value, actual_written_value, + "Wrote value $%02x but expected to write $%02x", + actual_written_value, expected_write_value); + + /* Verify the intended register address was used */ + actual_reg_addr = bmi_emul_get_reg(emul, BMI160_MAG_I2C_WRITE_ADDR); + zassert_equal(requested_reg_addr, actual_reg_addr, + "Wrote reg $%02x but expected to write $%02x", + actual_reg_addr, requested_reg_addr); +} + +/** Test setting an offset on an invalid sensor type */ +static void test_bmi_set_offset_invalid_type(void) +{ + struct motion_sensor_t ms_fake; + int ret; + + int16_t unused_offset; + int16_t temp = 0; + + /* make a copy of the accel motion sensor so we modify its type */ + memcpy(&ms_fake, &motion_sensors[BMI_ACC_SENSOR_ID], sizeof(ms_fake)); + ms_fake.type = MOTIONSENSE_TYPE_MAX; + + ret = ms_fake.drv->set_offset(&ms_fake, &unused_offset, temp); + + zassert_equal(ret, EC_RES_INVALID_PARAM, + "Expected return code of %d but got %d", + EC_RES_INVALID_PARAM, ret); +} + +/** Test performing a calibration on a magnetometer, which is not supported */ +static void test_bmi_perform_calib_invalid_type(void) +{ + struct motion_sensor_t ms_fake; + int ret; + + /* make a copy of the accel motion sensor so we modify its type */ + memcpy(&ms_fake, &motion_sensors[BMI_ACC_SENSOR_ID], sizeof(ms_fake)); + ms_fake.type = MOTIONSENSE_TYPE_MAG; + + ret = ms_fake.drv->perform_calib(&ms_fake, 1); + + zassert_equal(ret, EC_RES_INVALID_PARAM, + "Expected return code of %d but got %d", + EC_RES_INVALID_PARAM, ret); +} + +/** Test reading the onboard temperature sensor */ +static void test_bmi_temp_sensor(void) +{ + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + int ret; + + /* Part 1: + * Set up the register so we read 300 Kelvin. 0x0000 is 23 deg C, and + * each LSB is 0.5^9 deg C. See BMI160 datasheet for more details. + */ + int actual_read_temp_k, expected_temp_k = 300; + uint16_t temp_reg_value = (K_TO_C(expected_temp_k) - 23) << 9; + + bmi_emul_set_reg(emul, BMI160_TEMPERATURE_0, temp_reg_value & 0xFF); + bmi_emul_set_reg(emul, BMI160_TEMPERATURE_1, temp_reg_value >> 8); + + /* The output will be in Kelvin */ + ret = bmi160_get_sensor_temp(BMI_ACC_SENSOR_ID, &actual_read_temp_k); + + zassert_equal(ret, EC_RES_SUCCESS, "Expected %d but got %d", + EC_RES_SUCCESS, ret); + zassert_equal(expected_temp_k, actual_read_temp_k, + "Expected %dK but got %dK", expected_temp_k, + actual_read_temp_k); + + /* Part 2: + * Have the chip return an invalid reading. + */ + temp_reg_value = BMI_INVALID_TEMP; + bmi_emul_set_reg(emul, BMI160_TEMPERATURE_0, temp_reg_value & 0xFF); + bmi_emul_set_reg(emul, BMI160_TEMPERATURE_1, temp_reg_value >> 8); + + ret = bmi160_get_sensor_temp(BMI_ACC_SENSOR_ID, &actual_read_temp_k); + + zassert_equal(ret, EC_ERROR_NOT_POWERED, "Expected %d but got %d", + EC_ERROR_NOT_POWERED, ret); +} + +static void test_bmi_interrupt_handler(void) +{ + /* The accelerometer interrupt handler simply sets an event flag for the + * motion sensing task. Make sure that flag starts cleared, fire the + * interrupt, and ensure the flag is set. + */ + + uint32_t *mask; + + mask = task_get_event_bitmap(TASK_ID_MOTIONSENSE); + zassert_true(mask != NULL, + "Got a null pointer when getting event bitmap."); + zassert_true((*mask & CONFIG_ACCELGYRO_BMI160_INT_EVENT) == 0, + "Event flag is set before firing interrupt"); + + bmi160_interrupt(0); + + mask = task_get_event_bitmap(TASK_ID_MOTIONSENSE); + zassert_true(mask != NULL, + "Got a null pointer when getting event bitmap."); + zassert_true(*mask & CONFIG_ACCELGYRO_BMI160_INT_EVENT, + "Event flag is not set after firing interrupt"); +} + +/* Make an I2C emulator mock wrapped in FFF for use with test_bmi_init_chip_id() + */ +FAKE_VALUE_FUNC(int, bmi_init_chip_id_mock_write_fn, struct i2c_emul *, int, + uint8_t, int, void *); + +/** Test handling of invalid or unreadable chip IDs in init() */ +static void test_bmi_init_chip_id(void) +{ + struct motion_sensor_t *ms = &motion_sensors[BMI_ACC_SENSOR_ID]; + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + int ret; + + /* Part 1: Cannot read the Chip ID register */ + i2c_common_emul_set_read_fail_reg(emul, BMI160_CHIP_ID); + ret = ms->drv->init(ms); + + zassert_equal(ret, EC_ERROR_UNKNOWN, "Expected %d but got %d", + EC_ERROR_UNKNOWN, ret); + + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Part 2: Incorrect chip ID - this triggers a series of writes in an + * attempt to 'unlock' the chip. + */ + + /* Have the mocked write function return 1 so everything is passed + * through. We only care about using FFF to capture the argument + * history. + */ + + RESET_FAKE(bmi_init_chip_id_mock_write_fn); + bmi_init_chip_id_mock_write_fn_fake.return_val = 1; + i2c_common_emul_set_write_func(emul, bmi_init_chip_id_mock_write_fn, + NULL); + + /* Return a phony chip ID */ + bmi_emul_set_reg(emul, BMI160_CHIP_ID, 0xFF); + + ret = ms->drv->init(ms); + + /* Verify return value */ + zassert_equal(ret, EC_ERROR_ACCESS_DENIED, "Expected %d but got %d", + EC_ERROR_ACCESS_DENIED, ret); + + /* Verify that all expected I2C writes were completed, in order */ + MOCK_ASSERT_I2C_WRITE(bmi_init_chip_id_mock_write_fn, 0, BMI160_CMD_REG, + BMI160_CMD_EXT_MODE_EN_B0); + MOCK_ASSERT_I2C_WRITE(bmi_init_chip_id_mock_write_fn, 1, BMI160_CMD_REG, + BMI160_CMD_EXT_MODE_EN_B1); + MOCK_ASSERT_I2C_WRITE(bmi_init_chip_id_mock_write_fn, 2, BMI160_CMD_REG, + BMI160_CMD_EXT_MODE_EN_B2); + MOCK_ASSERT_I2C_WRITE(bmi_init_chip_id_mock_write_fn, 3, + BMI160_CMD_EXT_MODE_ADDR, BMI160_CMD_PAGING_EN); + MOCK_ASSERT_I2C_WRITE(bmi_init_chip_id_mock_write_fn, 4, + BMI160_CMD_EXT_MODE_ADDR, 0); + + i2c_common_emul_set_write_func(emul, NULL, NULL); +} + void test_suite_bmi160(void) { ztest_test_suite(bmi160, @@ -1868,6 +2093,14 @@ void test_suite_bmi160(void) ztest_user_unit_test(test_bmi_gyr_perform_calib), ztest_user_unit_test(test_bmi_init), ztest_user_unit_test(test_bmi_acc_fifo), - ztest_user_unit_test(test_bmi_gyr_fifo)); + ztest_user_unit_test(test_bmi_gyr_fifo), + ztest_user_unit_test(test_bmi_sec_raw_read8), + ztest_user_unit_test(test_bmi_sec_raw_write8), + ztest_user_unit_test(test_bmi_set_offset_invalid_type), + ztest_user_unit_test( + test_bmi_perform_calib_invalid_type), + ztest_user_unit_test(test_bmi_temp_sensor), + ztest_user_unit_test(test_bmi_interrupt_handler), + ztest_user_unit_test(test_bmi_init_chip_id)); ztest_run_test_suite(bmi160); } diff --git a/zephyr/test/drivers/src/bmi260.c b/zephyr/test/drivers/src/bmi260.c index 964a83d678..fb00288367 100644 --- a/zephyr/test/drivers/src/bmi260.c +++ b/zephyr/test/drivers/src/bmi260.c @@ -3,6 +3,7 @@ * found in the LICENSE file. */ +#include <fff.h> #include <zephyr.h> #include <ztest.h> @@ -14,6 +15,7 @@ #include "motion_sense_fifo.h" #include "driver/accelgyro_bmi260.h" #include "driver/accelgyro_bmi_common.h" +#include "test_mocks.h" #define BMI_ORD DT_DEP_ORD(DT_NODELABEL(accel_bmi260)) #define BMI_ACC_SENSOR_ID SENSOR_ID(DT_NODELABEL(ms_bmi260_accel)) @@ -1567,6 +1569,15 @@ static int emul_init_ok(struct i2c_emul *emul, int reg, uint8_t *val, int byte, return 1; } +/** + * A custom fake to use with the `init_rom_map` mock that returns the + * value of `addr` + */ +static const void *init_rom_map_addr_passthru(const void *addr, int size) +{ + return addr; +} + /** Test init function of BMI260 accelerometer and gyroscope sensors */ static void test_bmi_init(void) { @@ -1577,6 +1588,10 @@ static void test_bmi_init(void) ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; ms_gyr = &motion_sensors[BMI_GYR_SENSOR_ID]; + /* The mock should return whatever is passed in to its addr param */ + RESET_FAKE(init_rom_map); + init_rom_map_fake.custom_fake = init_rom_map_addr_passthru; + /* * Test successful init. It is needed custom function to set value of * BMI260_INTERNAL_STATUS register, because init function triggers reset @@ -1891,6 +1906,271 @@ static void test_unsupported_configs(void) EC_RES_INVALID_PARAM, ret); } +void test_interrupt_handler(void) +{ + /* The accelerometer interrupt handler simply sets an event flag for the + * motion sensing task. Make sure that flag starts cleared, fire the + * interrupt, and ensure the flag is set. + */ + + uint32_t *mask; + + mask = task_get_event_bitmap(TASK_ID_MOTIONSENSE); + zassert_true(mask != NULL, + "Got a null pointer when getting event bitmap."); + zassert_true((*mask & CONFIG_ACCELGYRO_BMI260_INT_EVENT) == 0, + "Event flag is set before firing interrupt"); + + bmi260_interrupt(0); + + mask = task_get_event_bitmap(TASK_ID_MOTIONSENSE); + zassert_true(mask != NULL, + "Got a null pointer when getting event bitmap."); + zassert_true(*mask & CONFIG_ACCELGYRO_BMI260_INT_EVENT, + "Event flag is not set after firing interrupt"); +} + +void test_bmi_init_chip_id(void) +{ + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; + + /* Part 1: + * Error occurs while reading the chip ID + */ + i2c_common_emul_set_read_fail_reg(emul, BMI260_CHIP_ID); + int ret = ms_acc->drv->init(ms_acc); + + zassert_equal(ret, EC_ERROR_UNKNOWN, + "Expected %d (EC_ERROR_UNKNOWN) but got %d", + EC_ERROR_UNKNOWN, ret); + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Part 2: + * Test cases where the returned chip ID does not match what is + * expected. This involves overriding values in the motion_sensor + * struct, so make a copy first. + */ + struct motion_sensor_t ms_fake; + + memcpy(&ms_fake, ms_acc, sizeof(ms_fake)); + + /* Part 2a: expecting MOTIONSENSE_CHIP_BMI220 but get BMI260's chip ID! + */ + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); + ms_fake.chip = MOTIONSENSE_CHIP_BMI220; + + ret = ms_fake.drv->init(&ms_fake); + zassert_equal(ret, EC_ERROR_ACCESS_DENIED, + "Expected %d (EC_ERROR_ACCESS_DENIED) but got %d", + EC_ERROR_ACCESS_DENIED, ret); + + /* Part 2b: expecting MOTIONSENSE_CHIP_BMI260 but get BMI220's chip ID! + */ + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI220_CHIP_ID_MAJOR); + ms_fake.chip = MOTIONSENSE_CHIP_BMI260; + + ret = ms_fake.drv->init(&ms_fake); + zassert_equal(ret, EC_ERROR_ACCESS_DENIED, + "Expected %d (EC_ERROR_ACCESS_DENIED) but got %d", + EC_ERROR_ACCESS_DENIED, ret); + + /* Part 2c: use an invalid expected chip */ + ms_fake.chip = MOTIONSENSE_CHIP_MAX; + + ret = ms_fake.drv->init(&ms_fake); + zassert_equal(ret, EC_ERROR_ACCESS_DENIED, + "Expected %d (EC_ERROR_ACCESS_DENIED) but got %d", + EC_ERROR_ACCESS_DENIED, ret); +} + +/* Make an I2C emulator mock wrapped in FFF */ +FAKE_VALUE_FUNC(int, bmi_config_load_no_mapped_flash_mock_read_fn, + struct i2c_emul *, int, uint8_t *, int, void *); +static int bmi_config_load_no_mapped_flash_mock_read_fn_helper( + struct i2c_emul *emul, int reg, uint8_t *val, int bytes, void *data) +{ + if (reg == BMI260_INTERNAL_STATUS && val) { + /* We want to force-return a status of 'initialized' when this + * is read. + */ + *val = BMI260_INIT_OK; + return 0; + } + /* For other registers, go through the normal emulator route */ + return 1; +} + +void test_bmi_config_load_no_mapped_flash(void) +{ + /* Tests the situation where we load BMI config data when flash memory + * is not mapped (basically what occurs when `init_rom_map()` in + * `bmi_config_load()` returns NULL) + */ + + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; + int ret, num_status_reg_reads; + + /* Force bmi_config_load() to have to manually copy from memory */ + RESET_FAKE(init_rom_map); + init_rom_map_fake.return_val = NULL; + + /* Force init_rom_copy() to succeed */ + RESET_FAKE(init_rom_copy); + init_rom_copy_fake.return_val = 0; + + /* Set proper chip ID and raise the INIT_OK flag to signal that config + * succeeded. + */ + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); + i2c_common_emul_set_read_func( + emul, bmi_config_load_no_mapped_flash_mock_read_fn, NULL); + RESET_FAKE(bmi_config_load_no_mapped_flash_mock_read_fn); + bmi_config_load_no_mapped_flash_mock_read_fn_fake.custom_fake = + bmi_config_load_no_mapped_flash_mock_read_fn_helper; + + /* Part 1: successful path */ + ret = ms_acc->drv->init(ms_acc); + + zassert_equal(ret, EC_RES_SUCCESS, "Got %d but expected %d", ret, + EC_RES_SUCCESS); + + /* Check the number of times we accessed BMI260_INTERNAL_STATUS */ + num_status_reg_reads = MOCK_COUNT_CALLS_WITH_ARG_VALUE( + bmi_config_load_no_mapped_flash_mock_read_fn_fake, 1, + BMI260_INTERNAL_STATUS); + zassert_equal(1, num_status_reg_reads, + "Accessed status reg %d times but expected %d.", + num_status_reg_reads, 1); + + /* Part 2: write to `BMI260_INIT_ADDR_0` fails */ + i2c_common_emul_set_write_fail_reg(emul, BMI260_INIT_ADDR_0); + + ret = ms_acc->drv->init(ms_acc); + zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Got %d but expected %d", + ret, EC_ERROR_INVALID_CONFIG); + + i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Part 3: init_rom_copy() fails w/ a non-zero return code of 255. */ + init_rom_copy_fake.return_val = 255; + + ret = ms_acc->drv->init(ms_acc); + zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Got %d but expected %d", + ret, EC_ERROR_INVALID_CONFIG); + + init_rom_copy_fake.return_val = 0; + + /* Part 4: write to `BMI260_INIT_DATA` fails */ + i2c_common_emul_set_write_fail_reg(emul, BMI260_INIT_DATA); + + ret = ms_acc->drv->init(ms_acc); + zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Got %d but expected %d", + ret, EC_ERROR_INVALID_CONFIG); + + i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Cleanup */ + i2c_common_emul_set_read_func(emul, NULL, NULL); +} + +void test_bmi_config_unsupported_chip(void) +{ + /* Test what occurs when we try to configure a chip that is + * turned off in Kconfig (BMI220). This test assumes that + * CONFIG_ACCELGYRO_BMI220 is NOT defined. + */ + +#if defined(CONFIG_ACCELGYRO_BMI220) +#error "Test test_bmi_config_unsupported_chip will not work properly with " \ + "CONFIG_ACCELGYRO_BMI220 defined." +#endif + + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + struct motion_sensor_t ms_fake; + + /* Set up struct and emaulator to be a BMI220 chip, which + * `bmi_config_load()` does not support in the current configuration + */ + + memcpy(&ms_fake, &motion_sensors[BMI_ACC_SENSOR_ID], sizeof(ms_fake)); + ms_fake.chip = MOTIONSENSE_CHIP_BMI220; + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI220_CHIP_ID_MAJOR); + + int ret = ms_fake.drv->init(&ms_fake); + + zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Expected %d but got %d", + EC_ERROR_INVALID_CONFIG, ret); +} + +void test_init_config_read_failure(void) +{ + /* Test proper response to a failed read from the register + * BMI260_INTERNAL_STATUS. + */ + + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; + int ret; + + /* Set up i2c emulator and mocks */ + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); + i2c_common_emul_set_read_fail_reg(emul, BMI260_INTERNAL_STATUS); + RESET_FAKE(init_rom_map); + init_rom_map_fake.custom_fake = init_rom_map_addr_passthru; + + ret = ms_acc->drv->init(ms_acc); + + zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Expected %d but got %d", + EC_ERROR_INVALID_CONFIG, ret); +} + +/* Mock read function and counter used to test the timeout when + * waiting for the chip to initialize + */ +static int timeout_test_status_reg_access_count; +static int status_timeout_mock_read_fn(struct i2c_emul *emul, int reg, + uint8_t *val, int bytes, void *data) +{ + if (reg == BMI260_INTERNAL_STATUS && val) { + /* We want to force-return a non-OK status each time */ + timeout_test_status_reg_access_count++; + *val = BMI260_INIT_ERR; + return 0; + } else { + return 1; + } +} + +void test_init_config_status_timeout(void) +{ + /* We allow up to 15 tries to get a successful BMI260_INIT_OK + * value from the BMI260_INTERNAL_STATUS register. Make sure + * we properly handle the case where the chip is not initialized + * before the timeout. + */ + + struct i2c_emul *emul = bmi_emul_get(BMI_ORD); + struct motion_sensor_t *ms_acc = &motion_sensors[BMI_ACC_SENSOR_ID]; + int ret; + + /* Set up i2c emulator and mocks */ + bmi_emul_set_reg(emul, BMI260_CHIP_ID, BMI260_CHIP_ID_MAJOR); + timeout_test_status_reg_access_count = 0; + i2c_common_emul_set_read_func(emul, status_timeout_mock_read_fn, NULL); + RESET_FAKE(init_rom_map); + init_rom_map_fake.custom_fake = init_rom_map_addr_passthru; + + ret = ms_acc->drv->init(ms_acc); + + zassert_equal(timeout_test_status_reg_access_count, 15, + "Expected %d attempts but counted %d", 15, + timeout_test_status_reg_access_count); + zassert_equal(ret, EC_ERROR_INVALID_CONFIG, "Expected %d but got %d", + EC_ERROR_INVALID_CONFIG, ret); +} + void test_suite_bmi260(void) { ztest_test_suite(bmi260, @@ -1912,6 +2192,15 @@ void test_suite_bmi260(void) ztest_user_unit_test(test_bmi_init), ztest_user_unit_test(test_bmi_acc_fifo), ztest_user_unit_test(test_bmi_gyr_fifo), - ztest_user_unit_test(test_unsupported_configs)); + ztest_user_unit_test(test_unsupported_configs), + ztest_user_unit_test(test_interrupt_handler), + ztest_user_unit_test(test_bmi_init_chip_id), + ztest_user_unit_test( + test_bmi_config_load_no_mapped_flash), + ztest_user_unit_test( + test_bmi_config_unsupported_chip), + ztest_user_unit_test( + test_init_config_read_failure), + ztest_user_unit_test(test_init_config_status_timeout)); ztest_run_test_suite(bmi260); } diff --git a/zephyr/test/drivers/src/cros_cbi.c b/zephyr/test/drivers/src/cros_cbi.c index dde215f6a1..ee3666f3f0 100644 --- a/zephyr/test/drivers/src/cros_cbi.c +++ b/zephyr/test/drivers/src/cros_cbi.c @@ -27,8 +27,22 @@ static void test_check_match(void) zassert_false(value, "Expected cbi ssfc to fail on invalid enum"); } +static void test_fail_check_match(void) +{ + const struct device *dev = device_get_binding(CROS_CBI_LABEL); + int value; + + zassert_not_null(dev, NULL); + + value = cros_cbi_ssfc_check_match(dev, CBI_SSFC_VALUE_COUNT); + zassert_false(value, + "Expected cbi ssfc to never match CBI_SSFC_VALUE_COUNT"); +} + void test_suite_cros_cbi(void) { - ztest_test_suite(cros_cbi, ztest_unit_test(test_check_match)); + ztest_test_suite(cros_cbi, + ztest_unit_test(test_check_match), + ztest_unit_test(test_fail_check_match)); ztest_run_test_suite(cros_cbi); } diff --git a/zephyr/test/drivers/src/ln9310.c b/zephyr/test/drivers/src/ln9310.c index 323e2dc31d..8ee397fb8a 100644 --- a/zephyr/test/drivers/src/ln9310.c +++ b/zephyr/test/drivers/src/ln9310.c @@ -12,6 +12,7 @@ #include "driver/ln9310.h" #include "emul/emul_ln9310.h" #include "emul/emul_common_i2c.h" +#include "timer.h" /* * TODO(b/201420132): Implement approach for tests to immediately schedule work @@ -43,7 +44,7 @@ static void test_ln9310_read_chip_fails(void) i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_BC_STS_C); - zassert_ok(!ln9310_init(), NULL); + zassert_true(ln9310_init() != 0, NULL); zassert_false(ln9310_emul_is_init(emulator), NULL); /* TODO(b/201420132) */ @@ -73,7 +74,7 @@ static void test_ln9310_2s_powers_up(void) k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); - ln9310_software_enable(1); + ln9310_software_enable(true); k_msleep(TEST_DELAY_MS); zassert_true(ln9310_power_good(), NULL); @@ -98,25 +99,34 @@ static void test_ln9310_3s_powers_up(void) k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); - ln9310_software_enable(1); + ln9310_software_enable(true); k_msleep(TEST_DELAY_MS); zassert_true(ln9310_power_good(), NULL); } -static bool startup_workaround_attempted; +struct startup_workaround_data { + bool startup_workaround_attempted; + bool startup_workaround_should_fail; +}; static int mock_write_fn_intercept_startup_workaround(struct i2c_emul *emul, int reg, uint8_t val, int bytes, void *data) { + struct startup_workaround_data *test_data = data; + uint8_t startup_workaround_val = (LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PRECHARGE_ON | LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PREDISCHARGE_ON); - startup_workaround_attempted = startup_workaround_attempted || - ((reg == LN9310_REG_TEST_MODE_CTRL) && - (val == startup_workaround_val)); + test_data->startup_workaround_attempted = + test_data->startup_workaround_attempted || + ((reg == LN9310_REG_TEST_MODE_CTRL) && + (val == startup_workaround_val)); + + if (test_data->startup_workaround_should_fail) + return -1; return 1; } @@ -128,6 +138,11 @@ static void test_ln9310_2s_cfly_precharge_startup(void) struct i2c_emul *emul = ln9310_emul_get_i2c_emul(emulator); + struct startup_workaround_data test_data = { + .startup_workaround_attempted = false, + .startup_workaround_should_fail = false, + }; + zassert_not_null(emulator, NULL); ln9310_emul_set_context(emulator); @@ -144,20 +159,22 @@ static void test_ln9310_2s_cfly_precharge_startup(void) zassert_false(ln9310_power_good(), NULL); i2c_common_emul_set_write_func( - emul, &mock_write_fn_intercept_startup_workaround, NULL); + emul, mock_write_fn_intercept_startup_workaround, &test_data); - ln9310_software_enable(1); - zassert_true(startup_workaround_attempted, NULL); + ln9310_software_enable(true); + zassert_true(test_data.startup_workaround_attempted, NULL); /* TODO(b/201420132) */ k_msleep(TEST_DELAY_MS); zassert_true(ln9310_power_good(), NULL); - ln9310_software_enable(0); + ln9310_software_enable(false); /* TODO(b/201420132) */ k_msleep(TEST_DELAY_MS); zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_write_func(emul, NULL, NULL); } static void test_ln9310_3s_cfly_precharge_startup(void) @@ -166,6 +183,11 @@ static void test_ln9310_3s_cfly_precharge_startup(void) emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); struct i2c_emul *emul = ln9310_emul_get_i2c_emul(emulator); + struct startup_workaround_data test_data = { + .startup_workaround_attempted = false, + .startup_workaround_should_fail = false, + }; + zassert_not_null(emulator, NULL); ln9310_emul_set_context(emulator); @@ -182,32 +204,516 @@ static void test_ln9310_3s_cfly_precharge_startup(void) zassert_false(ln9310_power_good(), NULL); i2c_common_emul_set_write_func( - emul, &mock_write_fn_intercept_startup_workaround, NULL); + emul, mock_write_fn_intercept_startup_workaround, &test_data); + + ln9310_software_enable(true); + zassert_true(test_data.startup_workaround_attempted, NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_true(ln9310_power_good(), NULL); + + ln9310_software_enable(false); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_write_func(emul, NULL, NULL); +} + +static void test_ln9310_cfly_precharge_exceeds_retries(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + + struct i2c_emul *emul = ln9310_emul_get_i2c_emul(emulator); + + struct startup_workaround_data test_data = { + .startup_workaround_attempted = false, + .startup_workaround_should_fail = true, + }; + + zassert_not_null(emulator, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* + * Battery and chip rev won't matter for statement + * coverage here so only testing one pair. + */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, + REQUIRES_CFLY_PRECHARGE_STARTUP_CHIP_REV); + + zassert_ok(ln9310_init(), NULL); + zassert_true(ln9310_emul_is_init(emulator), NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_write_func( + emul, mock_write_fn_intercept_startup_workaround, &test_data); + + ln9310_software_enable(true); + zassert_true(test_data.startup_workaround_attempted, NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_write_func(emul, NULL, NULL); +} + +static void test_ln9310_battery_unknown(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + + zassert_not_null(emulator, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* + * Chip rev won't matter for statement + * cov so only testing one version. + */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_UNKNOWN); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + zassert_true(ln9310_init() != 0, NULL); + zassert_false(ln9310_emul_is_init(emulator), NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + ln9310_software_enable(true); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); +} + +static void test_ln9310_2s_battery_read_fails(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_BC_STS_B); + + zassert_true(ln9310_init() != 0, NULL); + zassert_false(ln9310_emul_is_init(emulator), NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + /* For Battery 2S Versions: Test Read Battery Voltage Failure Too */ + ln9310_emul_reset(emulator); + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_TRACK_CTRL); + + zassert_false(ln9310_init() == 0, NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); +} + +static void test_ln9310_lion_ctrl_reg_fails(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery won't matter here so only testing one version */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + i2c_common_emul_set_read_fail_reg(i2c_emul, LN9310_REG_LION_CTRL); + + zassert_true(ln9310_init() != 0, NULL); + zassert_false(ln9310_emul_is_init(emulator), NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + ln9310_software_enable(true); + zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); +} + + +struct precharge_timeout_data { + timestamp_t time_to_mock; + bool handled_clearing_standby_en_bit_timeout; +}; + +static int mock_intercept_startup_ctrl_reg(struct i2c_emul *emul, int reg, + uint8_t val, int bytes, void *data) +{ + struct precharge_timeout_data *test_data = data; + + if (reg == LN9310_REG_STARTUP_CTRL && + test_data->handled_clearing_standby_en_bit_timeout == false) { + if (val == 0) { + timestamp_t time = get_time(); + + time.val += 1 + LN9310_CFLY_PRECHARGE_TIMEOUT; + test_data->time_to_mock = time; + get_time_mock = &test_data->time_to_mock; + } else { + /* ln9310 aborts a startup attempt */ + test_data->handled_clearing_standby_en_bit_timeout = + true; + get_time_mock = NULL; + } + } + return 1; +} + +static void test_ln9310_cfly_precharge_timesout(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + struct precharge_timeout_data test_data = { + .time_to_mock = { + .val = -1, + .le = { + .lo = -1, + .hi = -1, + }, + }, + .handled_clearing_standby_en_bit_timeout = false, + }; + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery and chip rev won't matter here so only testing one pair */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, + REQUIRES_CFLY_PRECHARGE_STARTUP_CHIP_REV); + + zassert_ok(ln9310_init(), NULL); + zassert_true(ln9310_emul_is_init(emulator), NULL); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_write_func( + i2c_emul, mock_intercept_startup_ctrl_reg, &test_data); + + ln9310_software_enable(true); + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_true(test_data.handled_clearing_standby_en_bit_timeout, NULL); + /* It only times out on one attempt, it should subsequently startup */ + zassert_true(ln9310_power_good(), NULL); + + i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); +} + +struct reg_to_fail_data { + int reg_access_to_fail; + int reg_access_fail_countdown; +}; + +static int mock_read_intercept_reg_to_fail(struct i2c_emul *emul, int reg, + uint8_t *val, int bytes, void *data) +{ + struct reg_to_fail_data *test_data = data; + + if (reg == test_data->reg_access_to_fail) { + test_data->reg_access_fail_countdown--; + if (test_data->reg_access_fail_countdown <= 0) + return -1; + } + return 1; +} + +static void test_ln9310_interrupt_reg_fail(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + struct reg_to_fail_data test_data = { + .reg_access_to_fail = 0, + .reg_access_fail_countdown = 0, + }; + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery and chip rev won't matter here so only testing one pair */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + zassert_ok(ln9310_init(), NULL); + zassert_true(ln9310_emul_is_init(emulator), NULL); + + i2c_common_emul_set_read_func( + i2c_emul, mock_read_intercept_reg_to_fail, &test_data); + + /* Fail in beginning of software enable */ + test_data.reg_access_to_fail = LN9310_REG_INT1; + test_data.reg_access_fail_countdown = 1; + + ln9310_software_enable(true); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); + + /* Fail in irq interrupt handler */ + test_data.reg_access_fail_countdown = 2; + + ln9310_software_enable(true); + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); + + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); +} + +static void test_ln9310_sys_sts_reg_fail(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + struct reg_to_fail_data test_data = { + .reg_access_to_fail = 0, + .reg_access_fail_countdown = 0, + }; + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery and chip rev won't matter here so only testing one pair */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + zassert_ok(ln9310_init(), NULL); + zassert_true(ln9310_emul_is_init(emulator), NULL); + + i2c_common_emul_set_read_func( + i2c_emul, &mock_read_intercept_reg_to_fail, &test_data); + + /* Register only read once and in the interrupt handler */ + test_data.reg_access_to_fail = LN9310_REG_SYS_STS; + test_data.reg_access_fail_countdown = 1; ln9310_software_enable(1); - zassert_true(startup_workaround_attempted, NULL); /* TODO(b/201420132) */ k_msleep(TEST_DELAY_MS); + + zassert_false(ln9310_power_good(), NULL); + zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); + + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); +} + +struct reg_to_intercept { + int reg; + uint8_t replace_val; +}; + +static int mock_read_interceptor(struct i2c_emul *emul, int reg, uint8_t *val, + int bytes, void *data) +{ + struct reg_to_intercept *test_data = data; + + if (test_data->reg == reg) + return test_data->replace_val; + + return 1; +} + +static void test_ln9310_reset_explicit_detected_startup(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + struct reg_to_intercept test_data = { + .reg = LN9310_REG_LION_CTRL, + .replace_val = 0, + }; + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery and chip rev won't matter here so only testing one pair */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + zassert_ok(ln9310_init(), NULL); + zassert_true(ln9310_emul_is_init(emulator), NULL); + + i2c_common_emul_set_read_func(i2c_emul, &mock_read_interceptor, + &test_data); + + ln9310_software_enable(true); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + zassert_true(ln9310_power_good(), NULL); - ln9310_software_enable(0); + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); +} + +static void test_ln9310_update_startup_seq_fails(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + struct reg_to_fail_data test_data = { + .reg_access_to_fail = LN9310_REG_CFG_4, + .reg_access_fail_countdown = 1, + }; + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery won't matter here so only testing one pair */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + /* Requires older version of chip */ + ln9310_emul_set_version(emulator, + REQUIRES_CFLY_PRECHARGE_STARTUP_CHIP_REV); + + i2c_common_emul_set_read_func( + i2c_emul, &mock_read_intercept_reg_to_fail, &test_data); + + zassert_false(ln9310_init() == 0, NULL); + zassert_false(ln9310_emul_is_init(emulator), NULL); + + ln9310_software_enable(true); /* TODO(b/201420132) */ k_msleep(TEST_DELAY_MS); + zassert_false(ln9310_power_good(), NULL); + zassert_true(test_data.reg_access_fail_countdown <= 0, NULL); + + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); +} + +static void test_ln9310_state_change_only_on_mode_change_interrupt(void) +{ + const struct emul *emulator = + emul_get_binding(DT_LABEL(DT_NODELABEL(ln9310))); + struct i2c_emul *i2c_emul = ln9310_emul_get_i2c_emul(emulator); + struct reg_to_intercept test_data = { + .reg = LN9310_REG_INT1, + .replace_val = 0, + }; + + zassert_not_null(emulator, NULL); + zassert_not_null(i2c_emul, NULL); + + ln9310_emul_set_context(emulator); + ln9310_emul_reset(emulator); + /* Battery and chip rev won't matter here so only testing one pair */ + ln9310_emul_set_battery_cell_type(emulator, BATTERY_CELL_TYPE_2S); + ln9310_emul_set_version(emulator, LN9310_BC_STS_C_CHIP_REV_FIXED); + + zassert_ok(ln9310_init(), NULL); + zassert_true(ln9310_emul_is_init(emulator), NULL); + + i2c_common_emul_set_read_func(i2c_emul, &mock_read_interceptor, + &test_data); + + ln9310_software_enable(true); + + /* TODO(b/201420132) */ + k_msleep(TEST_DELAY_MS); + + zassert_false(ln9310_power_good(), NULL); + + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); } static void reset_ln9310_state(void) { ln9310_reset_to_initial_state(); - startup_workaround_attempted = false; + get_time_mock = NULL; } void test_suite_ln9310(void) { ztest_test_suite( ln9310, + ztest_unit_test_setup_teardown( + test_ln9310_state_change_only_on_mode_change_interrupt, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown( + test_ln9310_update_startup_seq_fails, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown( + test_ln9310_reset_explicit_detected_startup, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown( + test_ln9310_sys_sts_reg_fail, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown( + test_ln9310_interrupt_reg_fail, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown( + test_ln9310_cfly_precharge_timesout, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown(test_ln9310_lion_ctrl_reg_fails, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown( + test_ln9310_2s_battery_read_fails, + reset_ln9310_state, + reset_ln9310_state), + ztest_unit_test_setup_teardown(test_ln9310_battery_unknown, + reset_ln9310_state, + reset_ln9310_state), ztest_unit_test_setup_teardown(test_ln9310_read_chip_fails, reset_ln9310_state, reset_ln9310_state), @@ -218,6 +724,9 @@ void test_suite_ln9310(void) reset_ln9310_state, reset_ln9310_state), ztest_unit_test_setup_teardown( + test_ln9310_cfly_precharge_exceeds_retries, + reset_ln9310_state, reset_ln9310_state), + ztest_unit_test_setup_teardown( test_ln9310_2s_cfly_precharge_startup, reset_ln9310_state, reset_ln9310_state), ztest_unit_test_setup_teardown( diff --git a/zephyr/test/drivers/src/main.c b/zephyr/test/drivers/src/main.c index ee82140ca6..05fe12c8fc 100644 --- a/zephyr/test/drivers/src/main.c +++ b/zephyr/test/drivers/src/main.c @@ -29,6 +29,7 @@ extern void test_suite_ppc_syv682c(void); extern void test_suite_ppc_sn5s330(void); extern void test_suite_cros_cbi(void); extern void test_suite_tcpci(void); +extern void test_suite_ps8xxx(void); void test_main(void) { @@ -59,4 +60,5 @@ void test_main(void) test_suite_ppc_syv682c(); test_suite_cros_cbi(); test_suite_tcpci(); + test_suite_ps8xxx(); } diff --git a/zephyr/test/drivers/src/ppc.c b/zephyr/test/drivers/src/ppc.c index d8d5550f56..505859a05d 100644 --- a/zephyr/test/drivers/src/ppc.c +++ b/zephyr/test/drivers/src/ppc.c @@ -3,6 +3,9 @@ * found in the LICENSE file. */ +#include <device.h> +#include <devicetree/gpio.h> +#include <drivers/gpio/gpio_emul.h> #include <zephyr.h> #include <ztest.h> #include <ztest_assert.h> @@ -15,6 +18,8 @@ #include "usbc_ppc.h" #define SYV682X_ORD DT_DEP_ORD(DT_NODELABEL(syv682x_emul)) +#define GPIO_USB_C1_FRS_EN_PATH DT_PATH(named_gpios, usb_c1_frs_en) +#define GPIO_USB_C1_FRS_EN_PORT DT_GPIO_PIN(GPIO_USB_C1_FRS_EN_PATH, gpios) static const int syv682x_port = 1; @@ -46,21 +51,18 @@ static void test_ppc_syv682x_interrupt(void) uint8_t reg; /* An OC event less than 100 ms should not cause VBUS to turn off. */ - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_5V); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_5V, + SYV682X_CONTROL_4_NONE); msleep(50); - syv682x_interrupt(syv682x_port); zassert_true(ppc_is_sourcing_vbus(syv682x_port), "PPC is not sourcing VBUS after 50 ms OC"); /* But one greater than 100 ms should. */ - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ msleep(60); - syv682x_interrupt(syv682x_port); zassert_false(ppc_is_sourcing_vbus(syv682x_port), "PPC is sourcing VBUS after 100 ms OC"); - syv682x_emul_set_status(emul, 0x0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * TODO(b/190519131): Organize the tests to be more hermetic and avoid * the following issue: The driver triggers overcurrent protection. If @@ -76,24 +78,24 @@ static void test_ppc_syv682x_interrupt(void) */ zassert_ok(ppc_vbus_source_enable(syv682x_port, true), "Source enable failed"); - syv682x_emul_set_status(emul, SYV682X_STATUS_TSD); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_TSD, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_false(ppc_is_sourcing_vbus(syv682x_port), "PPC is sourcing power after TSD"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* An OVP event should cause the driver to disable the source path. */ zassert_ok(ppc_vbus_source_enable(syv682x_port, true), "Source enable failed"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OVP); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OVP, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_false(ppc_is_sourcing_vbus(syv682x_port), "PPC is sourcing power after OVP"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * A high-voltage OC while sinking should cause the driver to try to @@ -102,52 +104,45 @@ static void test_ppc_syv682x_interrupt(void) */ zassert_ok(ppc_vbus_sink_enable(syv682x_port, true), "Sink enable failed"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_HV); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_HV, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "Power path disabled after HV_OC handled"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_HV); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_HV, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, 0, "Power path disabled after HV_OC handled"); - syv682x_emul_set_status(emul, SYV682X_STATUS_OC_HV); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_OC_HV, + SYV682X_CONTROL_4_NONE); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_1_REG, ®), "Reading CONTROL_1 failed"); zassert_equal(reg & SYV682X_CONTROL_1_PWR_ENB, SYV682X_CONTROL_1_PWR_ENB, "Power path enabled after HV_OC handled 3 times"); - syv682x_emul_set_status(emul, 0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); /* * A VCONN OC event less than 100 ms should not cause the driver to turn * VCONN off. */ ppc_set_vconn(syv682x_port, true); - syv682x_emul_set_control_4(emul, SYV682X_CONTROL_4_VCONN_OCP); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_VCONN_OCP); msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), "VCONN disabled after initial VCONN OC"); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ msleep(50); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ - msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_true(reg & @@ -157,17 +152,101 @@ static void test_ppc_syv682x_interrupt(void) * But if the event keeps going for over 100 ms continuously, the driver * should turn VCONN off. */ - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ msleep(60); - syv682x_interrupt(syv682x_port); - /* TODO(b/201420132): Simulate passage of time instead of sleeping. */ - msleep(1); zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), "Reading CONTROL_4 failed"); zassert_false(reg & (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), "VCONN enabled after long VCONN OC"); - syv682x_emul_set_control_4(emul, 0x0); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); + + /* + * A VCONN over-voltage (VBAT_OVP) event will cause the device to + * disconnect CC and VCONN. The driver should then reinitialize the + * device, which will enable both CC lines but leave VCONN disabled. The + * driver should then run generic CC over-voltage handling. + */ + ppc_set_vconn(syv682x_port, true); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_VBAT_OVP); + msleep(1); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), + "Reading CONTROL_4 failed"); + zassert_true(reg & SYV682X_CONTROL_4_CC1_BPS, + "CC1 disabled after handling VBAT_OVP"); + zassert_true(reg & SYV682X_CONTROL_4_CC2_BPS, + "CC2 disabled after handling VBAT_OVP"); + zassert_false(reg & + (SYV682X_CONTROL_4_VCONN1 | SYV682X_CONTROL_4_VCONN2), + "VCONN enabled after handling VBAT_OVP"); + /* + * TODO(b/190519131): The PD stack should generate a Reset in response + * to a CC over-voltage event. There is currently no easy way to test + * that a Hard Reset occurred. + */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); +} + +static void test_ppc_syv682x_frs(void) +{ + struct i2c_emul *emul = syv682x_emul_get(SYV682X_ORD); + const struct device *gpio_dev = + DEVICE_DT_GET(DT_GPIO_CTLR(GPIO_USB_C1_FRS_EN_PATH, gpios)); + uint8_t reg; + + /* + * Enabling FRS should enable only the appropriate CC line based on + * polarity. Disabling FRS should enable both CC lines. + */ + ppc_vbus_sink_enable(syv682x_port, true); + zassert_false(ppc_is_sourcing_vbus(syv682x_port), + "PPC is sourcing VBUS after sink enabled"); + ppc_set_polarity(syv682x_port, 0 /* CC1 */); + ppc_set_frs_enable(syv682x_port, true); + zassert_equal(gpio_emul_output_get(gpio_dev, GPIO_USB_C1_FRS_EN_PORT), + 1, "FRS enabled, but FRS GPIO not asserted"); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), + "Reading CONTROL_4 failed"); + zassert_equal(reg & + (SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS), + SYV682X_CONTROL_4_CC1_BPS, + "FRS enabled with CC1 polarity, but CONTROL_4 is 0x%x", + reg); + ppc_set_frs_enable(syv682x_port, false); + zassert_equal(gpio_emul_output_get(gpio_dev, GPIO_USB_C1_FRS_EN_PORT), + 0, "FRS disabled, but FRS GPIO not deasserted"); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), + "Reading CONTROL_4 failed"); + zassert_equal(reg & + (SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS), + SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS, + "FRS enabled with CC1 polarity, but CONTROL_4 is 0x%x", + reg); + + ppc_set_polarity(syv682x_port, 1 /* CC2 */); + ppc_set_frs_enable(syv682x_port, true); + zassert_ok(syv682x_emul_get_reg(emul, SYV682X_CONTROL_4_REG, ®), + "Reading CONTROL_4 failed"); + zassert_equal(reg & + (SYV682X_CONTROL_4_CC1_BPS | SYV682X_CONTROL_4_CC2_BPS), + SYV682X_CONTROL_4_CC2_BPS, + "FRS enabled with CC2 polarity, but CONTROL_4 is 0x%x", + reg); + + /* + * An FRS event when the PPC is Sink should cause the PPC to switch from + * Sink to Source. + */ + syv682x_emul_set_condition(emul, SYV682X_STATUS_FRS, + SYV682X_CONTROL_4_NONE); + msleep(1); + zassert_true(ppc_is_sourcing_vbus(syv682x_port), + "PPC is not sourcing VBUS after FRS signal handled"); + syv682x_emul_set_condition(emul, SYV682X_STATUS_NONE, + SYV682X_CONTROL_4_NONE); + } static void test_ppc_syv682x(void) @@ -176,6 +255,7 @@ static void test_ppc_syv682x(void) test_ppc_syv682x_vbus_enable(); test_ppc_syv682x_interrupt(); + test_ppc_syv682x_frs(); } void test_suite_ppc(void) diff --git a/zephyr/test/drivers/src/ppc_sn5s330.c b/zephyr/test/drivers/src/ppc_sn5s330.c index f38376072a..aa06cf3bd9 100644 --- a/zephyr/test/drivers/src/ppc_sn5s330.c +++ b/zephyr/test/drivers/src/ppc_sn5s330.c @@ -18,6 +18,44 @@ #define SN5S330_PORT 0 #define EMUL emul_get_binding(DT_LABEL(DT_NODELABEL(sn5s330_emul))) +/* + * TODO(b/203364783): Exclude other threads from interacting with the emulator + * to avoid test flakiness + */ + +struct intercept_write_data { + int reg_to_intercept; + uint8_t val_intercepted; +}; + +struct intercept_read_data { + int reg_to_intercept; + bool replace_reg_val; + uint8_t replacement_val; +}; + +static int intercept_read_func(struct i2c_emul *emul, int reg, uint8_t *val, + int bytes, void *data) +{ + struct intercept_read_data *test_data = data; + + if (test_data->reg_to_intercept && test_data->replace_reg_val) + *val = test_data->replacement_val; + + return EC_SUCCESS; +} + +static int intercept_write_func(struct i2c_emul *emul, int reg, uint8_t val, + int bytes, void *data) +{ + struct intercept_write_data *test_data = data; + + if (test_data->reg_to_intercept == reg) + test_data->val_intercepted = val; + + return 1; +} + static int fail_until_write_func(struct i2c_emul *emul, int reg, uint8_t val, int bytes, void *data) { @@ -27,7 +65,7 @@ static int fail_until_write_func(struct i2c_emul *emul, int reg, uint8_t val, *count -= 1; return -EIO; } - return 0; + return 1; } static void test_fail_once_func_set1(void) @@ -38,11 +76,8 @@ static void test_fail_once_func_set1(void) uint32_t func_set1_value; i2c_common_emul_set_write_func(i2c_emul, fail_until_write_func, &count); - /* - * Call the init and ignore the return value, we're just checking that - * setting FUNC_SET1 retries at least once. - */ - sn5s330_drv.init(SN5S330_PORT); + + zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); zassert_equal(count, 0, NULL); zassert_ok(sn5s330_emul_peek_reg(emul, SN5S330_FUNC_SET1, &func_set1_value), @@ -51,10 +86,55 @@ static void test_fail_once_func_set1(void) i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); } +static void test_dead_battery_boot_force_pp2_fets_set(void) +{ + const struct emul *emul = EMUL; + struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(emul); + struct intercept_write_data test_write_data = { + .reg_to_intercept = SN5S330_FUNC_SET3, + .val_intercepted = 0, + }; + struct intercept_read_data test_read_data = { + .reg_to_intercept = SN5S330_INT_STATUS_REG4, + .replace_reg_val = true, + .replacement_val = SN5S330_DB_BOOT, + }; + + i2c_common_emul_set_write_func(i2c_emul, intercept_write_func, + &test_write_data); + i2c_common_emul_set_read_func(i2c_emul, intercept_read_func, + &test_read_data); + + zassert_ok(sn5s330_drv.init(SN5S330_PORT), NULL); + + /* + * Although the device enables PP2_FET on dead battery boot by setting + * the PP2_EN bit, the driver also force sets this bit during dead + * battery boot by writing that bit to the FUNC_SET3 reg. + * + * TODO(207034759): Verify need or remove redundant PP2 set. + */ + zassert_true(test_write_data.val_intercepted & SN5S330_PP2_EN, NULL); + zassert_false(sn5s330_drv.is_sourcing_vbus(SN5S330_PORT), NULL); +} + +static void reset_sn5s330_state(void) +{ + struct i2c_emul *i2c_emul = sn5s330_emul_to_i2c_emul(EMUL); + + i2c_common_emul_set_write_func(i2c_emul, NULL, NULL); + i2c_common_emul_set_read_func(i2c_emul, NULL, NULL); + sn5s330_emul_reset(EMUL); +} + void test_suite_ppc_sn5s330(void) { - ztest_test_suite( - ppc_sn5s330, - ztest_unit_test(test_fail_once_func_set1)); + ztest_test_suite(ppc_sn5s330, + ztest_unit_test_setup_teardown( + test_dead_battery_boot_force_pp2_fets_set, + reset_sn5s330_state, reset_sn5s330_state), + ztest_unit_test_setup_teardown( + test_fail_once_func_set1, reset_sn5s330_state, + reset_sn5s330_state)); ztest_run_test_suite(ppc_sn5s330); } diff --git a/zephyr/test/drivers/src/ps8xxx.c b/zephyr/test/drivers/src/ps8xxx.c new file mode 100644 index 0000000000..6f76ab2be0 --- /dev/null +++ b/zephyr/test/drivers/src/ps8xxx.c @@ -0,0 +1,1123 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr.h> +#include <ztest.h> + +#include "common.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_tcpci.h" +#include "emul/emul_ps8xxx.h" +#include "timer.h" +#include "i2c.h" +#include "stubs.h" +#include "tcpci_test_common.h" + +#include "tcpm/tcpci.h" +#include "driver/tcpm/ps8xxx.h" +#include "driver/tcpm/ps8xxx_public.h" + +#define PS8XXX_EMUL_LABEL DT_LABEL(DT_NODELABEL(ps8xxx_emul)) + +/** Test PS8xxx init fail conditions common for all PS8xxx devices */ +static void test_ps8xxx_init_fail(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + + /* Test fail on FW reg read */ + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, PS8XXX_REG_FW_REV); + zassert_equal(EC_ERROR_TIMEOUT, ps8xxx_tcpm_drv.init(USBC_PORT_C1), + NULL); + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on FW reg set to 0 */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x0); + zassert_equal(EC_ERROR_TIMEOUT, ps8xxx_tcpm_drv.init(USBC_PORT_C1), + NULL); + + /* Set arbitrary FW reg value != 0 for rest of the test */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + + /* Test fail on TCPCI init */ + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_UNINIT); + zassert_equal(EC_ERROR_TIMEOUT, ps8xxx_tcpm_drv.init(USBC_PORT_C1), + NULL); +} + +/** + * Test PS8805 init and indirectly ps8705_dci_disable which is + * used by PS8805 + */ +static void test_ps8805_init(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *p1_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + + /* Set arbitrary FW reg value != 0 for this test */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + /* Set correct power status for this test */ + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, 0x0); + + /* Test fail on read I2C debug reg */ + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + PS8XXX_REG_I2C_DEBUGGING_ENABLE); + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), + NULL); + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on read DCI reg */ + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + PS8XXX_P1_REG_MUX_USB_DCI_CFG); + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), + NULL); + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test successful init */ + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + check_tcpci_reg(tcpci_emul, PS8XXX_REG_I2C_DEBUGGING_ENABLE, + PS8XXX_REG_I2C_DEBUGGING_ENABLE_ON); + zassert_equal(PS8XXX_REG_MUX_USB_DCI_CFG_MODE_OFF, + ps8xxx_emul_get_dci_cfg(ps8xxx_emul) & + PS8XXX_REG_MUX_USB_DCI_CFG_MODE_MASK, NULL); +} + +/** Test PS8815 init */ +static void test_ps8815_init(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *p1_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); + + /* Set arbitrary FW reg value != 0 for this test */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x31); + /* Set correct power status for rest of the test */ + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_POWER_STATUS, 0x0); + + /* Test fail on reading HW revision register */ + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + PS8815_P1_REG_HW_REVISION); + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.init(USBC_PORT_C1), + NULL); + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test successful init */ + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); +} + +/** Test PS8xxx release */ +static void test_ps8xxx_release(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + uint64_t start_ms; + + /* Test successful release with correct FW reg read */ + start_ms = k_uptime_get(); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.release(USBC_PORT_C1), + NULL); + zassert_true(k_uptime_get() - start_ms < 10, + "release on correct FW reg read shouldn't wait for chip"); + + /* Test delay on FW reg read fail */ + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, PS8XXX_REG_FW_REV); + start_ms = k_uptime_get(); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.release(USBC_PORT_C1), + NULL); + zassert_true(k_uptime_get() - start_ms >= 10, + "release on FW reg read fail should wait for chip"); +} + +/** + * Check if PS8815 set_cc write correct value to ROLE_CTRL register and if + * PS8815 specific workaround is applied to RP_DETECT_CONTROL. + */ +static void check_ps8815_set_cc(enum tcpc_rp_value rp, enum tcpc_cc_pull cc, + uint16_t rp_detect_ctrl, const char *test_case) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + uint16_t reg_val, exp_role_ctrl; + + /* Clear RP detect register to see if it is set after test */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_RP_DETECT_CONTROL, 0); + + exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc); + + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.select_rp_value(USBC_PORT_C1, rp), + "Failed to set RP for case: %s", test_case); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.set_cc(USBC_PORT_C1, cc), + "Failed to set CC for case: %s", test_case); + + zassert_ok(tcpci_emul_get_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, ®_val), + "Failed tcpci_emul_get_reg() for case: %s", test_case); + zassert_equal(exp_role_ctrl, reg_val, + "0x%x != (role_ctrl = 0x%x) for case: %s", exp_role_ctrl, + reg_val, test_case); + zassert_ok(tcpci_emul_get_reg(tcpci_emul, PS8XXX_REG_RP_DETECT_CONTROL, + ®_val), + "Failed tcpci_emul_get_reg() for case: %s", test_case); + zassert_equal(rp_detect_ctrl, reg_val, + "0x%x != (rp detect = 0x%x) for case: %s", rp_detect_ctrl, + reg_val, test_case); +} + +/** Test PS8815 set cc and device specific workarounds */ +static void test_ps8815_set_cc(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + /* Set firmware version <= 0x10 to set "disable rp detect" workaround */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x8); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, RP_DETECT_DISABLE, + "fw rev 0x8 \"disable rp detect\" workaround"); + + /* First call to set_cc should disarm workaround */ + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, + "second call without workaround"); + + /* drp_toggle should rearm "disable rp detect" workaround */ + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), + NULL); + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, RP_DETECT_DISABLE, + "drp_toggle rearm workaround"); + + /* + * Set firmware version <= 0x10 to set "disable rp detect" workaround + * again + */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0xa); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + + /* CC RD shouldn't trigger "disable rp detect" workaround */ + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RD, 0, + "CC RD not trigger workaround"); + + /* + * Set firmware version > 0x10 to unset "disable rp detect" + * workaround + */ + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x12); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + + /* Firmware > 0x10 shouldn't trigger "disable rp detect" workaround */ + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, + "fw rev > 0x10 not trigger workaround"); + + /* + * Set hw revision 0x0a00 to enable workaround for b/171430855 (delay + * 1 ms on role control reg update) + */ + ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a00); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + + /* + * TODO(b/203858808): Find if it is possible to detect additional 1 ms + * delay + */ + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, + "delay on HW rev 0x0a00"); + + /* + * Set hw revision 0x0a01 to enable workaround for b/171430855 (delay + * 1 ms on role control reg update) + */ + ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a01); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, + "delay on HW rev 0x0a01"); + + /* + * Set other hw revision to disable workaround for b/171430855 (delay + * 1 ms on role control reg update) + */ + ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a02); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL); + check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0, + "no delay on other HW rev"); +} + +/** Test PS8xxx set vconn */ +static void test_ps8xxx_set_vconn(void) +{ + uint64_t start_ms; + + /* Test vconn enable */ + start_ms = k_uptime_get(); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.set_vconn(USBC_PORT_C1, 1), + NULL); + zassert_true(k_uptime_get() - start_ms < 10, + "VCONN enable should be without delay"); + + /* Test vconn disable */ + start_ms = k_uptime_get(); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.set_vconn(USBC_PORT_C1, 0), + NULL); + /* Delay for VCONN disable is required because of issue b/185202064 */ + zassert_true(k_uptime_get() - start_ms >= 10, + "VCONN disable require minimum 10ms delay"); +} + +/** Test PS8xxx transmitting message from TCPC */ +static void test_ps8xxx_transmit(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + struct tcpci_emul_msg *msg; + uint64_t exp_cnt, cnt; + uint16_t reg_val; + + msg = tcpci_emul_get_tx_msg(tcpci_emul); + + /* Test fail on transmitting BIST MODE 2 message */ + i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_TRANSMIT); + zassert_equal(EC_ERROR_INVAL, + ps8xxx_tcpm_drv.transmit(USBC_PORT_C1, + TCPCI_MSG_TX_BIST_MODE_2, 0, + NULL), NULL); + i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test sending BIST MODE 2 message */ + exp_cnt = PS8751_BIST_COUNTER; + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.transmit(USBC_PORT_C1, + TCPCI_MSG_TX_BIST_MODE_2, 0, + NULL), NULL); + check_tcpci_reg(tcpci_emul, PS8XXX_REG_BIST_CONT_MODE_CTR, 0); + zassert_equal(TCPCI_MSG_TX_BIST_MODE_2, msg->type, NULL); + + /* Check BIST counter value */ + zassert_ok(tcpci_emul_get_reg(tcpci_emul, + PS8XXX_REG_BIST_CONT_MODE_BYTE2, + ®_val), NULL); + cnt = reg_val; + cnt <<= 8; + zassert_ok(tcpci_emul_get_reg(tcpci_emul, + PS8XXX_REG_BIST_CONT_MODE_BYTE1, + ®_val), NULL); + cnt |= reg_val; + cnt <<= 8; + zassert_ok(tcpci_emul_get_reg(tcpci_emul, + PS8XXX_REG_BIST_CONT_MODE_BYTE0, + ®_val), NULL); + cnt |= reg_val; + zassert_equal(exp_cnt, cnt, "0x%llx != 0x%llx", exp_cnt, cnt); +} + +/** Test PS8805 and PS8815 drp toggle */ +static void test_ps88x5_drp_toggle(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + uint16_t exp_role_ctrl; + + /* Test fail on command write */ + i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_COMMAND); + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), + NULL); + + /* Test fail on role control write */ + i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_ROLE_CTRL); + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), + NULL); + i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on CC status read */ + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, TCPC_REG_CC_STATUS); + zassert_equal(EC_ERROR_INVAL, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), + NULL); + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Set CC status as snk, CC lines set arbitrary */ + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_CC_STATUS, + TCPC_REG_CC_STATUS_SET(1, TYPEC_CC_VOLT_OPEN, + TYPEC_CC_VOLT_RA)); + + /* + * TODO(b/203858808): PS8815 sleep here if specific FW rev. + * Find way to test 1 ms delay + */ + /* Test drp toggle when CC is snk. Role control CC lines should be RP */ + exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_DRP, TYPEC_RP_USB, + TYPEC_CC_RP, TYPEC_CC_RP); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), + NULL); + check_tcpci_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); + check_tcpci_reg(tcpci_emul, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_LOOK4CONNECTION); + + /* Set CC status as src, CC lines set arbitrary */ + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_CC_STATUS, + TCPC_REG_CC_STATUS_SET(0, TYPEC_CC_VOLT_OPEN, + TYPEC_CC_VOLT_RA)); + + /* Test drp toggle when CC is src. Role control CC lines should be RD */ + exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_DRP, TYPEC_RP_USB, + TYPEC_CC_RD, TYPEC_CC_RD); + zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1), + NULL); + check_tcpci_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); + check_tcpci_reg(tcpci_emul, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_LOOK4CONNECTION); +} + +/** Test PS8xxx get chip info code used by all PS8xxx devices */ +static void test_ps8xxx_get_chip_info(uint16_t current_product_id) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + struct ec_response_pd_chip_info_v1 info; + uint16_t vendor, product, device_id, fw_rev; + + /* Setup chip info */ + vendor = PS8XXX_VENDOR_ID; + /* Get currently used product ID */ + product = current_product_id; + /* Arbitrary choose device ID that doesn't require fixing */ + device_id = 0x2; + /* Arbitrary revision */ + fw_rev = 0x32; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_BCD_DEV, device_id); + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + + /* Test fail on reading FW revision */ + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, PS8XXX_REG_FW_REV); + zassert_equal(EC_ERROR_INVAL, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test reading chip info */ + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + zassert_equal(vendor, info.vendor_id, NULL); + zassert_equal(product, info.product_id, NULL); + zassert_equal(device_id, info.device_id, NULL); + zassert_equal(fw_rev, info.fw_version_number, NULL); + + /* Test fail on wrong vendor id */ + vendor = 0x0; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + zassert_equal(EC_ERROR_UNKNOWN, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + + /* Set correct vendor id */ + vendor = PS8XXX_VENDOR_ID; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + + /* Set firmware revision to 0 */ + fw_rev = 0x0; + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + + /* + * Test fail on firmware revision equals to 0 when getting chip info + * from live device + */ + zassert_equal(EC_ERROR_UNKNOWN, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + + /* + * Test if firmware revision 0 is accepted when getting chip info from + * not live device + */ + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 0, &info), + NULL); + zassert_equal(vendor, info.vendor_id, NULL); + zassert_equal(product, info.product_id, NULL); + zassert_equal(device_id, info.device_id, NULL); + zassert_equal(fw_rev, info.fw_version_number, NULL); + + /* Set wrong vendor id */ + vendor = 0; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + + /* Test fail on vendor id mismatch on live device */ + zassert_equal(EC_ERROR_UNKNOWN, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + + /* Test that vendor id is fixed on not live device */ + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 0, &info), + NULL); + zassert_equal(PS8XXX_VENDOR_ID, info.vendor_id, NULL); + zassert_equal(product, info.product_id, NULL); + zassert_equal(device_id, info.device_id, NULL); + zassert_equal(fw_rev, info.fw_version_number, NULL); + + /* Set correct vendor id */ + vendor = PS8XXX_VENDOR_ID; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + + /* Set wrong product id */ + product = 0; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); + + /* Test fail on product id mismatch on live device */ + zassert_equal(EC_ERROR_UNKNOWN, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + + /* Test that product id is fixed on not live device */ + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 0, &info), + NULL); + zassert_equal(vendor, info.vendor_id, NULL); + zassert_equal(board_get_ps8xxx_product_id(USBC_PORT_C1), + info.product_id, NULL); + zassert_equal(device_id, info.device_id, NULL); + zassert_equal(fw_rev, info.fw_version_number, NULL); +} + +static void test_ps8805_get_chip_info(void) +{ + test_ps8xxx_get_chip_info(PS8805_PRODUCT_ID); +} + +static void test_ps8815_get_chip_info(void) +{ + test_ps8xxx_get_chip_info(PS8815_PRODUCT_ID); +} + +/** Test PS8805 get chip info and indirectly ps8805_make_device_id */ +static void test_ps8805_get_chip_info_fix_dev_id(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *p0_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_0); + struct ec_response_pd_chip_info_v1 info; + uint16_t vendor, product, device_id, fw_rev; + uint16_t chip_rev; + + struct { + uint16_t exp_dev_id; + uint16_t chip_rev; + } test_param[] = { + /* Test A3 chip revision */ + { + .exp_dev_id = 0x2, + .chip_rev = 0xa0, + }, + /* Test A2 chip revision */ + { + .exp_dev_id = 0x1, + .chip_rev = 0x0, + }, + }; + + /* Setup chip info */ + vendor = PS8XXX_VENDOR_ID; + product = PS8805_PRODUCT_ID; + /* Arbitrary revision */ + fw_rev = 0x32; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + + /* Set device id which requires fixing */ + device_id = 0x1; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_BCD_DEV, device_id); + + /* Test error on fixing device id because of fail chip revision read */ + i2c_common_emul_set_read_fail_reg(p0_i2c_emul, + PS8805_P0_REG_CHIP_REVISION); + zassert_equal(EC_ERROR_INVAL, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + i2c_common_emul_set_read_fail_reg(p0_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Set wrong chip revision */ + chip_rev = 0x32; + ps8xxx_emul_set_chip_rev(ps8xxx_emul, chip_rev); + + /* Test error on fixing device id */ + zassert_equal(EC_ERROR_UNKNOWN, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + + /* Test fixing device id for specific chip revisions */ + for (int i = 0; i < ARRAY_SIZE(test_param); i++) { + ps8xxx_emul_set_chip_rev(ps8xxx_emul, test_param[i].chip_rev); + + /* Test correct device id after fixing */ + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, + &info), + "Failed to get chip info in test case %d (chip_rev 0x%x)", + i, test_param[i].chip_rev); + zassert_equal(vendor, info.vendor_id, + "0x%x != (vendor = 0x%x) in test case %d (chip_rev 0x%x)", + vendor, info.vendor_id, + i, test_param[i].chip_rev); + zassert_equal(product, info.product_id, + "0x%x != (product = 0x%x) in test case %d (chip_rev 0x%x)", + product, info.product_id, + i, test_param[i].chip_rev); + zassert_equal(test_param[i].exp_dev_id, info.device_id, + "0x%x != (device = 0x%x) in test case %d (chip_rev 0x%x)", + test_param[i].exp_dev_id, info.device_id, + i, test_param[i].chip_rev); + zassert_equal(fw_rev, info.fw_version_number, + "0x%x != (FW rev = 0x%x) in test case %d (chip_rev 0x%x)", + fw_rev, info.fw_version_number, + i, test_param[i].chip_rev); + } +} + +/** Test PS8815 get chip info and indirectly ps8815_make_device_id */ +static void test_ps8815_get_chip_info_fix_dev_id(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *p1_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); + struct ec_response_pd_chip_info_v1 info; + uint16_t vendor, product, device_id, fw_rev; + uint16_t hw_rev; + + struct { + uint16_t exp_dev_id; + uint16_t hw_rev; + } test_param[] = { + /* Test A0 HW revision */ + { + .exp_dev_id = 0x1, + .hw_rev = 0x0a00, + }, + /* Test A1 HW revision */ + { + .exp_dev_id = 0x2, + .hw_rev = 0x0a01, + }, + /* Test A2 HW revision */ + { + .exp_dev_id = 0x3, + .hw_rev = 0x0a02, + }, + }; + + /* Setup chip info */ + vendor = PS8XXX_VENDOR_ID; + product = PS8815_PRODUCT_ID; + /* Arbitrary revision */ + fw_rev = 0x32; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, fw_rev); + + /* Set device id which requires fixing */ + device_id = 0x1; + tcpci_emul_set_reg(tcpci_emul, TCPC_REG_BCD_DEV, device_id); + + /* Test error on fixing device id because of fail hw revision read */ + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + PS8815_P1_REG_HW_REVISION); + zassert_equal(EC_ERROR_INVAL, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Set wrong hw revision */ + hw_rev = 0x32; + ps8xxx_emul_set_hw_rev(ps8xxx_emul, hw_rev); + + /* Test error on fixing device id */ + zassert_equal(EC_ERROR_UNKNOWN, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, &info), + NULL); + + /* Test fixing device id for specific HW revisions */ + for (int i = 0; i < ARRAY_SIZE(test_param); i++) { + ps8xxx_emul_set_hw_rev(ps8xxx_emul, test_param[i].hw_rev); + + /* Test correct device id after fixing */ + zassert_equal(EC_SUCCESS, + ps8xxx_tcpm_drv.get_chip_info(USBC_PORT_C1, 1, + &info), + "Failed to get chip info in test case %d (hw_rev 0x%x)", + i, test_param[i].hw_rev); + zassert_equal(vendor, info.vendor_id, + "0x%x != (vendor = 0x%x) in test case %d (hw_rev 0x%x)", + vendor, info.vendor_id, i, test_param[i].hw_rev); + zassert_equal(product, info.product_id, + "0x%x != (product = 0x%x) in test case %d (hw_rev 0x%x)", + product, info.product_id, + i, test_param[i].hw_rev); + zassert_equal(test_param[i].exp_dev_id, info.device_id, + "0x%x != (device = 0x%x) in test case %d (hw_rev 0x%x)", + test_param[i].exp_dev_id, info.device_id, + i, test_param[i].hw_rev); + zassert_equal(fw_rev, info.fw_version_number, + "0x%x != (FW rev = 0x%x) in test case %d (hw_rev 0x%x)", + fw_rev, info.fw_version_number, + i, test_param[i].hw_rev); + } +} + +/** Test PS8805 get/set gpio */ +static void test_ps8805_gpio(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + struct i2c_emul *gpio_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_GPIO); + uint8_t exp_ctrl, gpio_ctrl; + int level; + + struct { + enum ps8805_gpio signal; + uint16_t gpio_reg; + int level; + } test_param[] = { + /* Chain of set and unset GPIO to test */ + { + .gpio_reg = PS8805_REG_GPIO_0, + .signal = PS8805_GPIO_0, + .level = 1, + }, + { + .gpio_reg = PS8805_REG_GPIO_1, + .signal = PS8805_GPIO_1, + .level = 1, + }, + { + .gpio_reg = PS8805_REG_GPIO_2, + .signal = PS8805_GPIO_2, + .level = 1, + }, + /* Test setting GPIO 0 which is already set */ + { + .gpio_reg = PS8805_REG_GPIO_0, + .signal = PS8805_GPIO_0, + .level = 1, + }, + /* Test clearing GPIOs */ + { + .gpio_reg = PS8805_REG_GPIO_0, + .signal = PS8805_GPIO_0, + .level = 0, + }, + { + .gpio_reg = PS8805_REG_GPIO_1, + .signal = PS8805_GPIO_1, + .level = 0, + }, + { + .gpio_reg = PS8805_REG_GPIO_2, + .signal = PS8805_GPIO_2, + .level = 0, + }, + /* Test clearing GPIO 0 which is already unset */ + { + .gpio_reg = PS8805_REG_GPIO_0, + .signal = PS8805_GPIO_0, + .level = 1, + }, + }; + + /* Setup fail on gpio control reg read */ + i2c_common_emul_set_read_fail_reg(gpio_i2c_emul, + PS8805_REG_GPIO_CONTROL); + + /* Test fail on reading gpio control reg */ + zassert_equal(EC_ERROR_INVAL, + ps8805_gpio_set_level(USBC_PORT_C1, PS8805_GPIO_0, 1), + NULL); + zassert_equal(EC_ERROR_INVAL, + ps8805_gpio_get_level(USBC_PORT_C1, PS8805_GPIO_0, + &level), NULL); + + /* Do not fail on gpio control reg read */ + i2c_common_emul_set_read_fail_reg(gpio_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on writing gpio control reg */ + i2c_common_emul_set_write_fail_reg(gpio_i2c_emul, + PS8805_REG_GPIO_CONTROL); + zassert_equal(EC_ERROR_INVAL, + ps8805_gpio_set_level(USBC_PORT_C1, PS8805_GPIO_0, 1), + NULL); + i2c_common_emul_set_write_fail_reg(gpio_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Clear gpio control reg */ + ps8xxx_emul_set_gpio_ctrl(ps8xxx_emul, 0x0); + exp_ctrl = 0; + + /* Test set and unset GPIO */ + for (int i = 0; i < ARRAY_SIZE(test_param); i++) { + if (test_param[i].level) { + exp_ctrl |= test_param[i].gpio_reg; + } else { + exp_ctrl &= ~test_param[i].gpio_reg; + } + zassert_equal(EC_SUCCESS, + ps8805_gpio_set_level(USBC_PORT_C1, + test_param[i].signal, + test_param[i].level), + "Failed gpio_set in test case %d (gpio %d, level %d)", + i, test_param[i].signal, test_param[i].level); + zassert_equal(EC_SUCCESS, + ps8805_gpio_get_level(USBC_PORT_C1, + test_param[i].signal, + &level), + "Failed gpio_get in test case %d (gpio %d, level %d)", + i, test_param[i].signal, test_param[i].level); + zassert_equal(test_param[i].level, level, + "%d != (gpio_get_level = %d) in test case %d (gpio %d, level %d)", + test_param[i].level, level, i, + test_param[i].signal, test_param[i].level); + gpio_ctrl = ps8xxx_emul_get_gpio_ctrl(ps8xxx_emul); + zassert_equal(exp_ctrl, gpio_ctrl, + "0x%x != (gpio_ctrl = 0x%x) in test case %d (gpio %d, level %d)", + exp_ctrl, gpio_ctrl, i, test_param[i].signal, + test_param[i].level); + } +} + +/** Test TCPCI init and vbus level */ +static void test_ps8xxx_tcpci_init(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_init(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI release */ +static void test_ps8xxx_tcpci_release(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_release(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI get cc */ +static void test_ps8xxx_tcpci_get_cc(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_get_cc(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI set cc */ +static void test_ps8xxx_tcpci_set_cc(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_set_cc(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI set polarity */ +static void test_ps8xxx_tcpci_set_polarity(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_set_polarity(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI set vconn */ +static void test_ps8xxx_tcpci_set_vconn(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_set_vconn(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI set msg header */ +static void test_ps8xxx_tcpci_set_msg_header(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_set_msg_header(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI get raw message */ +static void test_ps8xxx_tcpci_get_rx_message_raw(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_get_rx_message_raw(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI transmitting message */ +static void test_ps8xxx_tcpci_transmit(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_transmit(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI alert */ +static void test_ps8xxx_tcpci_alert(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_alert(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI alert RX message */ +static void test_ps8xxx_tcpci_alert_rx_message(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_alert_rx_message(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI enter low power mode */ +static void test_ps8xxx_tcpci_low_power_mode(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + /* + * PS8751/PS8815 has the auto sleep function that enters + * low power mode on its own in ~2 seconds. Other chips + * don't have it. Stub it out for PS8751/PS8815. + */ + if (board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8751_PRODUCT_ID || + board_get_ps8xxx_product_id(USBC_PORT_C1) == PS8815_PRODUCT_ID) + return; + test_tcpci_low_power_mode(tcpci_emul, USBC_PORT_C1); +} + +/** Test TCPCI set bist test mode */ +static void test_ps8xxx_tcpci_set_bist_mode(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + + test_tcpci_set_bist_mode(tcpci_emul, USBC_PORT_C1); +} + +/* Setup no fail for all I2C devices associated with PS8xxx emulator */ +static void setup_no_fail_all(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul); + struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul); + struct i2c_emul *p0_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_0); + struct i2c_emul *p1_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_1); + struct i2c_emul *gpio_i2c_emul = + ps8xxx_emul_get_i2c_emul(ps8xxx_emul, PS8XXX_EMUL_PORT_GPIO); + + i2c_common_emul_set_read_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + if (p0_i2c_emul != NULL) { + i2c_common_emul_set_read_fail_reg(p0_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(p0_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + } + + if (p1_i2c_emul != NULL) { + i2c_common_emul_set_read_fail_reg(p1_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(p1_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + } + + if (gpio_i2c_emul != NULL) { + i2c_common_emul_set_read_fail_reg(gpio_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + i2c_common_emul_set_write_fail_reg(gpio_i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + } +} + +/** + * Setup PS8xxx emulator to mimic PS8805 and setup no fail for all I2C devices + * associated with PS8xxx emulator + */ +static void setup_ps8805(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + + board_set_ps8xxx_product_id(PS8805_PRODUCT_ID); + ps8xxx_emul_set_product_id(ps8xxx_emul, PS8805_PRODUCT_ID); + setup_no_fail_all(); +} + +/** + * Setup PS8xxx emulator to mimic PS8815 and setup no fail for all I2C devices + * associated with PS8xxx emulator + */ +static void setup_ps8815(void) +{ + const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL); + + board_set_ps8xxx_product_id(PS8815_PRODUCT_ID); + ps8xxx_emul_set_product_id(ps8xxx_emul, PS8815_PRODUCT_ID); + setup_no_fail_all(); +} + +void test_suite_ps8xxx(void) +{ + ztest_test_suite(ps8805, + ztest_unit_test_setup_teardown(test_ps8xxx_init_fail, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8805_init, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_release, + setup_no_fail_all, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_set_vconn, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_transmit, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps88x5_drp_toggle, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8805_get_chip_info, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8805_get_chip_info_fix_dev_id, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8805_gpio, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_tcpci_init, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_release, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_get_cc, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_cc, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_polarity, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_vconn, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_msg_header, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_get_rx_message_raw, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_transmit, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_alert, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_alert_rx_message, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_low_power_mode, + setup_ps8805, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_bist_mode, + setup_ps8805, unit_test_noop)); + ztest_run_test_suite(ps8805); + + ztest_test_suite(ps8815, + ztest_unit_test_setup_teardown(test_ps8xxx_init_fail, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8815_init, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_release, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8815_set_cc, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_set_vconn, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_transmit, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps88x5_drp_toggle, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8815_get_chip_info, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8815_get_chip_info_fix_dev_id, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown(test_ps8xxx_tcpci_init, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_release, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_get_cc, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_cc, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_polarity, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_vconn, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_msg_header, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_get_rx_message_raw, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_transmit, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_alert, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_alert_rx_message, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_low_power_mode, + setup_ps8815, unit_test_noop), + ztest_unit_test_setup_teardown( + test_ps8xxx_tcpci_set_bist_mode, + setup_ps8815, unit_test_noop)); + ztest_run_test_suite(ps8815); +} diff --git a/zephyr/test/drivers/src/smart.c b/zephyr/test/drivers/src/smart.c index 7c053f1c23..57e02eeff9 100644 --- a/zephyr/test/drivers/src/smart.c +++ b/zephyr/test/drivers/src/smart.c @@ -5,6 +5,8 @@ #include <zephyr.h> #include <ztest.h> +#include <shell/shell.h> +#include <shell/shell_uart.h> #include "common.h" #include "i2c.h" @@ -35,15 +37,9 @@ static void test_battery_getters(void) zassert_equal(EC_SUCCESS, battery_state_of_charge_abs(&word), NULL); zassert_equal(expected, word, "%d != %d", expected, word); - zassert_equal(EC_SUCCESS, battery_remaining_capacity(&word), NULL); - zassert_equal(bat->cap, word, "%d != %d", bat->cap, word); - zassert_equal(EC_SUCCESS, battery_full_charge_capacity(&word), NULL); - zassert_equal(bat->full_cap, word, "%d != %d", bat->full_cap, word); zassert_equal(EC_SUCCESS, battery_cycle_count(&word), NULL); zassert_equal(bat->cycle_count, word, "%d != %d", bat->cycle_count, word); - zassert_equal(EC_SUCCESS, battery_design_capacity(&word), NULL); - zassert_equal(bat->design_cap, word, "%d != %d", bat->design_cap, word); zassert_equal(EC_SUCCESS, battery_design_voltage(&word), NULL); zassert_equal(bat->design_mv, word, "%d != %d", bat->design_mv, word); zassert_equal(EC_SUCCESS, battery_serial_number(&word), NULL); @@ -60,6 +56,8 @@ static void test_battery_getters(void) "%s != %s", block, bat->dev_chem); word = battery_get_avg_current(); zassert_equal(bat->avg_cur, word, "%d != %d", bat->avg_cur, word); + word = battery_get_avg_voltage(); + zassert_equal(bat->volt, word, "%d != %d", bat->volt, word); bat->avg_cur = 200; expected = (bat->full_cap - bat->cap) * 60 / bat->avg_cur; @@ -77,6 +75,44 @@ static void test_battery_getters(void) zassert_equal(expected, word, "%d != %d", expected, word); } +/** Test getting capacity. These functions should force mAh mode */ +static void test_battery_get_capacity(void) +{ + struct sbat_emul_bat_data *bat; + struct i2c_emul *emul; + int word; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(emul); + + /* Test fail when checking battery mode */ + i2c_common_emul_set_read_fail_reg(emul, SB_BATTERY_MODE); + zassert_equal(EC_ERROR_INVAL, battery_remaining_capacity(&word), NULL); + zassert_equal(EC_ERROR_INVAL, battery_full_charge_capacity(&word), + NULL); + zassert_equal(EC_ERROR_INVAL, battery_design_capacity(&word), NULL); + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test getting remaining capacity and if mAh mode is forced */ + bat->mode |= MODE_CAPACITY; + zassert_equal(EC_SUCCESS, battery_remaining_capacity(&word), NULL); + zassert_equal(bat->cap, word, "%d != %d", bat->cap, word); + zassert_false(bat->mode & MODE_CAPACITY, "mAh mode not forced"); + + /* Test getting full charge capacity and if mAh mode is forced */ + bat->mode |= MODE_CAPACITY; + zassert_equal(EC_SUCCESS, battery_full_charge_capacity(&word), NULL); + zassert_equal(bat->full_cap, word, "%d != %d", bat->full_cap, word); + zassert_false(bat->mode & MODE_CAPACITY, "mAh mode not forced"); + + /* Test getting design capacity and if mAh mode is forced */ + bat->mode |= MODE_CAPACITY; + zassert_equal(EC_SUCCESS, battery_design_capacity(&word), NULL); + zassert_equal(bat->design_cap, word, "%d != %d", bat->design_cap, word); + zassert_false(bat->mode & MODE_CAPACITY, "mAh mode not forced"); +} + + /** Test battery status */ static void test_battery_status(void) { @@ -155,6 +191,34 @@ static void test_battery_time_at_rate(void) emul = sbat_emul_get_ptr(BATTERY_ORD); bat = sbat_emul_get_bat_data(emul); + /* Test fail on rate 0 */ + rate = 0; + zassert_equal(EC_ERROR_INVAL, battery_time_at_rate(rate, &minutes), + NULL); + + /* 10mAh at rate 6000mA will be discharged in 6s */ + bat->cap = 10; + rate = -6000; + + /* Test fail on writing at rate register */ + i2c_common_emul_set_write_fail_reg(emul, SB_AT_RATE); + zassert_equal(EC_ERROR_INVAL, battery_time_at_rate(rate, &minutes), + NULL); + i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on reading at rate ok register */ + i2c_common_emul_set_read_fail_reg(emul, SB_AT_RATE_OK); + zassert_equal(EC_ERROR_INVAL, battery_time_at_rate(rate, &minutes), + NULL); + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* + * Expected discharging rate is less then 10s, + * so AtRateOk() register should return 0 + */ + zassert_equal(EC_ERROR_TIMEOUT, battery_time_at_rate(rate, &minutes), + NULL); + /* 3000mAh at rate 300mA will be discharged in 10h */ bat->cap = 3000; rate = -300; @@ -268,14 +332,244 @@ static void test_battery_get_params(void) zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); } +struct mfgacc_data { + int reg; + uint8_t *buf; + int len; +}; + +static int mfgacc_read_func(struct i2c_emul *emul, int reg, uint8_t *val, + int bytes, void *data) +{ + struct mfgacc_data *conf = data; + + if (bytes == 0 && conf->reg == reg) { + sbat_emul_set_response(emul, reg, conf->buf, conf->len, false); + } + + return 1; +} + +/** Test battery manufacturer access */ +static void test_battery_mfacc(void) +{ + struct sbat_emul_bat_data *bat; + struct mfgacc_data mfacc_conf; + struct i2c_emul *emul; + uint8_t recv_buf[10]; + uint8_t mf_data[10]; + uint16_t cmd; + int len; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(emul); + + /* Select arbitrary command number for the test */ + cmd = 0x1234; + + /* Test fail on to short receive buffer */ + len = 2; + zassert_equal(EC_ERROR_INVAL, + sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, + len), NULL); + + /* Set correct length for rest of the test */ + len = 10; + + /* Test fail on writing SB_MANUFACTURER_ACCESS register */ + i2c_common_emul_set_write_fail_reg(emul, SB_MANUFACTURER_ACCESS); + zassert_equal(EC_ERROR_INVAL, + sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, + len), NULL); + i2c_common_emul_set_write_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on reading manufacturer data (custom handler is not set) */ + zassert_equal(EC_ERROR_INVAL, + sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, + len), NULL); + + /* Set arbitrary manufacturer data */ + for (int i = 1; i < len; i++) { + mf_data[i] = i; + } + /* Set first byte of message as length */ + mf_data[0] = len; + + /* Setup custom handler */ + mfacc_conf.reg = SB_ALT_MANUFACTURER_ACCESS; + mfacc_conf.len = len; + mfacc_conf.buf = mf_data; + i2c_common_emul_set_read_func(emul, mfgacc_read_func, &mfacc_conf); + + /* Test error when mf_data doesn't start with command */ + zassert_equal(EC_ERROR_UNKNOWN, + sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, + len), NULL); + + /* Set beginning of the manufacturer data */ + mf_data[1] = cmd & 0xff; + mf_data[2] = (cmd >> 8) & 0xff; + + /* Test successful manufacturer data read */ + zassert_equal(EC_SUCCESS, + sb_read_mfgacc(cmd, SB_ALT_MANUFACTURER_ACCESS, recv_buf, + len), NULL); + /* Compare received data ignoring length byte */ + zassert_mem_equal(mf_data + 1, recv_buf, len - 1, NULL); + + /* Disable custom read function */ + i2c_common_emul_set_read_func(emul, NULL, NULL); +} + +/** Test battery fake charge level set and read */ +static void test_battery_fake_charge(void) +{ + struct sbat_emul_bat_data *bat; + struct batt_params batt; + struct i2c_emul *emul; + int remaining_cap; + int fake_charge; + int charge; + int flags; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(emul); + + /* Success on command with no argument */ + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "battfake"), NULL); + + /* Fail on command with argument which is not a number */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "battfake test"), NULL); + + /* Fail on command with charge level above 100% */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "battfake 123"), NULL); + + /* Fail on command with charge level below 0% */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "battfake -23"), NULL); + + /* Set fake charge level */ + fake_charge = 65; + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "battfake 65"), NULL); + + /* Test that fake charge level is applied */ + flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; + battery_get_params(&batt); + zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); + zassert_equal(fake_charge, batt.state_of_charge, "%d%% != %d%%", + fake_charge, batt.state_of_charge); + remaining_cap = bat->full_cap * fake_charge / 100; + zassert_equal(remaining_cap, batt.remaining_capacity, "%d != %d", + remaining_cap, batt.remaining_capacity); + + /* Test fake remaining capacity when full capacity is not available */ + i2c_common_emul_set_read_fail_reg(emul, SB_FULL_CHARGE_CAPACITY); + flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE | + BATT_FLAG_BAD_FULL_CAPACITY; + battery_get_params(&batt); + zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); + zassert_equal(fake_charge, batt.state_of_charge, "%d%% != %d%%", + fake_charge, batt.state_of_charge); + remaining_cap = bat->design_cap * fake_charge / 100; + zassert_equal(remaining_cap, batt.remaining_capacity, "%d != %d", + remaining_cap, batt.remaining_capacity); + i2c_common_emul_set_read_fail_reg(emul, I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Disable fake charge level */ + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "battfake -1"), NULL); + + /* Test that fake charge level is not applied */ + flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; + battery_get_params(&batt); + zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); + charge = 100 * bat->cap / bat->full_cap; + zassert_equal(charge, batt.state_of_charge, "%d%% != %d%%", + charge, batt.state_of_charge); + zassert_equal(bat->cap, batt.remaining_capacity, "%d != %d", + bat->cap, batt.remaining_capacity); +} + +/** Test battery fake temperature set and read */ +static void test_battery_fake_temperature(void) +{ + struct sbat_emul_bat_data *bat; + struct batt_params batt; + struct i2c_emul *emul; + int fake_temp; + int flags; + + emul = sbat_emul_get_ptr(BATTERY_ORD); + bat = sbat_emul_get_bat_data(emul); + + /* Success on command with no argument */ + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "batttempfake"), NULL); + + /* Fail on command with argument which is not a number */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "batttempfake test"), NULL); + + /* Fail on command with too high temperature (above 500.0 K) */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "batttempfake 5001"), NULL); + + /* Fail on command with too low temperature (below 0 K) */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "batttempfake -23"), NULL); + + /* Set fake temperature */ + fake_temp = 2840; + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "batttempfake 2840"), NULL); + + /* Test that fake temperature is applied */ + flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; + battery_get_params(&batt); + zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); + zassert_equal(fake_temp, batt.temperature, "%d != %d", + fake_temp, batt.temperature); + + /* Disable fake temperature */ + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "batttempfake -1"), NULL); + + /* Test that fake temperature is not applied */ + flags = BATT_FLAG_WANT_CHARGE | BATT_FLAG_RESPONSIVE; + battery_get_params(&batt); + zassert_equal(flags, batt.flags, "0x%x != 0x%x", flags, batt.flags); + zassert_equal(bat->temp, batt.temperature, "%d != %d", + bat->temp, batt.temperature); +} + void test_suite_smart_battery(void) { ztest_test_suite(smart_battery, ztest_user_unit_test(test_battery_getters), + ztest_user_unit_test(test_battery_get_capacity), ztest_user_unit_test(test_battery_status), ztest_user_unit_test(test_battery_wait_for_stable), ztest_user_unit_test(test_battery_manufacture_date), ztest_user_unit_test(test_battery_time_at_rate), - ztest_user_unit_test(test_battery_get_params)); + ztest_user_unit_test(test_battery_get_params), + ztest_user_unit_test(test_battery_mfacc), + ztest_user_unit_test(test_battery_fake_charge), + ztest_user_unit_test(test_battery_fake_temperature)); ztest_run_test_suite(smart_battery); } diff --git a/zephyr/test/drivers/src/stubs.c b/zephyr/test/drivers/src/stubs.c index 9b4604db5a..00c7322b42 100644 --- a/zephyr/test/drivers/src/stubs.c +++ b/zephyr/test/drivers/src/stubs.c @@ -11,14 +11,15 @@ #include "charger/isl923x_public.h" #include "charger/isl9241_public.h" #include "config.h" +#include "hooks.h" #include "i2c/i2c.h" #include "power.h" #include "ppc/sn5s330_public.h" #include "ppc/syv682x_public.h" #include "retimer/bb_retimer_public.h" #include "stubs.h" +#include "tcpm/ps8xxx_public.h" #include "tcpm/tcpci.h" -#include "tcpm/tusb422_public.h" #include "usb_mux.h" #include "usb_pd_tcpm.h" #include "usbc_ppc.h" @@ -130,19 +131,42 @@ struct tcpc_config_t tcpc_config[] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { .port = I2C_PORT_USB_C1, - .addr_flags = TUSB422_I2C_ADDR_FLAGS, + .addr_flags = DT_REG_ADDR(DT_NODELABEL( + tcpci_ps8xxx_emul)), }, - .drv = &tusb422_tcpm_drv, + .drv = &ps8xxx_tcpm_drv, }, }; BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); +static uint16_t ps8xxx_product_id = PS8805_PRODUCT_ID; + +uint16_t board_get_ps8xxx_product_id(int port) +{ + if (port != USBC_PORT_C1) { + return 0; + } + + return ps8xxx_product_id; +} + +void board_set_ps8xxx_product_id(uint16_t product_id) +{ + ps8xxx_product_id = product_id; +} + int board_is_sourcing_vbus(int port) { return 0; } +struct usb_mux usbc0_virtual_usb_mux = { + .usb_port = USBC_PORT_C0, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; + struct usb_mux usbc1_virtual_usb_mux = { .usb_port = USBC_PORT_C1, .driver = &virtual_usb_mux_driver, @@ -152,8 +176,10 @@ struct usb_mux usbc1_virtual_usb_mux = { struct usb_mux usb_muxes[] = { [USBC_PORT_C0] = { .usb_port = USBC_PORT_C0, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, + .driver = &tcpci_tcpm_usb_mux_driver, + .next_mux = &usbc0_virtual_usb_mux, + .i2c_port = I2C_PORT_USB_C0, + .i2c_addr_flags = DT_REG_ADDR(DT_NODELABEL(tcpci_emul)), }, [USBC_PORT_C1] = { .usb_port = USBC_PORT_C1, @@ -202,7 +228,7 @@ struct ppc_config_t ppc_chips[] = { [USBC_PORT_C1] = { .i2c_port = I2C_PORT_USB_C1, .i2c_addr_flags = SYV682X_ADDR1_FLAGS, - /* TODO(b/190519131): Add FRS GPIO, test FRS */ + .frs_en = GPIO_USB_C1_FRS_EN, .drv = &syv682x_drv, }, }; @@ -215,7 +241,23 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) uint16_t tcpc_get_alert_status(void) { - return 0; + uint16_t status = 0; + + /* + * Check which port has the ALERT line set and ignore if that TCPC has + * its reset line active. + */ + if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C0_TCPC_RST_L) != 0) + status |= PD_STATUS_TCPC_ALERT_0; + } + + if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C1_TCPC_RST_L) != 0) + status |= PD_STATUS_TCPC_ALERT_1; + } + + return status; } enum power_state power_chipset_init(void) @@ -236,7 +278,7 @@ enum power_state power_handle_state(enum power_state state) return mock_state; } -void chipset_reset(enum chipset_reset_reason reason) +void chipset_reset(enum chipset_shutdown_reason reason) { } @@ -246,3 +288,59 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) /* Power signals list. Must match order of enum power_signal. */ const struct power_signal_info power_signal_list[] = {}; + +void tcpc_alert_event(enum gpio_signal signal) +{ + int port; + + switch (signal) { + case GPIO_USB_C0_TCPC_INT_ODL: + port = 0; + break; + case GPIO_USB_C1_TCPC_INT_ODL: + port = 1; + break; + default: + return; + } + + schedule_deferred_pd_interrupt(port); +} + +void ppc_alert(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C1_PPC_INT_ODL: + syv682x_interrupt(USBC_PORT_C1); + break; + default: + return; + } +} + +/* TODO: This code should really be generic, and run based on something in + * the dts. + */ +static void usbc_interrupt_init(void) +{ + /* Enable TCPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + + cprints(CC_USB, "Resetting TCPCs..."); + cflush(); + + /* Reset generic TCPCI on port 0. */ + gpio_set_level(GPIO_USB_C0_TCPC_RST_L, 0); + msleep(1); + gpio_set_level(GPIO_USB_C0_TCPC_RST_L, 1); + + /* Reset PS8XXX on port 1. */ + gpio_set_level(GPIO_USB_C1_TCPC_RST_L, 0); + msleep(PS8XXX_RESET_DELAY_MS); + gpio_set_level(GPIO_USB_C1_TCPC_RST_L, 1); + + /* Enable PPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); +} +DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_INIT_I2C + 1); diff --git a/zephyr/test/drivers/src/tcpci.c b/zephyr/test/drivers/src/tcpci.c index ae0f66348a..d67680bacc 100644 --- a/zephyr/test/drivers/src/tcpci.c +++ b/zephyr/test/drivers/src/tcpci.c @@ -15,385 +15,492 @@ #include "hooks.h" #include "i2c.h" #include "stubs.h" +#include "tcpci_test_common.h" #include "tcpm/tcpci.h" #define EMUL_LABEL DT_NODELABEL(tcpci_emul) -/** Check TCPC register value */ -static void check_tcpci_reg_f(const struct emul *emul, int reg, - uint16_t exp_val, int line) +/** Test TCPCI init and vbus level */ +static void test_generic_tcpci_init(void) { - uint16_t reg_val; + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - zassert_ok(tcpci_emul_get_reg(emul, reg, ®_val), - "Failed tcpci_emul_get_reg(); line: %d", line); - zassert_equal(exp_val, reg_val, "Expected 0x%x, got 0x%x; line: %d", - exp_val, reg_val, line); + test_tcpci_init(emul, USBC_PORT_C0); } -#define check_tcpci_reg(emul, reg, exp_val) \ - check_tcpci_reg_f((emul), (reg), (exp_val), __LINE__) -/** Test TCPCI init and vbus level */ -static void test_tcpci_init(void) +/** Test TCPCI release */ +static void test_generic_tcpci_release(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_release(emul, USBC_PORT_C0); +} + +/** Test TCPCI get cc */ +static void test_generic_tcpci_get_cc(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_get_cc(emul, USBC_PORT_C0); +} + +/** Test TCPCI set cc */ +static void test_generic_tcpci_set_cc(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_set_cc(emul, USBC_PORT_C0); +} + +/** Test TCPCI set polarity */ +static void test_generic_tcpci_set_polarity(void) { const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - uint16_t exp_mask; - tcpc_config[USBC_PORT_C0].flags = TCPC_FLAGS_TCPCI_REV2_0 & - TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V; + test_tcpci_set_polarity(emul, USBC_PORT_C0); +} + +/** Test TCPCI set vconn */ +static void test_generic_tcpci_set_vconn(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_set_vconn(emul, USBC_PORT_C0); +} + +/** Test TCPCI set msg header */ +static void test_generic_tcpci_set_msg_header(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_set_msg_header(emul, USBC_PORT_C0); +} + +/** Test TCPCI rx and sop prime enable */ +static void test_generic_tcpci_set_rx_detect(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_set_rx_detect(emul, USBC_PORT_C0); +} + +/** Test TCPCI get raw message from TCPC revision 2.0 */ +static void test_generic_tcpci_get_rx_message_raw_rev2(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + tcpc_config[USBC_PORT_C0].flags = TCPC_FLAGS_TCPCI_REV2_0; tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); - /* Test fail on power status read */ - i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_POWER_STATUS); - zassert_equal(EC_ERROR_INVAL, tcpci_tcpm_init(USBC_PORT_C0), NULL); - i2c_common_emul_set_read_fail_reg(i2c_emul, - I2C_COMMON_EMUL_NO_FAIL_REG); + test_tcpci_get_rx_message_raw(emul, USBC_PORT_C0); +} - /* Test fail on uninitialised bit set */ - tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_UNINIT); - zassert_equal(EC_ERROR_TIMEOUT, tcpci_tcpm_init(USBC_PORT_C0), NULL); - - /* - * Set expected alert mask. It is used in test until vSafe0V tcpc - * config flag is revmoved. - */ - exp_mask = TCPC_REG_ALERT_TX_SUCCESS | TCPC_REG_ALERT_TX_FAILED | - TCPC_REG_ALERT_TX_DISCARDED | TCPC_REG_ALERT_RX_STATUS | - TCPC_REG_ALERT_RX_HARD_RST | TCPC_REG_ALERT_CC_STATUS | - TCPC_REG_ALERT_FAULT | TCPC_REG_ALERT_POWER_STATUS; - - /* Set TCPCI emulator VBUS to safe0v (disconnected) */ - tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, 0); +/** Test TCPCI get raw message from TCPC revision 1.0 */ +static void test_generic_tcpci_get_rx_message_raw_rev1(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - /* Test init with VBUS safe0v without vSafe0V tcpc config flag */ - zassert_equal(EC_SUCCESS, tcpci_tcpm_init(USBC_PORT_C0), NULL); - zassert_true(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_SAFE0V), - NULL); - zassert_false(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_PRESENT), - NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, - TCPC_REG_POWER_STATUS_VBUS_PRES); - check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + tcpc_config[USBC_PORT_C0].flags = 0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV1_0_VER1_0); - /* Set TCPCI emulator VBUS to present (connected, above 4V) */ - tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, - TCPC_REG_POWER_STATUS_VBUS_PRES); + test_tcpci_get_rx_message_raw(emul, USBC_PORT_C0); +} + +/** Test TCPCI transmitting message from TCPC revision 2.0 */ +static void test_generic_tcpci_transmit_rev2(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - /* Test init with VBUS present without vSafe0V tcpc config flag */ - zassert_equal(EC_SUCCESS, tcpci_tcpm_init(USBC_PORT_C0), NULL); - zassert_false(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_SAFE0V), - NULL); - zassert_true(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_PRESENT), - NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, - TCPC_REG_POWER_STATUS_VBUS_PRES); - check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); - - /* Disable vSafe0V tcpc config flag and update expected alert mask */ - exp_mask |= TCPC_REG_ALERT_EXT_STATUS; tcpc_config[USBC_PORT_C0].flags = TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); - /* Test init with VBUS present with vSafe0V tcpc config flag */ - zassert_equal(EC_SUCCESS, tcpci_tcpm_init(USBC_PORT_C0), NULL); - zassert_false(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_SAFE0V), - NULL); - zassert_true(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_PRESENT), - NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, - TCPC_REG_POWER_STATUS_VBUS_PRES); - check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + test_tcpci_transmit(emul, USBC_PORT_C0); +} - /* Set TCPCI emulator VBUS to safe0v (disconnected) */ - tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, 0); - tcpci_emul_set_reg(emul, TCPC_REG_EXT_STATUS, - TCPC_REG_EXT_STATUS_SAFE0V); +/** Test TCPCI transmitting message from TCPC revision 1.0 */ +static void test_generic_tcpci_transmit_rev1(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - /* Test init with VBUS safe0v with vSafe0V tcpc config flag */ - zassert_equal(EC_SUCCESS, tcpci_tcpm_init(USBC_PORT_C0), NULL); - zassert_true(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_SAFE0V), - NULL); - zassert_false(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_PRESENT), - NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, - TCPC_REG_POWER_STATUS_VBUS_PRES); - check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); - - /* - * Set TCPCI emulator VBUS to disconnected but not at vSafe0V - * (VBUS in 0.8V - 3.5V range) - */ - tcpci_emul_set_reg(emul, TCPC_REG_EXT_STATUS, 0); - - /* Test init with VBUS not safe0v with vSafe0V tcpc config flag */ - zassert_equal(EC_SUCCESS, tcpci_tcpm_init(USBC_PORT_C0), NULL); - zassert_false(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_SAFE0V), - NULL); - zassert_false(tcpci_tcpm_check_vbus_level(USBC_PORT_C0, VBUS_PRESENT), - NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, - TCPC_REG_POWER_STATUS_VBUS_PRES); - check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + tcpc_config[USBC_PORT_C0].flags = 0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV1_0_VER1_0); + + test_tcpci_transmit(emul, USBC_PORT_C0); } -/** Test TCPCI release */ -static void test_tcpci_release(void) +/** Test TCPCI alert */ +static void test_generic_tcpci_alert(void) { const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - tcpci_emul_set_reg(emul, TCPC_REG_ALERT, 0xffff); + test_tcpci_alert(emul, USBC_PORT_C0); +} - zassert_equal(EC_SUCCESS, tcpci_tcpm_release(USBC_PORT_C0), NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, 0); - check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, 0); - check_tcpci_reg(emul, TCPC_REG_ALERT, 0); + +/** Test TCPCI alert RX message */ +static void test_generic_tcpci_alert_rx_message(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_alert_rx_message(emul, USBC_PORT_C0); } -/** Test TCPCI get cc */ -static void test_tcpci_get_cc(void) +/** Test TCPCI auto discharge on disconnect */ +static void test_generic_tcpci_auto_discharge(void) { const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); - enum tcpc_cc_voltage_status cc1, cc2; - uint16_t cc_status, role_ctrl; - - struct { - /* TCPCI CC status register */ - enum tcpc_cc_voltage_status cc[2]; - bool connect_result; - /* TCPCI ROLE ctrl register */ - enum tcpc_cc_pull role_cc[2]; - enum tcpc_drp drp; - } test_param[] = { - /* Test DRP with open state */ - { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_OPEN}, - .connect_result = false, - .drp = TYPEC_DRP, - }, - /* Test DRP with cc1 open state, cc2 src RA */ - { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA}, - .connect_result = false, - .drp = TYPEC_DRP, - }, - /* Test DRP with cc1 src RA, cc2 src RD */ - { - .cc = {TYPEC_CC_VOLT_RA, TYPEC_CC_VOLT_RD}, - .connect_result = false, - .drp = TYPEC_DRP, - }, - /* Test DRP with cc1 snk open, cc2 snk default */ - { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RP_DEF}, - .connect_result = true, - .drp = TYPEC_DRP, - }, - /* Test DRP with cc1 snk 1.5, cc2 snk 3.0 */ - { - .cc = {TYPEC_CC_VOLT_RP_1_5, TYPEC_CC_VOLT_RP_3_0}, - .connect_result = true, - .drp = TYPEC_DRP, - }, - /* Test no DRP with cc1 src open, cc2 src RA */ - { - .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA}, - .connect_result = false, - .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RP, TYPEC_CC_RP}, - }, - /* Test no DRP with cc1 src RD, cc2 snk default */ - { - .cc = {TYPEC_CC_VOLT_RD, TYPEC_CC_VOLT_RP_DEF}, - .connect_result = false, - .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RP, TYPEC_CC_RD}, - }, - /* Test no DRP with cc1 snk default, cc2 snk open */ - { - .cc = {TYPEC_CC_VOLT_RP_DEF, TYPEC_CC_VOLT_OPEN}, - .connect_result = false, - .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RD, TYPEC_CC_RD}, - }, - /* Test no DRP with cc1 snk 3.0, cc2 snk 1.5 */ - { - .cc = {TYPEC_CC_VOLT_RP_3_0, TYPEC_CC_VOLT_RP_1_5}, - .connect_result = false, - .drp = TYPEC_NO_DRP, - .role_cc = {TYPEC_CC_RD, TYPEC_CC_RD}, - }, - }; - - for (int i = 0; i < ARRAY_SIZE(test_param); i++) { - role_ctrl = TCPC_REG_ROLE_CTRL_SET(test_param[i].drp, 0, - test_param[i].role_cc[0], - test_param[i].role_cc[1]); - /* If CC status is TYPEC_CC_VOLT_RP_*, then BIT(2) is ignored */ - cc_status = TCPC_REG_CC_STATUS_SET(test_param[i].connect_result, - test_param[i].cc[0], - test_param[i].cc[1]); - tcpci_emul_set_reg(emul, TCPC_REG_ROLE_CTRL, role_ctrl); - tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, cc_status); - zassert_equal(EC_SUCCESS, - tcpci_tcpm_get_cc(USBC_PORT_C0, &cc1, &cc2), - "Failed to get CC in test case %d (CC 0x%x, role 0x%x)", - i, cc_status, role_ctrl); - zassert_equal(test_param[i].cc[0], cc1, - "0x%x != (cc1 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", - test_param[i].cc[0], cc1, i, cc_status, - role_ctrl); - zassert_equal(test_param[i].cc[1], cc2, - "0x%x != (cc2 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", - test_param[i].cc[0], cc1, i, cc_status, - role_ctrl); - } + + test_tcpci_auto_discharge(emul, USBC_PORT_C0); } -/** Test TCPCI set cc */ -static void test_tcpci_set_cc(void) +/** Test TCPCI drp toggle */ +static void test_generic_tcpci_drp_toggle(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_drp_toggle(emul, USBC_PORT_C0); +} + +/** Test TCPCI get chip info */ +static void test_generic_tcpci_get_chip_info(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_get_chip_info(emul, USBC_PORT_C0); +} + +/** Test TCPCI enter low power mode */ +static void test_generic_tcpci_low_power_mode(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_low_power_mode(emul, USBC_PORT_C0); +} + +/** Test TCPCI set bist test mode */ +static void test_generic_tcpci_set_bist_mode(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + + test_tcpci_set_bist_mode(emul, USBC_PORT_C0); +} + +/** Test TCPCI discharge vbus */ +void test_generic_tcpci_discharge_vbus(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + uint8_t exp_ctrl, initial_ctrl; + + /* Set initial value for POWER ctrl register. Chosen arbitrary. */ + initial_ctrl = TCPC_REG_POWER_CTRL_VBUS_VOL_MONITOR_DIS | + TCPC_REG_POWER_CTRL_VOLT_ALARM_DIS; + tcpci_emul_set_reg(emul, TCPC_REG_POWER_CTRL, initial_ctrl); + + /* Test discharge enable */ + exp_ctrl = initial_ctrl | TCPC_REG_POWER_CTRL_FORCE_DISCHARGE; + tcpci_tcpc_discharge_vbus(USBC_PORT_C0, 1); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); + + /* Test discharge disable */ + exp_ctrl = initial_ctrl & ~TCPC_REG_POWER_CTRL_FORCE_DISCHARGE; + tcpci_tcpc_discharge_vbus(USBC_PORT_C0, 0); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); +} + +/** Test TCPC xfer */ +static void test_tcpc_xfer(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + uint16_t val, exp_val; + uint8_t reg; + + /* Set value to register (value and register chosen arbitrary) */ + exp_val = 0x7fff; + reg = TCPC_REG_ALERT_MASK; + tcpci_emul_set_reg(emul, reg, exp_val); + + /* Test reading value using tcpc_xfer() function */ + zassert_equal(EC_SUCCESS, + tcpc_xfer(USBC_PORT_C0, ®, 1, (uint8_t *)&val, 2), + NULL); + zassert_equal(exp_val, val, "0x%x != 0x%x", exp_val, val); +} + +/** Test TCPCI debug accessory enable/disable */ +static void test_generic_tcpci_debug_accessory(void) +{ + const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); + uint8_t exp_val, initial_val; + + /* Set initial value for STD output register. Chosen arbitrary. */ + initial_val = TCPC_REG_CONFIG_STD_OUTPUT_AUDIO_CONN_N | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB | + TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED | + TCPC_REG_CONFIG_STD_OUTPUT_DBG_ACC_CONN_N; + tcpci_emul_set_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, initial_val); + + /* Test debug accessory connect */ + exp_val = initial_val & ~TCPC_REG_CONFIG_STD_OUTPUT_DBG_ACC_CONN_N; + tcpci_tcpc_debug_accessory(USBC_PORT_C0, 1); + check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); + + /* Test debug accessory disconnect */ + exp_val = initial_val | TCPC_REG_CONFIG_STD_OUTPUT_DBG_ACC_CONN_N; + tcpci_tcpc_debug_accessory(USBC_PORT_C0, 0); + check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); +} + +/* Setup TCPCI usb mux to behave as it is used only for usb mux */ +static void set_usb_mux_not_tcpc(void) +{ + usb_muxes[USBC_PORT_C0].flags = USB_MUX_FLAG_NOT_TCPC; +} + +/* Setup TCPCI usb mux to behave as it is used for usb mux and TCPC */ +static void set_usb_mux_tcpc(void) +{ + usb_muxes[USBC_PORT_C0].flags = 0; +} + +/** Test TCPCI mux init */ +static void test_generic_tcpci_mux_init(void) { const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - enum tcpc_rp_value rp; - enum tcpc_cc_pull cc; + struct usb_mux *tcpci_usb_mux = &usb_muxes[USBC_PORT_C0]; - /* Test setting default RP and cc open */ - rp = TYPEC_RP_USB; - cc = TYPEC_CC_OPEN; - zassert_equal(EC_SUCCESS, tcpci_tcpm_select_rp_value(USBC_PORT_C0, rp), + /* Set as usb mux with TCPC for first init call */ + set_usb_mux_tcpc(); + + /* Make sure that TCPC is not accessed */ + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_FAIL_ALL_REG); + zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_cc(USBC_PORT_C0, cc), NULL); - check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, - TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); - /* Test error on failed role ctrl set */ - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ROLE_CTRL); - zassert_equal(EC_ERROR_INVAL, - tcpci_tcpm_set_cc(USBC_PORT_C0, TYPEC_CC_OPEN), NULL); + /* Set as only usb mux without TCPC for rest of the test */ + set_usb_mux_not_tcpc(); + + /* Test fail on power status read */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_POWER_STATUS); + zassert_equal(EC_ERROR_INVAL, tcpci_tcpm_mux_init(tcpci_usb_mux), + NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on uninitialised bit set */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_UNINIT); + zassert_equal(EC_ERROR_TIMEOUT, + tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); + + /* Set correct power status for rest of the test */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, 0); + + /* Test fail on alert mask write fail */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ALERT_MASK); + zassert_equal(EC_ERROR_UNKNOWN, + tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); + + /* Test fail on alert write fail */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ALERT); + zassert_equal(EC_ERROR_UNKNOWN, + tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); i2c_common_emul_set_write_fail_reg(i2c_emul, I2C_COMMON_EMUL_NO_FAIL_REG); - /* Test setting 1.5 RP and cc RD */ - rp = TYPEC_RP_1A5; - cc = TYPEC_CC_RD; - zassert_equal(EC_SUCCESS, tcpci_tcpm_select_rp_value(USBC_PORT_C0, rp), - NULL); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_cc(USBC_PORT_C0, cc), NULL); - check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, - TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); - - /* Test setting 3.0 RP and cc RP */ - rp = TYPEC_RP_3A0; - cc = TYPEC_CC_RP; - zassert_equal(EC_SUCCESS, tcpci_tcpm_select_rp_value(USBC_PORT_C0, rp), + /* Set arbitrary value to alert and alert mask registers */ + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, 0xffff); + tcpci_emul_set_reg(emul, TCPC_REG_ALERT_MASK, 0xffff); + + /* Test success init */ + zassert_equal(EC_SUCCESS, tcpci_tcpm_mux_init(tcpci_usb_mux), NULL); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_cc(USBC_PORT_C0, cc), NULL); - check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, - TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); - - /* - * Test setting 3.0 RP and cc RA. tcpci_tcpm_select_rp_value() is - * intentionally not called to check if selected rp is persistent. - */ - cc = TYPEC_CC_RA; - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_cc(USBC_PORT_C0, cc), NULL); - check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, - TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, 0); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0); } -/** Test TCPCI set polarity */ -static void test_tcpci_set_polarity(void) +/** Test TCPCI mux enter low power mode */ +static void test_generic_tcpci_mux_enter_low_power(void) { const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - uint8_t initial_ctrl; - uint8_t exp_ctrl; + struct usb_mux *tcpci_usb_mux = &usb_muxes[USBC_PORT_C0]; - /* Set initial value for TCPC ctrl register. Chosen arbitrary. */ - initial_ctrl = TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL | - TCPC_REG_TCPC_CTRL_BIST_TEST_MODE; - tcpci_emul_set_reg(emul, TCPC_REG_TCPC_CTRL, initial_ctrl); + /* Set as usb mux with TCPC for first enter_low_power call */ + set_usb_mux_tcpc(); + + /* Make sure that TCPC is not accessed */ + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_FAIL_ALL_REG); + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), + NULL); - /* Test error on failed polarity set */ - exp_ctrl = initial_ctrl; - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + /* Set as only usb mux without TCPC for rest of the test */ + set_usb_mux_not_tcpc(); + + /* Test error on failed command set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_COMMAND); zassert_equal(EC_ERROR_INVAL, - tcpci_tcpm_set_polarity(USBC_PORT_C0, POLARITY_CC2), + tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), NULL); i2c_common_emul_set_write_fail_reg(i2c_emul, I2C_COMMON_EMUL_NO_FAIL_REG); - check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); - - /* Test setting polarity CC2 */ - exp_ctrl = initial_ctrl | TCPC_REG_TCPC_CTRL_SET(1); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_polarity(USBC_PORT_C0, - POLARITY_CC2), NULL); - check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); - - /* Test setting polarity CC1 */ - exp_ctrl = initial_ctrl & ~TCPC_REG_TCPC_CTRL_SET(1); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_polarity(USBC_PORT_C0, - POLARITY_CC1), NULL); - check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); - - /* Test setting polarity CC2 DTS */ - exp_ctrl = initial_ctrl | TCPC_REG_TCPC_CTRL_SET(1); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_polarity(USBC_PORT_C0, - POLARITY_CC2_DTS), - NULL); - check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); - /* Test setting polarity CC1 DTS */ - exp_ctrl = initial_ctrl & ~TCPC_REG_TCPC_CTRL_SET(1); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_polarity(USBC_PORT_C0, - POLARITY_CC1_DTS), + /* Test correct command is issued */ + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_enter_low_power(tcpci_usb_mux), NULL); - check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + check_tcpci_reg(emul, TCPC_REG_COMMAND, TCPC_REG_COMMAND_I2CIDLE); } -/** Test TCPCI set vconn */ -static void test_tcpci_set_vconn(void) +/** Test TCPCI mux set and get */ +static void test_generic_tcpci_mux_set_get(void) { const struct emul *emul = emul_get_binding(DT_LABEL(EMUL_LABEL)); struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); - uint8_t initial_ctrl; - uint8_t exp_ctrl; + struct usb_mux *tcpci_usb_mux = &usb_muxes[USBC_PORT_C0]; + mux_state_t mux_state, mux_state_get; + uint16_t exp_val, initial_val; + bool ack; - /* Set initial value for POWER ctrl register. Chosen arbitrary. */ - initial_ctrl = TCPC_REG_POWER_CTRL_VBUS_VOL_MONITOR_DIS | - TCPC_REG_POWER_CTRL_FORCE_DISCHARGE; - tcpci_emul_set_reg(emul, TCPC_REG_POWER_CTRL, initial_ctrl); + mux_state = USB_PD_MUX_NONE; + + /* Test fail on standard output config register read */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_CONFIG_STD_OUTPUT); + zassert_equal(EC_ERROR_INVAL, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), + NULL); + zassert_equal(EC_ERROR_INVAL, + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), + NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); - /* Test error on failed vconn set */ - exp_ctrl = initial_ctrl; - i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_POWER_CTRL); - zassert_equal(EC_ERROR_INVAL, tcpci_tcpm_set_vconn(USBC_PORT_C0, 1), + /* Test fail on standard output config register write */ + i2c_common_emul_set_write_fail_reg(i2c_emul, + TCPC_REG_CONFIG_STD_OUTPUT); + zassert_equal(EC_ERROR_INVAL, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), NULL); i2c_common_emul_set_write_fail_reg(i2c_emul, I2C_COMMON_EMUL_NO_FAIL_REG); - check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); - /* Test vconn enable */ - exp_ctrl = initial_ctrl | TCPC_REG_POWER_CTRL_SET(1); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_vconn(USBC_PORT_C0, 1), NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); - - /* Test vconn disable */ - exp_ctrl = initial_ctrl & ~TCPC_REG_POWER_CTRL_SET(1); - zassert_equal(EC_SUCCESS, tcpci_tcpm_set_vconn(USBC_PORT_C0, 0), NULL); - check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); + /* Set initial value for STD output register. Chosen arbitrary. */ + initial_val = TCPC_REG_CONFIG_STD_OUTPUT_AUDIO_CONN_N | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB | + TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED | + TCPC_REG_CONFIG_STD_OUTPUT_DBG_ACC_CONN_N; + tcpci_emul_set_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, initial_val); + + /* Test setting/getting no MUX connection without polarity inverted */ + exp_val = (initial_val & ~TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK) | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_NONE; + exp_val &= ~TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; + mux_state = USB_PD_MUX_NONE; + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), + NULL); + check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); + zassert_false(ack, "Ack from host shouldn't be required"); + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), + NULL); + zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", + mux_state, mux_state_get); + + /* Test setting/getting MUX DP with polarity inverted */ + exp_val = (initial_val & ~TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK) | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_DP | + TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; + mux_state = USB_PD_MUX_DP_ENABLED | USB_PD_MUX_POLARITY_INVERTED; + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), + NULL); + check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); + zassert_false(ack, "Ack from host shouldn't be required"); + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), + NULL); + zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", + mux_state, mux_state_get); + + /* Test setting/getting MUX USB without polarity inverted */ + exp_val = (initial_val & ~TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK) | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB; + exp_val &= ~TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; + mux_state = USB_PD_MUX_USB_ENABLED; + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), + NULL); + check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); + zassert_false(ack, "Ack from host shouldn't be required"); + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), + NULL); + zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", + mux_state, mux_state_get); + + /* Test setting/getting MUX USB and DP with polarity inverted */ + exp_val = (initial_val & ~TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK) | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_DP | + TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB | + TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED; + mux_state = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | + USB_PD_MUX_POLARITY_INVERTED; + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_set(tcpci_usb_mux, mux_state, &ack), + NULL); + check_tcpci_reg(emul, TCPC_REG_CONFIG_STD_OUTPUT, exp_val); + zassert_false(ack, "Ack from host shouldn't be required"); + zassert_equal(EC_SUCCESS, + tcpci_tcpm_mux_get(tcpci_usb_mux, &mux_state_get), + NULL); + zassert_equal(mux_state, mux_state_get, "Expected state 0x%x, got 0x%x", + mux_state, mux_state_get); } void test_suite_tcpci(void) { + /* This test suite assumes that first usb mux for port C0 is TCPCI */ + __ASSERT(usb_muxes[USBC_PORT_C0].driver == &tcpci_tcpm_usb_mux_driver, + "Invalid config of usb_muxes in test/drivers/src/stubs.c"); + ztest_test_suite(tcpci, - ztest_user_unit_test(test_tcpci_init), - ztest_user_unit_test(test_tcpci_release), - ztest_user_unit_test(test_tcpci_get_cc), - ztest_user_unit_test(test_tcpci_set_cc), - ztest_user_unit_test(test_tcpci_set_polarity), - ztest_user_unit_test(test_tcpci_set_vconn)); + ztest_unit_test(test_generic_tcpci_init), + ztest_unit_test(test_generic_tcpci_release), + ztest_unit_test(test_generic_tcpci_get_cc), + ztest_unit_test(test_generic_tcpci_set_cc), + ztest_unit_test(test_generic_tcpci_set_polarity), + ztest_unit_test(test_generic_tcpci_set_vconn), + ztest_unit_test(test_generic_tcpci_set_msg_header), + ztest_unit_test(test_generic_tcpci_set_rx_detect), + ztest_unit_test( + test_generic_tcpci_get_rx_message_raw_rev2), + ztest_unit_test(test_generic_tcpci_transmit_rev2), + ztest_unit_test( + test_generic_tcpci_get_rx_message_raw_rev1), + ztest_unit_test(test_generic_tcpci_transmit_rev1), + ztest_unit_test(test_generic_tcpci_alert), + ztest_unit_test(test_generic_tcpci_alert_rx_message), + ztest_unit_test(test_generic_tcpci_auto_discharge), + ztest_unit_test(test_generic_tcpci_drp_toggle), + ztest_unit_test(test_generic_tcpci_get_chip_info), + ztest_unit_test(test_generic_tcpci_low_power_mode), + ztest_unit_test(test_generic_tcpci_set_bist_mode), + ztest_unit_test(test_generic_tcpci_discharge_vbus), + ztest_unit_test(test_tcpc_xfer), + ztest_unit_test(test_generic_tcpci_debug_accessory), + ztest_unit_test(test_generic_tcpci_mux_init), + ztest_unit_test( + test_generic_tcpci_mux_enter_low_power), + /* Test set/get with usb mux and without TCPC */ + ztest_unit_test_setup_teardown( + test_generic_tcpci_mux_set_get, + set_usb_mux_not_tcpc, set_usb_mux_tcpc), + /* Test set/get with usb mux and TCPC */ + ztest_unit_test(test_generic_tcpci_mux_set_get)); ztest_run_test_suite(tcpci); } diff --git a/zephyr/test/drivers/src/tcpci_test_common.c b/zephyr/test/drivers/src/tcpci_test_common.c new file mode 100644 index 0000000000..57cc35b89c --- /dev/null +++ b/zephyr/test/drivers/src/tcpci_test_common.c @@ -0,0 +1,964 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr.h> +#include <ztest.h> + +#include "common.h" +#include "emul/emul_common_i2c.h" +#include "emul/emul_tcpci.h" +#include "tcpci_test_common.h" + +#include "tcpm/tcpci.h" + +/** Check TCPC register value */ +void check_tcpci_reg_f(const struct emul *emul, int reg, uint16_t exp_val, + int line) +{ + uint16_t reg_val; + + zassert_ok(tcpci_emul_get_reg(emul, reg, ®_val), + "Failed tcpci_emul_get_reg(); line: %d", line); + zassert_equal(exp_val, reg_val, "Expected 0x%x, got 0x%x; line: %d", + exp_val, reg_val, line); +} + +/** Test TCPCI init and vbus level */ +void test_tcpci_init(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + uint16_t exp_mask; + + tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0 & + TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); + + /* Test fail on power status read */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_POWER_STATUS); + zassert_equal(EC_ERROR_INVAL, drv->init(port), NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test fail on uninitialised bit set */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_UNINIT); + zassert_equal(EC_ERROR_TIMEOUT, drv->init(port), NULL); + + /* + * Set expected alert mask. It is used in test until vSafe0V tcpc + * config flag is revmoved. + */ + exp_mask = TCPC_REG_ALERT_TX_SUCCESS | TCPC_REG_ALERT_TX_FAILED | + TCPC_REG_ALERT_TX_DISCARDED | TCPC_REG_ALERT_RX_STATUS | + TCPC_REG_ALERT_RX_HARD_RST | TCPC_REG_ALERT_CC_STATUS | + TCPC_REG_ALERT_FAULT | TCPC_REG_ALERT_POWER_STATUS; + + /* Set TCPCI emulator VBUS to safe0v (disconnected) */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, 0); + + /* Test init with VBUS safe0v without vSafe0V tcpc config flag */ + zassert_equal(EC_SUCCESS, drv->init(port), NULL); + zassert_true(drv->check_vbus_level(port, VBUS_SAFE0V), NULL); + zassert_false(drv->check_vbus_level(port, VBUS_PRESENT), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, + TCPC_REG_POWER_STATUS_VBUS_PRES); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + + /* Set TCPCI emulator VBUS to present (connected, above 4V) */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, + TCPC_REG_POWER_STATUS_VBUS_PRES); + + /* Test init with VBUS present without vSafe0V tcpc config flag */ + zassert_equal(EC_SUCCESS, drv->init(port), NULL); + zassert_false(drv->check_vbus_level(port, VBUS_SAFE0V), NULL); + zassert_true(drv->check_vbus_level(port, VBUS_PRESENT), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, + TCPC_REG_POWER_STATUS_VBUS_PRES); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + + /* Disable vSafe0V tcpc config flag and update expected alert mask */ + exp_mask |= TCPC_REG_ALERT_EXT_STATUS; + tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; + + /* Test init with VBUS present with vSafe0V tcpc config flag */ + zassert_equal(EC_SUCCESS, drv->init(port), NULL); + zassert_false(drv->check_vbus_level(port, VBUS_SAFE0V), NULL); + zassert_true(drv->check_vbus_level(port, VBUS_PRESENT), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, + TCPC_REG_POWER_STATUS_VBUS_PRES); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + + /* Set TCPCI emulator VBUS to safe0v (disconnected) */ + tcpci_emul_set_reg(emul, TCPC_REG_POWER_STATUS, 0); + tcpci_emul_set_reg(emul, TCPC_REG_EXT_STATUS, + TCPC_REG_EXT_STATUS_SAFE0V); + + /* Test init with VBUS safe0v with vSafe0V tcpc config flag */ + zassert_equal(EC_SUCCESS, drv->init(port), NULL); + zassert_true(drv->check_vbus_level(port, VBUS_SAFE0V), NULL); + zassert_false(drv->check_vbus_level(port, VBUS_PRESENT), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, + TCPC_REG_POWER_STATUS_VBUS_PRES); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + + /* + * Set TCPCI emulator VBUS to disconnected but not at vSafe0V + * (VBUS in 0.8V - 3.5V range) + */ + tcpci_emul_set_reg(emul, TCPC_REG_EXT_STATUS, 0); + + /* Test init with VBUS not safe0v with vSafe0V tcpc config flag */ + zassert_equal(EC_SUCCESS, drv->init(port), NULL); + zassert_false(drv->check_vbus_level(port, VBUS_SAFE0V), NULL); + zassert_false(drv->check_vbus_level(port, VBUS_PRESENT), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, + TCPC_REG_POWER_STATUS_VBUS_PRES); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); +} + +/** Test TCPCI release */ +void test_tcpci_release(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, 0xffff); + + zassert_equal(EC_SUCCESS, drv->release(port), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_STATUS_MASK, 0); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, 0); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0); +} + +/** Test TCPCI get cc */ +void test_tcpci_get_cc(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + enum tcpc_cc_voltage_status cc1, cc2; + uint16_t cc_status, role_ctrl; + + struct { + /* TCPCI CC status register */ + enum tcpc_cc_voltage_status cc[2]; + bool connect_result; + /* TCPCI ROLE ctrl register */ + enum tcpc_cc_pull role_cc[2]; + enum tcpc_drp drp; + } test_param[] = { + /* Test DRP with open state */ + { + .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_OPEN}, + .connect_result = false, + .drp = TYPEC_DRP, + }, + /* Test DRP with cc1 open state, cc2 src RA */ + { + .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA}, + .connect_result = false, + .drp = TYPEC_DRP, + }, + /* Test DRP with cc1 src RA, cc2 src RD */ + { + .cc = {TYPEC_CC_VOLT_RA, TYPEC_CC_VOLT_RD}, + .connect_result = false, + .drp = TYPEC_DRP, + }, + /* Test DRP with cc1 snk open, cc2 snk default */ + { + .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RP_DEF}, + .connect_result = true, + .drp = TYPEC_DRP, + }, + /* Test DRP with cc1 snk 1.5, cc2 snk 3.0 */ + { + .cc = {TYPEC_CC_VOLT_RP_1_5, TYPEC_CC_VOLT_RP_3_0}, + .connect_result = true, + .drp = TYPEC_DRP, + }, + /* Test no DRP with cc1 src open, cc2 src RA */ + { + .cc = {TYPEC_CC_VOLT_OPEN, TYPEC_CC_VOLT_RA}, + .connect_result = false, + .drp = TYPEC_NO_DRP, + .role_cc = {TYPEC_CC_RP, TYPEC_CC_RP}, + }, + /* Test no DRP with cc1 src RD, cc2 snk default */ + { + .cc = {TYPEC_CC_VOLT_RD, TYPEC_CC_VOLT_RP_DEF}, + .connect_result = false, + .drp = TYPEC_NO_DRP, + .role_cc = {TYPEC_CC_RP, TYPEC_CC_RD}, + }, + /* Test no DRP with cc1 snk default, cc2 snk open */ + { + .cc = {TYPEC_CC_VOLT_RP_DEF, TYPEC_CC_VOLT_OPEN}, + .connect_result = false, + .drp = TYPEC_NO_DRP, + .role_cc = {TYPEC_CC_RD, TYPEC_CC_RD}, + }, + /* Test no DRP with cc1 snk 3.0, cc2 snk 1.5 */ + { + .cc = {TYPEC_CC_VOLT_RP_3_0, TYPEC_CC_VOLT_RP_1_5}, + .connect_result = false, + .drp = TYPEC_NO_DRP, + .role_cc = {TYPEC_CC_RD, TYPEC_CC_RD}, + }, + }; + + for (int i = 0; i < ARRAY_SIZE(test_param); i++) { + role_ctrl = TCPC_REG_ROLE_CTRL_SET(test_param[i].drp, 0, + test_param[i].role_cc[0], + test_param[i].role_cc[1]); + /* If CC status is TYPEC_CC_VOLT_RP_*, then BIT(2) is ignored */ + cc_status = TCPC_REG_CC_STATUS_SET(test_param[i].connect_result, + test_param[i].cc[0], + test_param[i].cc[1]); + tcpci_emul_set_reg(emul, TCPC_REG_ROLE_CTRL, role_ctrl); + tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, cc_status); + zassert_equal(EC_SUCCESS, drv->get_cc(port, &cc1, &cc2), + "Failed to get CC in test case %d (CC 0x%x, role 0x%x)", + i, cc_status, role_ctrl); + zassert_equal(test_param[i].cc[0], cc1, + "0x%x != (cc1 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", + test_param[i].cc[0], cc1, i, cc_status, + role_ctrl); + zassert_equal(test_param[i].cc[1], cc2, + "0x%x != (cc2 = 0x%x) in test case %d (CC 0x%x, role 0x%x)", + test_param[i].cc[0], cc1, i, cc_status, + role_ctrl); + } +} + +/** Test TCPCI set cc */ +void test_tcpci_set_cc(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + enum tcpc_rp_value rp; + enum tcpc_cc_pull cc; + + /* Test setting default RP and cc open */ + rp = TYPEC_RP_USB; + cc = TYPEC_CC_OPEN; + zassert_equal(EC_SUCCESS, drv->select_rp_value(port, rp), NULL); + zassert_equal(EC_SUCCESS, drv->set_cc(port, cc), NULL); + check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, + TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); + + /* Test error on failed role ctrl set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ROLE_CTRL); + zassert_equal(EC_ERROR_INVAL, drv->set_cc(port, TYPEC_CC_OPEN), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test setting 1.5 RP and cc RD */ + rp = TYPEC_RP_1A5; + cc = TYPEC_CC_RD; + zassert_equal(EC_SUCCESS, drv->select_rp_value(port, rp), NULL); + zassert_equal(EC_SUCCESS, drv->set_cc(port, cc), NULL); + check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, + TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); + + /* Test setting 3.0 RP and cc RP */ + rp = TYPEC_RP_3A0; + cc = TYPEC_CC_RP; + zassert_equal(EC_SUCCESS, drv->select_rp_value(port, rp), NULL); + zassert_equal(EC_SUCCESS, drv->set_cc(port, cc), NULL); + check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, + TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); + + /* + * Test setting 3.0 RP and cc RA. drv->select_rp_value() is + * intentionally not called to check if selected rp is persistent. + */ + cc = TYPEC_CC_RA; + zassert_equal(EC_SUCCESS, drv->set_cc(port, cc), NULL); + check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, + TCPC_REG_ROLE_CTRL_SET(TYPEC_NO_DRP, rp, cc, cc)); +} + +/** Test TCPCI set polarity */ +void test_tcpci_set_polarity(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + uint8_t initial_ctrl; + uint8_t exp_ctrl; + + /* Set initial value for TCPC ctrl register. Chosen arbitrary. */ + initial_ctrl = TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL | + TCPC_REG_TCPC_CTRL_BIST_TEST_MODE; + tcpci_emul_set_reg(emul, TCPC_REG_TCPC_CTRL, initial_ctrl); + + /* Test error on failed polarity set */ + exp_ctrl = initial_ctrl; + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + zassert_equal(EC_ERROR_INVAL, drv->set_polarity(port, POLARITY_CC2), + NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + + /* Test setting polarity CC2 */ + exp_ctrl = initial_ctrl | TCPC_REG_TCPC_CTRL_SET(1); + zassert_equal(EC_SUCCESS, drv->set_polarity(port, POLARITY_CC2), NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + + /* Test setting polarity CC1 */ + exp_ctrl = initial_ctrl & ~TCPC_REG_TCPC_CTRL_SET(1); + zassert_equal(EC_SUCCESS, drv->set_polarity(port, POLARITY_CC1), NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + + /* Test setting polarity CC2 DTS */ + exp_ctrl = initial_ctrl | TCPC_REG_TCPC_CTRL_SET(1); + zassert_equal(EC_SUCCESS, drv->set_polarity(port, POLARITY_CC2_DTS), + NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + + /* Test setting polarity CC1 DTS */ + exp_ctrl = initial_ctrl & ~TCPC_REG_TCPC_CTRL_SET(1); + zassert_equal(EC_SUCCESS, drv->set_polarity(port, POLARITY_CC1_DTS), + NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); +} + +/** Test TCPCI set vconn */ +void test_tcpci_set_vconn(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + uint8_t initial_ctrl; + uint8_t exp_ctrl; + + /* Set initial value for POWER ctrl register. Chosen arbitrary. */ + initial_ctrl = TCPC_REG_POWER_CTRL_VBUS_VOL_MONITOR_DIS | + TCPC_REG_POWER_CTRL_FORCE_DISCHARGE; + tcpci_emul_set_reg(emul, TCPC_REG_POWER_CTRL, initial_ctrl); + + /* Test error on failed vconn set */ + exp_ctrl = initial_ctrl; + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_POWER_CTRL); + zassert_equal(EC_ERROR_INVAL, drv->set_vconn(port, 1), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); + + /* Test vconn enable */ + exp_ctrl = initial_ctrl | TCPC_REG_POWER_CTRL_SET(1); + zassert_equal(EC_SUCCESS, drv->set_vconn(port, 1), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); + + /* Test vconn disable */ + exp_ctrl = initial_ctrl & ~TCPC_REG_POWER_CTRL_SET(1); + zassert_equal(EC_SUCCESS, drv->set_vconn(port, 0), NULL); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); +} + +/** Test TCPCI set msg header */ +void test_tcpci_set_msg_header(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + + /* Test error on failed header set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_MSG_HDR_INFO); + zassert_equal(EC_ERROR_INVAL, drv->set_msg_header(port, PD_ROLE_SINK, + PD_ROLE_UFP), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test setting sink UFP */ + zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SINK, + PD_ROLE_UFP), NULL); + check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, + TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_UFP, PD_ROLE_SINK)); + + /* Test setting sink DFP */ + zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SINK, + PD_ROLE_DFP), NULL); + check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, + TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_DFP, PD_ROLE_SINK)); + + /* Test setting source UFP */ + zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SOURCE, + PD_ROLE_UFP), NULL); + check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, + TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_UFP, PD_ROLE_SOURCE)); + + /* Test setting source DFP */ + zassert_equal(EC_SUCCESS, drv->set_msg_header(port, PD_ROLE_SOURCE, + PD_ROLE_DFP), NULL); + check_tcpci_reg(emul, TCPC_REG_MSG_HDR_INFO, + TCPC_REG_MSG_HDR_INFO_SET(PD_ROLE_DFP, PD_ROLE_SOURCE)); +} + +/** Test TCPCI rx and sop prime enable */ +void test_tcpci_set_rx_detect(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + + /* Test error from rx_enable on rx detect set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_RX_DETECT); + zassert_equal(EC_ERROR_INVAL, drv->set_rx_enable(port, 1), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test rx disable */ + zassert_equal(EC_SUCCESS, drv->set_rx_enable(port, 0), NULL); + check_tcpci_reg(emul, TCPC_REG_RX_DETECT, 0x0); + + /* Test setting sop prime with rx disable doesn't change RX_DETECT */ + zassert_equal(EC_SUCCESS, drv->sop_prime_enable(port, 1), NULL); + check_tcpci_reg(emul, TCPC_REG_RX_DETECT, 0x0); + + /* Test that enabling rx after sop prime will set RX_DETECT properly */ + zassert_equal(EC_SUCCESS, drv->set_rx_enable(port, 1), NULL); + check_tcpci_reg(emul, TCPC_REG_RX_DETECT, + TCPC_REG_RX_DETECT_SOP_SOPP_SOPPP_HRST_MASK); + + /* Test error from sop_prime on rx detect set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_RX_DETECT); + zassert_equal(EC_ERROR_INVAL, drv->sop_prime_enable(port, 0), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test disabling sop prime with rx enabled does change RX_DETECT */ + zassert_equal(EC_SUCCESS, drv->sop_prime_enable(port, 0), NULL); + check_tcpci_reg(emul, TCPC_REG_RX_DETECT, + TCPC_REG_RX_DETECT_SOP_HRST_MASK); + + /* Test that enabling rx after disabling sop prime set RX_DETECT */ + zassert_equal(EC_SUCCESS, drv->set_rx_enable(port, 0), NULL); + check_tcpci_reg(emul, TCPC_REG_RX_DETECT, 0x0); + zassert_equal(EC_SUCCESS, drv->set_rx_enable(port, 1), NULL); + check_tcpci_reg(emul, TCPC_REG_RX_DETECT, + TCPC_REG_RX_DETECT_SOP_HRST_MASK); +} + +/** Test TCPCI get raw message from TCPC */ +void test_tcpci_get_rx_message_raw(const struct emul *emul, + enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + struct tcpci_emul_msg msg; + uint32_t payload[7]; + uint8_t buf[32]; + int exp_head; + int i, head; + int size; + + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, 0x0); + tcpci_emul_set_reg(emul, TCPC_REG_DEV_CAP_2, + TCPC_REG_DEV_CAP_2_LONG_MSG); + + for (i = 0; i < 32; i++) { + buf[i] = i + 1; + } + msg.buf = buf; + msg.cnt = 32; + msg.type = TCPCI_MSG_SOP; + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg, true), + "Failed to setup emulator message"); + + /* Test fail on reading byte count */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_RX_BUFFER); + zassert_equal(EC_ERROR_UNKNOWN, + drv->get_message_raw(port, payload, &head), NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + /* Get raw message should always clean RX alerts */ + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Test too short message */ + msg.cnt = 2; + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg, true), + "Failed to setup emulator message"); + zassert_equal(EC_ERROR_UNKNOWN, + drv->get_message_raw(port, payload, &head), NULL); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Test too long message */ + msg.cnt = 32; + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg, true), + "Failed to setup emulator message"); + zassert_equal(EC_ERROR_UNKNOWN, + drv->get_message_raw(port, payload, &head), NULL); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Test alert register and message payload on success */ + size = 28; + msg.cnt = size + 3; + msg.type = TCPCI_MSG_SOP_PRIME; + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg, true), + "Failed to setup emulator message"); + zassert_equal(EC_SUCCESS, drv->get_message_raw(port, payload, &head), + NULL); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + /* + * Type is in bits 31-28 of header, buf[0] is in bits 7-0, + * buf[1] is in bits 15-8 + */ + exp_head = (TCPCI_MSG_SOP_PRIME << 28) | (buf[1] << 8) | buf[0]; + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf + 2, size, NULL); +} + +/** Test TCPCI transmitting message from TCPC */ +void test_tcpci_transmit(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + struct tcpci_emul_msg *msg; + uint32_t data[6]; + uint16_t header; + int i; + + msg = tcpci_emul_get_tx_msg(emul); + + /* Fill transmit data with pattern */ + for (i = 0; i < 6 * sizeof(uint32_t); i++) { + ((uint8_t *)data)[i] = i; + } + + /* Test transmit hard reset fail */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TRANSMIT); + zassert_equal(EC_ERROR_INVAL, + drv->transmit(port, TCPCI_MSG_TX_HARD_RESET, 0, NULL), + NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test transmit cabel reset */ + zassert_equal(EC_SUCCESS, + drv->transmit(port, TCPCI_MSG_CABLE_RESET, 0, NULL), + NULL); + zassert_equal(TCPCI_MSG_CABLE_RESET, msg->type, NULL); + + /* Test transmit hard reset */ + zassert_equal(EC_SUCCESS, + drv->transmit(port, TCPCI_MSG_TX_HARD_RESET, 0, NULL), + NULL); + zassert_equal(TCPCI_MSG_TX_HARD_RESET, msg->type, NULL); + + /* Test transmit fail on rx buffer */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TX_BUFFER); + zassert_equal(EC_ERROR_INVAL, + drv->transmit(port, TCPCI_MSG_SOP_PRIME, 0, data), + NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test transmit only header */ + /* Build random header with count 0 */ + header = PD_HEADER(PD_CTRL_PING, PD_ROLE_SOURCE, PD_ROLE_UFP, 0, 0, + PD_REV20, 0); + zassert_equal(EC_SUCCESS, + drv->transmit(port, TCPCI_MSG_SOP_PRIME, header, data), + NULL); + zassert_equal(TCPCI_MSG_SOP_PRIME, msg->type, NULL); + zassert_mem_equal(msg->buf, &header, 2, NULL); + zassert_equal(2, msg->cnt, NULL); + + /* Test transmit message */ + /* Build random header with count 6 */ + header = PD_HEADER(PD_CTRL_PING, PD_ROLE_SOURCE, PD_ROLE_UFP, 0, 6, + PD_REV20, 0); + zassert_equal(EC_SUCCESS, + drv->transmit(port, TCPCI_MSG_SOP_PRIME, header, data), + NULL); + zassert_equal(TCPCI_MSG_SOP_PRIME, msg->type, NULL); + zassert_mem_equal(msg->buf, &header, 2, NULL); + zassert_mem_equal(msg->buf + 2, data, 6 * sizeof(uint32_t), NULL); + zassert_equal(2 + 6 * sizeof(uint32_t), msg->cnt, NULL); +} + +/** Test TCPCI alert */ +void test_tcpci_alert(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + + tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); + + /* Test alert read fail */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_ALERT); + drv->tcpc_alert(port); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Handle overcurrent */ + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, TCPC_REG_ALERT_FAULT); + tcpci_emul_set_reg(emul, TCPC_REG_FAULT_STATUS, + TCPC_REG_FAULT_STATUS_VCONN_OVER_CURRENT); + drv->tcpc_alert(port); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + check_tcpci_reg(emul, TCPC_REG_FAULT_STATUS, 0x0); + + /* Test TX complete */ + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, TCPC_REG_ALERT_TX_COMPLETE); + drv->tcpc_alert(port); + + /* Test clear alert and ext_alert */ + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, TCPC_REG_ALERT_ALERT_EXT); + tcpci_emul_set_reg(emul, TCPC_REG_ALERT_EXT, + TCPC_REG_ALERT_EXT_TIMER_EXPIRED); + drv->tcpc_alert(port); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + check_tcpci_reg(emul, TCPC_REG_FAULT_STATUS, 0x0); + + /* Test CC changed, CC status chosen arbitrary */ + tcpci_emul_set_reg(emul, TCPC_REG_CC_STATUS, + TCPC_REG_CC_STATUS_SET(1, TYPEC_CC_VOLT_RP_1_5, + TYPEC_CC_VOLT_RP_3_0)); + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, TCPC_REG_ALERT_CC_STATUS); + drv->tcpc_alert(port); + + /* Test Hard reset */ + tcpci_emul_set_reg(emul, TCPC_REG_ALERT, TCPC_REG_ALERT_RX_HARD_RST); + drv->tcpc_alert(port); +} + + +/** Test TCPCI alert RX message */ +void test_tcpci_alert_rx_message(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct tcpci_emul_msg msg1, msg2; + uint8_t buf1[32], buf2[32]; + uint32_t payload[7]; + int exp_head; + int i, head; + int size; + + tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); + + for (i = 0; i < 32; i++) { + buf1[i] = i + 1; + buf2[i] = i + 33; + } + size = 23; + msg1.buf = buf1; + msg1.cnt = size + 3; + msg1.type = TCPCI_MSG_SOP; + + msg2.buf = buf2; + msg2.cnt = size + 3; + msg2.type = TCPCI_MSG_SOP_PRIME; + + /* Test receiving one message */ + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg1, true), + "Failed to setup emulator message"); + drv->tcpc_alert(port); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Check if msg1 is in queue */ + zassert_true(tcpm_has_pending_message(port), NULL); + zassert_equal(EC_SUCCESS, tcpm_dequeue_message(port, payload, &head), + NULL); + exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf1 + 2, size, NULL); + zassert_false(tcpm_has_pending_message(port), NULL); + + /* Test receiving two messages */ + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg1, true), + "Failed to setup emulator message"); + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg2, true), + "Failed to setup emulator message"); + drv->tcpc_alert(port); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Check if msg1 is in queue */ + zassert_true(tcpm_has_pending_message(port), NULL); + zassert_equal(EC_SUCCESS, tcpm_dequeue_message(port, payload, &head), + NULL); + exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf1 + 2, size, NULL); + /* Check if msg2 is in queue */ + zassert_true(tcpm_has_pending_message(port), NULL); + zassert_equal(EC_SUCCESS, tcpm_dequeue_message(port, payload, &head), + NULL); + exp_head = (TCPCI_MSG_SOP_PRIME << 28) | (buf2[1] << 8) | buf2[0]; + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf2 + 2, size, NULL); + zassert_false(tcpm_has_pending_message(port), NULL); + + /* Test with too long first message */ + msg1.cnt = 32; + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg1, true), + "Failed to setup emulator message"); + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg2, true), + "Failed to setup emulator message"); + drv->tcpc_alert(port); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Check if msg2 is in queue */ + zassert_true(tcpm_has_pending_message(port), NULL); + zassert_equal(EC_SUCCESS, tcpm_dequeue_message(port, payload, &head), + NULL); + exp_head = (TCPCI_MSG_SOP_PRIME << 28) | (buf2[1] << 8) | buf2[0]; + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf2 + 2, size, NULL); + zassert_false(tcpm_has_pending_message(port), NULL); + + /* Test constant read message failure */ + zassert_ok(tcpci_emul_add_rx_msg(emul, &msg1, true), + "Failed to setup emulator message"); + /* Create loop with one message with wrong size */ + msg1.next = &msg1; + drv->tcpc_alert(port); + /* Nothing should be in queue */ + zassert_false(tcpm_has_pending_message(port), NULL); + + /* Test constant correct messages stream */ + msg1.cnt = size + 3; + drv->tcpc_alert(port); + msg1.next = NULL; + + /* msg1 should be at least twice in queue */ + exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; + for (i = 0; i < 2; i++) { + zassert_true(tcpm_has_pending_message(port), NULL); + zassert_equal(EC_SUCCESS, + tcpm_dequeue_message(port, payload, &head), NULL); + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf1 + 2, size, NULL); + } + tcpm_clear_pending_messages(port); + zassert_false(tcpm_has_pending_message(port), NULL); + + /* Read message that is left in TCPC buffer */ + drv->tcpc_alert(port); + check_tcpci_reg(emul, TCPC_REG_ALERT, 0x0); + + /* Check if msg1 is in queue */ + zassert_true(tcpm_has_pending_message(port), NULL); + zassert_equal(EC_SUCCESS, tcpm_dequeue_message(port, payload, &head), + NULL); + exp_head = (TCPCI_MSG_SOP << 28) | (buf1[1] << 8) | buf1[0]; + zassert_equal(exp_head, head, + "Received header 0x%08lx, expected 0x%08lx", + head, exp_head); + zassert_mem_equal(payload, buf1 + 2, size, NULL); + zassert_false(tcpm_has_pending_message(port), NULL); +} + +/** Test TCPCI auto discharge on disconnect */ +void test_tcpci_auto_discharge(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + uint8_t initial_ctrl; + uint8_t exp_ctrl; + + /* Set initial value for POWER ctrl register. Chosen arbitrary. */ + initial_ctrl = TCPC_REG_POWER_CTRL_VBUS_VOL_MONITOR_DIS | + TCPC_REG_POWER_CTRL_FORCE_DISCHARGE; + tcpci_emul_set_reg(emul, TCPC_REG_POWER_CTRL, initial_ctrl); + + /* Test discharge enable */ + exp_ctrl = initial_ctrl | TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT; + drv->tcpc_enable_auto_discharge_disconnect(port, 1); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); + + /* Test discharge disable */ + exp_ctrl = initial_ctrl & + ~TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT; + drv->tcpc_enable_auto_discharge_disconnect(port, 0); + check_tcpci_reg(emul, TCPC_REG_POWER_CTRL, exp_ctrl); +} + +/** Test TCPCI drp toggle */ +void test_tcpci_drp_toggle(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + uint8_t exp_tcpc_ctrl, exp_role_ctrl, initial_tcpc_ctrl; + + /* Set TCPCI to revision 2 */ + tcpc_config[port].flags = TCPC_FLAGS_TCPCI_REV2_0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV2_0_VER1_1); + + /* Test error on failed role CTRL set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ROLE_CTRL); + zassert_equal(EC_ERROR_INVAL, drv->drp_toggle(port), NULL); + + /* Test error on failed TCPC CTRL set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + zassert_equal(EC_ERROR_INVAL, drv->drp_toggle(port), NULL); + + /* Test error on failed command set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_COMMAND); + zassert_equal(EC_ERROR_INVAL, drv->drp_toggle(port), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Set initial value for TCPC ctrl register. Chosen arbitrary. */ + initial_tcpc_ctrl = TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL | + TCPC_REG_TCPC_CTRL_BIST_TEST_MODE; + tcpci_emul_set_reg(emul, TCPC_REG_TCPC_CTRL, initial_tcpc_ctrl); + + /* + * Test correct registers values for rev 2.0. Role control CC lines + * have to be set to RP with DRP enabled and smallest RP value. + */ + exp_tcpc_ctrl = initial_tcpc_ctrl | + TCPC_REG_TCPC_CTRL_EN_LOOK4CONNECTION_ALERT; + exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_DRP, TYPEC_RP_USB, + TYPEC_CC_RP, TYPEC_CC_RP); + zassert_equal(EC_SUCCESS, drv->drp_toggle(port), NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_tcpc_ctrl); + check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); + check_tcpci_reg(emul, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_LOOK4CONNECTION); + + /* Set TCPCI to revision 1 */ + tcpc_config[port].flags = 0; + tcpci_emul_set_rev(emul, TCPCI_EMUL_REV1_0_VER1_0); + + /* Set initial value for TCPC ctrl register. Chosen arbitrary. */ + initial_tcpc_ctrl = TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL | + TCPC_REG_TCPC_CTRL_BIST_TEST_MODE; + tcpci_emul_set_reg(emul, TCPC_REG_TCPC_CTRL, initial_tcpc_ctrl); + + /* + * Test correct registers values for rev 1.0. Role control CC lines + * have to be set to RD with DRP enabled and smallest RP value. + * Only CC lines setting is different from rev 2.0 + */ + exp_tcpc_ctrl = initial_tcpc_ctrl | + TCPC_REG_TCPC_CTRL_EN_LOOK4CONNECTION_ALERT; + exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_DRP, TYPEC_RP_USB, + TYPEC_CC_RD, TYPEC_CC_RD); + zassert_equal(EC_SUCCESS, drv->drp_toggle(port), NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_tcpc_ctrl); + check_tcpci_reg(emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl); + check_tcpci_reg(emul, TCPC_REG_COMMAND, + TCPC_REG_COMMAND_LOOK4CONNECTION); +} + +/** Test TCPCI get chip info */ +void test_tcpci_get_chip_info(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + struct ec_response_pd_chip_info_v1 info; + uint16_t vendor, product, bcd; + + /* Test error on failed vendor id get */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_VENDOR_ID); + zassert_equal(EC_ERROR_INVAL, drv->get_chip_info(port, 1, &info), NULL); + + /* Test error on failed product id get */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_PRODUCT_ID); + zassert_equal(EC_ERROR_INVAL, drv->get_chip_info(port, 1, &info), NULL); + + /* Test error on failed BCD get */ + i2c_common_emul_set_read_fail_reg(i2c_emul, TCPC_REG_VENDOR_ID); + zassert_equal(EC_ERROR_INVAL, drv->get_chip_info(port, 1, &info), NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test reading chip info. Values chosen arbitrary. */ + vendor = 0x1234; + product = 0x5678; + bcd = 0x9876; + tcpci_emul_set_reg(emul, TCPC_REG_VENDOR_ID, vendor); + tcpci_emul_set_reg(emul, TCPC_REG_PRODUCT_ID, product); + tcpci_emul_set_reg(emul, TCPC_REG_BCD_DEV, bcd); + zassert_equal(EC_SUCCESS, drv->get_chip_info(port, 1, &info), NULL); + zassert_equal(vendor, info.vendor_id, NULL); + zassert_equal(product, info.product_id, NULL); + zassert_equal(bcd, info.device_id, NULL); + + /* Test reading cached chip info */ + info.vendor_id = 0; + info.product_id = 0; + info.device_id = 0; + /* Make sure, that TCPC is not accessed */ + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_FAIL_ALL_REG); + zassert_equal(EC_SUCCESS, drv->get_chip_info(port, 0, &info), NULL); + i2c_common_emul_set_read_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + zassert_equal(vendor, info.vendor_id, NULL); + zassert_equal(product, info.product_id, NULL); + zassert_equal(bcd, info.device_id, NULL); +} + +/** Test TCPCI enter low power mode */ +void test_tcpci_low_power_mode(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + + /* Test error on failed command set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_COMMAND); + zassert_equal(EC_ERROR_INVAL, drv->enter_low_power_mode(port), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Test correct command is issued */ + zassert_equal(EC_SUCCESS, drv->enter_low_power_mode(port), NULL); + check_tcpci_reg(emul, TCPC_REG_COMMAND, TCPC_REG_COMMAND_I2CIDLE); +} + +/** Test TCPCI set bist test mode */ +void test_tcpci_set_bist_mode(const struct emul *emul, enum usbc_port port) +{ + const struct tcpm_drv *drv = tcpc_config[port].drv; + struct i2c_emul *i2c_emul = tcpci_emul_get_i2c_emul(emul); + uint16_t exp_mask, initial_mask; + uint8_t exp_ctrl, initial_ctrl; + + /* Test error on TCPC CTRL set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_TCPC_CTRL); + zassert_equal(EC_ERROR_INVAL, drv->set_bist_test_mode(port, 1), NULL); + + /* Test error on alert mask set */ + i2c_common_emul_set_write_fail_reg(i2c_emul, TCPC_REG_ALERT_MASK); + zassert_equal(EC_ERROR_INVAL, drv->set_bist_test_mode(port, 1), NULL); + i2c_common_emul_set_write_fail_reg(i2c_emul, + I2C_COMMON_EMUL_NO_FAIL_REG); + + /* Set initial value for alert mask register. Chosen arbitrary. */ + initial_mask = TCPC_REG_ALERT_MASK_ALL; + tcpci_emul_set_reg(emul, TCPC_REG_ALERT_MASK, initial_mask); + + /* Set initial value for TCPC ctrl register. Chosen arbitrary. */ + initial_ctrl = TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL | + TCPC_REG_TCPC_CTRL_EN_LOOK4CONNECTION_ALERT; + tcpci_emul_set_reg(emul, TCPC_REG_TCPC_CTRL, initial_ctrl); + + /* Test enabling bist test mode */ + exp_mask = initial_mask & ~TCPC_REG_ALERT_RX_STATUS; + exp_ctrl = initial_ctrl | TCPC_REG_TCPC_CTRL_BIST_TEST_MODE; + zassert_equal(EC_SUCCESS, drv->set_bist_test_mode(port, 1), NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); + + /* Test disabling bist test mode */ + exp_mask = initial_mask | TCPC_REG_ALERT_RX_STATUS; + exp_ctrl = initial_ctrl & ~TCPC_REG_TCPC_CTRL_BIST_TEST_MODE; + zassert_equal(EC_SUCCESS, drv->set_bist_test_mode(port, 0), NULL); + check_tcpci_reg(emul, TCPC_REG_TCPC_CTRL, exp_ctrl); + check_tcpci_reg(emul, TCPC_REG_ALERT_MASK, exp_mask); +} diff --git a/zephyr/test/drivers/src/test_mocks.c b/zephyr/test/drivers/src/test_mocks.c new file mode 100644 index 0000000000..7b25bcfa3e --- /dev/null +++ b/zephyr/test/drivers/src/test_mocks.c @@ -0,0 +1,13 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "test_mocks.h" + +DEFINE_FFF_GLOBALS; + +/* Mocks for common/init_rom.c */ +DEFINE_FAKE_VALUE_FUNC(const void *, init_rom_map, const void *, int); +DEFINE_FAKE_VOID_FUNC(init_rom_unmap, const void *, int); +DEFINE_FAKE_VALUE_FUNC(int, init_rom_copy, int, int, int); diff --git a/zephyr/test/drivers/src/usb_mux.c b/zephyr/test/drivers/src/usb_mux.c index fa8f2fa55b..cf6190eec9 100644 --- a/zephyr/test/drivers/src/usb_mux.c +++ b/zephyr/test/drivers/src/usb_mux.c @@ -8,10 +8,14 @@ #include <ztest.h> #include <drivers/gpio.h> #include <drivers/gpio/gpio_emul.h> +#include <shell/shell.h> +#include <shell/shell_uart.h> #include "common.h" +#include "ec_commands.h" #include "ec_tasks.h" #include "hooks.h" +#include "host_command.h" #include "i2c.h" #include "stubs.h" #include "task.h" @@ -199,15 +203,12 @@ static void suspend_usbc_task(bool suspend) COND_CODE_1(HAS_TASK_PD_C3, (TASK_ID_PD_C3,), ()) }; - for (int i = 0; i < ARRAY_SIZE(cros_tids); ++i) { - k_tid_t pd_c1_tid = task_get_zephyr_tid(cros_tids[i]); - - if (suspend) { - k_thread_suspend(pd_c1_tid); - } else { - k_thread_resume(pd_c1_tid); - } - } + for (int i = 0; i < ARRAY_SIZE(cros_tids); ++i) + /* + * TODO(b/201420132): pd_set_suspend uses sleeps which we should + * minimize + */ + pd_set_suspend(TASK_ID_TO_PD_PORT(cros_tids[i]), suspend); } /** Restore original usb_mux chain without proxy */ @@ -589,6 +590,121 @@ void test_usb_mux_chipset_reset(void) hook_notify(HOOK_CHIPSET_RESET); } +/* Test host command get mux info */ +static void test_usb_mux_hc_mux_info(void) +{ + struct ec_response_usb_pd_mux_info response; + struct ec_params_usb_pd_mux_info params; + struct host_cmd_handler_args args = + BUILD_HOST_COMMAND(EC_CMD_USB_PD_MUX_INFO, 0, response); + mux_state_t exp_mode; + + /* Set up host command parameters */ + args.params = ¶ms; + args.params_size = sizeof(params); + + /* Test invalid port parameter */ + params.port = 5; + zassert_equal(EC_RES_INVALID_PARAM, host_command_process(&args), NULL); + + /* Set correct port for rest of the test */ + params.port = USBC_PORT_C1; + + /* Test error on getting mux mode */ + setup_ztest_proxy_get(0, 0, EC_ERROR_UNKNOWN, + USB_PD_MUX_TBT_COMPAT_ENABLED); + zassert_equal(EC_RES_ERROR, host_command_process(&args), NULL); + + /* Test getting mux mode */ + exp_mode = USB_PD_MUX_USB_ENABLED; + setup_ztest_proxy_get(0, 2, EC_SUCCESS, exp_mode); + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(exp_mode, response.flags, "mode is 0x%x (!= 0x%x)", + response.flags, exp_mode); + + /* Test clearing HPD IRQ */ + exp_mode = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_HPD_LVL | + USB_PD_MUX_HPD_IRQ; + setup_ztest_proxy_get(0, 2, EC_SUCCESS, exp_mode); + setup_ztest_proxy_hpd_update(0, 2, USB_PD_MUX_HPD_LVL); + zassert_equal(EC_RES_SUCCESS, host_command_process(&args), NULL); + zassert_equal(args.response_size, sizeof(response), NULL); + zassert_equal(exp_mode, response.flags, "mode is 0x%x (!= 0x%x)", + response.flags, exp_mode); +} + +/** Test typec console command */ +static void test_usb_mux_typec_command(void) +{ + mux_state_t exp_mode; + + /* Test error on command with no argument */ + zassert_equal(EC_ERROR_PARAM_COUNT, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec"), NULL); + + /* + * Test success on passing "debug" as first argument. This will enable + * debug prints, but it is not possible to test that in unit test + * without accessing cprints output. + */ + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec debug"), NULL); + + /* Test error on port argument that is not a number */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec test1"), NULL); + + /* Test error on invalid port number */ + zassert_equal(EC_ERROR_PARAM1, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec 5"), NULL); + + /* + * Test success on correct port number. Command should print mux state + * on console, but it is not possible to check that in unit test. + */ + setup_ztest_proxy_get(0, 2, EC_SUCCESS, USB_PD_MUX_TBT_COMPAT_ENABLED); + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec 1"), NULL); + + /* Test setting none mode */ + exp_mode = USB_PD_MUX_NONE; + setup_ztest_proxy_set(0, 2, EC_SUCCESS, exp_mode); + /* Mux will enter low power mode */ + setup_ztest_proxy_enter_lpm(0, 2, EC_SUCCESS); + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec 1 none"), NULL); + + /* Test setting USB mode */ + exp_mode = USB_PD_MUX_USB_ENABLED; + setup_ztest_proxy_set(0, 2, EC_SUCCESS, exp_mode); + /* Mux will exit low power mode */ + setup_ztest_proxy_init(0, 2, EC_SUCCESS); + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec 1 usb"), NULL); + + /* Test setting DP mode */ + exp_mode = USB_PD_MUX_DP_ENABLED; + setup_ztest_proxy_set(0, 2, EC_SUCCESS, exp_mode); + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec 1 dp"), NULL); + + /* Test setting dock mode */ + exp_mode = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED; + setup_ztest_proxy_set(0, 2, EC_SUCCESS, exp_mode); + zassert_equal(EC_SUCCESS, + shell_execute_cmd(shell_backend_uart_get_ptr(), + "typec 1 dock"), NULL); +} + /** Setup proxy chain and uninit usb muxes */ void setup_uninit_mux(void) { @@ -635,6 +751,12 @@ void test_suite_usb_mux(void) setup_init_mux, resotre_usb_mux_chain), ztest_unit_test_setup_teardown( test_usb_mux_chipset_reset, + setup_init_mux, resotre_usb_mux_chain), + ztest_unit_test_setup_teardown( + test_usb_mux_hc_mux_info, + setup_init_mux, resotre_usb_mux_chain), + ztest_unit_test_setup_teardown( + test_usb_mux_typec_command, setup_init_mux, resotre_usb_mux_chain)); ztest_run_test_suite(usb_mux); } diff --git a/zephyr/test/drivers/zmake.yaml b/zephyr/test/drivers/zmake.yaml deleted file mode 100644 index 14239fbd4b..0000000000 --- a/zephyr/test/drivers/zmake.yaml +++ /dev/null @@ -1,14 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true -dts-overlays: - - overlay.dts diff --git a/zephyr/test/ec_app/BUILD.py b/zephyr/test/ec_app/BUILD.py new file mode 100644 index 0000000000..48d072fe19 --- /dev/null +++ b/zephyr/test/ec_app/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("ec_app") diff --git a/zephyr/test/ec_app/zmake.yaml b/zephyr/test/ec_app/zmake.yaml deleted file mode 100644 index e28a79e670..0000000000 --- a/zephyr/test/ec_app/zmake.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true diff --git a/zephyr/test/hooks/BUILD.py b/zephyr/test/hooks/BUILD.py new file mode 100644 index 0000000000..6b20daea30 --- /dev/null +++ b/zephyr/test/hooks/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("hooks") diff --git a/zephyr/test/hooks/zmake.yaml b/zephyr/test/hooks/zmake.yaml deleted file mode 100644 index fa16329e9c..0000000000 --- a/zephyr/test/hooks/zmake.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true diff --git a/zephyr/test/i2c/BUILD.py b/zephyr/test/i2c/BUILD.py new file mode 100644 index 0000000000..150926dc69 --- /dev/null +++ b/zephyr/test/i2c/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("i2c", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/i2c/zmake.yaml b/zephyr/test/i2c/zmake.yaml deleted file mode 100644 index d3ba38ccfa..0000000000 --- a/zephyr/test/i2c/zmake.yaml +++ /dev/null @@ -1,14 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true -dts-overlays: - - overlay.dts diff --git a/zephyr/test/i2c_dts/BUILD.py b/zephyr/test/i2c_dts/BUILD.py new file mode 100644 index 0000000000..ec93d8b6f7 --- /dev/null +++ b/zephyr/test/i2c_dts/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("i2c_dts", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/i2c_dts/zmake.yaml b/zephyr/test/i2c_dts/zmake.yaml deleted file mode 100644 index 2430527011..0000000000 --- a/zephyr/test/i2c_dts/zmake.yaml +++ /dev/null @@ -1,14 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -output-type: elf -supported-toolchains: - - llvm - - host -is-test: true -dts-overlays: - - overlay.dts diff --git a/zephyr/test/system/BUILD.py b/zephyr/test/system/BUILD.py new file mode 100644 index 0000000000..1aecdeb37d --- /dev/null +++ b/zephyr/test/system/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("system", dts_overlays=["overlay.dts"]) diff --git a/zephyr/test/system/zmake.yaml b/zephyr/test/system/zmake.yaml deleted file mode 100644 index 2430527011..0000000000 --- a/zephyr/test/system/zmake.yaml +++ /dev/null @@ -1,14 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -output-type: elf -supported-toolchains: - - llvm - - host -is-test: true -dts-overlays: - - overlay.dts diff --git a/zephyr/test/tasks/BUILD.py b/zephyr/test/tasks/BUILD.py new file mode 100644 index 0000000000..1f49d4b41d --- /dev/null +++ b/zephyr/test/tasks/BUILD.py @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +register_host_test("tasks") diff --git a/zephyr/test/tasks/prj.conf b/zephyr/test/tasks/prj.conf index f5ddf014a7..15af430451 100644 --- a/zephyr/test/tasks/prj.conf +++ b/zephyr/test/tasks/prj.conf @@ -6,4 +6,4 @@ CONFIG_ZTEST=y CONFIG_HAS_TEST_TASKS=y CONFIG_PLATFORM_EC=y CONFIG_CROS_EC=y -CONFIG_HAS_TASK_HOOKS=n +CONFIG_PLATFORM_EC_HOOKS=n diff --git a/zephyr/test/tasks/zmake.yaml b/zephyr/test/tasks/zmake.yaml deleted file mode 100644 index fa16329e9c..0000000000 --- a/zephyr/test/tasks/zmake.yaml +++ /dev/null @@ -1,12 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: native_posix -supported-zephyr-versions: - - v2.7 -supported-toolchains: - - llvm - - host -output-type: elf -is-test: true diff --git a/zephyr/zmake/setup.py b/zephyr/zmake/setup.py index 4328dc48d7..51001c6695 100644 --- a/zephyr/zmake/setup.py +++ b/zephyr/zmake/setup.py @@ -24,8 +24,8 @@ setuptools.setup( # requirements files see: # https://packaging.python.org/en/latest/requirements.html install_requires=[ - "jsonschema>=3.2.0", - "pyyaml>=3.13", + # Required until chroot upgrades to Python 3.7+. + "dataclasses>=0.6; python_version < '3.7'", ], # To provide executable scripts, use entry points in preference to the # "scripts" keyword. Entry points provide cross-platform support and allow diff --git a/zephyr/zmake/tests/test_project.py b/zephyr/zmake/tests/test_project.py index 2442ceedf6..f7688784e7 100644 --- a/zephyr/zmake/tests/test_project.py +++ b/zephyr/zmake/tests/test_project.py @@ -11,28 +11,13 @@ import hypothesis.strategies as st import pytest import zmake.modules +import zmake.output_packers import zmake.project board_names = st.text(alphabet=set(string.ascii_lowercase) | {"_"}, min_size=1) sets_of_board_names = st.lists(st.lists(board_names, unique=True)) -class TemporaryProject(tempfile.TemporaryDirectory): - """A temporary project wrapper. - - Args: - config: The config dictionary to be used with the project. - """ - - def __init__(self, config): - self.config = config - super().__init__() - - def __enter__(self): - project_path = pathlib.Path(super().__enter__()) - return zmake.project.Project(project_path, config_dict=self.config) - - @hypothesis.given(sets_of_board_names) @hypothesis.settings(deadline=None) def test_find_dts_overlays(modules): @@ -67,21 +52,21 @@ def test_find_dts_overlays(modules): board_file_mapping[board] = files | {file_name} for board, expected_dts_files in board_file_mapping.items(): - with TemporaryProject( - { - "board": board, - "output-type": "elf", - "supported-toolchains": ["llvm"], - "supported-zephyr-versions": ["v2.6"], - } - ) as project: - config = project.find_dts_overlays(dict(enumerate(module_paths))) - - actual_dts_files = set( - config.cmake_defs.get("DTC_OVERLAY_FILE", "").split(";") + project = zmake.project.Project( + zmake.project.ProjectConfig( + project_name=board, + zephyr_board=board, + output_packer=zmake.output_packers.ElfPacker, + supported_toolchains=["llvm"], + project_dir=pathlib.Path("/fakebuild"), ) + ) + config = project.find_dts_overlays(dict(enumerate(module_paths))) + actual_dts_files = set( + config.cmake_defs.get("DTC_OVERLAY_FILE", "").split(";") + ) - assert actual_dts_files == set(map(str, expected_dts_files)) + assert actual_dts_files == set(map(str, expected_dts_files)) setup_modules_and_dispatch(modules, testcase) @@ -101,16 +86,17 @@ def test_prune_modules(modules): for name in zmake.modules.known_modules } - with TemporaryProject( - { - "board": "native_posix", - "output-type": "elf", - "supported-toolchains": ["coreboot-sdk"], - "supported-zephyr-versions": ["v2.6"], - "modules": modules, - } - ) as project: - assert set(project.prune_modules(module_paths)) == set(modules) + project = zmake.project.Project( + zmake.project.ProjectConfig( + project_name="prunetest", + zephyr_board="native_posix", + output_packer=zmake.output_packers.ElfPacker, + supported_toolchains=["coreboot-sdk"], + project_dir=pathlib.Path("/fake"), + modules=modules, + ), + ) + assert set(project.prune_modules(module_paths)) == set(modules) def test_prune_modules_unavailable(): @@ -122,17 +108,18 @@ def test_prune_modules_unavailable(): "hal_stm32": pathlib.Path("/mod/halstm"), } - with TemporaryProject( - { - "board": "native_posix", - "output-type": "elf", - "supported-toolchains": ["coreboot-sdk"], - "supported-zephyr-versions": ["v2.6"], - "modules": ["hal_stm32", "cmsis"], - } - ) as project: - with pytest.raises(KeyError): - project.prune_modules(module_paths) + project = zmake.project.Project( + zmake.project.ProjectConfig( + project_name="prunetest", + zephyr_board="native_posix", + output_packer=zmake.output_packers.ElfPacker, + supported_toolchains=["coreboot-sdk"], + project_dir=pathlib.Path("/fake"), + modules=["hal_stm32", "cmsis"], + ), + ) + with pytest.raises(KeyError): + project.prune_modules(module_paths) def test_find_projects_empty(tmp_path): @@ -141,33 +128,104 @@ def test_find_projects_empty(tmp_path): assert len(projects) == 0 -YAML_FILE = """ -supported-zephyr-versions: - - v2.6 -supported-toolchains: - - coreboot-sdk -output-type: npcx +CONFIG_FILE_1 = """ +register_raw_project(project_name="one", zephyr_board="one") +register_host_test(test_name="two") +register_npcx_project(project_name="three", zephyr_board="three") +register_binman_project(project_name="four", zephyr_board="four") +""" + +CONFIG_FILE_2 = """ +register_raw_project( + project_name="five", + zephyr_board="foo", + dts_overlays=[here / "gpio.dts"], +) """ def test_find_projects(tmp_path): """Test the find_projects method when there are projects.""" - dir = tmp_path.joinpath("one") - dir.mkdir() - dir.joinpath("zmake.yaml").write_text("board: one\n" + YAML_FILE) - tmp_path.joinpath("two").mkdir() - dir = tmp_path.joinpath("two/a") - dir.mkdir() - dir.joinpath("zmake.yaml").write_text("board: twoa\nis-test: true\n" + YAML_FILE) - dir = tmp_path.joinpath("two/b") - dir.mkdir() - dir.joinpath("zmake.yaml").write_text("board: twob\n" + YAML_FILE) - projects = list(zmake.project.find_projects(tmp_path)) - projects.sort(key=lambda x: x.project_dir) - assert len(projects) == 3 - assert projects[0].project_dir == tmp_path.joinpath("one") - assert projects[1].project_dir == tmp_path.joinpath("two/a") - assert projects[2].project_dir == tmp_path.joinpath("two/b") - assert not projects[0].config.is_test - assert projects[1].config.is_test - assert not projects[2].config.is_test + cf1_dir = tmp_path / "cf1" + cf1_dir.mkdir() + (cf1_dir / "BUILD.py").write_text(CONFIG_FILE_1) + + cf2_bb_dir = tmp_path / "cf2_bb" + cf2_bb_dir.mkdir() + cf2_dir = cf2_bb_dir / "cf2" + cf2_dir.mkdir() + (cf2_dir / "BUILD.py").write_text(CONFIG_FILE_2) + + projects = zmake.project.find_projects(tmp_path) + assert len(projects) == 5 + assert projects["one"].config.project_dir == cf1_dir + assert not projects["one"].config.is_test + + assert projects["test-two"].config.project_dir == cf1_dir + assert projects["test-two"].config.zephyr_board == "native_posix" + assert projects["test-two"].config.is_test + + assert projects["three"].config.project_dir == cf1_dir + assert not projects["three"].config.is_test + assert projects["three"].config.zephyr_board == "three" + + assert projects["four"].config.project_dir == cf1_dir + assert not projects["four"].config.is_test + assert projects["four"].config.zephyr_board == "four" + + assert projects["five"].config.project_dir == cf2_dir + assert not projects["five"].config.is_test + assert projects["five"].config.zephyr_board == "foo" + + +def test_find_projects_name_conflict(tmp_path): + """When two projects define the same name, that should be an error.""" + cf1_dir = tmp_path / "cf1" + cf1_dir.mkdir() + (cf1_dir / "BUILD.py").write_text(CONFIG_FILE_2) + + cf2_dir = tmp_path / "cf2" + cf2_dir.mkdir() + (cf2_dir / "BUILD.py").write_text(CONFIG_FILE_2) + + with pytest.raises(KeyError): + zmake.project.find_projects(tmp_path) + + +@pytest.mark.parametrize( + ("actual_files", "config_files", "expected_files"), + [ + (["prj_link.conf"], [], []), + (["prj.conf"], [], ["prj.conf"]), + ( + ["prj.conf", "cfg.conf"], + ["prj.conf", "cfg.conf"], + ["prj.conf", "cfg.conf"], + ), + ( + ["prj.conf", "prj_samus.conf", "prj_link.conf"], + ["prj_link.conf"], + ["prj.conf", "prj_link.conf"], + ), + ], +) +def test_kconfig_files(tmp_path, actual_files, config_files, expected_files): + for name in actual_files: + (tmp_path / name).write_text("") + + project = zmake.project.Project( + zmake.project.ProjectConfig( + project_name="samus", + zephyr_board="lm4", + output_packer=zmake.output_packers.RawBinPacker, + supported_toolchains=["coreboot-sdk"], + project_dir=tmp_path, + kconfig_files=[tmp_path / name for name in config_files], + ), + ) + + builds = list(project.iter_builds()) + assert len(builds) == 1 + + _, config = builds[0] + assert sorted(f.name for f in config.kconfig_files) == sorted(expected_files) diff --git a/zephyr/zmake/tests/test_toolchains.py b/zephyr/zmake/tests/test_toolchains.py index 515f54a112..fb1953052a 100644 --- a/zephyr/zmake/tests/test_toolchains.py +++ b/zephyr/zmake/tests/test_toolchains.py @@ -7,6 +7,7 @@ import pathlib import pytest +import zmake.output_packers import zmake.project as project import zmake.toolchains as toolchains @@ -62,18 +63,18 @@ def zephyr_exists(mockfs): @pytest.fixture def fake_project(tmp_path): return project.Project( - tmp_path, - config_dict={ - "board": "foo", - "supported-zephyr-versions": ["v2.6"], - "supported-toolchains": [ + project.ProjectConfig( + project_name="foo", + zephyr_board="foo", + supported_toolchains=[ "coreboot-sdk", "host", "llvm", "zephyr", ], - "output-type": "raw", - }, + output_packer=zmake.output_packers.RawBinPacker, + project_dir=tmp_path, + ), ) diff --git a/zephyr/zmake/tests/test_util.py b/zephyr/zmake/tests/test_util.py index 0c4cd4dda5..438c5efcf0 100644 --- a/zephyr/zmake/tests/test_util.py +++ b/zephyr/zmake/tests/test_util.py @@ -3,7 +3,6 @@ # found in the LICENSE file. import pathlib -import re import tempfile import hypothesis @@ -13,57 +12,6 @@ import pytest import zmake.util as util # Strategies for use with hypothesis -relative_path = st.from_regex( - regex=re.compile(r"\A\w{1,255}(/\w{1,255}){0,15}\Z", re.ASCII) -) - - -@hypothesis.given(relative_path, relative_path, relative_path) -@hypothesis.settings(deadline=60000) -def test_resolve_build_dir_with_build_dir( - platform_ec_subdir, project_subdir, build_subdir -): - with tempfile.TemporaryDirectory() as temp_dir_name: - platform_ec_dir = pathlib.Path(temp_dir_name) / platform_ec_subdir - build_dir = util.resolve_build_dir( - platform_ec_dir=platform_ec_dir, - project_dir=platform_ec_dir / project_subdir, - build_dir=platform_ec_dir / build_subdir, - ) - - assert build_dir == platform_ec_dir / build_subdir - - -@hypothesis.given(relative_path, relative_path) -@hypothesis.settings(deadline=60000) -def test_resolve_build_dir_invalid_project(platform_ec_subdir, project_subdir): - try: - with tempfile.TemporaryDirectory() as temp_dir_name: - platform_ec_dir = pathlib.Path(temp_dir_name) / platform_ec_subdir - util.resolve_build_dir( - platform_ec_dir=platform_ec_dir, - project_dir=platform_ec_dir / project_subdir, - build_dir=None, - ) - pytest.fail() - except Exception: - pass - - -@hypothesis.given(relative_path, relative_path) -@hypothesis.settings(deadline=60000) -def test_resolve_build_dir_from_project(platform_ec_subdir, project_subdir): - with tempfile.TemporaryDirectory() as temp_dir_name: - platform_ec_dir = pathlib.Path(temp_dir_name) / platform_ec_subdir - project_dir = platform_ec_dir / project_subdir - project_dir.mkdir(parents=True) - (project_dir / "zmake.yaml").touch() - build_dir = util.resolve_build_dir( - platform_ec_dir=platform_ec_dir, project_dir=project_dir, build_dir=None - ) - assert build_dir == platform_ec_dir / "build" / project_subdir - - version_integers = st.integers(min_value=0) version_tuples = st.tuples(version_integers, version_integers, version_integers) diff --git a/zephyr/zmake/tests/test_version.py b/zephyr/zmake/tests/test_version.py index a238a8ac02..b2c6b43fec 100644 --- a/zephyr/zmake/tests/test_version.py +++ b/zephyr/zmake/tests/test_version.py @@ -8,6 +8,7 @@ import unittest.mock as mock import pytest +import zmake.output_packers import zmake.project import zmake.version as version @@ -51,13 +52,13 @@ def _setup_example_repos(tmp_path): project_path.mkdir() project = zmake.project.Project( - project_path, - config_dict={ - "board": "foo", - "output-type": "raw", - "supported-toolchains": ["coreboot-sdk"], - "supported-zephyr-versions": ["v2.6"], - }, + zmake.project.ProjectConfig( + project_name="prj", + zephyr_board="foo", + output_packer=zmake.output_packers.RawBinPacker, + supported_toolchains=["coreboot-sdk"], + project_dir=project_path, + ), ) # Has one commit. zephyr_base = tmp_path / "zephyr_base" diff --git a/zephyr/zmake/tests/test_zmake.py b/zephyr/zmake/tests/test_zmake.py index 163159b9c5..f735d942ed 100644 --- a/zephyr/zmake/tests/test_zmake.py +++ b/zephyr/zmake/tests/test_zmake.py @@ -18,6 +18,7 @@ from testfixtures import LogCapture import zmake.build_config import zmake.jobserver import zmake.multiproc as multiproc +import zmake.output_packers import zmake.project import zmake.toolchains import zmake.zmake as zm @@ -33,10 +34,14 @@ class FakeProject: def __init__(self): self.packer = mock.Mock() self.packer.pack_firmware = mock.Mock(return_value=[]) - self.project_dir = pathlib.Path("FakeProjectDir") - self.config = mock.Mock() - self.config.supported_zephyr_versions = [(2, 5)] + self.config = zmake.project.ProjectConfig( + project_name="fakeproject", + zephyr_board="fakeboard", + supported_toolchains=["llvm"], + output_packer=zmake.output_packers.ElfPacker, + project_dir=pathlib.Path("FakeProjectDir"), + ) @staticmethod def iter_builds(): @@ -123,12 +128,10 @@ def do_test_with_log_level(log_level, use_configure=False, fnames=None): re.compile(r".*build-rw"): get_test_filepath("rw"), } zephyr_base = mock.Mock() - zephyr_root = mock.Mock() zmk = zm.Zmake( jobserver=FakeJobserver(fnames), zephyr_base=zephyr_base, - zephyr_root=zephyr_root, ) with LogCapture(level=log_level) as cap: @@ -142,13 +145,16 @@ VERSION_TWEAK = 0 EXTRAVERSION = """ ) + (pathlib.Path(tmpname) / "project_name.txt").write_text("fakeproject") zephyr_base.resolve = mock.Mock(return_value=pathlib.Path(tmpname)) with patch("zmake.version.get_version_string", return_value="123"): - with patch.object(zmake.project, "Project", return_value=FakeProject()): + with patch.object( + zmake.project, + "find_projects", + return_value={"fakeproject": FakeProject()}, + ): if use_configure: - zmk.configure( - pathlib.Path(tmpname), build_dir=pathlib.Path("build") - ) + zmk.configure("fakeproject", build_dir=pathlib.Path("build")) else: with patch("zmake.version.write_version_header", autospec=True): zmk.build(pathlib.Path(tmpname)) diff --git a/zephyr/zmake/zmake/__main__.py b/zephyr/zmake/zmake/__main__.py index ea639584cc..aef897d1d3 100644 --- a/zephyr/zmake/zmake/__main__.py +++ b/zephyr/zmake/zmake/__main__.py @@ -161,21 +161,11 @@ def main(argv=None): parser.add_argument( "--zephyr-base", type=pathlib.Path, help="Path to Zephyr OS repository" ) - parser.add_argument( - "--zephyr-root", - type=pathlib.Path, - help="Path to Zephyr OS repos, must contain subdirs like v1.2", - ) sub = parser.add_subparsers(dest="subcommand", help="Subcommand") sub.required = True configure = sub.add_parser("configure") - configure.add_argument( - "--ignore-unsupported-zephyr-version", - action="store_true", - help="Don't warn about using an unsupported Zephyr version", - ) configure.add_argument("-t", "--toolchain", help="Name of toolchain to use") configure.add_argument( "--bringup", @@ -184,6 +174,12 @@ def main(argv=None): help="Enable bringup debugging features", ) configure.add_argument( + "--allow-warnings", + action="store_true", + default=False, + help="Do not treat warnings as errors", + ) + configure.add_argument( "-B", "--build-dir", type=pathlib.Path, help="Build directory" ) configure.add_argument( @@ -200,7 +196,8 @@ def main(argv=None): help="Test the .elf file after configuration", ) configure.add_argument( - "project_dir", type=pathlib.Path, help="Path to the project to build" + "project_name_or_dir", + help="Path to the project to build", ) configure.add_argument( "-c", diff --git a/zephyr/zmake/zmake/configlib.py b/zephyr/zmake/zmake/configlib.py new file mode 100644 index 0000000000..3c6aa649c5 --- /dev/null +++ b/zephyr/zmake/zmake/configlib.py @@ -0,0 +1,40 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +"""This module defines helpers accessible to all BUILD.py files.""" + +import zmake.output_packers + + +def _register_project(**kwargs): + kwargs.setdefault("project_dir", here) # noqa: F821 + register_project(**kwargs) # noqa: F821 + + +def register_host_project(**kwargs): + kwargs.setdefault("zephyr_board", "native_posix") + kwargs.setdefault("supported_toolchains", ["llvm", "host"]) + kwargs.setdefault("output_packer", zmake.output_packers.ElfPacker) + _register_project(**kwargs) + + +def register_host_test(test_name, **kwargs): + kwargs.setdefault("is_test", True) + register_host_project(project_name="test-{}".format(test_name), **kwargs) + + +def register_raw_project(**kwargs): + kwargs.setdefault("supported_toolchains", ["coreboot-sdk", "zephyr"]) + kwargs.setdefault("output_packer", zmake.output_packers.RawBinPacker) + _register_project(**kwargs) + + +def register_binman_project(**kwargs): + kwargs.setdefault("output_packer", zmake.output_packers.BinmanPacker) + register_raw_project(**kwargs) + + +def register_npcx_project(**kwargs): + kwargs.setdefault("output_packer", zmake.output_packers.NpcxPacker) + register_binman_project(**kwargs) diff --git a/zephyr/zmake/zmake/project.py b/zephyr/zmake/zmake/project.py index 7ffe4ebc19..0e2e97fd14 100644 --- a/zephyr/zmake/zmake/project.py +++ b/zephyr/zmake/zmake/project.py @@ -3,24 +3,14 @@ # found in the LICENSE file. """Module for project config wrapper object.""" +import dataclasses import logging import pathlib -import warnings - -import yaml import zmake.build_config as build_config +import zmake.configlib as configlib import zmake.modules as modules -import zmake.output_packers as packers import zmake.toolchains as toolchains -import zmake.util as util - -# The version of jsonschema in the chroot has a bunch of -# DeprecationWarnings that fire when we import it. Suppress these -# during the import to keep the noise down. -with warnings.catch_warnings(): - warnings.simplefilter("ignore") - import jsonschema def module_dts_overlay_name(modpath, board_name): @@ -36,121 +26,85 @@ def module_dts_overlay_name(modpath, board_name): return modpath / "zephyr" / "dts" / "board-overlays" / "{}.dts".format(board_name) -def find_projects(root_dir): - """Finds all zmake projects in root_dir. +def load_config_file(path): + """Load a BUILD.py config file and create associated projects. Args: - root_dir: the root dir as a pathlib.Path object + path: A pathlib.Path to the BUILD.py file. - Yields: - Project: The next project found. + Returns: + A list of Project objects specified by the file. """ - logging.info("Finding zmake targets under '%s'.", root_dir) - for path in pathlib.Path(root_dir).rglob("zmake.yaml"): - yield Project(path.parent) + projects = [] + def register_project(**kwargs): + projects.append(Project(ProjectConfig(**kwargs))) -class ProjectConfig: - """An object wrapping zmake.yaml.""" - - validator = jsonschema.Draft7Validator - schema = { - "type": "object", - "required": [ - "board", - "output-type", - "supported-toolchains", - "supported-zephyr-versions", - ], - "properties": { - "supported-zephyr-versions": { - "type": "array", - "items": { - "type": "string", - "enum": ["v2.6", "v2.7", "v2.8"], - }, - "minItems": 1, - "uniqueItems": True, - }, - "board": { - "type": "string", - }, - "modules": { - "type": "array", - "items": { - "type": "string", - "enum": list(modules.known_modules), - }, - }, - "output-type": { - "type": "string", - "enum": list(packers.packer_registry), - }, - "supported-toolchains": { - "type": "array", - "items": { - "type": "string", - "enum": list(toolchains.support_classes), - }, - }, - "is-test": { - "type": "boolean", - }, - "dts-overlays": { - "type": "array", - "items": { - "type": "string", - }, - }, - }, + # The Python environment passed to the config file. + config_globals = { + "register_project": register_project, + "here": path.parent.resolve(), } - def __init__(self, config_dict): - self.validator.check_schema(self.schema) - jsonschema.validate(config_dict, self.schema, cls=self.validator) - self.config_dict = config_dict + # First, load the global helper functions. + code = compile( + pathlib.Path(configlib.__file__).read_bytes(), + configlib.__file__, + "exec", + ) + exec(code, config_globals) - @property - def supported_zephyr_versions(self): - return [ - util.parse_zephyr_version(x) - for x in self.config_dict["supported-zephyr-versions"] - ] + # Next, load the BUILD.py + logging.info("Loading config file %s", path) + code = compile(path.read_bytes(), str(path), "exec") + exec(code, config_globals) + logging.info("Config file %s defines %s projects", path, len(projects)) + return projects - @property - def board(self): - return self.config_dict["board"] - @property - def modules(self): - return self.config_dict.get("modules", list(modules.known_modules)) +def find_projects(root_dir): + """Finds all zmake projects in root_dir. - @property - def output_packer(self): - return packers.packer_registry[self.config_dict["output-type"]] + Args: + root_dir: the root dir as a pathlib.Path object - @property - def supported_toolchains(self): - return self.config_dict["supported-toolchains"] + Returns: + A dictionary mapping project names to Project objects. + """ + logging.info("Finding zmake targets under '%s'.", root_dir) + found_projects = {} + for path in pathlib.Path(root_dir).rglob("BUILD.py"): + for project in load_config_file(path): + if project.config.project_name in found_projects: + raise KeyError( + "Duplicate project defined: {} (in {})".format( + project.config.project_name, path + ) + ) + found_projects[project.config.project_name] = project + return found_projects - @property - def is_test(self): - return self.config_dict.get("is-test", False) - @property - def dts_overlays(self): - return self.config_dict.get("dts-overlays", []) +@dataclasses.dataclass +class ProjectConfig: + project_name: str + zephyr_board: str + supported_toolchains: "list[str]" + output_packer: type + modules: "list[str]" = dataclasses.field( + default_factory=lambda: modules.known_modules, + ) + is_test: bool = dataclasses.field(default=False) + dts_overlays: "list[str]" = dataclasses.field(default_factory=list) + kconfig_files: "list[pathlib.Path]" = dataclasses.field(default_factory=list) + project_dir: pathlib.Path = dataclasses.field(default_factory=pathlib.Path) class Project: """An object encapsulating a project directory.""" - def __init__(self, project_dir, config_dict=None): - self.project_dir = project_dir.resolve() - if not config_dict: - with open(self.project_dir / "zmake.yaml") as f: - config_dict = yaml.safe_load(f) - self.config = ProjectConfig(config_dict) + def __init__(self, config): + self.config = config self.packer = self.config.output_packer(self) def iter_builds(self): @@ -159,10 +113,15 @@ class Project: Yields: 2-tuples of a build configuration name and a BuildConfig. """ - conf = build_config.BuildConfig(cmake_defs={"BOARD": self.config.board}) - prj_conf = self.project_dir / "prj.conf" + conf = build_config.BuildConfig(cmake_defs={"BOARD": self.config.zephyr_board}) + + kconfig_files = [] + prj_conf = self.config.project_dir / "prj.conf" if prj_conf.is_file(): - conf |= build_config.BuildConfig(kconfig_files=[prj_conf]) + kconfig_files.append(prj_conf) + kconfig_files.extend(self.config.kconfig_files) + conf |= build_config.BuildConfig(kconfig_files=kconfig_files) + for build_name, packer_config in self.packer.configs(): yield build_name, conf | packer_config @@ -178,11 +137,11 @@ class Project: """ overlays = [] for module_path in modules.values(): - dts_path = module_dts_overlay_name(module_path, self.config.board) + dts_path = module_dts_overlay_name(module_path, self.config.zephyr_board) if dts_path.is_file(): overlays.append(dts_path.resolve()) - overlays.extend(self.project_dir / f for f in self.config.dts_overlays) + overlays.extend(self.config.dts_overlays) if overlays: return build_config.BuildConfig( @@ -218,7 +177,7 @@ class Project: except KeyError as e: raise KeyError( "The {!r} module is required by the {} project, but is not " - "available.".format(module, self.project_dir) + "available.".format(module, self.config.project_dir) ) from e return result diff --git a/zephyr/zmake/zmake/toolchains.py b/zephyr/zmake/zmake/toolchains.py index 6e25301b7d..671c539c0f 100644 --- a/zephyr/zmake/zmake/toolchains.py +++ b/zephyr/zmake/zmake/toolchains.py @@ -26,7 +26,7 @@ class GenericToolchain: # know if it's installed. Simply return False to indicate not # installed. An unknown toolchain would only be used if -t # was manually passed to zmake, and is not valid to put in a - # zmake.yaml file. + # BUILD.py file. return False def get_build_config(self): @@ -107,7 +107,7 @@ class ZephyrToolchain(GenericToolchain): if not self.zephyr_sdk_install_dir: raise RuntimeError( "No installed Zephyr SDK was found" - " (see docs/zephyr_build.md for documentation)" + " (see docs/zephyr/zephyr_build.md for documentation)" ) tc_vars = { "ZEPHYR_SDK_INSTALL_DIR": str(self.zephyr_sdk_install_dir), diff --git a/zephyr/zmake/zmake/util.py b/zephyr/zmake/zmake/util.py index 0908993267..ee3b245b78 100644 --- a/zephyr/zmake/zmake/util.py +++ b/zephyr/zmake/zmake/util.py @@ -64,19 +64,6 @@ def locate_cros_checkout(): raise FileNotFoundError("Unable to locate a ChromiumOS checkout") -def locate_zephyr_base(zephyr_root, version): - """Locate the path to the Zephyr RTOS in a ChromiumOS checkout. - - Args: - checkout: The path to the ChromiumOS checkout. - version: The requested zephyr version, as a tuple of integers. - - Returns: - The path to the Zephyr source. - """ - return zephyr_root / "v{}.{}".format(*version[:2]) - - def read_kconfig_file(path): """Parse a Kconfig file. @@ -132,23 +119,6 @@ def write_kconfig_file(path, config, only_if_changed=True): f.write("{}={}\n".format(name, value)) -def parse_zephyr_version(version_string): - """Parse a human-readable version string (e.g., "v2.4") as a tuple. - - Args: - version_string: The human-readable version string. - - Returns: - A 2-tuple or 3-tuple of integers representing the version. - """ - match = re.fullmatch(r"v?(\d+)[._](\d+)(?:[._](\d+))?", version_string) - if not match: - raise ValueError( - "{} does not look like a Zephyr version.".format(version_string) - ) - return tuple(int(x) for x in match.groups() if x is not None) - - def read_zephyr_version(zephyr_base): """Read the Zephyr version from a Zephyr OS checkout. @@ -213,36 +183,3 @@ def log_multi_line(logger, level, message): for line in message.splitlines(): if line: logger.log(level, line) - - -def resolve_build_dir(platform_ec_dir, project_dir, build_dir): - """Resolve the build directory using platform/ec/build/... as default. - - Args: - platform_ec_dir: The path to the chromiumos source's platform/ec - directory. - project_dir: The directory of the project. - build_dir: The directory to build in (may be None). - Returns: - The resolved build directory (using build_dir if not None). - """ - if build_dir: - return build_dir - - if not pathlib.Path.exists(project_dir / "zmake.yaml"): - raise OSError("Invalid configuration") - - # Resolve project_dir to absolute path. - project_dir = project_dir.resolve() - - # Compute the path of project_dir relative to platform_ec_dir. - project_relative_path = pathlib.Path.relative_to(project_dir, platform_ec_dir) - - # Make sure that the project_dir is a subdirectory of platform_ec_dir. - if platform_ec_dir / project_relative_path != project_dir: - raise OSError( - "Can't resolve project directory {} which is not a subdirectory" - " of the platform/ec directory {}".format(project_dir, platform_ec_dir) - ) - - return platform_ec_dir / "build" / project_relative_path diff --git a/zephyr/zmake/zmake/version.py b/zephyr/zmake/zmake/version.py index 47aba6d804..b2b897cf5b 100644 --- a/zephyr/zmake/zmake/version.py +++ b/zephyr/zmake/zmake/version.py @@ -90,7 +90,6 @@ def get_version_string(project, zephyr_base, modules, static=False): the build for the OS. """ major_version, minor_version, *_ = util.read_zephyr_version(zephyr_base) - project_id = project.project_dir.parts[-1] num_commits = 0 if static: @@ -116,7 +115,11 @@ def get_version_string(project, zephyr_base, modules, static=False): ) return "{}_v{}.{}.{}-{}".format( - project_id, major_version, minor_version, num_commits, vcs_hashes + project.config.project_name, + major_version, + minor_version, + num_commits, + vcs_hashes, ) diff --git a/zephyr/zmake/zmake/zmake.py b/zephyr/zmake/zmake/zmake.py index 0fa30640c9..d2559a9270 100644 --- a/zephyr/zmake/zmake/zmake.py +++ b/zephyr/zmake/zmake/zmake.py @@ -153,16 +153,17 @@ class Zmake: jobs=0, modules_dir=None, zephyr_base=None, - zephyr_root=None, ): zmake.multiproc.reset() self._checkout = checkout - self._zephyr_base = zephyr_base - if zephyr_root: - self._zephyr_root = zephyr_root + if zephyr_base: + self.zephyr_base = zephyr_base else: - self._zephyr_root = ( - self.checkout / "src" / "third_party" / "zephyr" / "main" + # TODO(b/205884929): Drop v2.7 from path. This is + # intentionally hard-coded here as an intermediate step to + # cutting over to the main branch. + self.zephyr_base = ( + self.checkout / "src" / "third_party" / "zephyr" / "main" / "v2.7" ) if modules_dir: @@ -188,59 +189,62 @@ class Zmake: self._checkout = util.locate_cros_checkout() return self._checkout.resolve() - def locate_zephyr_base(self, version): - """Locate the Zephyr OS repository. - - Args: - version: If a Zephyr OS base was not supplied to Zmake, - which version to search for as a tuple of integers. - This argument is ignored if a Zephyr base was supplied - to Zmake. - Returns: - A pathlib.Path to the found Zephyr OS repository. - """ - if self._zephyr_base: - return self._zephyr_base - - return util.locate_zephyr_base(self._zephyr_root, version) - def configure( self, - project_dir, + project_name_or_dir, build_dir=None, toolchain=None, - ignore_unsupported_zephyr_version=False, build_after_configure=False, test_after_configure=False, bringup=False, coverage=False, + allow_warnings=False, ): - """Set up a build directory to later be built by "zmake build".""" - project = zmake.project.Project(project_dir) - supported_versions = project.config.supported_zephyr_versions - - zephyr_base = self.locate_zephyr_base(max(supported_versions)).resolve() - - # Ignore the patchset from the Zephyr version. - zephyr_version = util.read_zephyr_version(zephyr_base)[:2] - - if ( - not ignore_unsupported_zephyr_version - and zephyr_version not in supported_versions - ): - raise ValueError( - "The Zephyr OS version (v{}.{}) is not supported by the " - "project. You may wish to either configure zmake.yaml to " - "support this version, or pass " - "--ignore-unsupported-zephyr-version.".format(*zephyr_version) - ) - - # Resolve build_dir if needed. - build_dir = util.resolve_build_dir( - platform_ec_dir=self.module_paths["ec"], - project_dir=project_dir, + """Locate a project by name or directory and then call _configure.""" + root_dir = pathlib.Path(project_name_or_dir) + if not root_dir.is_dir(): + root_dir = self.module_paths["ec"] / "zephyr" + found_projects = zmake.project.find_projects(root_dir) + if len(found_projects) == 1: + # Likely passed directory path, wants to build only + # project from there. + project = next(iter(found_projects.values())) + else: + try: + project = found_projects[project_name_or_dir] + except KeyError as e: + raise KeyError("No project named {}".format(project_name_or_dir)) from e + return self._configure( + project=project, build_dir=build_dir, + toolchain=toolchain, + build_after_configure=build_after_configure, + test_after_configure=test_after_configure, + bringup=bringup, + coverage=coverage, + allow_warnings=allow_warnings, ) + + def _configure( + self, + project, + build_dir=None, + toolchain=None, + build_after_configure=False, + test_after_configure=False, + bringup=False, + coverage=False, + allow_warnings=False, + ): + """Set up a build directory to later be built by "zmake build".""" + # Resolve build_dir if needed. + if not build_dir: + build_dir = ( + self.module_paths["ec"] + / "build" + / "zephyr" + / project.config.project_name + ) # Make sure the build directory is clean. if os.path.exists(build_dir): self.logger.info("Clearing old build directory %s", build_dir) @@ -248,8 +252,9 @@ class Zmake: generated_include_dir = (build_dir / "include").resolve() base_config = zmake.build_config.BuildConfig( - environ_defs={"ZEPHYR_BASE": str(zephyr_base), "PATH": "/usr/bin"}, + environ_defs={"ZEPHYR_BASE": str(self.zephyr_base), "PATH": "/usr/bin"}, cmake_defs={ + "CMAKE_EXPORT_COMPILE_COMMANDS": "ON", "DTS_ROOT": str(self.module_paths["ec"] / "zephyr"), "SYSCALL_INCLUDE_DIRS": str( self.module_paths["ec"] / "zephyr" / "include" / "drivers" @@ -267,7 +272,7 @@ class Zmake: # Symlink the Zephyr base into the build directory so it can # be used in the build phase. - util.update_symlink(zephyr_base, build_dir / "zephyr_base") + util.update_symlink(self.zephyr_base, build_dir / "zephyr_base") dts_overlay_config = project.find_dts_overlays(module_paths) @@ -282,15 +287,21 @@ class Zmake: base_config |= zmake.build_config.BuildConfig( kconfig_defs={"CONFIG_COVERAGE": "y"} ) + if allow_warnings: + base_config |= zmake.build_config.BuildConfig( + cmake_defs={"ALLOW_WARNINGS": "ON"} + ) if not build_dir.exists(): build_dir = build_dir.mkdir() if not generated_include_dir.exists(): generated_include_dir.mkdir() processes = [] - self.logger.info("Building %s in %s.", project_dir, build_dir) + self.logger.info("Building %s in %s.", project.config.project_name, build_dir) for build_name, build_config in project.iter_builds(): - self.logger.info("Configuring %s:%s.", project_dir, build_name) + self.logger.info( + "Configuring %s:%s.", project.config.project_name, build_name + ) config = ( base_config | toolchain_config @@ -302,7 +313,7 @@ class Zmake: kconfig_file = build_dir / "kconfig-{}.conf".format(build_name) proc = config.popen_cmake( self.jobserver, - project_dir, + project.config.project_dir, output_dir, kconfig_file, stdin=subprocess.DEVNULL, @@ -311,7 +322,7 @@ class Zmake: encoding="utf-8", errors="replace", ) - job_id = "{}:{}".format(project_dir, build_name) + job_id = "{}:{}".format(project.config.project_name, build_name) zmake.multiproc.log_output( self.logger, logging.DEBUG, @@ -335,8 +346,10 @@ class Zmake: if proc.wait(): raise OSError(get_process_failure_msg(proc)) - # Create symlink to project - util.update_symlink(project_dir, build_dir / "project") + # To reconstruct a Project object later, we need to know the + # name and project directory. + (build_dir / "project_name.txt").write_text(project.config.project_name) + util.update_symlink(project.config.project_dir, build_dir / "project") if test_after_configure: rv = self.test(build_dir=build_dir) @@ -393,7 +406,8 @@ class Zmake: dirs = {} build_dir = build_dir.resolve() - project = zmake.project.Project(build_dir / "project") + found_projects = zmake.project.find_projects(build_dir / "project") + project = found_projects[(build_dir / "project_name.txt").read_text()] # Compute the version string. version_string = zmake.version.get_version_string( @@ -477,7 +491,8 @@ class Zmake: self.build(build_dir, output_files_out=output_files) # If the project built but isn't a test, just bail. - project = zmake.project.Project(build_dir / "project") + found_projects = zmake.project.find_projects(build_dir / "project") + project = found_projects[(build_dir / "project_name.txt").read_text()] if not project.config.is_test: return 0 @@ -514,17 +529,19 @@ class Zmake: def testall(self): """Test all the valid test targets""" tmp_dirs = [] - for project in zmake.project.find_projects(self.module_paths["ec"] / "zephyr"): + for project in zmake.project.find_projects( + self.module_paths["ec"] / "zephyr" + ).values(): is_test = project.config.is_test temp_build_dir = tempfile.mkdtemp( - suffix="-{}".format(os.path.basename(project.project_dir.as_posix())), + suffix="-{}".format(project.config.project_name), prefix="zbuild-", ) tmp_dirs.append(temp_build_dir) # Configure and run the test. self.executor.append( - func=lambda: self.configure( - project_dir=project.project_dir, + func=lambda: self._configure( + project=project, build_dir=pathlib.Path(temp_build_dir), build_after_configure=True, test_after_configure=is_test, @@ -601,9 +618,9 @@ class Zmake: return 0 def _coverage_compile_only(self, project, build_dir, lcov_file): - self.logger.info("Building %s in %s", project.project_dir, build_dir) - rv = self.configure( - project_dir=project.project_dir, + self.logger.info("Building %s in %s", project.config.project_name, build_dir) + rv = self._configure( + project=project, build_dir=build_dir, build_after_configure=False, test_after_configure=False, @@ -628,7 +645,8 @@ class Zmake: ) # Use ninja to compile the all.libraries target. - build_project = zmake.project.Project(build_dir / "project") + found_projects = zmake.project.find_projects(build_dir / "project") + build_project = found_projects[(build_dir / "project_name.txt").read_text()] procs = [] dirs = {} @@ -679,10 +697,12 @@ class Zmake: lcov_file, is_configured=False, ): - self.logger.info("Running test %s in %s", project.project_dir, build_dir) + self.logger.info( + "Running test %s in %s", project.config.project_name, build_dir + ) if not is_configured: - rv = self.configure( - project_dir=project.project_dir, + rv = self._configure( + project=project, build_dir=build_dir, build_after_configure=True, test_after_configure=True, @@ -699,12 +719,11 @@ class Zmake: """Builds all targets with coverage enabled, and then runs the tests.""" all_lcov_files = [] root_dir = self.module_paths["ec"] / "zephyr" - for project in zmake.project.find_projects(root_dir): + for project in zmake.project.find_projects(root_dir).values(): is_test = project.config.is_test - rel_path = project.project_dir.relative_to(root_dir) - project_build_dir = pathlib.Path(build_dir).joinpath(rel_path) - lcov_file = pathlib.Path(build_dir).joinpath( - str(rel_path).replace("/", "_") + ".info" + project_build_dir = pathlib.Path(build_dir) / project.config.project_name + lcov_file = pathlib.Path(build_dir) / "{}.info".format( + project.config.project_name ) all_lcov_files.append(lcov_file) if is_test: |