diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2017-02-28 10:37:24 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2017-03-02 23:44:10 +0000 |
| commit | 7bf6ffdeb5a1b0b88a870cd96bd444560ea29a17 (patch) | |
| tree | aa577cbc3c4814ba3139430100da0d174032a562 | |
| parent | 497db9e3c1d1173f42315ca192d3527c367fabca (diff) | |
| download | chrome-ec-7bf6ffdeb5a1b0b88a870cd96bd444560ea29a17.tar.gz | |
npcx: flash: Lock all flash access before flash_execute_cmd() calls
Any call to flash_execute_cmd() can interfere with UMA / mapped read
access, so grab the mutex first.
BUG=b:35587287,b:35848370
BRANCH=reef
TEST=Verify SW sync completes 8 hour stress test on kevin. Also verify
'ectool flashspiinfo' succeeds.
Change-Id: Ib1b04371546c27517c1b1ac860e9afbc1fed435e
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/447905
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
(cherry picked from commit 850a227aea334bbb82119cf7811d4a53b72de23e)
Reviewed-on: https://chromium-review.googlesource.com/449056
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | chip/npcx/flash.c | 41 |
1 files changed, 39 insertions, 2 deletions
diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c index a11679c231..e474f2ba64 100644 --- a/chip/npcx/flash.c +++ b/chip/npcx/flash.c @@ -66,6 +66,9 @@ static void flash_tristate(int enable) static void flash_execute_cmd(uint8_t code, uint8_t cts) { + /* Flash mutex must be held while executing UMA commands. */ + ASSERT(flash_lock.lock); + /* set UMA_CODE */ NPCX_UMA_CODE = code; /* execute UMA flash transaction */ @@ -146,36 +149,61 @@ static void flash_set_address(uint32_t dest_addr) static uint8_t flash_get_status1(void) { + uint8_t ret; + if (all_protected) return saved_sr1; + /* Lock physical flash operations */ + flash_lock_mapped_storage(1); + /* Disable tri-state */ TRISTATE_FLASH(0); /* Read status register1 */ flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_RD_1BYTE); /* Enable tri-state */ TRISTATE_FLASH(1); - return NPCX_UMA_DB0; + + ret = NPCX_UMA_DB0; + + /* Unlock physical flash operations */ + flash_lock_mapped_storage(0); + + return ret; } static uint8_t flash_get_status2(void) { + uint8_t ret; + if (all_protected) return saved_sr2; + /* Lock physical flash operations */ + flash_lock_mapped_storage(1); + /* Disable tri-state */ TRISTATE_FLASH(0); /* Read status register2 */ flash_execute_cmd(CMD_READ_STATUS_REG2, MASK_CMD_RD_1BYTE); /* Enable tri-state */ TRISTATE_FLASH(1); - return NPCX_UMA_DB0; + + ret = NPCX_UMA_DB0; + + /* Unlock physical flash operations */ + flash_lock_mapped_storage(0); + + return ret; } #ifdef CONFIG_HOSTCMD_FLASH_SPI_INFO void flash_get_mfr_dev_id(uint8_t *dest) { + /* Lock physical flash operations */ + flash_lock_mapped_storage(1); + /* Disable tri-state */ TRISTATE_FLASH(0); /* Read manufacturer and device ID. Send cmd=0x90 + 24-bit address=0 */ @@ -187,10 +215,16 @@ void flash_get_mfr_dev_id(uint8_t *dest) dest[0] = NPCX_UMA_DB0; dest[1] = NPCX_UMA_DB1; + + /* Unlock physical flash operations */ + flash_lock_mapped_storage(0); } void flash_get_jedec_id(uint8_t *dest) { + /* Lock physical flash operations */ + flash_lock_mapped_storage(1); + /* Disable tri-state */ TRISTATE_FLASH(0); /* Read manufacturer and device ID */ @@ -201,6 +235,9 @@ void flash_get_jedec_id(uint8_t *dest) dest[0] = NPCX_UMA_DB0; dest[1] = NPCX_UMA_DB1; dest[2] = NPCX_UMA_DB2; + + /* Unlock physical flash operations */ + flash_lock_mapped_storage(0); } #endif /* CONFIG_HOSTCMD_FLASH_SPI_INFO */ |