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| author | Bruce <Bruce.Wan@quantatw.com> | 2017-02-18 13:38:45 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2017-02-23 09:03:07 +0000 |
| commit | f69caf5ab7b951beeba501418c6056c655ff7098 (patch) | |
| tree | 08daa063babe17f20c2f163d49f31cdf2a7fd55e | |
| parent | b6fa203d58ca11d18bf498713466da0a25a7fca2 (diff) | |
| download | chrome-ec-f69caf5ab7b951beeba501418c6056c655ff7098.tar.gz | |
snappy: Open interrupt gate for trackpad
Follow reef setting.
BUG=none
BRANCH=reef
TEST=Verified the value was 0 by gpioget command.
Change-Id: Iaa03f6937e4143e38f9d4c8b293b596089188b8c
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/444486
Commit-Ready: Chen Wisley <wisley.chen@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
(cherry picked from commit 237b450f4bac463263cc2d6364505241eb54e084)
Reviewed-on: https://chromium-review.googlesource.com/446136
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | board/snappy/gpio.inc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/board/snappy/gpio.inc b/board/snappy/gpio.inc index bbc9a1d786..a605d1b675 100644 --- a/board/snappy/gpio.inc +++ b/board/snappy/gpio.inc @@ -85,6 +85,11 @@ GPIO(PP3300_PG, PIN(6, 2), GPIO_INPUT) GPIO(EN_PP5000, PIN(C, 6), GPIO_OUT_LOW) GPIO(PP5000_PG, PIN(7, 1), GPIO_INPUT) GPIO(EN_P3300_TRACKPAD_ODL, PIN(3, 2), GPIO_ODR_LOW) +/* + * Control the gate for trackpad IRQ. High closes the gate. + * This is always set low so that the OS can manage the trackpad. + */ +GPIO(TRACKPAD_INT_GATE, PIN(A, 1), GPIO_OUT_LOW) GPIO(PCH_SYS_PWROK, PIN(E, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK */ GPIO(ENABLE_BACKLIGHT, PIN(9, 7), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_BL_EN_OD */ @@ -102,7 +107,6 @@ GPIO(PCH_WAKE_L, PIN(8, 1), GPIO_ODR_HIGH) /* EC_PCH_WAKE_ODL */ GPIO(USB_C0_HPD_1P8_ODL, PIN(9, 4), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(USB_C1_HPD_1P8_ODL, PIN(A, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(USB2_OTG_ID, PIN(A, 1), GPIO_OUTPUT) /* FIXME: what should this init to? */ GPIO(USB2_OTG_VBUSSENSE, PIN(9, 5), GPIO_OUTPUT) /* EC_PCH_RTCRST is a sledgehammer for resetting SoC state and should rarely |