diff options
author | Jett Rink <jettrink@chromium.org> | 2018-03-08 10:26:52 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-09 17:38:47 -0800 |
commit | badc848ab32755f5d156120e35ce8ea2cc419ca5 (patch) | |
tree | 9982cae59a445a6695445e679da252f18a6a5829 | |
parent | 20e9a125e51a132bffd4ec0020de7da44889379d (diff) | |
download | chrome-ec-badc848ab32755f5d156120e35ce8ea2cc419ca5.tar.gz |
yorp: add USB-C, Power, Charging skeleton code
BRANCH=none
BUG=b:73811887,b:74127309
TEST=none
Change-Id: Iac2d90e63db151d37db871dc33681dc35e9127a5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/955941
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
-rw-r--r-- | board/yorp/battery.c | 32 | ||||
-rw-r--r-- | board/yorp/board.c | 114 | ||||
-rw-r--r-- | board/yorp/board.h | 83 | ||||
-rw-r--r-- | board/yorp/build.mk | 4 | ||||
-rw-r--r-- | board/yorp/ec.tasklist | 8 | ||||
-rw-r--r-- | board/yorp/gpio.inc | 2 | ||||
-rw-r--r-- | board/yorp/usb_pd_policy.c | 352 |
7 files changed, 592 insertions, 3 deletions
diff --git a/board/yorp/battery.c b/board/yorp/battery.c new file mode 100644 index 0000000000..4040195d81 --- /dev/null +++ b/board/yorp/battery.c @@ -0,0 +1,32 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery.h" +#include "battery_smart.h" + +/* TODO(b/74353771): Ensure settings here are correct */ +static const struct battery_info info = { + .voltage_max = 13200, /* mV */ + .voltage_normal = 11550, + .voltage_min = 9000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, +}; +const struct battery_info *battery_get_info(void) +{ + return &info; +} +int board_cut_off_battery(void) +{ + /* TODO(b/74353771): Ensure settings here are correct */ + return EC_RES_ERROR; +} diff --git a/board/yorp/board.c b/board/yorp/board.c index 6ea1816b84..ef2ac11afa 100644 --- a/board/yorp/board.c +++ b/board/yorp/board.c @@ -5,17 +5,31 @@ /* Yorp board-specific configuration */ +#include "adc.h" +#include "adc_chip.h" #include "common.h" +#include "driver/charger/bd9995x.h" +#include "driver/tcpm/anx74xx.h" +#include "driver/tcpm/ps8xxx.h" +#include "driver/tcpm/tcpci.h" +#include "driver/tcpm/tcpm.h" #include "extpower.h" #include "gpio.h" #include "hooks.h" +#include "i2c.h" #include "lid_switch.h" #include "power.h" #include "power_button.h" #include "switch.h" #include "system.h" +#include "tcpci.h" +#include "usb_mux.h" +#include "usbc_ppc.h" #include "util.h" +#define USB_PD_PORT_ANX74XX 0 +#define USB_PD_PORT_PS8751 1 + static void tcpc_alert_event(enum gpio_signal signal) { /* TODO(b/74127309): Flesh out USB code */ @@ -23,12 +37,13 @@ static void tcpc_alert_event(enum gpio_signal signal) static void ppc_interrupt(enum gpio_signal signal) { - /* TODO(b/74127309): Flesh out USB code*/ + /* TODO(b/74127309): Flesh out USB code */ } /* Must come after other header files and GPIO interrupts*/ #include "gpio_list.h" +/* Wake pins */ const enum gpio_signal hibernate_wake_pins[] = { GPIO_LID_OPEN, GPIO_AC_PRESENT, @@ -36,6 +51,17 @@ const enum gpio_signal hibernate_wake_pins[] = { }; const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); +/* ADC channels */ +const struct adc_t adc_channels[] = { + /* Vbus C0 sensing (10x voltage divider). PPVAR_USB_C0_VBUS */ + [ADC_VBUS_C0] = { + "VBUS_C0", NPCX_ADC_CH4, ADC_MAX_VOLT*10, ADC_READ_MAX+1, 0}, + /* Vbus C1 sensing (10x voltage divider). PPVAR_USB_C1_VBUS */ + [ADC_VBUS_C1] = { + "VBUS_C1", NPCX_ADC_CH9, ADC_MAX_VOLT*10, ADC_READ_MAX+1, 0}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + /* Power signal list. Must match order of enum power_signal. */ const struct power_signal_info power_signal_list[] = { @@ -56,6 +82,17 @@ const struct power_signal_info power_signal_list[] = { }; BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); +/* I2C port map. */ +const struct i2c_port_t i2c_ports[] = { +/* TODO(b/74387239): increase I2C bus speeds after bringup. */ + {"battery", I2C_PORT_BATTERY, 100, GPIO_I2C0_SCL, GPIO_I2C0_SDA}, + {"tcpc0", I2C_PORT_TCPC0, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + {"tcpc1", I2C_PORT_TCPC1, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + {"eeprom", I2C_PORT_EEPROM, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, + {"charger", I2C_PORT_CHARGER, 100, GPIO_I2C4_SCL, GPIO_I2C4_SDA}, + {"sensor", I2C_PORT_SENSOR, 100, GPIO_I2C7_SCL, GPIO_I2C7_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); /* Called by APL power state machine when transitioning from G3 to S5 */ static void chipset_pre_init(void) @@ -85,3 +122,78 @@ void chipset_do_shutdown(void) gpio_get_level(GPIO_PP3300_PG)) ; } + +/** + * Reset all system PD/TCPC MCUs -- currently only called from + * handle_pending_reboot() in common/power.c just before hard + * resetting the system. This logic is likely not needed as the + * PP3300_A rail should be dropped on EC reset. + */ +void board_reset_pd_mcu(void) +{ + /* TODO(b/74127309): Flesh out USB code */ +} + +int board_set_active_charge_port(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ + return EC_SUCCESS; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + /* TODO(b/74127309): Flesh out USB code */ +} + +uint16_t tcpc_get_alert_status(void) +{ + /* TODO(b/74127309): Flesh out USB code */ + return 0; +} + + +/* Drivers */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { + [USB_PD_PORT_ANX74XX] = { + .i2c_host_port = I2C_PORT_TCPC0, + .i2c_slave_addr = 0x50, + .drv = &anx74xx_tcpm_drv, + .pol = TCPC_ALERT_ACTIVE_LOW, + }, + [USB_PD_PORT_PS8751] = { + .i2c_host_port = I2C_PORT_TCPC1, + .i2c_slave_addr = 0x16, + .drv = &ps8xxx_tcpm_drv, + .pol = TCPC_ALERT_ACTIVE_LOW, + }, +}; + +struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { + [USB_PD_PORT_ANX74XX] = { + .port_addr = USB_PD_PORT_ANX74XX, + .driver = &anx74xx_tcpm_usb_mux_driver, + .hpd_update = &anx74xx_tcpc_update_hpd_status, + }, + [USB_PD_PORT_PS8751] = { + .port_addr = USB_PD_PORT_PS8751, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + } +}; + +const struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_COUNT] = { + [USB_PD_PORT_ANX74XX] = { + .i2c_port = I2C_PORT_TCPC0, + /* TODO(b/74206647): Write PPC driver */ + .i2c_addr = 0, + .drv = 0 + }, + [USB_PD_PORT_PS8751] = { + .i2c_port = I2C_PORT_TCPC1, + /* TODO(b/74206647): Write PPC driver */ + .i2c_addr = 0, + .drv = 0 + }, +}; +const unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); diff --git a/board/yorp/board.h b/board/yorp/board.h index 4ea05c4676..ffdc8c0b84 100644 --- a/board/yorp/board.h +++ b/board/yorp/board.h @@ -8,6 +8,15 @@ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H +/* TODO, Fast follow: make a new config option that uses port */ +#define ADC_VBUS ADC_VBUS_C0 + +/* TODO, Fast follow: update BC 1.2 driver to handle inverted signals */ +#define GPIO_USB_C0_BC12_VBUS_ON_L GPIO_USB_C0_BC12_VBUS_ON +#define GPIO_USB_C0_BC12_CHG_DET GPIO_USB_C0_BC12_CHG_DET_L +#define GPIO_USB_C1_BC12_VBUS_ON_L GPIO_USB_C1_BC12_VBUS_ON +#define GPIO_USB_C1_BC12_CHG_DET GPIO_USB_C1_BC12_CHG_DET_L + /* Optional features */ #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */ @@ -23,6 +32,76 @@ #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q128 /* Internal SPI flash type. */ +/* EC Features */ +#define CONFIG_I2C +#define CONFIG_I2C_MASTER + +/* Charger Configuration */ +#define CONFIG_CHARGE_MANAGER +#define CONFIG_CHARGE_RAMP_HW +#define CONFIG_CHARGER +#define CONFIG_CHARGER_V2 +#define CONFIG_CHARGER_ISL9238 +#define CONFIG_CHARGER_INPUT_CURRENT 512 /* Allow low-current USB charging */ +#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1 +#define CONFIG_CHARGER_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 +#define CONFIG_CHARGER_DISCHARGE_ON_AC +#define CONFIG_USB_CHARGER + +/* Battery Configuration */ +#define CONFIG_BATTERY_CUT_OFF +/* TODO(b/74427009): Ensure this works in dead battery conditions */ +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L +#define CONFIG_BATTERY_SMART + +/* USB-C Configuration */ +#define CONFIG_USB_POWER_DELIVERY +#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_LOGGING +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_COMM_LOCKED +#define CONFIG_USB_PD_DISCHARGE_PPC +#define CONFIG_USB_PD_VBUS_DETECT_PPC +#define CONFIG_USB_PD_TCPC_LOW_POWER +#define CONFIG_USB_PD_TCPM_ANX74XX /* C0 TCPC: ANX7447QN */ +#define CONFIG_USB_PD_TCPM_PS8751 /* C1 TCPC: PS8751 */ +#define CONFIG_USB_PD_TCPM_MUX +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USBC_SS_MUX +#define CONFIG_USBC_SS_MUX_DFP_ONLY +#define CONFIG_USBC_PPC /* TODO(b/74206647): Remove this one have real driver */ +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP +#define CONFIG_CMD_PD_CONTROL +#define CONFIG_BC12_DETECT_BQ24392 + +/* TODO(b/74388692): Adding USB-A BC 1.2 charging support */ + +/* TODO(b/74244817): Use correct PD delay values */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +/* TODO(b/74244817): Use correct PD power values */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 45000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 + +/* I2C Bus Configuration */ +#define I2C_PORT_BATTERY NPCX_I2C_PORT0_0 +#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0 +#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT3_0 +#define I2C_PORT_CHARGER NPCX_I2C_PORT4_1 +#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0 + /* SoC / PCH */ /* GEMINILAKE reuses apollo lake power seq */ #define CONFIG_CHIPSET_APOLLOLAKE @@ -46,6 +125,8 @@ /* TODO(b/73811887): Fill out correctly */ enum adc_channel { + ADC_VBUS_C0, + ADC_VBUS_C1, ADC_CH_COUNT }; @@ -66,6 +147,8 @@ enum power_signal { POWER_SIGNAL_COUNT }; +void board_reset_pd_mcu(void); + #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/yorp/build.mk b/board/yorp/build.mk index 8c11d2f43e..31726e8dc5 100644 --- a/board/yorp/build.mk +++ b/board/yorp/build.mk @@ -10,4 +10,6 @@ CHIP:=npcx CHIP_FAMILY:=npcx7 CHIP_VARIANT:=npcx7m6f -board-y=board.o
\ No newline at end of file +board-y=board.o +board-$(CONFIG_BATTERY_SMART)+=battery.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
\ No newline at end of file diff --git a/board/yorp/ec.tasklist b/board/yorp/ec.tasklist index d0032f5d7d..49a677221e 100644 --- a/board/yorp/ec.tasklist +++ b/board/yorp/ec.tasklist @@ -22,7 +22,13 @@ #define CONFIG_TASK_LIST \ TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) + TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index 46401e9ff5..172578c091 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -54,6 +54,8 @@ GPIO(PMIC_EN, PIN(D, 7), GPIO_OUT_LOW) /* Enable A Rails via PMIC */ GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC. All _A rails now up. */ GPIO(PCH_SYS_PWROK, PIN(B, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK. All S0 rails now up. */ +GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) + /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is * normally driven by the PMIC. The EC can also drive this signal in the event diff --git a/board/yorp/usb_pd_policy.c b/board/yorp/usb_pd_policy.c new file mode 100644 index 0000000000..93ad7dfa40 --- /dev/null +++ b/board/yorp/usb_pd_policy.c @@ -0,0 +1,352 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charge_manager.h" +#include "common.h" +#include "compile_time_macros.h" +#include "console.h" +#include "ec_commands.h" +#include "gpio.h" +#include "system.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usbc_ppc.h" +#include "util.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP) + + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); +const uint32_t pd_src_pdo_max[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 15000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +int pd_board_checks(void) +{ + return EC_SUCCESS; +} + +int pd_check_data_swap(int port, int data_role) +{ + /* + * Allow data swap if we are a UFP, otherwise don't allow. + * + * When we are still in the Read-Only firmware, avoid swapping roles + * so we don't jump in RW as a SNK/DFP and potentially confuse the + * power supply by sending a soft-reset with wrong data role. + */ + return (data_role == PD_ROLE_UFP) && + (system_get_image_copy() != SYSTEM_IMAGE_RO) ? 1 : 0; +} + +void pd_check_dr_role(int port, int dr_role, int flags) +{ + /* If UFP, try to switch to DFP */ + if ((flags & PD_FLAGS_PARTNER_DR_DATA) && + dr_role == PD_ROLE_UFP && + system_get_image_copy() != SYSTEM_IMAGE_RO) + pd_request_data_swap(port); +} + +int pd_check_power_swap(int port) +{ + /* + * Allow power swap as long as we are acting as a dual role device, + * otherwise assume our role is fixed (not in S0 or console command + * to fix our role). + */ + return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0; +} + +void pd_check_pr_role(int port, int pr_role, int flags) +{ + /* + * If partner is dual-role power and dualrole toggling is on, consider + * if a power swap is necessary. + */ + if ((flags & PD_FLAGS_PARTNER_DR_POWER) && + pd_get_dual_role() == PD_DRP_TOGGLE_ON) { + /* + * If we are a sink and partner is not externally powered, then + * swap to become a source. If we are source and partner is + * externally powered, swap to become a sink. + */ + int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER; + + if ((!partner_extpower && pr_role == PD_ROLE_SINK) || + (partner_extpower && pr_role == PD_ROLE_SOURCE)) + pd_request_power_swap(port); + } +} + +int pd_check_vconn_swap(int port) +{ + /* Only allow vconn swap if pp5000_A rail is enabled */ + return gpio_get_level(GPIO_EN_PP5000); +} + +/* TODO: Delete this method once CL:885462 lands */ +void pd_execute_data_swap(int port, int data_role) +{ + /* Do nothing */ +} + +int pd_is_valid_input_voltage(int mv) +{ + return 1; +} + +void pd_power_supply_reset(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ +} + +int pd_set_power_supply_ready(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +void pd_transition_voltage(int idx) +{ + /* No-operation: we are always 5V */ +} + +void typec_set_source_current_limit(int port, int rp) +{ + /* TODO(b/74127309): Flesh out USB code */ +} + +int pd_snk_is_vbus_provided(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ + return 0; +} + +int board_vbus_source_enabled(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ + return 0; +} + +/* ----------------- Vendor Defined Messages ------------------ */ +const struct svdm_response svdm_rsp = { + .identity = NULL, + .svids = NULL, + .modes = NULL, +}; + +int pd_custom_vdm(int port, int cnt, uint32_t *payload, + uint32_t **rpayload) +{ + int cmd = PD_VDO_CMD(payload[0]); + uint16_t dev_id = 0; + int is_rw, is_latest; + + /* make sure we have some payload */ + if (cnt == 0) + return 0; + + switch (cmd) { + case VDO_CMD_VERSION: + /* guarantee last byte of payload is null character */ + *(payload + cnt - 1) = 0; + CPRINTF("version: %s\n", (char *)(payload+1)); + break; + case VDO_CMD_READ_INFO: + case VDO_CMD_SEND_INFO: + /* copy hash */ + if (cnt == 7) { + dev_id = VDO_INFO_HW_DEV_ID(payload[6]); + is_rw = VDO_INFO_IS_RW(payload[6]); + + is_latest = pd_dev_store_rw_hash(port, + dev_id, + payload + 1, + is_rw ? + SYSTEM_IMAGE_RW : + SYSTEM_IMAGE_RO); + /* + * Send update host event unless our RW hash is + * already known to be the latest update RW. + */ + if (!is_rw || !is_latest) + pd_send_host_event(PD_EVENT_UPDATE_DEVICE); + + CPRINTF("DevId:%d.%d SW:%d RW:%d\n", + HW_DEV_ID_MAJ(dev_id), + HW_DEV_ID_MIN(dev_id), + VDO_INFO_SW_DBG_VER(payload[6]), + is_rw); + } else if (cnt == 6) { + /* really old devices don't have last byte */ + pd_dev_store_rw_hash(port, dev_id, payload + 1, + SYSTEM_IMAGE_UNKNOWN); + } + break; + case VDO_CMD_CURRENT: + CPRINTF("Current: %dmA\n", payload[1]); + break; + case VDO_CMD_FLIP: + usb_mux_flip(port); + break; +#ifdef CONFIG_USB_PD_LOGGING + case VDO_CMD_GET_LOG: + pd_log_recv_vdm(port, cnt, payload); + break; +#endif /* CONFIG_USB_PD_LOGGING */ + } + + return 0; +} + +#ifdef CONFIG_USB_PD_ALT_MODE_DFP +static int dp_flags[CONFIG_USB_PD_PORT_COUNT]; +static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT]; + +static void svdm_safe_dp_mode(int port) +{ + /* make DP interface safe until configure */ + dp_flags[port] = 0; + dp_status[port] = 0; + usb_mux_set(port, TYPEC_MUX_NONE, + USB_SWITCH_CONNECT, pd_get_polarity(port)); +} + +static int svdm_enter_dp_mode(int port, uint32_t mode_caps) +{ + /* Only enter mode if device is DFP_D capable */ + if (mode_caps & MODE_DP_SNK) { + svdm_safe_dp_mode(port); + return 0; + } + + return -1; +} + +static int svdm_dp_status(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_STATUS | VDO_OPOS(opos)); + payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */ + 0, /* HPD level ... not applicable */ + 0, /* exit DP? ... no */ + 0, /* usb mode? ... no */ + 0, /* multi-function ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON)), + 0, /* power low? ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON))); + return 2; +}; + +static int svdm_dp_config(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]); + int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]); + + if (!pin_mode) + return 0; + + usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP, + USB_SWITCH_CONNECT, pd_get_polarity(port)); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ + return 2; +}; + + +static void svdm_dp_post_config(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ +} + +static int svdm_dp_attention(int port, uint32_t *payload) +{ + /* TODO(b/74127309): Flesh out USB code */ + return 1; /* ack */ +} + +static void svdm_exit_dp_mode(int port) +{ + /* TODO(b/74127309): Flesh out USB code */ +} + +static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) +{ + /* Always enter GFU mode */ + return 0; +} + +static void svdm_exit_gfu_mode(int port) +{ +} + +static int svdm_gfu_status(int port, uint32_t *payload) +{ + /* + * This is called after enter mode is successful, send unstructured + * VDM to read info. + */ + pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0); + return 0; +} + +static int svdm_gfu_config(int port, uint32_t *payload) +{ + return 0; +} + +static int svdm_gfu_attention(int port, uint32_t *payload) +{ + return 0; +} + +const struct svdm_amode_fx supported_modes[] = { + { + .svid = USB_SID_DISPLAYPORT, + .enter = &svdm_enter_dp_mode, + .status = &svdm_dp_status, + .config = &svdm_dp_config, + .post_config = &svdm_dp_post_config, + .attention = &svdm_dp_attention, + .exit = &svdm_exit_dp_mode, + }, + { + .svid = USB_VID_GOOGLE, + .enter = &svdm_enter_gfu_mode, + .status = &svdm_gfu_status, + .config = &svdm_gfu_config, + .attention = &svdm_gfu_attention, + .exit = &svdm_exit_gfu_mode, + } +}; +const int supported_modes_cnt = ARRAY_SIZE(supported_modes); +#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ |