diff options
| author | David Hendricks <dhendrix@chromium.org> | 2012-08-20 18:37:27 -0700 |
|---|---|---|
| committer | David Hendricks <dhendrix@chromium.org> | 2012-08-29 21:15:29 -0700 |
| commit | 00713051b1d8aec32d32906bfa7290f0a07f7bee (patch) | |
| tree | 413b1abd1d6084fd872504d3ce09993e2c6d460b | |
| parent | 8c5acc23dc30cb8a38f3b6ee9e6c2227828eb4c9 (diff) | |
| download | chrome-ec-00713051b1d8aec32d32906bfa7290f0a07f7bee.tar.gz | |
snow: configure USART Rx as an input with pull resistor
USART1 has always had its Tx and Rx pins configured as "alternate
function output". However, this turns out to be incorrect since
there is no concept of an AF input on the STM32F. Instead, the
Rx pin should be configured as an input (and the Tx remains an
AF output).
This also simplifies the console resume code since we only need to
enable/disable the interrupt rather than reconfiguring the GPIO.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
BRANCH=snow
BUG=chrome-os-partner:12223
TEST=flashed on snow, EC console works
Change-Id: Ia92dbbac16fc55d0db62381dfb487aeb4f4121b4
Reviewed-on: https://gerrit.chromium.org/gerrit/30941
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/31788
| -rw-r--r-- | board/snow/board.c | 12 | ||||
| -rw-r--r-- | chip/stm32/clock-stm32f100.c | 5 |
2 files changed, 11 insertions, 6 deletions
diff --git a/board/snow/board.c b/board/snow/board.c index 10eba81c1f..d23b0e60d7 100644 --- a/board/snow/board.c +++ b/board/snow/board.c @@ -124,9 +124,17 @@ void configure_board(void) STM32_GPIO_BSRR_OFF(GPIO_B) |= (1<<11) | (1<<10) | (1<<7) | (1<<6); - /* Select Alternate function for USART1 on pins PA9/PA10 */ + /* + * Set alternate function for USART1. For alt. function input + * the port is configured in either floating or pull-up/down + * input mode (ref. section 7.1.4 in datasheet RM0041): + * PA9: Tx, alt. function output + * PA10: Rx, input with pull-down + * + * note: see crosbug.com/p/12223 for more info + */ val = STM32_GPIO_CRH_OFF(GPIO_A) & ~0x00000ff0; - val |= 0x00000990; + val |= 0x00000890; STM32_GPIO_CRH_OFF(GPIO_A) = val; /* EC_INT is output, open-drain */ diff --git a/chip/stm32/clock-stm32f100.c b/chip/stm32/clock-stm32f100.c index cc5e53908f..6fc2bd29f8 100644 --- a/chip/stm32/clock-stm32f100.c +++ b/chip/stm32/clock-stm32f100.c @@ -160,23 +160,20 @@ static void config_hispeed_clock(void) #ifdef CONFIG_FORCE_CONSOLE_RESUME static void enable_serial_wakeup(int enable) { - static uint32_t save_crh, save_exticr; + static uint32_t save_exticr; if (enable) { /** * allow to wake up from serial port (RX on pin PA10) * by setting it as a GPIO with an external interrupt. */ - save_crh = STM32_GPIO_CRH_OFF(GPIO_A); save_exticr = STM32_AFIO_EXTICR(10 / 4); - STM32_GPIO_CRH_OFF(GPIO_A) = (save_crh & ~0xf00) | 0x400; STM32_AFIO_EXTICR(10 / 4) = (save_exticr & ~(0xf << 8)); } else { /* serial port wake up : don't go back to sleep */ if (STM32_EXTI_PR & (1 << 10)) disable_sleep(SLEEP_MASK_FORCE); /* restore keyboard external IT on PC10 */ - STM32_GPIO_CRH_OFF(GPIO_A) = save_crh; STM32_AFIO_EXTICR(10 / 4) = save_exticr; } } |