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authorKeith Short <keithshort@chromium.org>2021-01-28 12:24:29 -0700
committerCommit Bot <commit-bot@chromium.org>2021-02-02 05:25:52 +0000
commit82453e2d1a25b4cad739ead6057621f9e81c5db8 (patch)
treeea5a754bfb0663b28b1d7b3d974390f5c1838c53
parenta166d0f4c340ad94311433719d91de3973f16afe (diff)
downloadchrome-ec-82453e2d1a25b4cad739ead6057621f9e81c5db8.tar.gz
ps8815: Add workaround for incorrect CC lines
Add code to disable internal Rp detection in the PS8815 prior to presenting Rp. BUG=b:178664884 BRANCH=volteer TEST=make buildall TEST=Connect SNK devices to Delbin and observe PD contract established reliably. TEST=Connect dual-role USB-DP monitor, observe display comes up. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ic1f58a7fc0e01a4c19c8d1de7fafda0b5d4551c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2662218 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org> Tested-by: Zhuohao Lee <zhuohao@chromium.org>
-rw-r--r--driver/tcpm/ps8xxx.c55
-rw-r--r--driver/tcpm/ps8xxx.h3
2 files changed, 57 insertions, 1 deletions
diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c
index 8390815c76..c2ffad3c69 100644
--- a/driver/tcpm/ps8xxx.c
+++ b/driver/tcpm/ps8xxx.c
@@ -78,6 +78,13 @@ static uint16_t product_id[CONFIG_USB_PD_PORT_MAX_COUNT];
static bool ps8815_role_control_delay[CONFIG_USB_PD_PORT_MAX_COUNT];
/*
+ * b/178664884, on PS8815, firmware revision 0x10 and older can report an
+ * incorrect value on the the CC lines. This flag controls when to apply
+ * the workaround.
+ */
+static bool ps8815_disable_rp_detect[CONFIG_USB_PD_PORT_MAX_COUNT];
+static bool ps8815_disconnected[CONFIG_USB_PD_PORT_MAX_COUNT];
+/*
* timestamp of the next possible toggle to ensure the 2-ms spacing
* between IRQ_HPD.
*/
@@ -406,6 +413,12 @@ static int ps8xxx_tcpc_drp_toggle(int port)
*/
if (product_id[port] == PS8805_PRODUCT_ID ||
product_id[port] == PS8815_PRODUCT_ID) {
+ if (ps8815_disable_rp_detect[port]) {
+ CPRINTS("TCPC%d: rearm Rp disable detect on connect",
+ port);
+ ps8815_disconnected[port] = true;
+ }
+
/* Check CC_STATUS for the current pull */
rv = tcpc_read(port, TCPC_REG_CC_STATUS, &status);
if (status & TCPC_REG_CC_STATUS_CONNECT_RESULT_MASK) {
@@ -531,14 +544,37 @@ __maybe_unused static void ps8815_transmit_buffer_workaround_check(int port)
}
}
+__maybe_unused static void ps8815_disable_rp_detect_workaround_check(int port)
+{
+ int val;
+ int rv;
+ int reg;
+
+ ps8815_disable_rp_detect[port] = false;
+ ps8815_disconnected[port] = true;
+
+ reg = get_reg_by_product(port, REG_FW_VER);
+ rv = tcpc_read(port, reg, &val);
+ if (rv != EC_SUCCESS)
+ return;
+
+ /*
+ * RP detect is a problem in firmware version 0x10 and older.
+ */
+ if (val <= 0x10)
+ ps8815_disable_rp_detect[port] = true;
+}
+
static int ps8xxx_tcpm_init(int port)
{
int status;
product_id[port] = board_get_ps8xxx_product_id(port);
- if (IS_ENABLED(CONFIG_USB_PD_TCPM_PS8815))
+ if (IS_ENABLED(CONFIG_USB_PD_TCPM_PS8815)) {
ps8815_transmit_buffer_workaround_check(port);
+ ps8815_disable_rp_detect_workaround_check(port);
+ }
status = tcpci_tcpm_init(port);
if (status != EC_SUCCESS)
@@ -584,6 +620,23 @@ static int ps8xxx_tcpm_set_cc(int port, int pull)
{
int rv;
+ /*
+ * b/178664884: Before presenting Rp on initial connect, disable
+ * internal function that checks Rp value. This is a workaround
+ * in the PS8815 firmware that reports an incorrect value on the CC
+ * lines.
+ *
+ * The PS8815 self-clears these bits.
+ */
+ if (ps8815_disable_rp_detect[port] && ps8815_disconnected[port] &&
+ pull == TYPEC_CC_RP) {
+ CPRINTS("TCPC%d: disable chip based Rp detect on connection",
+ port);
+ tcpc_write(port, PS8XXX_REG_RP_DETECT_CONTROL,
+ RP_DETECT_DISABLE);
+ ps8815_disconnected[port] = false;
+ }
+
rv = tcpci_tcpm_set_cc(port, pull);
/*
diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h
index 8a9f93858f..eb5bd3e82d 100644
--- a/driver/tcpm/ps8xxx.h
+++ b/driver/tcpm/ps8xxx.h
@@ -23,6 +23,9 @@
#define PS8751_BIST_COUNTER_BYTE1 ((PS8751_BIST_COUNTER >> 8) & 0xff)
#define PS8751_BIST_COUNTER_BYTE2 ((PS8751_BIST_COUNTER >> 16) & 0xff)
+#define PS8XXX_REG_RP_DETECT_CONTROL 0x9B
+#define RP_DETECT_DISABLE 0x30
+
#define PS8XXX_REG_I2C_DEBUGGING_ENABLE 0xA0
#define PS8XXX_REG_I2C_DEBUGGING_ENABLE_ON 0x30
#define PS8XXX_REG_I2C_DEBUGGING_ENABLE_OFF 0x31 /* default */