diff options
| author | Scott Collyer <scollyer@google.com> | 2020-08-25 16:04:57 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-08-29 22:43:08 +0000 |
| commit | 00b45ddbe00eb84be6811dfbd67a925067905e91 (patch) | |
| tree | e33115a33af7630fa0146c75c5e8ab7e5e6e5d79 | |
| parent | 5efb79716e3577d2240fb95dcb9dafe3179b886b (diff) | |
| download | chrome-ec-00b45ddbe00eb84be6811dfbd67a925067905e91.tar.gz | |
stm32g4: Fix build issue with i2c driver
This CL fixes 2 minor issues which with the i2c driver file.
BUG=b:148493929
BRANCH=None
TEST=verfied honeybuns builds correctly.
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Ide6aafd4e4296891579fa138ec0d3e54a4ed9c6d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376828
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2383920
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
| -rw-r--r-- | chip/stm32/i2c-stm32g4.c | 2 | ||||
| -rw-r--r-- | chip/stm32/registers-stm32g4.h | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/chip/stm32/i2c-stm32g4.c b/chip/stm32/i2c-stm32g4.c index b53e9e8302..de6937ab28 100644 --- a/chip/stm32/i2c-stm32g4.c +++ b/chip/stm32/i2c-stm32g4.c @@ -427,8 +427,6 @@ static void i2c_freq_change_hook(void) const struct i2c_port_t *p = i2c_ports; int i; - i2c_freq_change(); - /* * Handle CPU clock changing frequency and unlock I2C ports we locked * in pre-freq change hook diff --git a/chip/stm32/registers-stm32g4.h b/chip/stm32/registers-stm32g4.h index 8c4101709b..31f44361f9 100644 --- a/chip/stm32/registers-stm32g4.h +++ b/chip/stm32/registers-stm32g4.h @@ -152,6 +152,7 @@ #define STM32_I2C3_BASE STM32_APB1PERIPH(0x7800UL) #define STM32_LPTIM1_BASE STM32_APB1PERIPH(0x7C00UL) #define STM32_LPUART1_BASE STM32_APB1PERIPH(0x8000UL) +#define STM32_I2C4_BASE STM32_APB1PERIPH(0x8400UL) /* UART9 is used as link to LPUART in STM32 uart.c implementation */ #define STM32_USART9_BASE STM32_APB1PERIPH(0x8000UL) #define STM32_UCPD1_BASE STM32_APB1PERIPH(0xA000UL) |