diff options
| author | Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com> | 2020-08-03 17:41:43 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-08-26 23:16:33 +0000 |
| commit | f1a2582a48bd396c4c40c424a73909b719f33fa5 (patch) | |
| tree | cc4265bb72be3eec0a2426529e7adb2f68dd1d85 | |
| parent | 90e1bb9d5616574a8b047c82d4b171c8eb8de6ab (diff) | |
| download | chrome-ec-f1a2582a48bd396c4c40c424a73909b719f33fa5.tar.gz | |
Halvor: Configure unused GPIOs as inputs
Configure unused GPIOs as inputs to save power in deep sleep states.
BUG=b:162591141
BRANCH=none
TEST=havlor test
Change-Id: I68e7c11d4de433c01f167e23e3a79a0cc67663ea
Signed-off-by: Samsp_Liu <Samsp_Liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334438
Tested-by: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: SamSP Liu <samsp_liu@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378958
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
| -rw-r--r-- | board/halvor/gpio.inc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/board/halvor/gpio.inc b/board/halvor/gpio.inc index f7c3a41be1..a232c44081 100644 --- a/board/halvor/gpio.inc +++ b/board/halvor/gpio.inc @@ -45,9 +45,14 @@ GPIO_INT(USB_C2_MIX_INT_ODL, PIN(6, 1), GPIO_INT_BOTH, halvor_bc12_interrupt) /* Volume button interrupts */ +/* Unused signals */ +GPIO(EN_PP1050_STG, PIN(C, 0), GPIO_INPUT | GPIO_PULL_UP) +GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT | GPIO_PULL_UP) +GPIO(EN_PP1050_ST_S0, PIN(3, 4), GPIO_INPUT | GPIO_PULL_UP) /* Power Sequencing Signals */ GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) +GPIO(EN_PP5000_USB_AG, PIN(A, 7), GPIO_OUT_HIGH) /* The EC does not buffer this signal on Halvor. */ UNIMPLEMENTED(PCH_DSW_PWROK) @@ -80,7 +85,7 @@ GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) /* USB and USBC Signals */ GPIO(USB_C0_RT_RST_ODL, PIN(6, 6), GPIO_ODR_LOW) GPIO(USB_C1_RT_RST_ODL, PIN(8, 6), GPIO_ODR_LOW) -GPIO(USB_C2_RT_RST_ODL, PIN(3, 5), GPIO_ODR_LOW) +GPIO(USB_C2_RT_RST_ODL, PIN(9, 6), GPIO_ODR_LOW) GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) |