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authorNicolas Boichat <drinkcat@chromium.org>2018-10-15 15:16:21 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-10-24 05:36:34 -0700
commitd0d86e66c917812e1a9e7ef50fe3edf6ea4721f8 (patch)
tree48237c681fd126ff89e1f31c53cbbe6ca653d1ab
parent974208f124b8272607f73f2d26244fbc9258f4c9 (diff)
downloadchrome-ec-d0d86e66c917812e1a9e7ef50fe3edf6ea4721f8.tar.gz
power/mt8183: Pulse PMIC_FORCE_RESET_ODL for 10s to force reset
On forced shutdown, assert PMIC_FORCE_RESET_ODL for 10 seconds. Sometimes, just a short 5ms pulse is enough to shut down the PMIC, but we have seen boards where it is required to assert force reset for a longer time, else the PMIC would immediately power back up. BRANCH=none BUG=b:117747023 TEST=Boot kukui (current AP FW that has no PMIC code yet), type apshutdown in EC console, see that the PMIC is shut down. Change-Id: Ic1793b6f27cebd25f96e42a9de90268566ec5772 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1278224 Reviewed-by: Yilun Lin <yllin@chromium.org>
-rw-r--r--power/mt8183.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/power/mt8183.c b/power/mt8183.c
index 1aea2535cf..48886a488c 100644
--- a/power/mt8183.c
+++ b/power/mt8183.c
@@ -46,6 +46,12 @@
/* Maximum time it should for PMIC to turn on after toggling PMIC_EN_ODL. */
#define PMIC_EN_TIMEOUT (300 * MSEC)
+/*
+ * Amount of time we need to hold PMIC_FORCE_RESET_ODL to ensure PMIC is really
+ * off and will not restart on its own.
+ */
+#define PMIC_FORCE_RESET_TIME (10 * SECOND)
+
/* Data structure for a GPIO operation for power sequencing */
struct power_seq_op {
/* enum gpio_signal in 8 bits */
@@ -146,6 +152,17 @@ enum power_state power_chipset_init(void)
return POWER_G3;
}
+/*
+ * If we have to force reset the PMIC, we only need to do so for a few seconds,
+ * then we need to release the GPIO to prevent leakage in G3.
+ */
+static void release_pmic_force_reset(void)
+{
+ CPRINTS("Releasing PMIC force reset");
+ gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
+}
+DECLARE_DEFERRED(release_pmic_force_reset);
+
/**
* Step through the power sequence table and do corresponding GPIO operations.
*
@@ -211,6 +228,7 @@ enum power_state power_handle_state(enum power_state state)
case POWER_G3S5:
forcing_shutdown = 0;
+ hook_call_deferred(&release_pmic_force_reset_data, -1);
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
/* Power up to next state */
@@ -332,6 +350,8 @@ enum power_state power_handle_state(enum power_state state)
CPRINTS("Forcing PMIC off");
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
msleep(5);
+ hook_call_deferred(&release_pmic_force_reset_data,
+ PMIC_FORCE_RESET_TIME);
return POWER_S5G3;
#endif