diff options
| author | Gerrit <chrome-bot@google.com> | 2012-04-20 11:09:45 -0700 |
|---|---|---|
| committer | Gerrit Code Review <gerrit@gerrit.golo.chromium.org> | 2012-04-20 11:09:45 -0700 |
| commit | a05deade13c696643ca6f8cc216f78db015a7ddb (patch) | |
| tree | 1332ce3436f86252858b5b51f17f061d20898060 | |
| parent | b2f34fcfd117f43f44920e20f3cdf686f6648200 (diff) | |
| parent | 34df8261f70fab14d0300a2c316a7b827f38a705 (diff) | |
| download | chrome-ec-a05deade13c696643ca6f8cc216f78db015a7ddb.tar.gz | |
Merge "Remove clock calibration for PIOSC"
| -rw-r--r-- | chip/lm4/clock.c | 18 | ||||
| -rw-r--r-- | chip/lm4/registers.h | 8 |
2 files changed, 16 insertions, 10 deletions
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c index 12a1896ff7..290af0223f 100644 --- a/chip/lm4/clock.c +++ b/chip/lm4/clock.c @@ -192,16 +192,11 @@ DECLARE_CONSOLE_COMMAND(nopll, command_disable_pll); int clock_init(void) { -#ifndef BOARD_bds - /* Only BDS has an external crystal; other boards don't have one, and - * can disable main oscillator control to reduce power consumption. */ - LM4_SYSTEM_MOSCCTL = 0x04; -#endif - +#ifdef BOARD_bds /* Perform an auto calibration of the internal oscillator using the - * 32.768KHz hibernate clock, unless we've already done so. */ - /* TODO: (crosbug.com/p/7693) This is only needed on early chips which - * aren't factory trimmed. */ + * 32.768KHz hibernate clock, unless we've already done so. This is + * only necessary on A2 silicon as on BDS; A3 silicon is all + * factory-trimmed. */ if ((LM4_SYSTEM_PIOSCSTAT & 0x300) != 0x100) { /* Start calibration */ LM4_SYSTEM_PIOSCCAL = 0x80000000; @@ -211,6 +206,11 @@ int clock_init(void) while (!(LM4_SYSTEM_PIOSCSTAT & 0x300)) ; } +#else + /* Only BDS has an external crystal; other boards don't have one, and + * can disable main oscillator control to reduce power consumption. */ + LM4_SYSTEM_MOSCCTL = 0x04; +#endif /* TODO: UART seems to glitch unless we wait 500k cycles before * enabling the PLL, but only if this is a cold boot. Why? UART diff --git a/chip/lm4/registers.h b/chip/lm4/registers.h index b05bc0ac9a..10719965fd 100644 --- a/chip/lm4/registers.h +++ b/chip/lm4/registers.h @@ -200,7 +200,13 @@ static inline int lm4_fan_addr(int ch, int offset) #define LM4_SYSTEM_RCC_IOSCDIS (1 << 1) #define LM4_SYSTEM_RCC_MOSCDIS (1 << 0) #define LM4_SYSTEM_RCC2 LM4REG(0x400fe070) -#define LM4_SYSTEM_RCC2_USERCC2 (1 << 31) +#define LM4_SYSTEM_RCC2_USERCC2 (1 << 31) +#define LM4_SYSTEM_RCC2_DIV400 (1 << 30) +#define LM4_SYSTEM_RCC2_SYSDIV2(x) (((x) & 0x3f) << 23) +#define LM4_SYSTEM_RCC2_SYSDIV2LSB (1 << 22) +#define LM4_SYSTEM_RCC2_PWRDN2 (1 << 13) +#define LM4_SYSTEM_RCC2_BYPASS2 (1 << 11) +#define LM4_SYSTEM_RCC2_OSCSRC2(x) (((x) & 0x7) << 4) #define LM4_SYSTEM_MOSCCTL LM4REG(0x400fe07c) #define LM4_SYSTEM_PIOSCCAL LM4REG(0x400fe150) #define LM4_SYSTEM_PIOSCSTAT LM4REG(0x400fe154) |