diff options
author | Randall Spangler <rspangler@chromium.org> | 2012-10-05 15:55:14 -0700 |
---|---|---|
committer | Gerrit <chrome-bot@google.com> | 2012-10-16 16:48:20 -0700 |
commit | fdaa78e3c230755fbf132152b715b1c5223dc8e5 (patch) | |
tree | 68ff4b06467c2838f892784b4c30f329791559d5 | |
parent | 943c2415450a56c73d965c64f18a68967ea15d5b (diff) | |
download | chrome-ec-fdaa78e3c230755fbf132152b715b1c5223dc8e5.tar.gz |
link: increase time in hibernate for EC cold reset
This works around a problem where the Silego chip doesn't cleanly
reset for short hibernate durations.
BUG=chrome-os-partner:14687
BRANCH=link
TEST=ectool reboot_ec cold (~100 times), then check if power+refresh still
reboots the system
Change-Id: I14098940da9331856dd061a56a60a47c9a1cf1f8
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/34832
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
-rw-r--r-- | chip/lm4/system.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/chip/lm4/system.c b/chip/lm4/system.c index 2c970ee125..9f1ff425cd 100644 --- a/chip/lm4/system.c +++ b/chip/lm4/system.c @@ -28,9 +28,17 @@ enum hibdata_index { /* * Time it takes wait_for_hibctl_wc() to return. Experimentally verified to - * be ~200 us; the value below is somewhat conservative. */ + * be ~200 us; the value below is somewhat conservative. + */ #define HIB_WAIT_USEC 1000 +/* + * Time to hibernate to trigger a power-on reset. 50 ms is sufficient for the + * EC itself, but we need a longer delay to ensure the rest of the components + * on the same power rail are reset. + */ +#define HIB_RESET_USEC 100000 + static int wait_for_hibctl_wc(void) { int i; @@ -355,7 +363,7 @@ void system_reset(int flags) if (flags & SYSTEM_RESET_HARD) { /* Bounce through hibernate to trigger a hard reboot */ - hibernate(0, 50000, HIBDATA_WAKE_HARD_RESET); + hibernate(0, HIB_RESET_USEC, HIBDATA_WAKE_HARD_RESET); } else CPU_NVIC_APINT = 0x05fa0004; |