diff options
author | Mulin Chao <mlchao@nuvoton.com> | 2016-01-13 13:09:38 +0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-01-14 22:12:05 -0800 |
commit | 77abb5072e8a674d5908dd2366583148858e56c9 (patch) | |
tree | 60e5ed6c060adf327628d0789e0147b5100c861d | |
parent | a50b12ef9743c911d968e7bf083acc22f691c7c7 (diff) | |
download | chrome-ec-77abb5072e8a674d5908dd2366583148858e56c9.tar.gz |
nuc: Support hibernate_wake_pins on wheatley, npcx_evb and npcx_evb_arm.
Modified hibernate funcs to support hibernate_wake_pins on weatley, npcx_evb
and npcx_evb_arm.
For better power consumption, we disable ADC, tri-state spi pins, all inputs
of wake-ups to prevent leakage current caused by input floating and set
necessary GPIOs' states in hibernate function.
Modified drivers:
1. npcx_evb/board.c: Add hibernate_wake_pins array for hibernate.
2. npcx_evb_arm/board.c: : Add hibernate_wake_pins array for hibernate.
3. wheatley/board.c: Add hibernate_wake_pins array for hibernate.
4. wheatley/board.c: Add board_set_gpio_state_hibernate func for adjusting
GPIOs' status related to board for better power consumption.
5. hwtimer.c: Remove unnecessary interrupt_enable/disable funcs. Interrupt
will disable before it is called.
6. register.h: Add WKINEN definition and declarations used for hibernate.
7. system.c: Add system_set_gpios_and_wakeup_inputs_hibernate to set GPIOs'
state and wake-up inputs before entering hibernate.
8. system_chip.h: Remove unused BBRM_DATA_INDEX_PBUTTON field.
9. gpio.c: Enable WKINEN in gpio_set_flags_by_mask func.
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Ic85814065464095fdcb7a75964c2c528d8f8e62f
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/321466
Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r-- | board/npcx_evb/board.c | 7 | ||||
-rw-r--r-- | board/npcx_evb_arm/board.c | 7 | ||||
-rw-r--r-- | board/wheatley/board.c | 27 | ||||
-rw-r--r-- | board/wheatley/gpio.inc | 6 | ||||
-rw-r--r-- | chip/npcx/gpio.c | 24 | ||||
-rw-r--r-- | chip/npcx/hwtimer.c | 2 | ||||
-rw-r--r-- | chip/npcx/registers.h | 14 | ||||
-rw-r--r-- | chip/npcx/system.c | 169 | ||||
-rw-r--r-- | chip/npcx/system_chip.h | 1 |
9 files changed, 184 insertions, 73 deletions
diff --git a/board/npcx_evb/board.c b/board/npcx_evb/board.c index aebd379e63..dd30fa8d97 100644 --- a/board/npcx_evb/board.c +++ b/board/npcx_evb/board.c @@ -91,6 +91,13 @@ const struct spi_device_t spi_devices[] = { const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); /******************************************************************************/ +/* Wake-up pins for hibernate */ +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_POWER_BUTTON_L, +}; +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/******************************************************************************/ /* Keyboard scan setting */ struct keyboard_scan_config keyscan_config = { .output_settle_us = 40, diff --git a/board/npcx_evb_arm/board.c b/board/npcx_evb_arm/board.c index 88ed0f5fb9..65e9256f96 100644 --- a/board/npcx_evb_arm/board.c +++ b/board/npcx_evb_arm/board.c @@ -84,6 +84,13 @@ const struct i2c_port_t i2c_ports[] = { const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); /******************************************************************************/ +/* Wake-up pins for hibernate */ +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_POWER_BUTTON_L, +}; +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/******************************************************************************/ /* Keyboard scan setting */ struct keyboard_scan_config keyscan_config = { .output_settle_us = 40, diff --git a/board/wheatley/board.c b/board/wheatley/board.c index d5d465d12c..745a31dfc7 100644 --- a/board/wheatley/board.c +++ b/board/wheatley/board.c @@ -379,27 +379,30 @@ static void board_chipset_suspend(void) } DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); -uint32_t board_get_gpio_hibernate_state(uint32_t port, uint32_t pin) +void board_set_gpio_state_hibernate(void) { int i; - const uint32_t out_low_gpios[][2] = { + const uint32_t hibernate_pins[][2] = { /* Turn off LEDs in hibernate */ - GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_1), - GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_2), + {GPIO_CHARGE_LED_1, GPIO_OUTPUT | GPIO_LOW}, + {GPIO_CHARGE_LED_2, GPIO_OUTPUT | GPIO_LOW}, /* * Set PD wake low so that it toggles high to generate a wake * event once we leave hibernate. */ - GPIO_TO_PORT_MASK_PAIR(GPIO_USB_PD_WAKE), + {GPIO_USB_PD_WAKE, GPIO_OUTPUT | GPIO_LOW}, + /* + * In hibernate, this pin connected to GND. Set it to output + * low to eliminate the current caused by internal pull-up. + */ + {GPIO_PLATFORM_EC_PROCHOT, GPIO_OUTPUT | GPIO_LOW} }; - /* LED GPIOs should be driven low to turn off LEDs */ - for (i = 0; i < ARRAY_SIZE(out_low_gpios); ++i) - if (out_low_gpios[i][0] == port && out_low_gpios[i][1] == pin) - return GPIO_OUTPUT | GPIO_LOW; - - /* Other GPIOs should be put in a low-power state */ - return GPIO_INPUT | GPIO_PULL_UP; + /* Change GPIOs' state in hibernate for better power consumption */ + for (i = 0; i < ARRAY_SIZE(hibernate_pins); ++i) + gpio_set_flags_by_mask(gpio_list[hibernate_pins[i][0]].port, + gpio_list[hibernate_pins[i][0]].mask, + hibernate_pins[i][1]); } /* Any wheatley boards post version 2 should have ROP_LDO_EN stuffed. */ diff --git a/board/wheatley/gpio.inc b/board/wheatley/gpio.inc index ad736c1801..c0037ae5b0 100644 --- a/board/wheatley/gpio.inc +++ b/board/wheatley/gpio.inc @@ -113,6 +113,12 @@ GPIO(PCH_RTCRST, PIN(C, 1), GPIO_INPUT | GPIO_PULL_UP) /* A58 GPIO(PMIC_SLP_SUS_L, PIN(E, 3), GPIO_OUT_LOW) /* B51 - GPIOE3 for SLP_SUS_L_PMIC */ GPIO(USB_C1_CHARGE_EN_L, PIN(C, 7), GPIO_OUT_LOW) /* A62 - GPIOC7 for EN_USB_C1_CHARGE_EC_L */
+/* NC pins - Set as input and pull them up for better power consumption */ +GPIO(NC_081, PIN(8, 1), GPIO_INPUT | GPIO_PULL_UP) /* A40 - Unused pin */ +GPIO(NC_0B6, PIN(B, 6), GPIO_INPUT | GPIO_PULL_UP) /* B60 - Unused pin */ +GPIO(NC_066, PIN(6, 6), GPIO_INPUT | GPIO_PULL_UP) /* B35 - Unused pin */ +GPIO(NC_0D6, PIN(D, 6), GPIO_INPUT | GPIO_PULL_UP) /* B09 - Unused pin */ + /* Alternate functions GPIO definitions */ /* UART pins */ diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c index 2e9eb62cd4..5574e1b0e0 100644 --- a/chip/npcx/gpio.c +++ b/chip/npcx/gpio.c @@ -375,6 +375,12 @@ void gpio_interrupt_type_sel(uint8_t port, uint8_t mask, uint32_t flags) /* Enable wake-up input sources */ NPCX_WKEN(table, group) |= pmask; + NPCX_WKINEN(table, group) |= pmask; + /* + * Clear pending bit since it might be set + * if WKINEN bit is changed. + */ + NPCX_WKPCL(table, group) |= pmask; } /* Handle interrupt for edge trigger */ else if ((flags & GPIO_INT_F_RISING) || @@ -399,12 +405,18 @@ void gpio_interrupt_type_sel(uint8_t port, uint8_t mask, uint32_t flags) NPCX_WKAEDG(table, group) &= ~pmask; NPCX_WKEDG(table, group) |= pmask; } + /* Enable wake-up input sources */ NPCX_WKEN(table, group) |= pmask; - } else{ + NPCX_WKINEN(table, group) |= pmask; + /* + * Clear pending bit since it might be set + * if WKINEN bit is changed. + */ + NPCX_WKPCL(table, group) |= pmask; + } else /* Disable wake-up input sources */ NPCX_WKEN(table, group) &= ~pmask; - } /* No support analog mode */ } @@ -511,7 +523,6 @@ int gpio_disable_interrupt(enum gpio_signal signal) void gpio_pre_init(void) { const struct gpio_info *g = gpio_list; - const struct gpio_wui_map *map; int is_warm = system_is_reboot_warm(); int flags; int i, j; @@ -573,13 +584,6 @@ void gpio_pre_init(void) /* Set up GPIO based on flags */ gpio_set_flags_by_mask(g->port, g->mask, flags); } - - /* Put power button information in bbram */ - g = gpio_list + GPIO_POWER_BUTTON_L; - map = gpio_find_wui_from_io(g->port, g->mask); - NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON) = map->wui_table; - NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON + 1) = map->wui_group; - NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON + 2) = map->wui_mask; } /* List of GPIO IRQs to enable. Don't automatically enable interrupts for diff --git a/chip/npcx/hwtimer.c b/chip/npcx/hwtimer.c index 4f8ff03308..88809c01a0 100644 --- a/chip/npcx/hwtimer.c +++ b/chip/npcx/hwtimer.c @@ -121,7 +121,6 @@ uint32_t __hw_clock_get_sleep_time(uint32_t pre_evt_cnt) uint32_t sleep_time; uint32_t cnt = NPCX_ITCNT16(ITIM_EVENT_NO); - interrupt_disable(); /* Event has been triggered but timer ISR dosen't handle it */ if (IS_BIT_SET(NPCX_ITCTS(ITIM_EVENT_NO), NPCX_ITCTS_TO_STS)) sleep_time = FP_TO_INT((fp_inter_t)(pre_evt_cnt+1) * evt_tick); @@ -129,7 +128,6 @@ uint32_t __hw_clock_get_sleep_time(uint32_t pre_evt_cnt) else sleep_time = FP_TO_INT((fp_inter_t)(pre_evt_cnt+1 - cnt) * evt_tick); - interrupt_enable(); return sleep_time; } diff --git a/chip/npcx/registers.h b/chip/npcx/registers.h index c8ecee36d1..59aac90c25 100644 --- a/chip/npcx/registers.h +++ b/chip/npcx/registers.h @@ -312,6 +312,8 @@ ((n) * 4L) + ((n) < 5 ? 0 : 0x10)) #define NPCX_WKEN_ADDR(port, n) (NPCX_MIWU_BASE_ADDR(port) + 0x1E + \ ((n) * 2L) + ((n) < 5 ? 0 : 0x12)) +#define NPCX_WKINEN_ADDR(port, n) (NPCX_MIWU_BASE_ADDR(port) + 0x1F + \ + ((n) * 2L) + ((n) < 5 ? 0 : 0x12)) #define NPCX_WKMOD_ADDR(port, n) (NPCX_MIWU_BASE_ADDR(port) + 0x70 + n) #define NPCX_WKEDG(port, n) REG8(NPCX_WKEDG_ADDR(port, n)) @@ -319,6 +321,7 @@ #define NPCX_WKPND(port, n) REG8(NPCX_WKPND_ADDR(port, n)) #define NPCX_WKPCL(port, n) REG8(NPCX_WKPCL_ADDR(port, n)) #define NPCX_WKEN(port, n) REG8(NPCX_WKEN_ADDR(port, n)) +#define NPCX_WKINEN(port, n) REG8(NPCX_WKINEN_ADDR(port, n)) #define NPCX_WKMOD(port, n) REG8(NPCX_WKMOD_ADDR(port, n)) /* MIWU enumeration */ @@ -1389,4 +1392,15 @@ static inline void npcx_gpio2uart(void) SET_BIT(NPCX_DEVALT(0x0A), NPCX_DEVALTA_UART_SL1); #endif } + +/* Wake pin definitions, defined at board-level */ +extern const enum gpio_signal hibernate_wake_pins[]; +extern const int hibernate_wake_pins_used; + +/* + * Optional board-level function to set GPIOs state in hibernate. + */ +void board_set_gpio_state_hibernate(void) + __attribute__((weak)); + #endif /* __CROS_EC_REGISTERS_H */ diff --git a/chip/npcx/system.c b/chip/npcx/system.c index 544e88e05d..5abd5ff04e 100644 --- a/chip/npcx/system.c +++ b/chip/npcx/system.c @@ -16,6 +16,7 @@ #include "task.h" #include "timer.h" #include "util.h" +#include "gpio.h" #include "hwtimer_chip.h" #include "system_chip.h" #include "rom_chip.h" @@ -251,7 +252,7 @@ void system_mpu_config(void) CPU_MPU_RASR = 0x1308001D; } -void __attribute__ ((section(".lowpower_ram"))) +void __keep __attribute__ ((section(".lowpower_ram"))) __enter_hibernate_in_lpram(void) { @@ -259,41 +260,22 @@ __enter_hibernate_in_lpram(void) SET_BIT(NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_5), NPCX_PWDWN_CTL5_MRFSH_DIS); SET_BIT(NPCX_DISIDL_CTL, NPCX_DISIDL_CTL_RAM_DID); - while (1) { - /* Set deep idle mode*/ - NPCX_PMCSR = 0x6; - /* Enter deep idle, wake-up by GPIOxx or RTC */ - asm("wfi"); - - /* POWER_BUTTON_L wake-up */ - if (NPCX_WKPND(NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON), - NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON + 1)) - & NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON + 2)) { - /* Clear WUI pending bit of POWER_BUTTON_L */ - NPCX_WKPCL(NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON), - NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON + 1)) - = NPCX_BBRAM(BBRM_DATA_INDEX_PBUTTON + 2); - /* - * Mark wake-up reason for hibernate - * Do not call bbram_data_write directly cause of - * excuting in low-power ram - */ - NPCX_BBRAM(BBRM_DATA_INDEX_WAKE) = HIBERNATE_WAKE_PIN; - break; - } - /* RTC wake-up */ - else if (IS_BIT_SET(NPCX_WTC, NPCX_WTC_PTO)) { - /* Clear WUI pending bit of MTC */ - NPCX_WKPCL(MIWU_TABLE_0, MTC_WUI_GROUP) = MTC_WUI_MASK; - /* Clear interrupt & Disable alarm interrupt */ - CLEAR_BIT(NPCX_WTC, NPCX_WTC_WIE); - SET_BIT(NPCX_WTC, NPCX_WTC_PTO); - - /* Mark wake-up reason for hibernate */ - NPCX_BBRAM(BBRM_DATA_INDEX_WAKE) = HIBERNATE_WAKE_MTC; - break; - } - } + /* Set deep idle mode*/ + NPCX_PMCSR = 0x6; + /* Enter deep idle, wake-up by GPIOxx or RTC */ + asm("wfi"); + + /* RTC wake-up */ + if (IS_BIT_SET(NPCX_WTC, NPCX_WTC_PTO)) + /* + * Mark wake-up reason for hibernate + * Do not call bbram_data_write directly cause of + * executing in low-power ram + */ + NPCX_BBRAM(BBRM_DATA_INDEX_WAKE) = HIBERNATE_WAKE_MTC; + else + /* Otherwise, we treat it as GPIOs wake-up */ + NPCX_BBRAM(BBRM_DATA_INDEX_WAKE) = HIBERNATE_WAKE_PIN; /* Start a watchdog reset */ NPCX_WDCNT = 0x01; @@ -307,6 +289,74 @@ __enter_hibernate_in_lpram(void) while (1) ; } + +/** + * Chip-level function to set GPIOs and wake-up inputs for hibernate. + */ +void system_set_gpios_and_wakeup_inputs_hibernate(void) +{ + int table, i; + + /* Disable all MIWU inputs before entering hibernate */ + for (table = MIWU_TABLE_0 ; table < MIWU_TABLE_2 ; table++) { + for (i = 0 ; i < 8 ; i++) { + /* Disable all wake-ups */ + NPCX_WKEN(table, i) = 0x00; + /* Clear all pending bits of wake-ups */ + NPCX_WKPCL(table, i) = 0xFF; + /* + * Disable all inputs of wake-ups to prevent leakage + * caused by input floating. + */ + NPCX_WKINEN(table, i) = 0x00; + } + } + + /* + * Set all KBSOUTs to GPIOs and switch their mode to input and pull-up. + * Otherwise pressing the keyboard matrix might cause some current + * leakage during hibernating. + */ + NPCX_DEVALT(0x8) = 0xFF; + NPCX_DEVALT(0x9) |= 0x1F; + gpio_set_flags_by_mask(0x2, 0x03, GPIO_INPUT | GPIO_PULL_UP); + gpio_set_flags_by_mask(0x1, 0xFF, GPIO_INPUT | GPIO_PULL_UP); + gpio_set_flags_by_mask(0x0, 0xF0, GPIO_INPUT | GPIO_PULL_UP); + + /* Enable wake-up inputs of hibernate_wake_pins array */ + if (hibernate_wake_pins_used > 0) { + for (i = 0; i < hibernate_wake_pins_used; i++) { + const enum gpio_signal *pin = &hibernate_wake_pins[i]; + /* Make sure switch to GPIOs */ + gpio_set_alternate_function(gpio_list[*pin].port, + gpio_list[*pin].mask, -1); + /* Set wake-up settings for GPIOs */ + gpio_set_flags_by_mask(gpio_list[*pin].port, + gpio_list[*pin].mask, + gpio_list[*pin].flags); + } + } + +#ifdef CONFIG_USB_PD_PORT_COUNT + /* + * Leave USB-C charging enabled in hibernate, in order to + * allow wake-on-plug. 5V enable must be pulled low. + */ +#if CONFIG_USB_PD_PORT_COUNT > 0 + gpio_set_flags(GPIO_USB_C0_5V_EN, GPIO_PULL_DOWN | GPIO_INPUT); + gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 0); +#endif +#if CONFIG_USB_PD_PORT_COUNT > 1 + gpio_set_flags(GPIO_USB_C1_5V_EN, GPIO_PULL_DOWN | GPIO_INPUT); + gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 0); +#endif +#endif /* CONFIG_USB_PD_PORT_COUNT */ + + /* board-level function to set GPIOs state in hibernate */ + if (board_set_gpio_state_hibernate) + return board_set_gpio_state_hibernate(); +} + /** * Internal hibernate function. * @@ -319,8 +369,19 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds) void (*__hibernate_in_lpram)(void) = (void(*)(void))(__lpram_fw_start | 0x01); - /* Set instant wake up mode */ - SET_BIT(NPCX_ENIDL_CTL, NPCX_ENIDL_CTL_LP_WK_CTL); + /* Enable power for the Low Power RAM */ + CLEAR_BIT(NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6), 6); + + /* Disable ADC */ + NPCX_ADCCNF = 0; + usleep(1000); + + /* Set SPI pins to be in Tri-State */ + SET_BIT(NPCX_DEVCNT, NPCX_DEVCNT_F_SPI_TRIS); + + /* Disable instant wake up mode for better power consumption */ + CLEAR_BIT(NPCX_ENIDL_CTL, NPCX_ENIDL_CTL_LP_WK_CTL); + interrupt_disable(); /* ITIM event module disable */ @@ -330,13 +391,6 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds) /* ITIM watchdog warn module disable */ CLEAR_BIT(NPCX_ITCTS(ITIM_WDG_NO), NPCX_ITCTS_ITEN); - /* - * Set RTC interrupt in time to wake up before - * next event. - */ - if (seconds || microseconds) - system_set_rtc_alarm(seconds, microseconds); - /* Unlock & stop watchdog */ NPCX_WDSDM = 0x87; NPCX_WDSDM = 0x61; @@ -359,6 +413,23 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds) /* Disable interrupt */ interrupt_disable(); + /* + * Set gpios and wake-up input for better power consumption before + * entering hibernate. + */ + system_set_gpios_and_wakeup_inputs_hibernate(); + + /* Clear all pending IRQ otherwise wfi will have no affect */ + for (i = NPCX_IRQ_0 ; i < NPCX_IRQ_COUNT ; i++) + task_clear_pending_irq(i); + + /* + * Set RTC interrupt in time to wake up before + * next event. + */ + if (seconds || microseconds) + system_set_rtc_alarm(seconds, microseconds); + /* execute hibernate func in LPRAM */ __hibernate_in_lpram(); @@ -401,8 +472,10 @@ void system_set_rtc_alarm(uint32_t seconds, uint32_t microseconds) /* Enable MTC interrupt */ task_enable_irq(NPCX_IRQ_MTC_WKINTAD_0); - /* Enable wake-up input sources */ - NPCX_WKEN(MIWU_TABLE_0, MTC_WUI_GROUP) |= MTC_WUI_MASK; + /* Enable wake-up input sources & clear pending bit */ + NPCX_WKPCL(MIWU_TABLE_0, MTC_WUI_GROUP) |= MTC_WUI_MASK; + NPCX_WKINEN(MIWU_TABLE_0, MTC_WUI_GROUP) |= MTC_WUI_MASK; + NPCX_WKEN(MIWU_TABLE_0, MTC_WUI_GROUP) |= MTC_WUI_MASK; } void system_reset_rtc_alarm(void) @@ -450,7 +523,7 @@ void system_pre_init(void) NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_3) = 0x0F; /* Skip GDMA */ NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_4) = 0xF4; /* Skip ITIM2/1_PD */ NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_5) = 0xF8; - NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = 0x85; /* Skip ITIM5_PD */ + NPCX_PWDWN_CTL(NPCX_PMC_PWDWN_6) = 0xF5; /* Skip ITIM5_PD */ /* Power down the modules used internally */ NPCX_INTERNAL_CTRL1 = 0x03; diff --git a/chip/npcx/system_chip.h b/chip/npcx/system_chip.h index fab0ca37fc..bc218b5816 100644 --- a/chip/npcx/system_chip.h +++ b/chip/npcx/system_chip.h @@ -13,7 +13,6 @@ enum bbram_data_index { BBRM_DATA_INDEX_SCRATCHPAD = 0, /* General-purpose scratchpad */ BBRM_DATA_INDEX_SAVED_RESET_FLAGS = 4, /* Saved reset flags */ BBRM_DATA_INDEX_WAKE = 8, /* Wake reasons for hibernate */ - BBRM_DATA_INDEX_PBUTTON = 12, /* Power button for hibernate */ BBRM_DATA_INDEX_VBNVCNTXT = 16, /* VbNvContext for ARM arch */ BBRM_DATA_INDEX_RAMLOG = 32, /* RAM log for Booter */ }; |