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authorMulin Chao <mlchao@nuvoton.com>2016-05-04 11:00:51 +0800
committerchrome-bot <chrome-bot@chromium.org>2016-05-18 18:11:33 -0700
commit6e0c60d11f704302f00f7b58a0a94695bb5dd85a (patch)
tree616225cbdf99bce6ad2ead1b172a4f820e68f91e
parente9501105c29100769151c75dbb3d037c5f133921 (diff)
downloadchrome-ec-6e0c60d11f704302f00f7b58a0a94695bb5dd85a.tar.gz
npcx: Modify gpio's interrupt utilities
Setting NVIC_EN register is not a suitable method if you want to turn on/off one GPIO's interrupt. Since there're eight sources belong to the same interrupt, using MIWU_EN register which bit belongs to one MIWU's source is a better way. Modified sources: 1. gpio.c: Replace accessing NVIC_EN register with MIWU_EN in gpio's interrupt utilities. BRANCH=none BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers Change-Id: I282a45f5a3ab7cb032b2282cf7e92cacc5e706b6 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/342122 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
-rw-r--r--chip/npcx/gpio.c36
1 files changed, 14 insertions, 22 deletions
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c
index 1e7c5b9b35..99edf5a74f 100644
--- a/chip/npcx/gpio.c
+++ b/chip/npcx/gpio.c
@@ -393,16 +393,6 @@ static struct gpio_wui_gpio_info gpio_find_wui_from_io(uint8_t port,
return ((struct gpio_wui_gpio_info) { .valid = 0 });
}
-static int gpio_find_irq_from_io(uint8_t port, uint8_t mask)
-{
- struct gpio_wui_gpio_info wui = gpio_find_wui_from_io(port, mask);
-
- if (wui.valid)
- return gpio_wui_table[wui.table][wui.group].irq;
-
- return -1;
-}
-
static void gpio_pwm_io_type_sel(uint8_t chan, uint8_t func)
{
if (func & PWM_IO_OD)
@@ -637,27 +627,29 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
int gpio_enable_interrupt(enum gpio_signal signal)
{
- const struct gpio_info *g = gpio_list + signal;
- int irq = gpio_find_irq_from_io(g->port, g->mask);
+ const struct gpio_info *g = gpio_list + signal;
+ struct gpio_wui_gpio_info wui = gpio_find_wui_from_io(g->port, g->mask);
- /* Fail if no interrupt handler */
- if (irq < 0)
- return EC_ERROR_UNKNOWN;
+ /* Set MIWU enable bit */
+ if (wui.valid)
+ NPCX_WKEN(wui.table, wui.group) |= (1 << wui.bit);
+ else
+ return EC_ERROR_PARAM1;
- task_enable_irq(irq);
return EC_SUCCESS;
}
int gpio_disable_interrupt(enum gpio_signal signal)
{
- const struct gpio_info *g = gpio_list + signal;
- int irq = gpio_find_irq_from_io(g->port, g->mask);
+ const struct gpio_info *g = gpio_list + signal;
+ struct gpio_wui_gpio_info wui = gpio_find_wui_from_io(g->port, g->mask);
- /* Fail if no interrupt handler */
- if (irq < 0)
- return EC_ERROR_UNKNOWN;
+ /* Clear MIWU enable bit */
+ if (wui.valid)
+ NPCX_WKEN(wui.table, wui.group) &= ~(1 << wui.bit);
+ else
+ return EC_ERROR_PARAM1;
- task_disable_irq(irq);
return EC_SUCCESS;
}