diff options
| author | Duncan Laurie <dlaurie@google.com> | 2017-05-24 13:08:05 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-05-25 12:25:20 -0700 |
| commit | dcedeab2cceac2eb2e5f1e29639cf0271283a18f (patch) | |
| tree | dfd841f496167e1235e389225e401c77f49bde4e | |
| parent | e69058a7a556805c9f7231d4c78890d3244c2061 (diff) | |
| download | chrome-ec-dcedeab2cceac2eb2e5f1e29639cf0271283a18f.tar.gz | |
skylake: Add workaround for boards that cannot save reset flags
Some hardware has an issue where the reset flags are lost on power cycle
because the EC backup ram loses power. This causes the flag to not power
on the AP (ap-off) to be lost.
In order to pass FAFT it is required that boards support this flag, so
this commit adds a workaround where the skylake chipset code will call into
the board to ask if it has working reset flags and if not it will skip the
PMIC reset if the "ap-off" flag has been set.
The "ap-off" flag is purely for testing, it is not possible for users to
do this without having access to the EC console. (which is currently not
possible at all with CCD unless you can also build a debug cr50 image)
BUG=b:38187362,b:35585876
BRANCH=none
TEST=manual testing on Eve: execute 'reboot ap-off' and ensure that the
AP does not power on. Also ensure that 'dut-control power_state:rec' works
as expected and does not power off at the recovery screen due to a power
button press.
Change-Id: If11e17179e9173509b9a6ae1ef0d94a50ba181d0
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/514503
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
| -rw-r--r-- | power/skylake.c | 15 | ||||
| -rw-r--r-- | power/skylake.h | 6 |
2 files changed, 20 insertions, 1 deletions
diff --git a/power/skylake.c b/power/skylake.c index 505c7439a8..e13604559d 100644 --- a/power/skylake.c +++ b/power/skylake.c @@ -127,6 +127,12 @@ enum power_state power_handle_state(enum power_state state) return new_state; } +/* Workaround for flags getting lost with power cycle */ +__attribute__((weak)) int board_has_working_reset_flags(void) +{ + return 1; +} + #ifdef CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET static void chipset_handle_reboot(void) { @@ -147,8 +153,15 @@ static void chipset_handle_reboot(void) return; /* Preserve AP off request. */ - if (flags & RESET_FLAG_AP_OFF) + if (flags & RESET_FLAG_AP_OFF) { + /* Do not issue PMIC reset if board cannot save reset flags */ + if (!board_has_working_reset_flags()) { + ccprintf("Skip PMIC reset due to board issue.\n"); + cflush(); + return; + } chip_save_reset_flags(RESET_FLAG_AP_OFF); + } ccprintf("Restarting system with PMIC.\n"); /* Flush console */ diff --git a/power/skylake.h b/power/skylake.h index 2a6f8fc4e7..431cccf836 100644 --- a/power/skylake.h +++ b/power/skylake.h @@ -33,4 +33,10 @@ #define CHARGER_INITIALIZED_DELAY_MS 100 #define CHARGER_INITIALIZED_TRIES 40 +/* + * Board can define this function to indicate to the skylake + * power code that it does not have working reset flags. + */ +int board_has_working_reset_flags(void); + #endif /* __CROS_EC_SKYLAKE_H */ |