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authorNicolas Boichat <drinkcat@chromium.org>2018-07-19 16:00:01 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-07-19 08:42:42 -0700
commit1e1dea7c3af29801bf853c60a960dd07b4920f3b (patch)
tree4d2afffa56d03d20d3530cf6ed860d2569e9b177
parent776e73442a9cf77363c65e6f9250d1ffc9039c46 (diff)
downloadchrome-ec-1e1dea7c3af29801bf853c60a960dd07b4920f3b.tar.gz
kukui/scarlet: Remove CONFIG_MPU
CONFIG_MPU does not make sense anyway on STM32F0 with Cortex-M0 core. BRANCH=none BUG=none TEST=make buildall -j Change-Id: I6e338cbbf783babd4e2c9dbe0a3188a086b54807 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1143108 Reviewed-by: Yilun Lin <yllin@chromium.org>
-rw-r--r--board/kukui/board.h3
-rw-r--r--board/scarlet/board.h3
2 files changed, 0 insertions, 6 deletions
diff --git a/board/kukui/board.h b/board/kukui/board.h
index 541eb234b4..e3effcfc19 100644
--- a/board/kukui/board.h
+++ b/board/kukui/board.h
@@ -37,9 +37,6 @@
#define CONFIG_UART_CONSOLE 1
#define CONFIG_UART_RX_DMA
-/* Region sizes are no longer a power of 2 so we can't enable MPU */
-#undef CONFIG_MPU
-
/* Bootblock */
#ifdef SECTION_IS_RO
#define CONFIG_BOOTBLOCK
diff --git a/board/scarlet/board.h b/board/scarlet/board.h
index e5ef795008..22e2def7f2 100644
--- a/board/scarlet/board.h
+++ b/board/scarlet/board.h
@@ -38,9 +38,6 @@
#define CONFIG_UART_CONSOLE 1
#define CONFIG_UART_RX_DMA
-/* Region sizes are no longer a power of 2 so we can't enable MPU */
-#undef CONFIG_MPU
-
/* Enable a different power-on sequence than the one on gru */
#undef CONFIG_CHIPSET_POWER_SEQ_VERSION
#define CONFIG_CHIPSET_POWER_SEQ_VERSION 2