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authorHyungwoo Yang <hyungwoo.yang@intel.com>2019-04-08 01:05:11 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-04-08 22:30:24 -0700
commit5791f6abb1f63b3c3fd198fc64ffc889b0496e3c (patch)
tree1b945e540f07ab2b2263e48d0cf1985d9688b7c4
parent0fe6147a9d8d9feef5049aa6c6c4a6ad30d12b26 (diff)
downloadchrome-ec-5791f6abb1f63b3c3fd198fc64ffc889b0496e3c.tar.gz
ish: ipc: fix no credit error
Currently, in doorbell clearing IRQ handler, IRQ status bit clearing happens after the handler sends an item in tx queue. This prevents the next doorbell clearing interrupt if host clears the doorbell for the item just sent by the handler but before the handler clears the status bit. so clearing IRQ status bit should happen before sending an item. BRANCH=none BUG=b:129937881 TEST=tested on Arcada platform Change-Id: I84a487c0cd9edf2af41acad1163c6f6ed91588ba Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1557853 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--chip/ish/ipc_heci.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/chip/ish/ipc_heci.c b/chip/ish/ipc_heci.c
index 075a7b1267..87f0fe013b 100644
--- a/chip/ish/ipc_heci.c
+++ b/chip/ish/ipc_heci.c
@@ -419,6 +419,13 @@ static void handle_busy_clear_interrupt(const uint32_t peer_id)
size_t head;
ctx = ipc_get_if_ctx(peer_id);
+
+ /*
+ * Resetting interrupt status bit should be done
+ * before sending an item in tx_queue.
+ */
+ REG32(IPC_BUSY_CLEAR) = ctx->clr_busy_bit;
+
/*
* No need to use sync mechanism here since the accesing the queue
* happens only when either this IRQ is disabled or
@@ -434,8 +441,6 @@ static void handle_busy_clear_interrupt(const uint32_t peer_id)
} else {
ctx->is_tx_ipc_busy = 0;
}
-
- REG32(IPC_BUSY_CLEAR) = ctx->clr_busy_bit;
}
/**