nissa: Create zephyr image for reworked dedede with IT81302

Create a Zephyr image for testing a IT81302 EC on a JSL reference
platform.

BUG=b:204231736
TEST=make -g buildall; zmake configure -b drawcia_riscv
BRANCH=none

Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I5e3a916c701fcb6c03b524df46e3dd4db5f4ec17
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3316158
Reviewed-by: Keith Short <keithshort@chromium.org>

7 files changed, 201 insertions, 0 deletions

diff --git a/zephyr/projects/drawcia_riscv/BUILD.py b/zephyr/projects/drawcia_riscv/BUILD.py
new file mode 100644
index 0000000000..d2515ece06
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/BUILD.py
@@ -0,0 +1,11 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Reworked drawcia with RISCV ITE EC
+
+register_binman_project(
+    project_name="drawcia_riscv",
+    zephyr_board="it8xxx2",
+    dts_overlays=["gpio.dts", "kb.dts"],
+)
diff --git a/zephyr/projects/drawcia_riscv/CMakeLists.txt b/zephyr/projects/drawcia_riscv/CMakeLists.txt
new file mode 100644
index 0000000000..5a80325e31
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/CMakeLists.txt
@@ -0,0 +1,11 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+cmake_minimum_required(VERSION 3.13.1)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+
+zephyr_library_include_directories(include)
+
+project(drawcia_riscv)
diff --git a/zephyr/projects/drawcia_riscv/Kconfig b/zephyr/projects/drawcia_riscv/Kconfig
new file mode 100644
index 0000000000..de87f7973e
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/Kconfig
@@ -0,0 +1,12 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+config BOARD_DRAWCIA_RISCV
+	bool "Google Drawcia Board"
+	help
+	  Build reworked Google Drawcia reference board with ITE81302.
+	  This chip is a pin-compatible chip for the existing EC, but
+	  is the RISCV version.
+
+source "Kconfig.zephyr"
diff --git a/zephyr/projects/drawcia_riscv/gpio.dts b/zephyr/projects/drawcia_riscv/gpio.dts
new file mode 100644
index 0000000000..65cc2f10a9
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/gpio.dts
@@ -0,0 +1,72 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <dt-bindings/gpio_defines.h>
+
+/ {
+	named-gpios {
+		compatible = "named-gpios";
+
+		wp_l {
+			gpios = <&gpioa 6 GPIO_INPUT>;
+			enum-name = "GPIO_WP_L";
+			label = "EC_WP_OD";
+		};
+		ec_entering_rw {
+			gpios = <&gpiog 0 GPIO_OUTPUT_LOW>;
+			enum-name = "GPIO_ENTERING_RW";
+			label = "EC_ENTERING_RW";
+		};
+		h1_ec_pwr_btn_odl {
+			gpios = <&gpioe 2 GPIO_INPUT>;
+			enum-name = "GPIO_POWER_BUTTON_L";
+			label = "H1_EC_PWR_BTN_ODL";
+		};
+		lid_open {
+			gpios = <&gpiof 3 GPIO_INPUT>;
+			enum-name = "GPIO_LID_OPEN";
+			label = "lid_open";
+		};
+		ec_ac_mkbp_int_l {
+			gpios = <&gpiol 5 GPIO_ODR_HIGH>;
+			enum-name = "GPIO_EC_INT_L";
+			label = "EC_AP_MKBP_INT_L";
+		};
+	};
+
+	named-i2c-ports {
+		compatible = "named-i2c-ports";
+
+		eeprom {
+			i2c-port = <&i2c0>;
+			enum-name = "I2C_PORT_EEPROM";
+		};
+		i2c_sensor: sensor {
+			i2c-port = <&i2c2>;
+			enum-name = "I2C_PORT_SENSOR";
+		};
+	};
+	named-pwms {
+		compatible = "named-pwms";
+	};
+
+};
+
+&i2c0 {
+	/* I2C_PORT_EEPROM */
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_FAST>;
+};
+
+&i2c2 {
+	/* I2C_PORT_SENSOR */
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+};
+
+&pwm0 {
+	status = "okay";
+	prescaler-cx = <PWM_PRESCALER_C4>;
+};
diff --git a/zephyr/projects/drawcia_riscv/include/gpio_map.h b/zephyr/projects/drawcia_riscv/include/gpio_map.h
new file mode 100644
index 0000000000..51f270bd4a
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/include/gpio_map.h
@@ -0,0 +1,32 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_GPIO_MAP_H
+#define __ZEPHYR_GPIO_MAP_H
+
+#include <devicetree.h>
+#include <gpio_signal.h>
+
+#define GPIO_AC_PRESENT GPIO_UNIMPLEMENTED
+#define GPIO_ENABLE_BACKLIGHT GPIO_UNIMPLEMENTED
+
+/*
+ * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
+ *
+ * Each GPIO_INT requires three parameters:
+ *   gpio_signal - The enum gpio_signal for the interrupt gpio
+ *   interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH)
+ *   handler - The platform/ec interrupt handler.
+ *
+ * Ensure that this files includes all necessary headers to declare all
+ * referenced handler functions.
+ *
+ * For example, one could use the follow definition:
+ * #define EC_CROS_GPIO_INTERRUPTS \
+ *   GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print)
+ */
+#define EC_CROS_GPIO_INTERRUPTS
+
+#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/drawcia_riscv/kb.dts b/zephyr/projects/drawcia_riscv/kb.dts
new file mode 100644
index 0000000000..6fce08f43b
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/kb.dts
@@ -0,0 +1,24 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	/* Override keyboard scanning */
+	soc {
+		/delete-node/ kscan@f01d00;
+
+		cros_kb_raw: cros-kb-raw@f01d00 {
+			compatible = "ite,it8xxx2-cros-kb-raw";
+			reg = <0x00f01d00 0x29>;
+			label = "CROS_KB_RAW_0";
+			interrupt-parent = <&intc>;
+			interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+	};
+};
+
+&cros_kb_raw {
+	status = "okay";
+};
diff --git a/zephyr/projects/drawcia_riscv/prj.conf b/zephyr/projects/drawcia_riscv/prj.conf
new file mode 100644
index 0000000000..813454f875
--- /dev/null
+++ b/zephyr/projects/drawcia_riscv/prj.conf
@@ -0,0 +1,39 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+CONFIG_CROS_EC=y
+CONFIG_PLATFORM_EC=y
+CONFIG_SHIMMED_TASKS=y
+
+CONFIG_BOARD_DRAWCIA_RISCV=y
+CONFIG_AP=n
+CONFIG_PLATFORM_EC_POWERSEQ=n
+CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=n
+CONFIG_PLATFORM_EC_LID_SWITCH=y
+
+# Bring up options
+CONFIG_KERNEL_SHELL=y
+CONFIG_PLATFORM_EC_SYSTEM_UNLOCKED=y
+
+# Host Commands
+CONFIG_PLATFORM_EC_HOSTCMD=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=y
+CONFIG_PLATFORM_EC_HOST_COMMAND_STATUS=y
+
+# VBoot without EFS2
+CONFIG_PLATFORM_EC_VBOOT_EFS2=n
+CONFIG_PLATFORM_EC_VBOOT_HASH=y
+
+# MKBP event mask
+CONFIG_PLATFORM_EC_MKBP_EVENT=y
+CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y
+CONFIG_PLATFORM_EC_MKBP_EVENT_WAKEUP_MASK=y
+CONFIG_PLATFORM_EC_MKBP_HOST_EVENT_WAKEUP_MASK=y
+CONFIG_PLATFORM_EC_MKBP_USE_GPIO=y
+
+# Keyboard
+CONFIG_PLATFORM_EC_KEYBOARD=y
+CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_MKBP=y
+CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y
+CONFIG_PLATFORM_EC_CMD_BUTTON=y