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authorFurquan Shaikh <furquan@chromium.org>2017-09-19 16:41:06 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-09-22 10:18:48 -0700
commite3333972d5bcf110fd2c51de92097a546694d0a1 (patch)
treeedbf7c47248962f2f76a0540cb2d84d09eda0111
parentf1375bec42b6862746ed026d5c3f6a5f97d3e7ac (diff)
downloadchrome-ec-e3333972d5bcf110fd2c51de92097a546694d0a1.tar.gz
poppy: Dynamically disable effect of SLP_S0# on all VRs
Just setting the global VRMODECTRL register is not enough to disable the effect of SLP_S0# signal. Each VR control register needs to be set correctly to ignore the effect as well. However, disabling VR decay on SLP_S0# assertion by default results in additional power consumption during S0ix. In order to prevent this, VR decay on SLP_S0# assertion needs to be enabled and disabled dynamically as follows: 1. By default on EC boot, PMIC will be initialized to disable VR decay on SLP_S0# assertion. 2. When host indicates intent to enter S0ix, EC will enable decay of VRs on SLP_S0# assertion. 3. When host exits from S0ix and updates the intent to no longer enter S0ix using host command, EC will disable decay of VRs on SLP_S0# assertion. actual SLP_S0# assertion because PMIC seems to honor the setting only at SLP_S0# assertion and not if it is already asserted. BUG=b:65732924 BRANCH=None TEST=Verified with this change that the failing Lux device is stable for a long time even with runtime S0ix. Change-Id: I9c5afb408694b3b467e85dcea723f7574bc639c1 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/674034 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--board/poppy/board.c96
1 files changed, 84 insertions, 12 deletions
diff --git a/board/poppy/board.c b/board/poppy/board.c
index 9add68bfa9..038edc8e21 100644
--- a/board/poppy/board.c
+++ b/board/poppy/board.c
@@ -545,29 +545,101 @@ const struct button_config *recovery_buttons[] = {
};
const int recovery_buttons_count = ARRAY_SIZE(recovery_buttons);
-static void board_pmic_init(void)
+static void board_pmic_disable_slp_s0_vr_decay(void)
{
- if (system_jumped_to_this_image())
- return;
+ /*
+ * VCCIOCNT:
+ * Bit 6 (0) - Disable decay of VCCIO on SLP_S0# assertion
+ * Bits 5:4 (00) - Nominal output voltage: 0.975V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0xa);
- /* DISCHGCNT3 - enable 100 ohm discharge on V1.00A */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3e, 0x04);
+ /*
+ * V18ACNT:
+ * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
+ * Bits 5:4 (10) - Nominal voltage set to 1.8V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x34, 0x2a);
- /* Set CSDECAYEN / VCCIO decays to 0V at assertion of SLP_S0# */
+ /*
+ * V100ACNT:
+ * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
+ * Bits 5:4 (01) - Nominal voltage 1.0V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
+
+ /*
+ * V085ACNT:
+ * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
+ * Bits 5:4 (11) - Nominal voltage 1.0V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x3a);
+}
+
+static void board_pmic_enable_slp_s0_vr_decay(void)
+{
+ /*
+ * VCCIOCNT:
+ * Bit 6 (1) - Enable decay of VCCIO on SLP_S0# assertion
+ * Bits 5:4 (00) - Nominal output voltage: 0.975V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0x4a);
/*
- * Set V100ACNT / V1.00A Control Register:
- * Nominal output = 1.0V.
+ * V18ACNT:
+ * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
+ * Bits 5:4 (10) - Nominal voltage set to 1.8V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
*/
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x34, 0x6a);
+
+ /*
+ * V100ACNT:
+ * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
+ * Bits 5:4 (01) - Nominal voltage 1.0V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x5a);
/*
- * Set V085ACNT / V0.85A Control Register:
- * Lower power mode = 0.7V.
- * Nominal output = 1.0V.
+ * V085ACNT:
+ * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
+ * Bits 5:4 (11) - Nominal voltage 1.0V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
*/
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
+}
+
+void power_board_handle_host_sleep_event(enum host_sleep_event state)
+{
+ if (state == HOST_SLEEP_EVENT_S0IX_SUSPEND)
+ board_pmic_enable_slp_s0_vr_decay();
+ else if (state == HOST_SLEEP_EVENT_S0IX_RESUME)
+ board_pmic_disable_slp_s0_vr_decay();
+}
+
+static void board_pmic_init(void)
+{
+ if (system_jumped_to_this_image())
+ return;
+
+ /* DISCHGCNT3 - enable 100 ohm discharge on V1.00A */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3e, 0x04);
+
+ board_pmic_disable_slp_s0_vr_decay();
/* VRMODECTRL - disable low-power mode for all rails */
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3b, 0x1f);