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author | Mary Ruthven <mruthven@chromium.org> | 2017-12-07 12:30:56 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-01-10 15:44:32 -0800 |
commit | 179c624133b5fa33d736fcb00957e2bd1b6b6244 (patch) | |
tree | 5e2c8b223702a9561500acb0f594c04f5ceb966e | |
parent | 17a167cda16420def302cd10c0c214e61f9f5406 (diff) | |
download | chrome-ec-179c624133b5fa33d736fcb00957e2bd1b6b6244.tar.gz |
cr50: configure sys_rst_l as wake on high before deep sleep
We have a requirement that this signal is asserted whenever cr50 is in
deep sleep. It is deasserted on resume. This change configures sys_rst_l
as wake on high before deep sleep, so cr50 doesn't wake up
immediately after entering deep sleep. This is consistent with the
behavior of plt_rst_l when it's used to track the AP state and enable
deep sleep.
This doesn't change anything right now, because no devices that use
sys_rst_l have deep sleep enabled.
BUG=b:35647982
BRANCH=cr50
TEST=none
Change-Id: Ie5c3a6bbf4d0a52c1f96a9b29ebd037104a8abc4
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/815335
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
-rw-r--r-- | board/cr50/board.c | 34 |
1 files changed, 13 insertions, 21 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c index 96db395959..bcb01951bc 100644 --- a/board/cr50/board.c +++ b/board/cr50/board.c @@ -497,39 +497,31 @@ void board_configure_deep_sleep_wakepins(void) GWRITE_FIELD(PINMUX, DIOB5_CTL, IE, 0); /* + * Configure the TPM_RST_L signal as wake on high. There is a + * requirement the tpm reset has to remain asserted when cr50 should + * be in deep sleep, so cr50 should not wake up until it goes high. + * * Whether it is a short pulse or long one waking on the high level is - * fine because the goal of the system reset signal is to reset the - * TPM and after resuming from deep sleep the TPM will be reset. Cr50 - * doesn't need to read the low value and then reset. + * fine, because the goal of TPM_RST_L is to reset the TPM and after + * resuming from deep sleep the TPM will be reset. Cr50 doesn't need to + * read the low value and then reset. */ if (board_use_plt_rst()) { - /* - * If the board includes plt_rst_l, configure Cr50 to resume on - * the rising edge of this signal. - */ + /* Configure plt_rst_l to wake on high */ /* Disable plt_rst_l as a wake pin */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM3, 0); - /* - * Reconfigure it to be level sensitive so that we are - * guaranteed to wake up if the level turns up, no need to - * worry about missing the rising edge. - */ - GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM3, 0); + /* Reconfigure the pin */ + GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM3, 0); /* level sensitive */ GWRITE_FIELD(PINMUX, EXITINV0, DIOM3, 0); /* wake on high */ /* enable powerdown exit */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM3, 1); } else { - /* - * Configure cr50 to wake when sys_rst_l is asserted. It is - * wake on low to make sure that Cr50 is awake to detect the - * rising edge of sys_rst_l. This will keep Cr50 awake the - * entire time sys_rst_l is asserted. - */ + /* Configure plt_rst_l to wake on high */ /* Disable sys_rst_l as a wake pin */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 0); - /* Reconfigure and reenable it. */ + /* Reconfigure the pin */ GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM0, 0); /* level sensitive */ - GWRITE_FIELD(PINMUX, EXITINV0, DIOM0, 1); /* wake on low */ + GWRITE_FIELD(PINMUX, EXITINV0, DIOM0, 0); /* wake on high */ /* enable powerdown exit */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1); } |