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authorFurquan Shaikh <furquan@chromium.org>2018-01-09 04:25:55 -0800
committerchrome-bot <chrome-bot@chromium.org>2018-02-20 20:32:07 -0800
commitfac65e668c2b02d0af419c6a48f33a44f8e4ba11 (patch)
treeee62f4e2c33ca701fa9984779be13874ee0c537e
parent64a4e6b7045861c57505bcbbc8ad3a5ad6e0e5ed (diff)
downloadchrome-ec-fac65e668c2b02d0af419c6a48f33a44f8e4ba11.tar.gz
poppy/soraka: Enable VR decay for runtime and suspend S0ix
We have been using upstart script to force VR decay in runtime S0ix for a while now and haven't seen any issues. This change pushes the fix in EC so that we don't need the upstart script hack any more. BUG=b:70881268 BRANCH=None TEST=Verified by reverting upstart script that PMIC registers are programmed as required to enable VR decay in S0 and S0ix. Change-Id: I19729e907d2ae065758e69933d0b1d3e5b43d5e0 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/856856 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--board/poppy/board.c49
1 files changed, 1 insertions, 48 deletions
diff --git a/board/poppy/board.c b/board/poppy/board.c
index d5d9a6dac0..201561dd0f 100644
--- a/board/poppy/board.c
+++ b/board/poppy/board.c
@@ -414,45 +414,6 @@ static void board_report_pmic_fault(const char *str)
panic_set_reason(PANIC_SW_PMIC_FAULT, info, 0);
}
-static void board_pmic_disable_slp_s0_vr_decay(void)
-{
- /*
- * VCCIOCNT:
- * Bit 6 (0) - Disable decay of VCCIO on SLP_S0# assertion
- * Bits 5:4 (00) - Nominal output voltage: 0.975V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0xa);
-
- /*
- * V18ACNT:
- * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
- * Bits 5:4 (10) - Nominal voltage set to 1.8V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x34, 0x2a);
-
- /*
- * V100ACNT:
- * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
- * Bits 5:4 (01) - Nominal voltage 1.0V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
-
- /*
- * V085ACNT:
- * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
- * Bits 5:4 (11) - Nominal voltage 1.0V
- * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
- * Bits 1:0 (10) - VR set to AUTO operating mode
- */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x3a);
-}
-
static void board_pmic_enable_slp_s0_vr_decay(void)
{
/*
@@ -492,14 +453,6 @@ static void board_pmic_enable_slp_s0_vr_decay(void)
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a);
}
-void power_board_handle_host_sleep_event(enum host_sleep_event state)
-{
- if (state == HOST_SLEEP_EVENT_S0IX_SUSPEND)
- board_pmic_enable_slp_s0_vr_decay();
- else if (state == HOST_SLEEP_EVENT_S0IX_RESUME)
- board_pmic_disable_slp_s0_vr_decay();
-}
-
static void board_pmic_init(void)
{
board_report_pmic_fault("SYSJUMP");
@@ -510,7 +463,7 @@ static void board_pmic_init(void)
/* DISCHGCNT3 - enable 100 ohm discharge on V1.00A */
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3e, 0x04);
- board_pmic_disable_slp_s0_vr_decay();
+ board_pmic_enable_slp_s0_vr_decay();
/* VRMODECTRL - disable low-power mode for all rails */
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3b, 0x1f);