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authorDivya Sasidharan <divya.s.sasidharan@intel.com>2018-04-11 09:44:06 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-04-11 14:55:39 -0700
commit7abf83842ad23ed0c313348ae79d13f281d39cca (patch)
tree0a5027b9d8d3a5d553def4063092055267a9fc0f
parentbe2c5fa602d16f0422c234bf9471120c9bd588bb (diff)
downloadchrome-ec-7abf83842ad23ed0c313348ae79d13f281d39cca.tar.gz
yorp: Disable config for DRP_AUTO_TOGGLE
Since there are known issues with ANX7447 driver to work reliably in low power mode, disable DRP_AUTO_TOGGLE option since TCPC_LOW_POWER mode config and this one should be disabled together. BUG=b:77544959 BRANCH=None TEST=On yorp; on port 0 and 1 test without and with battery boots up. Please note with battery we may still need to press power button to get the SoC to boot up to S0 b:76230069. Detaching the Type-C charger with battery connected also shuts down the system which is a known failure b:77606986. Change-Id: I1b744cd9aa063328845f9a1cc7e36d291dfec9f5 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1007629 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--board/yorp/board.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/yorp/board.h b/board/yorp/board.h
index bf9d11a79f..bf3522cd45 100644
--- a/board/yorp/board.h
+++ b/board/yorp/board.h
@@ -71,7 +71,6 @@
#define CONFIG_USB_PD_PORT_COUNT 2
#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0
#define CONFIG_USB_PD_DUAL_ROLE
-#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
#define CONFIG_USB_PD_LOGGING
#define CONFIG_USB_PD_ALT_MODE
#define CONFIG_USB_PD_ALT_MODE_DFP
@@ -82,6 +81,7 @@
* the EC console with low power mode messages.
*/
#undef CONFIG_USB_PD_TCPC_LOW_POWER
+#undef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
#define CONFIG_USB_PD_TCPM_ANX7447 /* C0 TCPC: ANX7447QN */
#define CONFIG_USB_PD_TCPM_PS8751 /* C1 TCPC: PS8751 */
#define CONFIG_USB_PD_TCPM_MUX