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authorJett Rink <jettrink@chromium.org>2018-05-17 18:17:45 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-05-24 15:44:39 -0700
commit89275aff034cc4fb03c14e5ada1674b5d5bcbbd5 (patch)
tree123c091e6131afb60769c9ca359efb4cc06ae667
parent4a65a62f85ece242588d9316bf624bbd12cd54f7 (diff)
downloadchrome-ec-89275aff034cc4fb03c14e5ada1674b5d5bcbbd5.tar.gz
octopus: moving hibernate code to baseboard
bip also need to enable the sink path when going into hibernate BRANCH=none BUG=b:79948623 TEST=on bip, verfied that AC_OK, LID_OPEN, and POWER_BTN all wake the EC up. Change-Id: I2c1168f856cc45635b5c76f7ca409007fcf141cc Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1065203
-rw-r--r--baseboard/octopus/baseboard.c43
-rw-r--r--baseboard/octopus/variant_ec_npcx796fb.c45
-rw-r--r--driver/ppc/nx20p3483.h7
3 files changed, 50 insertions, 45 deletions
diff --git a/baseboard/octopus/baseboard.c b/baseboard/octopus/baseboard.c
index b358864d59..2c0d47489a 100644
--- a/baseboard/octopus/baseboard.c
+++ b/baseboard/octopus/baseboard.c
@@ -7,9 +7,11 @@
#include "charge_manager.h"
#include "charge_state.h"
+#include "chipset.h"
#include "common.h"
#include "console.h"
#include "driver/bc12/bq24392.h"
+#include "driver/ppc/nx20p3483.h"
#include "gpio.h"
#include "hooks.h"
#include "keyboard_scan.h"
@@ -17,6 +19,7 @@
#include "system.h"
#include "task.h"
#include "usb_mux.h"
+#include "usb_pd.h"
#include "usbc_ppc.h"
#include "util.h"
@@ -277,3 +280,43 @@ void board_set_charge_limit(int port, int supplier, int charge_ma,
CONFIG_CHARGER_INPUT_CURRENT),
charge_mv);
}
+
+void board_hibernate(void)
+{
+ int port;
+
+ /*
+ * To support hibernate called from console commands, ectool commands
+ * and key sequence, shutdown the AP before hibernating.
+ */
+ chipset_force_shutdown();
+
+#ifdef CONFIG_USBC_PPC_NX20P3483
+ /*
+ * If we are charging, then drop the Vbus level down to 5V to ensure
+ * that we don't get locked out of the 6.8V OVLO for our PPCs in
+ * dead-battery mode. This is needed when the TCPC/PPC rails go away.
+ * (b/79218851)
+ */
+ port = charge_manager_get_active_charge_port();
+ if (port != CHARGE_PORT_NONE)
+ pd_request_source_voltage(port, NX20P3483_SAFE_RESET_VBUS_MV);
+#endif
+
+ /*
+ * Delay allows AP power state machine to settle down along
+ * with any PD contract renegotiation.
+ */
+ msleep(100);
+
+ for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) {
+ /*
+ * If Vbus isn't already on this port, then open the SNK path
+ * to allow AC to pass through to the charger when connected.
+ * This is need if the TCPC/PPC rails do not go away.
+ * (b/79173959)
+ */
+ if (!pd_is_vbus_present(port))
+ ppc_vbus_sink_enable(port, 1);
+ }
+}
diff --git a/baseboard/octopus/variant_ec_npcx796fb.c b/baseboard/octopus/variant_ec_npcx796fb.c
index f00d39e8d6..bfd304876f 100644
--- a/baseboard/octopus/variant_ec_npcx796fb.c
+++ b/baseboard/octopus/variant_ec_npcx796fb.c
@@ -6,13 +6,10 @@
/* Common code for VARIANT_OCTOPUS_EC_NPCX796FB configuration */
#include "charge_manager.h"
-#include "chipset.h"
-#include "config.h"
#include "gpio.h"
#include "i2c.h"
#include "power.h"
#include "pwm_chip.h"
-#include "usb_pd.h"
#include "usbc_ppc.h"
#include "util.h"
#include "timer.h"
@@ -35,45 +32,3 @@ const struct pwm_t pwm_channels[] = {
[PWM_CH_KBLIGHT] = { .channel = 3, .flags = 0, .freq = 100 },
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
-
-/******************************************************************************/
-/* Board power callback/hooks */
-#define HIBERNATE_VBUS_LEVEL_MV 5000
-
-void board_hibernate(void)
-{
- int port;
-
- /*
- * To support hibernate called from console commands, ectool commands
- * and key sequence, shutdown the AP before hibernating.
- */
- chipset_force_shutdown();
-
- /*
- * If we are charging, then drop the Vbus level down to 5V to ensure
- * that we don't get locked out of the 6.8V OVLO for our PPCs in
- * dead-battery mode. This is needed when the TCPC/PPC rails go away.
- * (b/79218851)
- */
- port = charge_manager_get_active_charge_port();
- if (port != CHARGE_PORT_NONE)
- pd_request_source_voltage(port, HIBERNATE_VBUS_LEVEL_MV);
-
- /*
- * Delay allows AP power state machine to settle down along
- * with any PD contract renegotiation.
- */
- msleep(100);
-
- for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) {
- /*
- * If Vbus isn't already on this port, then open the SNK path
- * to allow AC to pass through to the charger when connected.
- * This is need if the TCPC/PPC rails do not go away.
- * (b/79173959)
- */
- if (!pd_is_vbus_present(port))
- ppc_vbus_sink_enable(port, 1);
- }
-}
diff --git a/driver/ppc/nx20p3483.h b/driver/ppc/nx20p3483.h
index a85a0b72b4..f0979646e1 100644
--- a/driver/ppc/nx20p3483.h
+++ b/driver/ppc/nx20p3483.h
@@ -13,6 +13,13 @@
#define NX20P3483_ADDR2 0xE4
#define NX20P3483_ADDR3 0xE6
+/*
+ * This PPC hard-codes the over voltage protect of Vbus at 6.8V in dead-battery
+ * mode. If we ever are every going to drop the PD rail, we need to first ensure
+ * that Vbus is negotiated to below 6.8V otherwise we can lock out Vbus.
+ */
+#define NX20P3483_SAFE_RESET_VBUS_MV 5000
+
/* NX20P3483 register addresses */
#define NX20P3483_DEVICE_ID_REG 0x00
#define NX20P3483_DEVICE_STATUS_REG 0x01