diff options
| author | Nicolas Boichat <drinkcat@chromium.org> | 2018-07-06 12:53:48 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-07-06 22:53:15 -0700 |
| commit | b69b099542b49242df118f33ca68bb4df5d876ec (patch) | |
| tree | 96ae78163c63e0b8b847ec7cd0dcea995e0d3169 | |
| parent | 71fa0298a855fc81920fe54f5e7e63f4e94913dc (diff) | |
| download | chrome-ec-b69b099542b49242df118f33ca68bb4df5d876ec.tar.gz | |
flash-stm32h7: Fix protect_blocks
Setting the bit to 0 (not 1) protects the block.
BRANCH=none
BUG=b:111190988
TEST=Follow these steps:
host> dut-control fw_wp_state:force_off
dut> bash flash_fp_mcu ec.bin
EC> flashinfo
Flags:
Protected now:
........ ........
Flash is indeed not protected:
EC> flasherase 0x40000 0x20000
Erasing 131072 bytes at 0x40000...
EC> flashwrite 0x40000 0x100
Writing 256 bytes to 0x40000...
EC> flashread 0x40000 0x100
Corrupt RW (else RO will jump to RW and protect all flash):
EC> flasherase 0x100000 0x20000
host> dut-control fw_wp_state:force_on
EC> flashwp true
EC> flashinfo
Flags: wp_gpio_asserted ro_at_boot
Protected now:
........ ........
EC> reboot
EC> flashinfo
Flags: wp_gpio_asserted ro_at_boot ro_now
Protected now:
YYYYYYYY ........
RO flash is indeed protected:
EC> flasherase 0x40000 0x20000
fails, but RW is not:
EC> flasherase 0x100000 0x20000
succeeds
Change-Id: Id1a69f186db3eff5986951cf270661f8e735dcfe
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1127804
Reviewed-by: Randall Spangler <rspangler@chromium.org>
| -rw-r--r-- | chip/stm32/flash-stm32h7.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c index 318d49f133..a1f965ecd5 100644 --- a/chip/stm32/flash-stm32h7.c +++ b/chip/stm32/flash-stm32h7.c @@ -143,9 +143,9 @@ static void protect_blocks(uint32_t blocks) { if (unlock_optb()) return; - STM32_FLASH_WPSN_PRG(0) |= blocks & BLOCKS_HWBANK_MASK; - STM32_FLASH_WPSN_PRG(1) |= (blocks >> BLOCKS_PER_HWBANK) - & BLOCKS_HWBANK_MASK; + STM32_FLASH_WPSN_PRG(0) &= ~(blocks & BLOCKS_HWBANK_MASK); + STM32_FLASH_WPSN_PRG(1) &= ~((blocks >> BLOCKS_PER_HWBANK) + & BLOCKS_HWBANK_MASK); commit_optb(); } |