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authorDino Li <Dino.Li@ite.com.tw>2018-07-13 14:53:57 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-07-16 10:22:00 -0700
commit1247315ffe057bc546339c53171a23021ee4204f (patch)
tree7d1222e917c571bee346ad0fcfd5b68ff7b116d7
parent47de1e86750736f6e410e359b8f5980811be3556 (diff)
downloadchrome-ec-1247315ffe057bc546339c53171a23021ee4204f.tar.gz
tcpm: it83xx: IT8320 family compatibility
The bit7 and bit3 at UFPVDR register are reserved on BX version. But in DX version, these two bits are used to get the result of fast swap voltage comparing in UFP mode. So we change to mask three bits only. Add the support of two TX SOP type on the DX version. (Debug SOP' and Debug SOP'') On BX version, cc1/cc2 voltage detector function is enabled by bit1 or bit5 at register CCCSR. But on DX version, the bit1 will control both cc1 and cc2. So we create an option for this change. BUG=none BRANCH=none TEST=Plug USB-C power adapter and USB-C to hdmi adapter, both work. Change-Id: If881ef54145f211f7d48a971f56a6118487d9eed Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1119729 Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--chip/it83xx/config_chip.h5
-rw-r--r--chip/it83xx/registers.h14
-rw-r--r--driver/tcpm/it83xx.c22
3 files changed, 33 insertions, 8 deletions
diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h
index 334fbbdedd..9da6944a36 100644
--- a/chip/it83xx/config_chip.h
+++ b/chip/it83xx/config_chip.h
@@ -70,6 +70,11 @@
* doesn't support a write-protect pin, and if we make the write-protection
* permanent, it can't be undone easily enough to support RMA. */
#define CONFIG_FLASH_SIZE 0x00040000
+/*
+ * The voltage detector of CC1 and CC2 is enabled/disabled by different bit
+ * of the control register (bit1 and bit5 at register IT83XX_USBPD_CCCSR).
+ */
+#define IT83XX_USBPD_CC_VOLTAGE_DETECTOR_INDEPENDENT
#elif defined(CHIP_VARIANT_IT8320DX)
#define CONFIG_FLASH_SIZE 0x00080000
/* The slave frequency is adjustable (bit[2-0] at register IT83XX_ESPI_GCAC1) */
diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h
index a62753c9b1..b91c18817e 100644
--- a/chip/it83xx/registers.h
+++ b/chip/it83xx/registers.h
@@ -1174,6 +1174,20 @@ enum i2c_channels {
#define IT83XX_USBPD_CCGCR(p) REG8(IT83XX_USBPD_BASE(p)+0x04)
#define USBPD_REG_MASK_DISABLE_CC (1 << 4)
#define IT83XX_USBPD_CCCSR(p) REG8(IT83XX_USBPD_BASE(p)+0x05)
+#ifdef IT83XX_USBPD_CC_VOLTAGE_DETECTOR_INDEPENDENT
+#define IT83XX_USBPD_REG_MASK_CC1_DISCONNECT ((1 << 3) | (1 << 1))
+#define IT83XX_USBPD_REG_MASK_CC2_DISCONNECT ((1 << 7) | (1 << 5))
+#else
+#define IT83XX_USBPD_REG_MASK_CC1_DISCONNECT (1 << 3)
+#define IT83XX_USBPD_REG_MASK_CC2_DISCONNECT (1 << 7)
+#endif
+#define USBPD_CC1_DISCONNECTED(p) \
+ ((IT83XX_USBPD_CCCSR(p) | IT83XX_USBPD_REG_MASK_CC1_DISCONNECT) & \
+ ~IT83XX_USBPD_REG_MASK_CC2_DISCONNECT)
+#define USBPD_CC2_DISCONNECTED(p) \
+ ((IT83XX_USBPD_CCCSR(p) | IT83XX_USBPD_REG_MASK_CC2_DISCONNECT) & \
+ ~IT83XX_USBPD_REG_MASK_CC1_DISCONNECT)
+
#define IT83XX_USBPD_CCPSR(p) REG8(IT83XX_USBPD_BASE(p)+0x06)
#define USBPD_REG_MASK_DISCONNECT_POWER_CC2 (1 << 5)
#define USBPD_REG_MASK_DISCONNECT_POWER_CC1 (1 << 1)
diff --git a/driver/tcpm/it83xx.c b/driver/tcpm/it83xx.c
index f34b9271f2..2a46c18cbf 100644
--- a/driver/tcpm/it83xx.c
+++ b/driver/tcpm/it83xx.c
@@ -57,9 +57,9 @@ static enum tcpc_cc_voltage_status it83xx_get_cc(
/* sink */
if (USBPD_GET_POWER_ROLE(port) == USBPD_POWER_ROLE_CONSUMER) {
if (cc_pin == USBPD_CC_PIN_1)
- ufp_volt = IT83XX_USBPD_UFPVDR(port) & 0xf;
+ ufp_volt = IT83XX_USBPD_UFPVDR(port) & 0x7;
else
- ufp_volt = (IT83XX_USBPD_UFPVDR(port) >> 4) & 0xf;
+ ufp_volt = (IT83XX_USBPD_UFPVDR(port) >> 4) & 0x7;
switch (ufp_volt) {
case USBPD_UFP_STATE_SNK_DEF:
@@ -138,9 +138,15 @@ static enum tcpc_transmit_complete it83xx_tx_data(
/* set message type */
IT83XX_USBPD_MTSR0(port) =
(IT83XX_USBPD_MTSR0(port) & ~0x1f) | (msg_type & 0xf);
- /* SOP type: bit[5:4] 00 SOP, 01 SOP', 10 SOP" */
+ /*
+ * SOP type bit[6~4]:
+ * on bx version and before:
+ * x00b=SOP, x01b=SOP', x10b=SOP", bit[6] is reserved.
+ * on dx version:
+ * 000b=SOP, 001b=SOP', 010b=SOP", 011b=Debug SOP', 100b=Debug SOP''.
+ */
IT83XX_USBPD_MTSR1(port) =
- (IT83XX_USBPD_MTSR1(port) & ~0x30) | ((type & 0x3) << 4);
+ (IT83XX_USBPD_MTSR1(port) & ~0x70) | ((type & 0x7) << 4);
/* bit7: transmit message is send to cable or not */
if (TCPC_TX_SOP == type)
IT83XX_USBPD_MTSR0(port) &= ~USBPD_REG_MASK_CABLE_ENABLE;
@@ -222,14 +228,12 @@ static void it83xx_enable_vconn(enum usbpd_port port, int enabled)
if (enabled) {
/* Disable unused CC to become VCONN */
if (cc_pin == USBPD_CC_PIN_1) {
- IT83XX_USBPD_CCCSR(port) =
- (IT83XX_USBPD_CCCSR(port) | 0xa0) & ~0xa;
+ IT83XX_USBPD_CCCSR(port) = USBPD_CC2_DISCONNECTED(port);
IT83XX_USBPD_CCPSR(port) = (IT83XX_USBPD_CCPSR(port)
& ~USBPD_REG_MASK_DISCONNECT_POWER_CC2)
| USBPD_REG_MASK_DISCONNECT_POWER_CC1;
} else {
- IT83XX_USBPD_CCCSR(port) =
- (IT83XX_USBPD_CCCSR(port) | 0xa) & ~0xa0;
+ IT83XX_USBPD_CCCSR(port) = USBPD_CC1_DISCONNECTED(port);
IT83XX_USBPD_CCPSR(port) = (IT83XX_USBPD_CCPSR(port)
& ~USBPD_REG_MASK_DISCONNECT_POWER_CC1)
| USBPD_REG_MASK_DISCONNECT_POWER_CC2;
@@ -490,6 +494,8 @@ static int it83xx_tcpm_transmit(int port,
case TCPC_TX_SOP:
case TCPC_TX_SOP_PRIME:
case TCPC_TX_SOP_PRIME_PRIME:
+ case TCPC_TX_SOP_DEBUG_PRIME:
+ case TCPC_TX_SOP_DEBUG_PRIME_PRIME:
status = it83xx_tx_data(port,
type,
PD_HEADER_TYPE(header),