diff options
author | Furquan Shaikh <furquan@google.com> | 2018-07-17 09:27:17 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-07-18 21:58:59 -0700 |
commit | 4afdfbcef0762c59cf0e1a169f2879c9b560fb06 (patch) | |
tree | 567b0b10b3897b7e033e6fd88d2ccce0cb5d9888 | |
parent | 16a8f8f4fa5bce677f202ff78892f3f50978065b (diff) | |
download | chrome-ec-4afdfbcef0762c59cf0e1a169f2879c9b560fb06.tar.gz |
bip: Change USB2_OTG_ID to open drain
USB2_OTG_ID is 3.3V pin on the EC whereas the SoC expects
USB2_DUALROLE and USB2_VBUS_SNS to be 1.8V. Since there is an
internal pull-up on USB2_DUALROLE from the SoC side, this change
configures USB2_OTG_ID to be open drain so that it is actively
driven from the EC when it wants to pull it low. Otherwise, the
pin would be tri-stated from the EC side allowing it to be pulled
up to 1.8V because of the SoC internal pull-up.
BUG=None
BRANCH=None
TEST=None
Change-Id: I187eeaec8f54532c62347b7c0506701be1d1b205
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1140499
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r-- | board/bip/gpio.inc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/board/bip/gpio.inc b/board/bip/gpio.inc index 9902347cd3..2ff05ae75c 100644 --- a/board/bip/gpio.inc +++ b/board/bip/gpio.inc @@ -99,7 +99,12 @@ GPIO(USB_C1_BC12_CHG_DET_L, PIN(A, 1), GPIO_INPUT) /* C1 BC1.2 Detect */ GPIO(USB_C0_BC12_VBUS_ON, PIN(J, 4), GPIO_OUT_LOW) /* C0 BC1.2 Power */ GPIO(USB_C1_BC12_VBUS_ON, PIN(J, 5), GPIO_OUT_LOW) /* C1 BC1.2 Power */ GPIO(USB_C1_PD_RST_ODL, PIN(L, 7), GPIO_ODR_HIGH) /* C1 PD Reset */ -GPIO(USB2_OTG_ID, PIN(I, 2), GPIO_OUT_LOW) /* OTG ID */ +/* + * Configure USB2_OTG_ID as ODR so that the EC never drives it high thus + * preventing any leakage when SoC is not up. + */ +GPIO(USB2_OTG_ID, PIN(I, 2), GPIO_ODR_LOW | + GPIO_SEL_1P8V) /* OTG ID */ /* LED */ GPIO(BAT_LED_ORANGE, PIN(A, 6), GPIO_OUT_LOW) /* LED_1_L NOTE: actually active high, but labeled _L in the schematics */ |