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authormichael_chen <michael5_chen@pegatroncorp.com>2018-09-03 11:26:54 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-09-18 06:42:12 -0700
commit3a56be1e353ac4302d2234b7e1f6f516d68c41db (patch)
tree20a4737ab32b4130d761c13d90f72eb513683eaa
parenta914c8df696d4fd8cc8d7bbdfe99da539606fcf9 (diff)
downloadchrome-ec-3a56be1e353ac4302d2234b7e1f6f516d68c41db.tar.gz
rammus: Fix PD port 0 reset control behavior
Because the GPIO USB_PD_RST_C0_L is high active. When USB_PD_RST_C0_L is high, the PD port 0 i2c communication will fail. BUG=None BRANCH=ToT TEST=Manual. Using consol command "i2cxfer r16 0 0x52 0x00" to read TCPC port 0 VID is ok. Change-Id: I998669f85770672478a4c9131f7b5a767ffd6773 Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1198905 Commit-Ready: michael chen <michael5_chen@pegatroncorp.com> Tested-by: michael chen <michael5_chen@pegatroncorp.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
-rw-r--r--board/rammus/board.c8
-rw-r--r--board/rammus/gpio.inc2
2 files changed, 5 insertions, 5 deletions
diff --git a/board/rammus/board.c b/board/rammus/board.c
index 1ae366f68a..c15061670b 100644
--- a/board/rammus/board.c
+++ b/board/rammus/board.c
@@ -62,7 +62,7 @@
static void tcpc_alert_event(enum gpio_signal signal)
{
if ((signal == GPIO_USB_C0_PD_INT_ODL) &&
- !gpio_get_level(GPIO_USB_PD_RST_C0_L))
+ gpio_get_level(GPIO_USB_PD_RST_C0))
return;
else if ((signal == GPIO_USB_C1_PD_INT_ODL) &&
!gpio_get_level(GPIO_USB_C1_PD_RST_ODL))
@@ -203,10 +203,10 @@ const int usb_port_enable[CONFIG_USB_PORT_POWER_SMART_PORT_COUNT] = {
void board_reset_pd_mcu(void)
{
/* Assert reset */
- gpio_set_level(GPIO_USB_PD_RST_C0_L, 0);
+ gpio_set_level(GPIO_USB_PD_RST_C0, 1);
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
msleep(1);
- gpio_set_level(GPIO_USB_PD_RST_C0_L, 1);
+ gpio_set_level(GPIO_USB_PD_RST_C0, 0);
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
/* After TEST_R release, anx7447/3447 needs 2ms to finish eFuse
* loading.
@@ -243,7 +243,7 @@ uint16_t tcpc_get_alert_status(void)
uint16_t status = 0;
if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) {
- if (gpio_get_level(GPIO_USB_PD_RST_C0_L))
+ if (!gpio_get_level(GPIO_USB_PD_RST_C0))
status |= PD_STATUS_TCPC_ALERT_0;
}
diff --git a/board/rammus/gpio.inc b/board/rammus/gpio.inc
index 98d24b19ac..4cabac76c3 100644
--- a/board/rammus/gpio.inc
+++ b/board/rammus/gpio.inc
@@ -83,7 +83,7 @@ GPIO(EN_USB_C0_CHARGE_EC_L, PIN(C, 0), GPIO_OUT_LOW) /* C0 Charg
GPIO(EN_USB_C1_5V_OUT, PIN(B, 1), GPIO_OUT_LOW) /* C1 5V Enable */
GPIO(EN_USB_C1_3A, PIN(3, 5), GPIO_OUT_LOW) /* C1 3A Enable */
GPIO(EN_USB_C1_CHARGE_EC_L, PIN(C, 3), GPIO_OUT_LOW) /* C1 Charge enable */
-GPIO(USB_PD_RST_C0_L, PIN(0, 3), GPIO_OUT_LOW) /* C0 PD Reset */
+GPIO(USB_PD_RST_C0, PIN(0, 3), GPIO_OUT_LOW) /* C0 PD Reset */
GPIO(USB_C1_PD_RST_ODL, PIN(7, 4), GPIO_ODR_HIGH) /* C1 PD Reset */
GPIO(USB_C0_DP_HPD, PIN(9, 4), GPIO_INPUT) /* C0 DP Hotplug Detect */
GPIO(USB_C1_DP_HPD, PIN(A, 5), GPIO_INPUT) /* C1 DP Hotplug Detect */