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| author | Caveh Jalali <caveh@chromium.org> | 2018-10-11 01:39:03 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-10-17 22:43:11 -0700 |
| commit | 9e5009dde797e1c5253882952534440cde614c79 (patch) | |
| tree | adcae8eee6138a4d46a9abb1b7de8e95e305ff55 | |
| parent | ba4ebeb6e021779cacc4888e047157a61ca58437 (diff) | |
| download | chrome-ec-9e5009dde797e1c5253882952534440cde614c79.tar.gz | |
atlas: set VCCIOVSEL to 0.85v
initialize VCCIOVSEL to 0.85v when initializing the ROP PMIC. we
already do this when resuming from S0ix, but should really also do
this on first boot... just call the same function to set things up.
BUG=b:75070158
BRANCH=none
TEST=boots on atlas, verified register setting from EC console
Change-Id: I046775d45361a2d64b412d0115ebd7a742d12b89
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1275429
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
| -rw-r--r-- | board/atlas/board.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/board/atlas/board.c b/board/atlas/board.c index 3fdb367fdc..ba53d81b85 100644 --- a/board/atlas/board.c +++ b/board/atlas/board.c @@ -408,16 +408,11 @@ static void board_pmic_init(void) i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, BD99992GW_REG_DISCHGCNT3, 0x04); - /* - * Set V085ACNT / V0.85A Control Register: - * Nominal output = 0.85V. - */ - i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, - BD99992GW_REG_V085ACNT, 0x2a); - /* VRMODECTRL - disable low-power mode for all rails */ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, BD99992GW_REG_VRMODECTRL, 0x1f); + + board_pmic_disable_slp_s0_vr_decay(); } DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT); |