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authorCHLin <CHLIN56@nuvoton.com>2018-10-24 16:50:23 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-10-26 08:07:14 -0700
commitb83e555952336d583c19b26bfe026908ca70e196 (patch)
tree825d472c89a692c2100a09ac8795b4156865a62f
parentdfed287068488a70d13bafec0c50bc471b00d31c (diff)
downloadchrome-ec-b83e555952336d583c19b26bfe026908ca70e196.tar.gz
npcx: gpio: support internal pull-down when enable low voltage mode
There is the limitation that internal pull-up must be disabled when a GPIO is configured in low voltage level. However, thers is no such limitation of internal pull-down. The current GPIO driver disable no matter pull-up or pull-down when low voltage mode is set. This CL fixes it by: 1. enable internal PD when low voltage mode is set. 2. print warning message in the UART console when both low voltage and internal PU flags are set for any GPIO defined in gpio.inc. BRANCH=none BUG=b:118339468 TEST=No build error for make buildall TEST=define a gpio with internal PD+low-voltage in npcx7_evb/gpio.inc, check the releated bits of PxPULL and PxPUD are set; TEST=define a gpio with internal PU+low-voltage, check the warning message is printed on the console. Change-Id: I8e15125d3a2ccc73f84b8a559d12644b1d1af5f9 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1297872 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r--chip/npcx/gpio.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c
index 7be79f4e54..f8a17d98a8 100644
--- a/chip/npcx/gpio.c
+++ b/chip/npcx/gpio.c
@@ -300,8 +300,14 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
/* Select pull-up/down of GPIO 0:pull-up 1:pull-down */
if (flags & GPIO_PULL_UP) {
- NPCX_PPUD(port) &= ~mask;
- NPCX_PPULL(port) |= mask; /* enable pull down/up */
+ if (flags & GPIO_SEL_1P8V) {
+ CPRINTS("Warn! enable internal PU and low voltage mode"
+ " at the same time is illegal. port 0x%x, mask 0x%x",
+ port, mask);
+ } else {
+ NPCX_PPUD(port) &= ~mask;
+ NPCX_PPULL(port) |= mask; /* enable pull down/up */
+ }
} else if (flags & GPIO_PULL_DOWN) {
NPCX_PPUD(port) |= mask;
NPCX_PPULL(port) |= mask; /* enable pull down/up */
@@ -313,11 +319,9 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
/* 1.8V low voltage select */
if (flags & GPIO_SEL_1P8V) {
/*
- * Set IO type to open-drain & disable internal pulling
- * before selecting low-voltage level
+ * Set IO type to open-drain before selecting low-voltage level
*/
NPCX_PTYPE(port) |= mask;
- NPCX_PPULL(port) &= ~mask;
gpio_low_voltage_level_sel(port, mask, 1);
} else
gpio_low_voltage_level_sel(port, mask, 0);