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authorWai-Hong Tam <waihong@google.com>2019-01-09 15:38:05 -0800
committerchrome-bot <chrome-bot@chromium.org>2019-01-11 13:32:12 -0800
commit629ee2c395850172eefdbebd57b329d4a6c17ff0 (patch)
tree79cc61545035db015831f390e38eb321033b1a86
parent2d4116498333af946497ef9445f721d8a3e82e9e (diff)
downloadchrome-ec-629ee2c395850172eefdbebd57b329d4a6c17ff0.tar.gz
cheza: Correct the GPIO USB_C1_OC_ODL
The GPIO USB_C1_OC_ODL should be GPIO72. The schematic names it wrong as GPIOD7, some kind of library error. BRANCH=none BUG=b:120500746 TEST=Checked the GPIO high normally; and low when over-current. Change-Id: Ic7973b3010f6d7bc9268cea134a1d2fa7d38eba8 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1404143 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
-rw-r--r--board/cheza/gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/cheza/gpio.inc b/board/cheza/gpio.inc
index 6d128e4684..64d1d89319 100644
--- a/board/cheza/gpio.inc
+++ b/board/cheza/gpio.inc
@@ -122,7 +122,7 @@ GPIO(USBC_MUX_CONF1, PIN(5, 1), GPIO_OUT_HIGH) /* Port-1 enable DP switc
/* USB-C port-1 interrupts */
GPIO(USB_C1_DP_HPD, PIN(9, 6), GPIO_INPUT) /* DP HPD from port-1 TCPC */
-GPIO(USB_C1_OC_ODL, PIN(D, 7), GPIO_INPUT) /* Port-1 power switch over-current */
+GPIO(USB_C1_OC_ODL, PIN(7, 2), GPIO_INPUT) /* Port-1 power switch over-current */
/* I2C */
GPIO(I2C0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C_POWER_SCL */