diff options
| author | Mary Ruthven <mruthven@google.com> | 2019-01-28 18:26:12 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-01-31 18:18:47 -0800 |
| commit | 846eb6500388e81b74730b6a02d44c4ede4b9279 (patch) | |
| tree | 523d9aba9758cf00ae31edda201aa97b04737139 | |
| parent | 02390c35e35108ea4474827dbe037541d3b93c76 (diff) | |
| download | chrome-ec-846eb6500388e81b74730b6a02d44c4ede4b9279.tar.gz | |
cr50: add more obvious sections in gpio.inc
Change the comments so it's more obvious what the sections are in
gpio.inc
BUG=none
BRANCH=none
TEST=none
Change-Id: I11566aa1748519df8cdc3cf9269e2a0c90c2dad9
Signed-off-by: Mary Ruthven <mruthven@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1443869
Commit-Ready: Mary Ruthven <mruthven@chromium.org>
Tested-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
| -rw-r--r-- | board/cr50/gpio.inc | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index d9b0a8ff32..128cc52049 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -44,6 +44,8 @@ /* Declare symbolic names for all the GPIOs that we care about. * Note: Those with interrupt handlers must be declared first. */ +/*****************************************************************************/ +/* INTERRUPT GPIOs - interrupts processed in chip/g/gpio.c */ /* * The system reset signal can be from two different pins depending on what the * board type is. One board uses plt_rst_l (diom3) and the other board type uses @@ -66,9 +68,17 @@ GPIO_INT(DETECT_EC, PIN(1, 2), GPIO_INT_HIGH, ec_detect_asserted) GPIO_INT(DETECT_SERVO, PIN(1, 3), GPIO_INT_HIGH | GPIO_PULL_DOWN, servo_detect_asserted) -/* This is used for EC flash bit bang programming. */ +/*****************************************************************************/ +/* NON STANDARD INTERRUPT GPIOs - handlers defined and configured in board.c */ +/* + * This signal is used as an interrupt for uart bitbang. This is setup manually + * in board.c instead of using chip/g/gpio.c, so the interrupts can be processed + * more quickly. This increases the max bitbang programming speed. + */ GPIO(EC_TX_CR50_RX, PIN(1, 4), GPIO_INPUT) +/*****************************************************************************/ +/* GPIOs */ /* Pull this low to interrupt the AP */ GPIO(INT_AP_L, PIN(0, 0), GPIO_OUT_HIGH) |