diff options
| author | Scott Collyer <scollyer@google.com> | 2019-01-24 16:57:38 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-01-31 18:19:03 -0800 |
| commit | b0ae267a7451e440ae1d7b73dd42f905a8998f48 (patch) | |
| tree | 9e52af83731dc68b8f191653c05d87e31c54d112 | |
| parent | 9bcaf16c7de255e2e906bef795f0b62b0a19c124 (diff) | |
| download | chrome-ec-b0ae267a7451e440ae1d7b73dd42f905a8998f48.tar.gz | |
hatch: Add support for PSL wake sources
This CL adds the alternate function defines for the 4 PSL wake source
pins, populates the wake pins table, and enables the config option for
PSL mode.
BRANCH=none
BUG=b:123343366
TEST=Use EC console command to force hiberate and verified EC wakes
from hibernate via power button, EC reset, connecting AC
power, and opening of lid switch.
Change-Id: I6d5ad282f53e9090aafd4164510741d7cfe7907a
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1435971
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
| -rw-r--r-- | baseboard/hatch/baseboard.c | 11 | ||||
| -rw-r--r-- | baseboard/hatch/baseboard.h | 1 | ||||
| -rw-r--r-- | board/hatch/board.c | 6 | ||||
| -rw-r--r-- | board/hatch/gpio.inc | 10 |
4 files changed, 20 insertions, 8 deletions
diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c index 8419bd91ab..1347b066a7 100644 --- a/baseboard/hatch/baseboard.c +++ b/baseboard/hatch/baseboard.c @@ -35,6 +35,17 @@ #define USB_PD_PORT_TCPC_1 1 /******************************************************************************/ +/* Wake up pins */ +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_LID_OPEN, + GPIO_ACOK_OD, + GPIO_POWER_BUTTON_L, + /* EC_RST_ODL needs to wake device while in PSL hibernate. */ + GPIO_SYS_RESET_L, +}; +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/******************************************************************************/ /* Keyboard scan setting */ struct keyboard_scan_config keyscan_config = { /* diff --git a/baseboard/hatch/baseboard.h b/baseboard/hatch/baseboard.h index 1ed7381022..2f3531aca2 100644 --- a/baseboard/hatch/baseboard.h +++ b/baseboard/hatch/baseboard.h @@ -19,6 +19,7 @@ /* EC Defines */ #define CONFIG_ADC +#define CONFIG_HIBERNATE_PSL #define CONFIG_PWM #define CONFIG_VBOOT_HASH #define CONFIG_VSTORE diff --git a/board/hatch/board.c b/board/hatch/board.c index cd6d7cd365..44ffa432cb 100644 --- a/board/hatch/board.c +++ b/board/hatch/board.c @@ -72,12 +72,6 @@ static void tcpc_alert_event(enum gpio_signal signal) #include "gpio_list.h" /* Must come after other header files. */ /******************************************************************************/ -/* Wake up pins */ -const enum gpio_signal hibernate_wake_pins[] = { -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/******************************************************************************/ /* SPI devices */ const struct spi_device_t spi_devices[] = { }; diff --git a/board/hatch/gpio.inc b/board/hatch/gpio.inc index bbec264e83..a2355b44b1 100644 --- a/board/hatch/gpio.inc +++ b/board/hatch/gpio.inc @@ -9,10 +9,10 @@ * Note: Those with interrupt handlers must be declared first. */ /* Wake Source interrupts */ -GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH, lid_interrupt) +GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ GPIO_INT(POWER_BUTTON_L, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH, extpower_interrupt) +GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* Power sequencing interrupts */ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) @@ -104,3 +104,9 @@ ALTERNATE(PIN_MASK(4, 0x01), 0, MODULE_PWM, 0) /* TA /* ADC */ ALTERNATE(PIN_MASK(4, 0x30), 0, MODULE_ADC, 0) /* ADC0-1 */ + +/* Power Switch Logic (PSL) inputs */ +ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, 0) /* GPIOD2 = LID_OPEN */ +ALTERNATE(PIN_MASK(0, 0x07), 0, MODULE_PMU, 0) /* GPIO00 = ACOK_OD, + GPIO01 = MECH_PWR_BTN_ODL + GPIO02 = EC_RST_ODL */ |