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| author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-21 15:44:42 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-04 05:39:54 -0700 |
| commit | 0e99e97634135c9d4e6b60dcd6837bb76d91acf7 (patch) | |
| tree | b7b7c38e4002669d483e703c30b7df1991be3f15 | |
| parent | bc6c680b8ad09596a89451df40ee6375ea4d6274 (diff) | |
| download | chrome-ec-0e99e97634135c9d4e6b60dcd6837bb76d91acf7.tar.gz | |
bmi160: Fix ODR to REG when rate is less than 100Hz
The calculation was wrong and always returned the next value.
We were lucky that we always ask to round up, so the frequencies were
rounded up from the get go.
BUG=b:120942904
BRANCH=none
TEST=Test with several ODR for correctness:
cout << "10:" << BMI160_ODR_TO_REG(10000) << ":" <<
BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(10000)) << "\n"
<< "29:" << BMI160_ODR_TO_REG(29000) << ":" <<
BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(29000)) << "\n"
<< "59:" << BMI160_ODR_TO_REG(59000) << ":" <<
BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(59000)) << "\n"
<< "99:" << BMI160_ODR_TO_REG(99000) << ":" <<
BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(99000)) << "\n"
<< "109:" << BMI160_ODR_TO_REG(109000) << ":" <<
BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(109000)) << "\n"
<< "209:" << BMI160_ODR_TO_REG(209000) << ":" <<
BMI160_REG_TO_ODR(BMI160_ODR_TO_REG(209000)) << "\n" ;
Returns:
10:4:6250
29:6:25000
59:7:50000
99:7:50000
109:8:100000
209:9:200000
Change-Id: I898d1077af78ab1d0e65ac0e8f7714a2a3b042b3
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1535160
Reviewed-by: Yilun Lin <yllin@chromium.org>
| -rw-r--r-- | driver/accelgyro_bmi160.h | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/driver/accelgyro_bmi160.h b/driver/accelgyro_bmi160.h index db6179be3e..428338b080 100644 --- a/driver/accelgyro_bmi160.h +++ b/driver/accelgyro_bmi160.h @@ -180,18 +180,13 @@ enum fifo_header { /* odr = 100 / (1 << (8 - reg)) ,within limit */ #define BMI160_ODR_0_78HZ 0x01 -#define BMI160_ODR_25HZ 0x06 -#define BMI160_ODR_50HZ 0x07 #define BMI160_ODR_100HZ 0x08 -#define BMI160_ODR_800HZ 0x0b -#define BMI160_ODR_1600HZ 0x0c -#define BMI160_ODR_3200HZ 0x0d #define BMI160_REG_TO_ODR(_regval) \ - ((_regval) < 8 ? 100000 / (1 << (8 - (_regval))) : \ - 100000 * (1 << ((_regval) - 8))) + ((_regval) < BMI160_ODR_100HZ ? 100000 / (1 << (8 - (_regval))) : \ + 100000 * (1 << ((_regval) - 8))) #define BMI160_ODR_TO_REG(_odr) \ - ((_odr) < 100000 ? (__builtin_clz(100000 / (_odr)) - 23) : \ + ((_odr) < 100000 ? (__builtin_clz(100000 / (_odr)) - 24) : \ (39 - __builtin_clz((_odr) / 100000))) #define BMI160_CONF_REG(_sensor) (0x40 + 2 * (_sensor)) |