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authorNicolas Norvez <norvez@chromium.org>2019-03-20 17:11:32 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-04-03 18:13:42 -0700
commit340cc79277df4fe0bb6382b97841659345b5c953 (patch)
treec152b290999590c5193f2019055849ff5c8825af
parentf3715a514e71ffdddc337d7e2635f970dda3c092 (diff)
downloadchrome-ec-340cc79277df4fe0bb6382b97841659345b5c953.tar.gz
hatch_fp: add flash_fp_mcu script
Set the correct GPIOs, SPI dev and ID for Hatch. Keep the GPIO_PWREN variable empty since there is not such GPIO on Hatch, power is always on for the FPMCU BRANCH=None BUG=b:124405913 BUG=b:126455006 TEST=flash_fp_mcu on hatch doesn't bail Change-Id: I544868bc088d3aeb0896b8123bfc83c1ea0a156c Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1532345 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
-rw-r--r--board/hatch_fp/flash_fp_mcu35
1 files changed, 35 insertions, 0 deletions
diff --git a/board/hatch_fp/flash_fp_mcu b/board/hatch_fp/flash_fp_mcu
new file mode 100644
index 0000000000..7b014961bf
--- /dev/null
+++ b/board/hatch_fp/flash_fp_mcu
@@ -0,0 +1,35 @@
+#!/bin/bash
+# Copyright 2019 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+. "$(dirname "$(readlink -f "$0")")"/../share/flash_fp_mcu/flash_fp_mcu_common.sh
+
+# Kabylake PCH GPIOs
+readonly KBL_GPIOCHIP="gpiochip200"
+
+if [[ -e "/sys/class/gpio/${KBL_GPIOCHIP}" ]]; then
+ # Hatch configuration
+ echo "NOTE: For use with updating FP MCU on HATCH boards only"
+ readonly SPIDEV="/dev/spidev1.1"
+ # GSPI1 ACPI device for FP MCU
+ readonly SPIID="spi-PRP0001:01"
+ # FPMCU RST_ODL is on GPP_A12 = 200 + 12 = 212
+ readonly GPIO_NRST=212
+ # FPMCU BOOT0 is on GPP_A22 = 200 + 22 = 222
+ readonly GPIO_BOOT0=222
+ # No PWREN GPIO on Hatch, FPMCU is always on
+ readonly GPIO_PWREN=""
+else
+ echo "Cannot find a known GPIO chip."
+ exit 1
+fi
+
+flash_fp_mcu_stm32 \
+ "${SPIDEV}" \
+ "${SPIID}" \
+ "${GPIO_NRST}" \
+ "${GPIO_BOOT0}" \
+ "${GPIO_PWREN}" \
+ "${1}"
+