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authorCHLin <CHLIN56@nuvoton.com>2019-03-21 16:42:20 +0800
committerchrome-bot <chrome-bot@chromium.org>2019-04-03 18:13:50 -0700
commit0cb553724da2e424065c482690a2540018f3c60a (patch)
tree7c83f5793157762391cba03366afe913d1b26850
parentbe3906ecf1b75f93c6ac348cff8dbed5fab3d8cd (diff)
downloadchrome-ec-0cb553724da2e424065c482690a2540018f3c60a.tar.gz
util:ecst: add the support of CHIP_VARIANT npcx7m7wc for NPCX7
This CL adds the support for chip variant npcx7m7wc in the ecst utility. BRANCH:none BUG=none TEST=pass "make buildall" TEST=in the follow CL, change CHIP_VARIANT to npcx7m7wc in board/npcx7_evb/build.mk; build the image by "BOARD=npcx7_evb make"; check the image can be built and the image header is correct. Change-Id: I6031a6f188f06e31ca7ce0571065b11ee68b27ab Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1543061 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
-rwxr-xr-xutil/ecst.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/util/ecst.c b/util/ecst.c
index 328587e8d9..0680f8b1e8 100755
--- a/util/ecst.c
+++ b/util/ecst.c
@@ -45,7 +45,7 @@ struct chip_info chip_info[] = {{NPCX5M5G_RAM_ADDR, NPCX5M5G_RAM_SIZE},
/* Support chips name strings */
const char *supported_chips = "npcx5m5g, npcx5m6g, npcx7m5g, npcx7m6g, "
- "npcx7m6f, npcx7m6fb, npcx7m6fc, or npcx7m7wb";
+ "npcx7m6f, npcx7m6fb, npcx7m6fc, npcx7m7wb, or npcx7m7wc";
static unsigned int calc_api_csum_bin(void);
static unsigned int initialize_crc_32(void);
@@ -239,8 +239,10 @@ int main(int argc, char *argv[])
supported_chips);
main_status = FALSE;
} else {
- if (str_cmp_no_case(main_str_temp,
- "npcx7m7wb") == 0) {
+ if ((str_cmp_no_case(main_str_temp,
+ "npcx7m7wb") == 0) ||
+ (str_cmp_no_case(main_str_temp,
+ "npcx7m7wc") == 0)) {
if ((bin_params.bin_params
& BIN_FW_LOAD_START_ADDR) ==
0x00000000)