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| author | Pi-Hsun Shih <pihsun@chromium.org> | 2019-03-19 13:59:52 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-04 05:39:55 -0700 |
| commit | 29c3cf2d8cd0c4da93aa7f01ca96539423cd48ef (patch) | |
| tree | fd509e90c7663a9d61ff7155345f795ea36cbd5d | |
| parent | e726fe4b2c1ea392ed059c4dbdedec253605cd7f (diff) | |
| download | chrome-ec-29c3cf2d8cd0c4da93aa7f01ca96539423cd48ef.tar.gz | |
kukui: scp: fix udelay hangs the system in clock enable.
It seems that udelay doesn't work before the clock is properly
configured and enabled, causing the SCP image not able to boot. Remove
the udelay in scp_clock_high_enable.
BUG=b:128877063
TEST=manually, make sure SCP firmware works on boot.
BRANCH=none
Change-Id: Idc505a33a7e88d136a5b50f2e5bd52bd5213393b
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1530410
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
| -rw-r--r-- | chip/mt_scp/clock.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/chip/mt_scp/clock.c b/chip/mt_scp/clock.c index 14ea5ea67a..311346eb8f 100644 --- a/chip/mt_scp/clock.c +++ b/chip/mt_scp/clock.c @@ -96,6 +96,19 @@ static void scp_ulposc_config(int osc) AP_ULPOSC_CON13(osc) |= OSC_DIV2_EN; } +static inline void busy_udelay(int usec) +{ + /* + * Delaying by busy-looping, for place that can't use udelay because of + * the clock not configured yet. The value 28 is chosen approximately + * from experiment. + */ + volatile int i = usec * 28; + + while (i--) + ; +} + void scp_clock_high_enable(int osc) { /* Enable high speed clock */ @@ -104,14 +117,14 @@ void scp_clock_high_enable(int osc) switch (osc) { case 0: /* After 25ms, enable ULPOSC */ - udelay(25 * MSEC); + busy_udelay(25 * MSEC); SCP_CLK_EN |= CG_CLK_HIGH; break; case 1: /* Turn off ULPOSC2 high-core-disable switch */ SCP_CLK_ON_CTRL &= ~HIGH_CORE_DIS_SUB; /* After 25ms, turn on ULPOSC2 high core clock gate */ - udelay(25 * MSEC); + busy_udelay(25 * MSEC); SCP_CLK_HIGH_CORE |= CLK_HIGH_CORE_CG; break; default: |