diff options
| author | Rong Chang <rongchang@chromium.org> | 2019-03-25 16:22:41 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-23 07:21:34 -0700 |
| commit | b1cc0bc684ad2377716f2ebc11b9f0a9484fa52a (patch) | |
| tree | 926a9f255d05b75681388c600b370b369ecca64c | |
| parent | 84a70a900c76ea0c0767dba5ab2df120006dfd93 (diff) | |
| download | chrome-ec-b1cc0bc684ad2377716f2ebc11b9f0a9484fa52a.tar.gz | |
kukui: scp: move CPU clock selection to clock module
CPU clock management should be in clock module.
BUG=b:120169529
BRANCH=none
TEST=manual
build and load on kukui, check SCP console command:
> rw 0x405C4000
read 0x405c4000 = 0x00000803
Change-Id: Ic13e9a51cf682af33799b713849fd3a445e6cfdb
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1538097
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
| -rw-r--r-- | chip/mt_scp/clock.c | 6 | ||||
| -rw-r--r-- | chip/mt_scp/system.c | 2 |
2 files changed, 6 insertions, 2 deletions
diff --git a/chip/mt_scp/clock.c b/chip/mt_scp/clock.c index 311346eb8f..c58c4671a1 100644 --- a/chip/mt_scp/clock.c +++ b/chip/mt_scp/clock.c @@ -134,6 +134,9 @@ void scp_clock_high_enable(int osc) void scp_enable_clock(void) { + /* Select default CPU clock */ + SCP_CLK_SEL = CLK_SEL_SYS_26M; + /* VREQ */ SCP_CPU_VREQ = 0x10001; SCP_SECURE_CTRL &= ~ENABLE_SPM_MASK_VREQ; @@ -158,6 +161,9 @@ void scp_enable_clock(void) scp_ulposc_config(1); scp_clock_high_enable(1); /* Turn on ULPOSC2 */ + /* Select ULPOSC2 high speed CPU clock */ + SCP_CLK_SEL = CLK_SEL_ULPOSC_2; + /* Enable default clock gate */ SCP_CLK_GATE |= CG_DMA_CH3 | CG_DMA_CH2 | CG_DMA_CH1 | CG_DMA_CH0 | CG_I2C_M | CG_MAD_M; diff --git a/chip/mt_scp/system.c b/chip/mt_scp/system.c index c3c6defca2..3011b7024f 100644 --- a/chip/mt_scp/system.c +++ b/chip/mt_scp/system.c @@ -82,9 +82,7 @@ void system_pre_init(void) /* SRAM */ scp_enable_tcm(); /* Clock */ - SCP_CLK_SEL = CLK_SEL_SYS_26M; scp_enable_clock(); - SCP_CLK_SEL = CLK_SEL_ULPOSC_2; /* Peripheral IRQ */ scp_enable_pirq(); /* Init dram mapping (and cache) */ |