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authorHu, Hebo <hebo.hu@intel.com>2019-07-02 17:34:08 +0800
committerCommit Bot <commit-bot@chromium.org>2019-07-08 17:40:44 +0000
commitc0e948d8da9fa3013ff3ab3572b96edaeb553b69 (patch)
treeb4b1fb5e1bb7db6792dd081716edb4807e2dd73b
parent77481fed8b16bbb5fde8dd4ffcbfa9f632fd93ae (diff)
downloadchrome-ec-c0e948d8da9fa3013ff3ab3572b96edaeb553b69.tar.gz
ish: fix osscaisonally not load issue when doing shutdown & reboot
Before switch to aon task, cache and ROM will be power gated (PMU_RF_ROM_PWR_CTRL control register) in ecos, and resume after switched back to ecos. But for reset_prep/D3 process, aon task will reset minute ia to ROM finally but forget to resume the power of ROM. This keeps ROM still power gated and make ROM code can't run correctly. The fix is simple, just disable power gating of ROM before reset to ROM in aon task. BUG=b:136265450 BRANCH=none TEST=ISH fw should always load Change-Id: Ib26678bbfdd5dbb17389154478f2565c44d392ab Signed-off-by: Hu, Hebo <hebo.hu@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1684825 Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Yangzhong Ge <yangzhong.ge@intel.corp-partner.google.com> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
-rw-r--r--chip/ish/aontaskfw/ish_aontask.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/chip/ish/aontaskfw/ish_aontask.c b/chip/ish/aontaskfw/ish_aontask.c
index 2f548a3aa2..d066e86754 100644
--- a/chip/ish/aontaskfw/ish_aontask.c
+++ b/chip/ish/aontaskfw/ish_aontask.c
@@ -592,6 +592,16 @@ static void handle_reset(enum ish_pm_state pm_state)
/* clear error register in MISC space */
MISC_ISH_ECC_ERR_SRESP = 1;
+ /*
+ * Disable power gating of RF(Cache) and ROMs.
+ *
+ * Before switch to aon task, RF and ROMs are already
+ * power gated, so we need disable the power gating
+ * before reset to ROM, to make sure ROM code runs
+ * correctly.
+ */
+ PMU_RF_ROM_PWR_CTRL = 0;
+
/* reset ISH minute-ia cpu core, will goto ISH ROM */
ish_mia_reset();