diff options
| author | Craig Hesling <hesling@chromium.org> | 2019-10-04 16:32:16 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-10-10 00:59:03 +0000 |
| commit | 0ac74553bdeb9b8f470deab3735581375cc574dd (patch) | |
| tree | 9c96257480ea45cfd154cbf6dcf545b659154450 | |
| parent | cb860c94d5b562c6f6833dd60bcf2920713bb9b9 (diff) | |
| download | chrome-ec-0ac74553bdeb9b8f470deab3735581375cc574dd.tar.gz | |
flash_fp_mcu: Add pwr enable for hatch followers
This change ensures that the power is enabled for the FPMCU.
This change is valid for all hatch followers.
BRANCH=hatch
BUG=b:142001487
TEST=cros_workon --board=hatch start chromeos-base/ec-utils-test
emerge-hatch chromeos-base/ec-utils-test
cros deploy --root=/usr/local dut1 chromeos-base/ec-utils-test
# Manually power off the fpmcu
cd /sys/class/gpio
echo 467 >export
echo out >gpio467/direction
echo 0 >gpio467/value
echo 467 >unexport
# ectool --name=cros_fp version # should fail
# flash_fp_mcu prior to this CL should fail here, also
# determine the proper firmware for fp board and replace below
flash_fp_mcu /opt/google/biod/fw/*.bin
# Ensure that flash_fp_mcu succeeds
Change-Id: Ia96690d49bb4e5bb25aeebddcc08687b13a43b0b
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845781
| -rw-r--r-- | util/flash_fp_mcu | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu index 76965470a9..db9004c3f8 100644 --- a/util/flash_fp_mcu +++ b/util/flash_fp_mcu @@ -227,12 +227,19 @@ config_hatch() { check_gpio_chip_exists "gpiochip200" readonly SPIDEV="/dev/spidev1.1" + + # See + # third_party/coreboot/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h + # for pin name to number mapping. + # Examine `cat /sys/kernel/debug/pinctrl/INT34BB:00/gpio-ranges` on a hatch + # device to determine gpio number from pin number. + # FPMCU RST_ODL is on GPP_A12 = 200 + 12 = 212 readonly GPIO_NRST=212 # FPMCU BOOT0 is on GPP_A22 = 200 + 22 = 222 readonly GPIO_BOOT0=222 - # No PWREN GPIO on Hatch, FPMCU is always on - readonly GPIO_PWREN="" + # FP_PWR_EN is on GPP_C11 = 456 + (192 - 181) = 456 + 11 = 467 + readonly GPIO_PWREN=467 } config_nami() { |