tglrvpu_ite: Adding VCONN support

Added GPIOs pin config to support VCONN on tglrvp. Also added
power switch function to enable/disable VCONN according to the
cc lines.

BRANCH=None
BUG=b:139763031
TEST=Able to get characteristics of an E-marked cable

Change-Id: Ib09307aafe68ea955f256d3f35670579072c3040
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1762591
Reviewed-by: Keith Short <keithshort@chromium.org>

13 files changed, 71 insertions, 21 deletions

diff --git a/baseboard/dragonegg/baseboard.c b/baseboard/dragonegg/baseboard.c
index ecd6ee5862..36f054c376 100644
--- a/baseboard/dragonegg/baseboard.c
+++ b/baseboard/dragonegg/baseboard.c
@@ -270,7 +270,7 @@ void board_reset_pd_mcu(void)
 	 * but it will get reset when the EC gets reset.
 	 */
 }
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
 {
 	/*
 	 * We ignore the cc_pin because the polarity should already be set
diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c
index fbd793a46c..58f795ed9f 100644
--- a/baseboard/hatch/baseboard.c
+++ b/baseboard/hatch/baseboard.c
@@ -238,7 +238,7 @@ void board_reset_pd_mcu(void)
 		      BOARD_TCPC_C1_RESET_POST_DELAY);
 }
 
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
 {
 	/*
 	 * We ignore the cc_pin because the polarity should already be set
diff --git a/baseboard/intelrvp/baseboard.h b/baseboard/intelrvp/baseboard.h
index 7b24e594c8..b1535fa401 100644
--- a/baseboard/intelrvp/baseboard.h
+++ b/baseboard/intelrvp/baseboard.h
@@ -30,6 +30,7 @@
 /* EC console commands  */
 #define CONFIG_CMD_CHARGER_DUMP
 #define CONFIG_CMD_KEYBOARD
+#define CONFIG_CMD_USB_PD_CABLE
 
 /* Port80 display */
 #define CONFIG_MAX695X_SEVEN_SEGMENT_DISPLAY
@@ -206,6 +207,13 @@ struct tcpc_gpio_t {
 	uint8_t pin_pol;
 };
 
+/* VCONN gpios */
+struct vconn_gpio_t {
+	enum gpio_signal cc1_pin;
+	enum gpio_signal cc2_pin;
+	uint8_t pin_pol;
+};
+
 struct tcpc_gpio_config_t {
 	/* VBUS interrput */
 	struct tcpc_gpio_t vbus;
@@ -213,6 +221,10 @@ struct tcpc_gpio_config_t {
 	struct tcpc_gpio_t src;
 	/* Sink enable */
 	struct tcpc_gpio_t snk;
+#if defined(CONFIG_USBC_VCONN) && defined(CHIP_FAMILY_IT83XX)
+	/* Enable VCONN */
+	struct vconn_gpio_t vconn;
+#endif
 };
 extern const struct tcpc_gpio_config_t tcpc_gpios[];
 
diff --git a/baseboard/intelrvp/ite_ec.c b/baseboard/intelrvp/ite_ec.c
index 74ee7e3208..6906510ac6 100644
--- a/baseboard/intelrvp/ite_ec.c
+++ b/baseboard/intelrvp/ite_ec.c
@@ -96,3 +96,23 @@ const struct pwm_t pwm_channels[] = {
 	},
 };
 BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+#ifdef CONFIG_USBC_VCONN
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
+{
+	/*
+	 * Setting VCONN low by disabling the power switch before
+	 * enabling the VCONN on respective CC line
+	 */
+	gpio_set_level(tcpc_gpios[port].vconn.cc1_pin,
+			!tcpc_gpios[port].vconn.pin_pol);
+	gpio_set_level(tcpc_gpios[port].vconn.cc2_pin,
+			!tcpc_gpios[port].vconn.pin_pol);
+
+	if (enabled)
+		gpio_set_level((cc_pin != USBPD_CC_PIN_1) ?
+				tcpc_gpios[port].vconn.cc2_pin :
+				tcpc_gpios[port].vconn.cc1_pin,
+				tcpc_gpios[port].vconn.pin_pol);
+}
+#endif
diff --git a/baseboard/intelrvp/ite_ec.h b/baseboard/intelrvp/ite_ec.h
index c233f1ef89..35014c0fd1 100644
--- a/baseboard/intelrvp/ite_ec.h
+++ b/baseboard/intelrvp/ite_ec.h
@@ -21,4 +21,9 @@
 #define ADC_TEMP_SNS_SKIN_CHANNEL	CHIP_ADC_CH6
 #define ADC_TEMP_SNS_VR_CHANNEL		CHIP_ADC_CH1
 
+#ifdef CONFIG_USBC_VCONN
+	#define CONFIG_USBC_VCONN_SWAP
+	/* delay to turn on/off vconn */
+	#define PD_VCONN_SWAP_DELAY 5000 /* us */
+#endif
 #endif /* __CROS_EC_ITE_EC_H */
diff --git a/baseboard/octopus/variant_usbc_ec_tcpcs.c b/baseboard/octopus/variant_usbc_ec_tcpcs.c
index 408552e7fc..cd119acc80 100644
--- a/baseboard/octopus/variant_usbc_ec_tcpcs.c
+++ b/baseboard/octopus/variant_usbc_ec_tcpcs.c
@@ -142,7 +142,7 @@ void board_reset_pd_mcu(void)
 	gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
 }
 
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
 {
 	/*
 	 * We ignore the cc_pin because the polarity should already be set
diff --git a/board/it83xx_evb/board.c b/board/it83xx_evb/board.c
index 32c8fa690d..1ac7637ae5 100644
--- a/board/it83xx_evb/board.c
+++ b/board/it83xx_evb/board.c
@@ -43,11 +43,11 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
 	{-1, -1, &it83xx_tcpm_drv},
 };
 
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
 {
 	int cc1_enabled = 0, cc2_enabled = 0;
 
-	if (cc_pin)
+	if (cc_pin != USBPD_CC_PIN_1)
 		cc2_enabled = enabled;
 	else
 		cc1_enabled = enabled;
diff --git a/board/reef_it8320/board.c b/board/reef_it8320/board.c
index 82c094095c..db4056e8c2 100644
--- a/board/reef_it8320/board.c
+++ b/board/reef_it8320/board.c
@@ -84,11 +84,11 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
 	},
 };
 
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled)
 {
 	int cc1_enabled = 0, cc2_enabled = 0;
 
-	if (cc_pin)
+	if (cc_pin != USBPD_CC_PIN_1)
 		cc2_enabled = enabled;
 	else
 		cc1_enabled = enabled;
diff --git a/board/tglrvpu_ite/board.c b/board/tglrvpu_ite/board.c
index 32db3eb63d..a0cb33d5fd 100644
--- a/board/tglrvpu_ite/board.c
+++ b/board/tglrvpu_ite/board.c
@@ -37,6 +37,11 @@ const struct tcpc_gpio_config_t tcpc_gpios[] = {
 			.pin = GPIO_USB_C0_SNK_EN_L,
 			.pin_pol = 0,
 		},
+		.vconn = {
+			.cc1_pin = GPIO_USB_C0_CC1_VCONN_EN,
+			.cc2_pin = GPIO_USB_C0_CC2_VCONN_EN,
+			.pin_pol = 1,
+		},
 	},
 	[TYPE_C_PORT_1] = {
 		.vbus = {
@@ -51,6 +56,11 @@ const struct tcpc_gpio_config_t tcpc_gpios[] = {
 			.pin = GPIO_USB_C1_SNK_EN_L,
 			.pin_pol = 0,
 		},
+		.vconn = {
+			.cc1_pin = GPIO_USB_C1_CC1_VCONN_EN,
+			.cc2_pin = GPIO_USB_C1_CC2_VCONN_EN,
+			.pin_pol = 1,
+		},
 	},
 };
 BUILD_ASSERT(ARRAY_SIZE(tcpc_gpios) == CONFIG_USB_PD_PORT_COUNT);
diff --git a/board/tglrvpu_ite/board.h b/board/tglrvpu_ite/board.h
index 36912d513b..baed86a68c 100644
--- a/board/tglrvpu_ite/board.h
+++ b/board/tglrvpu_ite/board.h
@@ -11,6 +11,8 @@
 /* USB MUX */
 #define CONFIG_USB_MUX_VIRTUAL
 
+#define CONFIG_USBC_VCONN
+
 #include "baseboard.h"
 
 /* TODO: Chipset Tigerlake */
@@ -76,6 +78,9 @@
 #define USB_PORT0_BB_RETIMER_SHARED_NVM	BB_RETIMER_SHARED_NVM
 #define USB_PORT1_BB_RETIMER_SHARED_NVM	BB_RETIMER_SHARED_NVM
 
+/* Enabling SOP* communication */
+#define CONFIG_USB_PD_DECODE_SOP
+
 #ifndef __ASSEMBLER__
 
 enum tglrvp_charge_ports {
diff --git a/board/tglrvpu_ite/gpio.inc b/board/tglrvpu_ite/gpio.inc
index 5e82580315..8622989e7f 100644
--- a/board/tglrvpu_ite/gpio.inc
+++ b/board/tglrvpu_ite/gpio.inc
@@ -129,6 +129,12 @@ GPIO(USB_C0_BC12_VBUS_ON_ODL,	PIN(H, 4), GPIO_ODR_HIGH)
 GPIO(USB_C1_BC12_CHG_DET_L,	PIN(B, 7), GPIO_INPUT)
 GPIO(USB_C1_BC12_VBUS_ON_ODL,	PIN(J, 6), GPIO_ODR_HIGH)
 
+/* VCONN enable pins */
+GPIO(USB_C0_CC1_VCONN_EN,	PIN(D, 1), GPIO_OUT_LOW)
+GPIO(USB_C0_CC2_VCONN_EN,	PIN(G, 2), GPIO_OUT_LOW)
+GPIO(USB_C1_CC1_VCONN_EN,	PIN(E, 5), GPIO_OUT_LOW)
+GPIO(USB_C1_CC2_VCONN_EN,	PIN(I, 0), GPIO_OUT_LOW)
+
 /* USB-A GPIOs */
 GPIO(USB_A_5V_EN,	PIN(K, 3), GPIO_INPUT)
 
@@ -143,12 +149,6 @@ GPIO(FAN_POWER_EN,	PIN(K, 6), GPIO_OUT_LOW)
 GPIO(CCD_MODE_ODL,	PIN(B, 5), GPIO_INPUT)
 GPIO(ENTERING_RW,	PIN(C, 5), GPIO_OUT_LOW)
 
-/* Used if Type-A ports have BC1.2 */
-GPIO(NC_USB_A_CHG_EN,		PIN(D, 1), GPIO_INPUT)
-
-/* Used if dead battery LDO present */
-GPIO(NC_USBC_LDO_ENABLE,	PIN(G, 2), GPIO_INPUT)
-
 /* Used with Discrete TBT and or with PD on RVP */
 GPIO(NC_TBT_C0_RESET_N,		PIN(KSO_H, 7), GPIO_INPUT)
 GPIO(NC_TBT_C1_RESET_N,		PIN(K, 7), GPIO_INPUT)
@@ -173,9 +173,7 @@ GPIO_INT(ESPI_RESET_L,	PIN(D, 2), GPIO_INPUT)
 
 /* Unused pins */
 GPIO(NC_SUSWARN,		PIN(E, 1), GPIO_INPUT)
-GPIO(NC_SD_CARD_DETECT,		PIN(E, 5), GPIO_INPUT)
 GPIO(NC_BATT_DISABLE,		PIN(H, 0), GPIO_INPUT)
-GPIO(NC_SLP_S0_CS_N,		PIN(I, 0), GPIO_INPUT)
 GPIO(NC_SMC_ONOFF_N,		PIN(L, 3), GPIO_INPUT) /* Power button interrupt without H1 */
 
 /*
diff --git a/driver/tcpm/it83xx_pd.h b/driver/tcpm/it83xx_pd.h
index 4a74d8ae7f..3157909d83 100644
--- a/driver/tcpm/it83xx_pd.h
+++ b/driver/tcpm/it83xx_pd.h
@@ -75,11 +75,6 @@
 	IS_MASK_SET(IT83XX_USBPD_TCDCR(port), USBPD_REG_PLUG_IN_OUT_DETECT_STAT)
 #endif //IT83XX_INTC_PLUG_IN_SUPPORT
 
-enum usbpd_cc_pin {
-	USBPD_CC_PIN_1,
-	USBPD_CC_PIN_2,
-};
-
 enum usbpd_ufp_volt_status {
 	USBPD_UFP_STATE_SNK_OPEN = 0,
 	USBPD_UFP_STATE_SNK_DEF  = 1,
diff --git a/include/usb_pd_tcpm.h b/include/usb_pd_tcpm.h
index 78bbf9ed24..18effd0661 100644
--- a/include/usb_pd_tcpm.h
+++ b/include/usb_pd_tcpm.h
@@ -20,6 +20,11 @@
 /* Number of valid Transmit Types */
 #define NUM_XMIT_TYPES (TCPC_TX_SOP_DEBUG_PRIME_PRIME + 1)
 
+enum usbpd_cc_pin {
+	USBPD_CC_PIN_1,
+	USBPD_CC_PIN_2,
+};
+
 /* Detected resistor values of port partner */
 enum tcpc_cc_voltage_status {
 	TYPEC_CC_VOLT_OPEN = 0,
@@ -411,6 +416,6 @@ int board_tcpc_post_init(int port) __attribute__((weak));
  * @param enabled 1: Enable VCONN, 0: Disable VCONN
  *
  */
-void board_pd_vconn_ctrl(int port, int cc_pin, int enabled);
+void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled);
 
 #endif /* __CROS_EC_USB_PD_TCPM_H */