PD: Add support for new host command, EC_CMD_GET_PD_PORT_CAPS

This host command is used to report the static capabilities of a USB-PD
port, including its power role, Try power role, data role, and its
physical port location on the device. This will be used to expose the
information in ACPI, via the EC object.

BUG=b:146506369
BRANCH=none
TEST=Along with coreboot changes, dump the SSDT, and verify
that the object looks as expected.

Change-Id: Ie1975a8b391eba6e924b0552ba9b0973fd2c63f3
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2015825
Reviewed-by: Denis Brockus <dbrockus@chromium.org>

3 files changed, 125 insertions, 0 deletions

diff --git a/common/usb_common.c b/common/usb_common.c
index 0bc3b62e41..3ab01430bd 100644
--- a/common/usb_common.c
+++ b/common/usb_common.c
@@ -13,7 +13,9 @@
 #include "chipset.h"
 #include "common.h"
 #include "console.h"
+#include "ec_commands.h"
 #include "hooks.h"
+#include "host_command.h"
 #include "system.h"
 #include "task.h"
 #include "usb_common.h"
@@ -1095,3 +1097,46 @@ const struct svdm_amode_fx supported_modes[] = {
 };
 const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
 #endif /* CONFIG_USB_PD_ALT_MODE_DFP */
+
+__overridable enum ec_pd_port_location board_get_pd_port_location(int port)
+{
+	(void)port;
+	return EC_PD_PORT_LOCATION_UNKNOWN;
+}
+
+static enum ec_status hc_get_pd_port_caps(struct host_cmd_handler_args *args)
+{
+	const struct ec_params_get_pd_port_caps *p = args->params;
+	struct ec_response_get_pd_port_caps *r = args->response;
+
+	if (p->port >= board_get_usb_pd_port_count())
+		return EC_RES_INVALID_PARAM;
+
+	/* Power Role */
+	if (IS_ENABLED(CONFIG_USB_PD_DUAL_ROLE))
+		r->pd_power_role_cap = EC_PD_POWER_ROLE_DUAL;
+	else
+		r->pd_power_role_cap = EC_PD_POWER_ROLE_SINK;
+
+	/* Try-Power Role */
+	if (IS_ENABLED(CONFIG_USB_PD_TRY_SRC))
+		r->pd_try_power_role_cap = EC_PD_TRY_POWER_ROLE_SOURCE;
+	else
+		r->pd_try_power_role_cap = EC_PD_TRY_POWER_ROLE_NONE;
+
+	if (IS_ENABLED(CONFIG_USB_TYPEC_VPD) ||
+	    IS_ENABLED(CONFIG_USB_TYPEC_CTVPD))
+		r->pd_data_role_cap = EC_PD_DATA_ROLE_UFP;
+	else
+		r->pd_data_role_cap = EC_PD_DATA_ROLE_DUAL;
+
+	/* Allow boards to override the locations from UNKNOWN if desired */
+	r->pd_port_location = board_get_pd_port_location(p->port);
+
+	args->response_size = sizeof(*r);
+
+	return EC_RES_SUCCESS;
+}
+DECLARE_HOST_COMMAND(EC_CMD_GET_PD_PORT_CAPS,
+		     hc_get_pd_port_caps,
+		     EC_VER_MASK(0));
diff --git a/include/ec_commands.h b/include/ec_commands.h
index ab20f6d19f..cc37caaa99 100644
--- a/include/ec_commands.h
+++ b/include/ec_commands.h
@@ -5830,6 +5830,74 @@ struct ec_response_locate_chip {
 #define EC_CMD_REBOOT_AP_ON_G3 0x0127
 
 /*****************************************************************************/
+/* Get PD port capabilities
+ *
+ * Returns the following static *capabilities* of the given port:
+ * 1) Power role: source, sink, or dual. It is not anticipated that
+ *    future CrOS devices would ever be only a source, so the options are
+ *    sink or dual.
+ * 2) Try-power role: source, sink, or none (practically speaking, I don't
+ *    believe any CrOS device would support Try.SNK, so this would be source
+ *    or none).
+ * 3) Data role: dfp, ufp, or dual. This will probably only be DFP or dual
+ *    for CrOS devices.
+ */
+#define EC_CMD_GET_PD_PORT_CAPS 0x0128
+
+enum ec_pd_power_role_caps {
+	EC_PD_POWER_ROLE_SOURCE = 0,
+	EC_PD_POWER_ROLE_SINK = 1,
+	EC_PD_POWER_ROLE_DUAL = 2,
+};
+
+enum ec_pd_try_power_role_caps {
+	EC_PD_TRY_POWER_ROLE_NONE = 0,
+	EC_PD_TRY_POWER_ROLE_SINK = 1,
+	EC_PD_TRY_POWER_ROLE_SOURCE = 2,
+};
+
+enum ec_pd_data_role_caps {
+	EC_PD_DATA_ROLE_DFP = 0,
+	EC_PD_DATA_ROLE_UFP = 1,
+	EC_PD_DATA_ROLE_DUAL = 2,
+};
+
+/* From: power_manager/power_supply_properties.proto */
+enum ec_pd_port_location {
+	/* The location of the port is unknown, or there's only one port. */
+	EC_PD_PORT_LOCATION_UNKNOWN = 0,
+
+	/*
+	 * Various positions on the device. The first word describes the side of
+	 * the device where the port is located while the second clarifies the
+	 * position. For example, LEFT_BACK means the farthest-back port on the
+	 * left side, while BACK_LEFT means the leftmost port on the back of the
+	 * device.
+	 */
+	EC_PD_PORT_LOCATION_LEFT        = 1,
+	EC_PD_PORT_LOCATION_RIGHT       = 2,
+	EC_PD_PORT_LOCATION_BACK        = 3,
+	EC_PD_PORT_LOCATION_FRONT       = 4,
+	EC_PD_PORT_LOCATION_LEFT_FRONT  = 5,
+	EC_PD_PORT_LOCATION_LEFT_BACK   = 6,
+	EC_PD_PORT_LOCATION_RIGHT_FRONT = 7,
+	EC_PD_PORT_LOCATION_RIGHT_BACK  = 8,
+	EC_PD_PORT_LOCATION_BACK_LEFT   = 9,
+	EC_PD_PORT_LOCATION_BACK_RIGHT  = 10,
+};
+
+struct ec_params_get_pd_port_caps {
+	uint8_t port;		/* Which port to interrogate */
+} __ec_align1;
+
+struct ec_response_get_pd_port_caps {
+	uint8_t pd_power_role_cap;	/* enum ec_pd_power_role_caps */
+	uint8_t pd_try_power_role_cap;	/* enum ec_pd_try_power_role_caps */
+	uint8_t pd_data_role_cap;	/* enum ec_pd_data_role_caps */
+	uint8_t pd_port_location;	/* enum ec_pd_port_location */
+} __ec_align1;
+
+/*****************************************************************************/
 /* The command range 0x200-0x2FF is reserved for Rotor. */
 
 /*****************************************************************************/
diff --git a/include/usb_pd.h b/include/usb_pd.h
index 186e21ff62..bc8558922f 100644
--- a/include/usb_pd.h
+++ b/include/usb_pd.h
@@ -10,6 +10,7 @@
 
 #include <stdbool.h>
 #include "common.h"
+#include "ec_commands.h"
 #include "usb_pd_tbt.h"
 #include "usb_pd_tcpm.h"
 #include "usb_pd_vdo.h"
@@ -2395,4 +2396,15 @@ __override_proto int svdm_tbt_compat_config(int port, uint32_t *payload);
  */
 __override_proto int svdm_tbt_compat_attention(int port, uint32_t *payload);
 
+/* Miscellaneous */
+
+/**
+ * Called for responding to the EC_CMD_GET_PD_PORT_CAPS host command
+ *
+ * @param port	The PD port number
+ * @return	Location of the port
+ */
+
+__override_proto enum ec_pd_port_location board_get_pd_port_location(int port);
+
 #endif  /* __CROS_EC_USB_PD_H */