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| author | Craig Hesling <hesling@chromium.org> | 2020-03-18 14:47:18 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-03-24 21:05:23 +0000 |
| commit | ff896db8208e2b670f0d1e6b2c510593c4f78191 (patch) | |
| tree | 0167ca92a2e2b190f5a51a761c84c73cc2fe81c1 | |
| parent | 3c1a1c1ae009aac90e1234c2d73675aae39fe86d (diff) | |
| download | chrome-ec-ff896db8208e2b670f0d1e6b2c510593c4f78191.tar.gz | |
stm32f412: Fix chip config Flash and RAM sizes
We are already using the stm32f446 config for many F4 based
chips. Let's actually make this more clear and un-hack our
hatch_fp board.h.
This present no functional change.
BRANCH=none
BUG=none
TEST=./util/compare_builds.sh -b "hatch_fp sweetberry"
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I6b46e696686ad740833dc889c1db5d7bac84a768
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2109244
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
| -rw-r--r-- | board/hatch_fp/board.h | 5 | ||||
| -rw-r--r-- | chip/stm32/config-stm32f4.h (renamed from chip/stm32/config-stm32f446.h) | 15 | ||||
| -rw-r--r-- | chip/stm32/config_chip.h | 2 |
3 files changed, 13 insertions, 9 deletions
diff --git a/board/hatch_fp/board.h b/board/hatch_fp/board.h index a5f1ad5725..ef07ec72c2 100644 --- a/board/hatch_fp/board.h +++ b/board/hatch_fp/board.h @@ -50,11 +50,6 @@ #undef CONFIG_WP_STORAGE_OFF #undef CONFIG_WP_STORAGE_SIZE -#undef CONFIG_RAM_SIZE -#define CONFIG_RAM_SIZE 0x40000 /* 256 KB */ -#undef CONFIG_FLASH_SIZE -#define CONFIG_FLASH_SIZE (1 * 1024 * 1024) - #define CONFIG_FLASH_WRITE_SIZE STM32_FLASH_WRITE_SIZE_3300 #define CONFIG_SHAREDLIB_SIZE 0 diff --git a/chip/stm32/config-stm32f446.h b/chip/stm32/config-stm32f4.h index ee43b4fb9b..c64cc3089a 100644 --- a/chip/stm32/config-stm32f446.h +++ b/chip/stm32/config-stm32f4.h @@ -4,7 +4,11 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_SIZE (512 * 1024) +#ifdef CHIP_VARIANT_STM32F412 +# define CONFIG_FLASH_SIZE (1 * 1024 * 1024) +#else +# define CONFIG_FLASH_SIZE (512 * 1024) +#endif /* 3 regions type: 16K, 64K and 128K */ #define SIZE_16KB (16 * 1024) @@ -26,8 +30,13 @@ /* No page mode on STM32F, so no benefit to larger write sizes */ #define CONFIG_FLASH_WRITE_IDEAL_SIZE CONFIG_FLASH_WRITE_SIZE -#define CONFIG_RAM_BASE 0x20000000 -#define CONFIG_RAM_SIZE 0x00020000 +#ifdef CHIP_VARIANT_STM32F412 +# define CONFIG_RAM_BASE 0x20000000 +# define CONFIG_RAM_SIZE 0x00040000 /* 256 KB */ +#else +# define CONFIG_RAM_BASE 0x20000000 +# define CONFIG_RAM_SIZE 0x00020000 /* 128 KB */ +#endif #define CONFIG_RO_MEM_OFF 0 #define CONFIG_RO_SIZE (256 * 1024) diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h index 44b374da3a..0c38038b6f 100644 --- a/chip/stm32/config_chip.h +++ b/chip/stm32/config_chip.h @@ -42,7 +42,7 @@ #include "config-stm32f76x.h" #elif defined(CHIP_FAMILY_STM32F4) /* STM32F4 family */ -#include "config-stm32f446.h" +#include "config-stm32f4.h" #elif defined(CHIP_VARIANT_STM32F373) #include "config-stm32f373.h" #elif defined(CHIP_VARIANT_STM32F09X) |