diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2017-07-28 16:34:35 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-01 14:39:53 -0700 |
| commit | bdf1838cb88e9f0e7ff816c4779d1b338d569361 (patch) | |
| tree | 248a65c954043a2ffb32d5b7fe3be57559d1fce2 | |
| parent | c7b11ca7b855d35dce75502429ed56af990ea41a (diff) | |
| download | chrome-ec-bdf1838cb88e9f0e7ff816c4779d1b338d569361.tar.gz | |
cr50: add a pulldown to spi mosi and clk
Add a pulldown to spi mosi and clk pins. The floating signals are
causing power issues with the spi buffer. This change adds pulldowns
to prevent the issues.
BUG=b:38509318
BRANCH=cr50
TEST=eve power drops to 2mW and reef power numbers are unchanged. Flash
the EC and AP on both boards using ccd.
Change-Id: I595920f461a67effcbdb52a4334683b6eca2b3b2
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/595213
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
| -rw-r--r-- | board/cr50/gpio.inc | 4 | ||||
| -rw-r--r-- | board/cr50/usb_spi.c | 6 |
2 files changed, 8 insertions, 2 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index e47f06fabb..2e592c52b2 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -87,8 +87,8 @@ GPIO(CCD_MODE_L, PIN(0, 5), GPIO_INPUT | GPIO_PULL_UP) GPIO(BATT_PRES_L, PIN(0, 6), GPIO_INPUT) /* GPIOs used to tristate the SPI bus */ -GPIO(SPI_MOSI, PIN(0, 7), GPIO_INPUT) -GPIO(SPI_CLK, PIN(0, 8), GPIO_INPUT) +GPIO(SPI_MOSI, PIN(0, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(SPI_CLK, PIN(0, 8), GPIO_INPUT | GPIO_PULL_DOWN) GPIO(SPI_CS_L, PIN(0, 9), GPIO_INPUT) /* Used during *chip* factory process. */ diff --git a/board/cr50/usb_spi.c b/board/cr50/usb_spi.c index 29452104dc..1fa67fbdf5 100644 --- a/board/cr50/usb_spi.c +++ b/board/cr50/usb_spi.c @@ -70,6 +70,9 @@ int usb_spi_board_enable(struct usb_spi_config const *config) return EC_ERROR_INVAL; } + GWRITE_FIELD(PINMUX, DIOA4_CTL, PD, 0); /* SPI_MOSI */ + GWRITE_FIELD(PINMUX, DIOA8_CTL, PD, 0); /* SPI_CLK */ + /* Connect DIO A4, A8, and A14 to the SPI peripheral */ GWRITE(PINMUX, DIOA4_SEL, 0); /* SPI_MOSI */ GWRITE(PINMUX, DIOA8_SEL, 0); /* SPI_CS_L */ @@ -98,6 +101,9 @@ void usb_spi_board_disable(struct usb_spi_config const *config) ASSERT(GREAD(PINMUX, GPIO0_GPIO8_SEL) == GC_PINMUX_DIOA8_SEL); ASSERT(GREAD(PINMUX, GPIO0_GPIO9_SEL) == GC_PINMUX_DIOA14_SEL); + GWRITE_FIELD(PINMUX, DIOA4_CTL, PD, 1); /* SPI_MOSI */ + GWRITE_FIELD(PINMUX, DIOA8_CTL, PD, 1); /* SPI_CLK */ + /* Set SPI MOSI, CLK, and CS_L as inputs */ GWRITE(PINMUX, DIOA4_SEL, GC_PINMUX_GPIO0_GPIO7_SEL); GWRITE(PINMUX, DIOA8_SEL, GC_PINMUX_GPIO0_GPIO8_SEL); |