diff options
author | Ruibin Chang <ruibin.chang@ite.com.tw> | 2020-03-11 17:00:10 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-03-12 06:09:33 +0000 |
commit | 3426fb1e93654ff2bba8b7ea7c2e143487462d18 (patch) | |
tree | ea94c1578f33b5446ac78463e5051c93c1cd7165 | |
parent | 72c922bd73f22fc1f3cea29d078516017c56e83c (diff) | |
download | chrome-ec-3426fb1e93654ff2bba8b7ea7c2e143487462d18.tar.gz |
baseboard/ite_evb: create ite_evb baseboard
The development board of it83xx and it8xxx2 have common code
and config options which are moved to baseboard ite_evb.
And we create another board for PD EVB based on baseboard ite_evb.
BUG=none
BRANCH=none
TEST=on baseboard ite_evb:
1.test board it83xx_evb and it8xxx2_evb:
successfully Flash EC image and boot on chip it8320 and
it83202.
2.flashrom by ite_spi test:
$ sudo ./util/flash_ec --board=it8xxx2_evb --verbose
INFO: Using servo_v2.
INFO: Using ec image : /mnt/host/source/src/platform/ec/build/
it8xxx2_evb/ec.bin
dut-control --port=9999 i2c_mux_en:on
dut-control --port=9999 i2c_mux:remote_adc
INFO: Flashing chip ite_spi.
dut-control --port=9999 cold_reset:on
dut-control --port=9999 fw_up:on
dut-control --port=9999 cold_reset:off
dut-control --port=9999 fw_up:off
dut-control --port=9999 spi1_vref:pp1800 spi1_buf_en:on
dut-control --port=9999 spi1_buf_on_flex_en:on
INFO: Running flashrom:
sudo /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B,
serial=911416-00012 --flash-size
flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64)
flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64)
INFO: Programming EC firmware image.
INFO: Running flashrom:
/usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B,
serial=911416-00012 -w /tmp/flash_spi_6163
flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64)
flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64)
Calibrating delay loop... OK.
Erasing and writing flash chip... Verifying flash... VERIFIED.
SUCCESS
INFO: Flashing done.
INFO: Restoring servo settings...
dut-control --port=9999 cold_reset:off
dut-control --port=9999 i2c_mux_en:on
dut-control --port=9999 i2c_mux:remote_adc
dut-control --port=9999 spi1_vref:off
dut-control --port=9999 spi1_buf_en:off
dut-control --port=9999 spi1_buf_on_flex_en:off
dut-control --port=9999 cold_reset:on
dut-control --port=9999 cold_reset:off
3.test board it8xxx2_pdevb:
successfully Flash EC image and boot on chip it83202.
Connection with adapter and dongle are able to ready state.
Change-Id: Ib6371b61c27980eb9977548177efb8c896e72d47
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2071551
Reviewed-by: Jett Rink <jettrink@chromium.org>
-rw-r--r-- | baseboard/ite_evb/baseboard.c | 197 | ||||
-rw-r--r-- | baseboard/ite_evb/baseboard.h | 50 | ||||
-rw-r--r-- | baseboard/ite_evb/build.mk | 10 | ||||
-rw-r--r-- | baseboard/ite_evb/usb_pd_policy.c (renamed from board/it83xx_evb/usb_pd_policy.c) | 75 | ||||
-rw-r--r-- | board/it83xx_evb/board.c | 242 | ||||
-rw-r--r-- | board/it83xx_evb/board.h | 80 | ||||
-rw-r--r-- | board/it83xx_evb/build.mk | 2 | ||||
-rw-r--r-- | board/it83xx_evb/ec.tasklist | 4 | ||||
-rw-r--r-- | board/it83xx_evb/gpio.inc | 14 | ||||
-rw-r--r-- | board/it8xxx2_evb/board.c | 79 | ||||
-rw-r--r-- | board/it8xxx2_evb/board.h | 38 | ||||
-rw-r--r-- | board/it8xxx2_evb/build.mk | 14 | ||||
-rw-r--r-- | board/it8xxx2_evb/ec.tasklist | 14 | ||||
-rw-r--r-- | board/it8xxx2_evb/gpio.inc | 73 | ||||
-rw-r--r-- | board/it8xxx2_pdevb/board.c | 179 | ||||
-rw-r--r-- | board/it8xxx2_pdevb/board.h | 91 | ||||
-rw-r--r-- | board/it8xxx2_pdevb/build.mk | 14 | ||||
-rw-r--r-- | board/it8xxx2_pdevb/ec.tasklist | 14 | ||||
-rw-r--r-- | board/it8xxx2_pdevb/gpio.inc | 72 | ||||
-rwxr-xr-x | util/flash_ec | 28 |
20 files changed, 996 insertions, 294 deletions
diff --git a/baseboard/ite_evb/baseboard.c b/baseboard/ite_evb/baseboard.c new file mode 100644 index 0000000000..0bd537ef4f --- /dev/null +++ b/baseboard/ite_evb/baseboard.c @@ -0,0 +1,197 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* ite_evb baseboard configuration */ +#include "clock.h" +#include "common.h" +#include "console.h" +#include "fan.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "intc.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "lpc.h" +#include "power_button.h" +#include "pwm_chip.h" +#include "registers.h" +#include "spi.h" +#include "switch.h" +#include "system.h" +#include "task.h" +#include "timer.h" +#include "uart.h" +#include "util.h" +#include "gpio_list.h" + +#if defined(CONFIG_FANS) || defined(CONFIG_PWM) +const struct fan_conf fan_conf_0 = { + .flags = FAN_USE_RPM_MODE, + .ch = 0, /* Use MFT id to control fan */ + .pgood_gpio = -1, + .enable_gpio = -1, +}; + +const struct fan_rpm fan_rpm_0 = { + .rpm_min = 1500, + .rpm_start = 1500, + .rpm_max = 6500, +}; + +const struct fan_t fans[] = { + { .conf = &fan_conf_0, + .rpm = &fan_rpm_0, }, +}; +BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS); + +/* + * PWM HW channelx binding tachometer channelx for fan control. + * Four tachometer input pins but two tachometer modules only, + * so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or + * [TACH_CH_TACH1A | TACH_CH_TACH1B] + */ +const struct fan_tach_t fan_tach[] = { + [PWM_HW_CH_DCR0] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR1] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR2] = { + .ch_tach = TACH_CH_TACH1A, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR3] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR4] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR5] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR6] = { + .ch_tach = TACH_CH_NULL, + .fan_p = -1, + .rpm_re = -1, + .s_duty = -1, + }, + [PWM_HW_CH_DCR7] = { + .ch_tach = TACH_CH_TACH0A, + .fan_p = 2, + .rpm_re = 50, + .s_duty = 30, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(fan_tach) == PWM_HW_CH_TOTAL); +#endif /* defined(CONFIG_FANS) || defined(CONFIG_PWM) */ + +#if defined(CONFIG_KEYBOARD_BOARD_CONFIG) +/* Keyboard scan setting */ +struct keyboard_scan_config keyscan_config = { + .output_settle_us = 35, + .debounce_down_us = 5 * MSEC, + .debounce_up_us = 40 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, + .actual_key_mask = { + 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + }, +}; +#endif + +#if defined(CONFIG_SPI_FLASH_PORT) +/* SPI devices */ +const struct spi_device_t spi_devices[] = { + [CONFIG_SPI_FLASH_PORT] = { + .port = CONFIG_SPI_FLASH_PORT, + .div = 0, + .gpio_cs = -1 + }, +}; +const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); +#endif + +/* Initialize board. */ +static void board_init(void) +{ +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +/* Wake-up pins for hibernate */ +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_POWER_BUTTON_L, GPIO_LID_OPEN +}; +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/* + * I2C channels (A, B, and C) are using the same timing registers (00h~07h) + * at default. + * In order to set frequency independently for each channels, + * We use timing registers 09h~0Bh, and the supported frequency will be: + * 50KHz, 100KHz, 400KHz, or 1MHz. + * I2C channels (D, E and F) can be set different frequency on different ports. + * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and + * the individual prescale register. + * The frequency of SMBus module is 24MHz on default. + * The allowed range of I2C(D/E/F) frequency is as following setting. + * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) + * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) + * Channel D has multi-function and can be used as UART interface. + * Channel F is reserved for EC debug. + */ + +/* I2C ports */ +const struct i2c_port_t i2c_ports[] = { + { + .name = "battery", + .port = I2C_PORT_BATTERY, + .kbps = 100, + .scl = GPIO_I2C_C_SCL, + .sda = GPIO_I2C_C_SDA, + }, + { + .name = "evb-1", + .port = IT83XX_I2C_CH_A, + .kbps = 100, + .scl = GPIO_I2C_A_SCL, + .sda = GPIO_I2C_A_SDA, + }, + { + .name = "evb-2", + .port = IT83XX_I2C_CH_B, + .kbps = 100, + .scl = GPIO_I2C_B_SCL, + .sda = GPIO_I2C_B_SDA, + }, + { + .name = "opt-4", + .port = IT83XX_I2C_CH_E, + .kbps = 100, + .scl = GPIO_I2C_E_SCL, + .sda = GPIO_I2C_E_SDA, + }, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); diff --git a/baseboard/ite_evb/baseboard.h b/baseboard/ite_evb/baseboard.h new file mode 100644 index 0000000000..34c4fee278 --- /dev/null +++ b/baseboard/ite_evb/baseboard.h @@ -0,0 +1,50 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* ite_evb baseboard configuration */ + +#ifndef __CROS_EC_BASEBOARD_H +#define __CROS_EC_BASEBOARD_H + +/* Optional features */ +#define CONFIG_BATTERY_SMART +#define CONFIG_BOARD_VERSION_GPIO +#define CONFIG_FANS 1 +#define CONFIG_I2C +#define CONFIG_I2C_MASTER +#define CONFIG_IT83XX_ENABLE_MOUSE_DEVICE +#define CONFIG_IT83XX_SMCLK2_ON_GPC7 +#define CONFIG_KEYBOARD_BOARD_CONFIG +#define CONFIG_KEYBOARD_PROTOCOL_8042 +#define CONFIG_LOW_POWER_IDLE +#define CONFIG_LOW_POWER_S0 +#define CONFIG_PECI +#define CONFIG_PECI_COMMON +#define CONFIG_PECI_TJMAX 100 +#define CONFIG_POWER_BUTTON +#define CONFIG_PWM +/* Use CS0 of SSPI */ +#define CONFIG_SPI_MASTER +#define CONFIG_SPI_FLASH_PORT 0 +#define CONFIG_UART_HOST +#define CONFIG_HOSTCMD_LPC + +/* Optional console commands */ +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_SCRATCHPAD +#define CONFIG_CMD_STACKOVERFLOW + +/* Debug */ +#undef CONFIG_CMD_FORCETIME +#undef CONFIG_HOOK_DEBUG +#undef CONFIG_KEYBOARD_DEBUG +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 + +/* I2C Bus Configuration */ +#define I2C_PORT_CHARGER IT83XX_I2C_CH_C +#define I2C_PORT_BATTERY IT83XX_I2C_CH_C + +#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/ite_evb/build.mk b/baseboard/ite_evb/build.mk new file mode 100644 index 0000000000..77352145ee --- /dev/null +++ b/baseboard/ite_evb/build.mk @@ -0,0 +1,10 @@ +# -*- makefile -*- +# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Baseboard specific files build +# + +baseboard-y=baseboard.o +baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/board/it83xx_evb/usb_pd_policy.c b/baseboard/ite_evb/usb_pd_policy.c index bb4eb5c3f3..59f3da13f5 100644 --- a/board/it83xx_evb/usb_pd_policy.c +++ b/baseboard/ite_evb/usb_pd_policy.c @@ -1,14 +1,17 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +/* Shared USB-C policy for ite_evb baseboard */ + #include "adc.h" #include "config.h" #include "common.h" #include "console.h" #include "gpio.h" #include "hooks.h" +#include "it83xx_pd.h" #include "registers.h" #include "system.h" #include "task.h" @@ -19,6 +22,8 @@ #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +/* ---------------- Power Data Objects (PDOs) ----------------- */ +#ifdef CONFIG_USB_PD_CUSTOM_PDO #define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ PDO_FIXED_UNCONSTRAINED | PDO_FIXED_COMM_CAP) @@ -36,27 +41,38 @@ const uint32_t pd_snk_pdo[] = { PDO_VAR(4500, 14000, 3000), }; const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); +#endif int pd_is_max_request_allowed(void) { - /* max voltage request allowed */ + /* Max voltage request allowed */ return 1; } int pd_snk_is_vbus_provided(int port) { - int mv = adc_read_channel(port == USBPD_PORT_A ? - ADC_VBUSSA : ADC_VBUSSB); + int mv = ADC_READ_ERROR; + + switch (port) { + case USBPD_PORT_A: + mv = adc_read_channel(ADC_VBUSSA); + break; + case USBPD_PORT_B: + mv = adc_read_channel(ADC_VBUSSB); + break; + case USBPD_PORT_C: + mv = adc_read_channel(ADC_VBUSSC); + break; + } - /* level shift voltage of VBUS > threshold */ - return (mv * 23 / 3) > PD_VBUS_PROVIDED_THRESHOLD; + return mv > PD_VBUS_PROVIDED_THRESHOLD; } int pd_set_power_supply_ready(int port) { - /* provide VBUS */ + /* Provide VBUS */ board_pd_vbus_ctrl(port, 1); - /* vbus provided or not */ + /* Vbus provided or not */ return !pd_snk_is_vbus_provided(port); } @@ -67,7 +83,7 @@ void pd_power_supply_reset(int port) } -int pd_check_data_swap(int port, int data_role) +__override int pd_check_data_swap(int port, enum pd_data_role data_role) { /* Always allow data swap: we can be DFP or UFP for USB */ return 1; @@ -81,3 +97,44 @@ int pd_check_vconn_swap(int port) */ return pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0; } + +/* ----------------- Vendor Defined Messages ------------------ */ +/* + * We don't have mux on pd evb and not define CONFIG_USBC_SS_MUX, + * so mux related functions do nothing then return. + */ +__override int svdm_enter_dp_mode(int port, uint32_t mode_caps) +{ + /* + * Do not enter dp mode, we let VDM enumeration stop after discover + * modes have done. + */ + return -1; +} + +__override void svdm_dp_post_config(int port) +{ +} + +__override int svdm_dp_attention(int port, uint32_t *payload) +{ + /* Ack */ + return 1; +} + +__override void svdm_exit_dp_mode(int port) +{ +} + +__override int pd_custom_vdm(int port, int cnt, uint32_t *payload, + uint32_t **rpayload) +{ + /* Return length 0, means nothing needn't tx */ + return 0; +} + +__override int svdm_dp_config(int port, uint32_t *payload) +{ + /* Return length 0, means nothing needn't tx */ + return 0; +}; diff --git a/board/it83xx_evb/board.c b/board/it83xx_evb/board.c index 331286a181..a18b8b3b70 100644 --- a/board/it83xx_evb/board.c +++ b/board/it83xx_evb/board.c @@ -4,93 +4,9 @@ */ /* IT83xx development board configuration */ -#include "adc.h" #include "adc_chip.h" -#include "clock.h" -#include "common.h" -#include "console.h" -#include "it83xx_pd.h" -#include "fan.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "intc.h" -#include "keyboard_scan.h" -#include "lid_switch.h" -#include "lpc.h" -#include "power_button.h" #include "pwm.h" #include "pwm_chip.h" -#include "registers.h" -#include "spi.h" -#include "switch.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "uart.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" -#include "util.h" - -#if IT83XX_PD_EVB -int board_get_battery_soc(void) -{ - return 100; -} - -const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - {-1, -1, &it83xx_tcpm_drv}, - {-1, -1, &it83xx_tcpm_drv}, -}; - -void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) -{ - int cc1_enabled = 0, cc2_enabled = 0; - - if (cc_pin != USBPD_CC_PIN_1) - cc2_enabled = enabled; - else - cc1_enabled = enabled; - - if (port) { - gpio_set_level(GPIO_USBPD_PORTB_CC2_VCONN, cc2_enabled); - gpio_set_level(GPIO_USBPD_PORTB_CC1_VCONN, cc1_enabled); - } else { - gpio_set_level(GPIO_USBPD_PORTA_CC2_VCONN, cc2_enabled); - gpio_set_level(GPIO_USBPD_PORTA_CC1_VCONN, cc1_enabled); - } -} - -void board_pd_vbus_ctrl(int port, int enabled) -{ - if (port) { - gpio_set_level(GPIO_USBPD_PORTB_VBUS_INPUT, !enabled); - gpio_set_level(GPIO_USBPD_PORTB_VBUS_OUTPUT, enabled); - if (!enabled) { - gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 1); - udelay(MSEC); - } - gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 0); - } else { - gpio_set_level(GPIO_USBPD_PORTA_VBUS_INPUT, !enabled); - gpio_set_level(GPIO_USBPD_PORTA_VBUS_OUTPUT, enabled); - if (!enabled) { - gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 1); - udelay(MSEC); - } - gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 0); - } -} -#else -/* EC EVB */ -void pd_task(void) -{ - while (1) - task_wait_event(-1); -} -#endif - -#include "gpio_list.h" /* * PWM channels. Must be in the exactly same order as in enum pwm_channel. @@ -99,115 +15,65 @@ void pd_task(void) * number of pwm channel greater than three. */ const struct pwm_t pwm_channels[] = { - {7, 0, 30000, PWM_PRESCALER_C4}, - {0, PWM_CONFIG_DSLEEP, 100, PWM_PRESCALER_C6}, + [PWM_CH_FAN] = { + .channel = PWM_HW_CH_DCR7, + .flags = 0, + .freq_hz = 30000, + .pcfsr_sel = PWM_PRESCALER_C4, + }, + [PWM_CH_WITH_DSLEEP_FLAG] = { + .channel = PWM_HW_CH_DCR0, + .flags = PWM_CONFIG_DSLEEP, + .freq_hz = 100, + .pcfsr_sel = PWM_PRESCALER_C6, + }, }; - BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); -const struct fan_conf fan_conf_0 = { - .flags = FAN_USE_RPM_MODE, - .ch = 0, /* Use MFT id to control fan */ - .pgood_gpio = -1, - .enable_gpio = -1, -}; - -const struct fan_rpm fan_rpm_0 = { - .rpm_min = 1500, - .rpm_start = 1500, - .rpm_max = 6500, -}; - -const struct fan_t fans[] = { - { .conf = &fan_conf_0, .rpm = &fan_rpm_0, }, -}; -BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS); - -/* - * PWM HW channelx binding tachometer channelx for fan control. - * Four tachometer input pins but two tachometer modules only, - * so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or - * [TACH_CH_TACH1A | TACH_CH_TACH1B] - */ -const struct fan_tach_t fan_tach[] = { - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_NULL, -1, -1, -1}, - {TACH_CH_TACH0A, 2, 50, 30}, -}; -BUILD_ASSERT(ARRAY_SIZE(fan_tach) == PWM_HW_CH_TOTAL); - -/* Wake-up pins for hibernate */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_POWER_BUTTON_L, GPIO_LID_OPEN -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* Initialize board. */ -static void board_init(void) -{ -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - /* ADC channels. Must be in the exactly same order as in enum adc_channel. */ const struct adc_t adc_channels[] = { /* Convert to mV (3000mV/1024). */ - {"ADC_VBUSSA", 3000, 1024, 0, CHIP_ADC_CH0}, /* GPI0, ADC0 */ - {"ADC_VBUSSB", 3000, 1024, 0, CHIP_ADC_CH1}, /* GPI1, ADC1 */ - {"ADC_EVB_CH_13", 3000, 1024, 0, CHIP_ADC_CH13}, /* GPL0, ADC13 */ - {"ADC_EVB_CH_14", 3000, 1024, 0, CHIP_ADC_CH14}, /* GPL1, ADC14 */ - {"ADC_EVB_CH_15", 3000, 1024, 0, CHIP_ADC_CH15}, /* GPL2, ADC15 */ - {"ADC_EVB_CH_16", 3000, 1024, 0, CHIP_ADC_CH16}, /* GPL3, ADC16 */ -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* Keyboard scan setting */ -struct keyboard_scan_config keyscan_config = { - .output_settle_us = 35, - .debounce_down_us = 5 * MSEC, - .debounce_up_us = 40 * MSEC, - .scan_period_us = 3 * MSEC, - .min_post_scan_delay_us = 1000, - .poll_timeout_us = 100 * MSEC, - .actual_key_mask = { - 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, - 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */ + [ADC_VBUSSA] = { + .name = "ADC_VBUSSA", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH0, /* GPI0, ADC0 */ + }, + [ADC_VBUSSB] = { + .name = "ADC_VBUSSB", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH1, /* GPI1, ADC1 */ + }, + [ADC_EVB_CH_13] = { + .name = "ADC_EVB_CH_13", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH13, /* GPL0, ADC13 */ + }, + [ADC_EVB_CH_14] = { + .name = "ADC_EVB_CH_14", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH14, /* GPL1, ADC14 */ + }, + [ADC_EVB_CH_15] = { + .name = "ADC_EVB_CH_15", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH15, /* GPL2, ADC15 */ + }, + [ADC_EVB_CH_16] = { + .name = "ADC_EVB_CH_16", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH16, /* GPL3, ADC16 */ }, }; - -/* - * I2C channels (A, B, and C) are using the same timing registers (00h~07h) - * at default. - * In order to set frequency independently for each channels, - * We use timing registers 09h~0Bh, and the supported frequency will be: - * 50KHz, 100KHz, 400KHz, or 1MHz. - * I2C channels (D, E and F) can be set different frequency on different ports. - * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and - * the individual prescale register. - * The frequency of SMBus module is 24MHz on default. - * The allowed range of I2C(D/E/F) frequency is as following setting. - * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) - * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) - * Channel D has multi-function and can be used as UART interface. - * Channel F is reserved for EC debug. - */ - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"battery", IT83XX_I2C_CH_C, 100, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"evb-1", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, - {"evb-2", IT83XX_I2C_CH_B, 100, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, - {"opt-4", IT83XX_I2C_CH_E, 100, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, -}; - -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -/* SPI devices */ -const struct spi_device_t spi_devices[] = { - { CONFIG_SPI_FLASH_PORT, 0, -1}, -}; -const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices); +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); diff --git a/board/it83xx_evb/board.h b/board/it83xx_evb/board.h index 54c66d9b7a..754474174c 100644 --- a/board/it83xx_evb/board.h +++ b/board/it83xx_evb/board.h @@ -8,72 +8,17 @@ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H -/* NOTE: 0->ec evb, non-zero->pd evb */ -#define IT83XX_PD_EVB 0 +/* Select Baseboard features */ +#include "baseboard.h" /* Optional features */ -#define CONFIG_BATTERY_SMART -#define CONFIG_BOARD_VERSION_GPIO #define CONFIG_DAC -#define CONFIG_FANS 1 -#define CONFIG_I2C -#define CONFIG_I2C_MASTER -#define CONFIG_IT83XX_ENABLE_MOUSE_DEVICE -#define CONFIG_IT83XX_SMCLK2_ON_GPC7 -#define CONFIG_KEYBOARD_BOARD_CONFIG -#define CONFIG_KEYBOARD_PROTOCOL_8042 -#define CONFIG_LOW_POWER_IDLE -#define CONFIG_LOW_POWER_S0 -#define CONFIG_PECI -#define CONFIG_PECI_COMMON -#define CONFIG_PECI_TJMAX 100 -#define CONFIG_POWER_BUTTON -#define CONFIG_PWM -/* Use CS0 of SSPI */ -#define CONFIG_SPI_MASTER -#define CONFIG_SPI_FLASH_PORT 0 -#define CONFIG_UART_HOST -#define CONFIG_HOSTCMD_LPC - -#if IT83XX_PD_EVB -/* PD */ -#define CONFIG_USB_PD_ALT_MODE -#define CONFIG_USB_PD_ALT_MODE_DFP -#define CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED -#define CONFIG_USB_PD_CUSTOM_PDO -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_PORT_MAX_COUNT 2 -#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP -#define CONFIG_USB_PD_TRY_SRC -#define CONFIG_USB_PD_VBUS_DETECT_GPIO -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 -#define CONFIG_USBC_VCONN -#define CONFIG_USBC_VCONN_SWAP -#endif - -/* Optional console commands */ -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_SCRATCHPAD -#define CONFIG_CMD_STACKOVERFLOW - -/* Debug */ -#undef CONFIG_CMD_FORCETIME -#undef CONFIG_HOOK_DEBUG -#undef CONFIG_KEYBOARD_DEBUG -#undef CONFIG_UART_TX_BUF_SIZE -#define CONFIG_UART_TX_BUF_SIZE 4096 #ifndef __ASSEMBLER__ #include "gpio_signal.h" #include "registers.h" -#define I2C_PORT_CHARGER IT83XX_I2C_CH_C -#define I2C_PORT_BATTERY IT83XX_I2C_CH_C - -#include "gpio_signal.h" - enum pwm_channel { PWM_CH_FAN, PWM_CH_WITH_DSLEEP_FLAG, @@ -92,26 +37,5 @@ enum adc_channel { ADC_CH_COUNT }; -#if IT83XX_PD_EVB -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -/* Try to negotiate to 20V since i2c noise problems should be fixed. */ -#define PD_MAX_VOLTAGE_MV 20000 -/* TODO: determine the following board specific type-C power constants */ -/* - * delay to turn on the power supply max is ~16ms. - * delay to turn off the power supply max is about ~180ms. - */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ - -/* delay to turn on/off vconn */ -#define PD_VCONN_SWAP_DELAY 5000 /* us */ - -void board_pd_vbus_ctrl(int port, int enabled); -#endif - #endif /* !__ASSEMBLER__ */ #endif /* __CROS_EC_BOARD_H */ diff --git a/board/it83xx_evb/build.mk b/board/it83xx_evb/build.mk index 24978a6115..e4c8c01b89 100644 --- a/board/it83xx_evb/build.mk +++ b/board/it83xx_evb/build.mk @@ -9,6 +9,6 @@ CHIP:=it83xx CHIP_FAMILY:=it8320 CHIP_VARIANT:=it8320dx +BASEBOARD:=ite_evb board-y=board.o -board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/board/it83xx_evb/ec.tasklist b/board/it83xx_evb/ec.tasklist index 27e6418b97..3ca78d55db 100644 --- a/board/it83xx_evb/ec.tasklist +++ b/board/it83xx_evb/ec.tasklist @@ -11,6 +11,4 @@ TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) diff --git a/board/it83xx_evb/gpio.inc b/board/it83xx_evb/gpio.inc index 022be8db2f..b850fa182a 100644 --- a/board/it83xx_evb/gpio.inc +++ b/board/it83xx_evb/gpio.inc @@ -18,20 +18,6 @@ GPIO_INT(WP_L, PIN(E, 1), GPIO_INT_BOTH, switch_inter GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interrupt) /* UART1 RX input */ #endif -#if IT83XX_PD_EVB -GPIO(USBPD_HVLDO, PIN(A, 1), GPIO_OUT_LOW) -GPIO(USBPD_PORTB_CC1_VCONN, PIN(A, 2), GPIO_OUT_LOW) -GPIO(USBPD_PORTB_CC2_VCONN, PIN(A, 3), GPIO_OUT_LOW) -GPIO(USBPD_PORTB_VBUS_INPUT, PIN(A, 4), GPIO_OUT_HIGH) -GPIO(USBPD_PORTB_VBUS_OUTPUT, PIN(A, 5), GPIO_OUT_LOW) -GPIO(USBPD_PORTB_VBUS_DROP, PIN(A, 6), GPIO_OUT_LOW) -GPIO(USBPD_PORTA_CC1_VCONN, PIN(C, 4), GPIO_OUT_LOW) -GPIO(USBPD_PORTA_CC2_VCONN, PIN(C, 6), GPIO_OUT_LOW) -GPIO(USBPD_PORTA_VBUS_INPUT, PIN(D, 0), GPIO_OUT_HIGH) -GPIO(USBPD_PORTA_VBUS_OUTPUT, PIN(D, 1), GPIO_OUT_LOW) -GPIO(USBPD_PORTA_VBUS_DROP, PIN(E, 5), GPIO_OUT_LOW) -#endif - GPIO(PCH_SMI_L, PIN(D, 3), GPIO_OUT_HIGH) GPIO(PCH_SCI_L, PIN(D, 4), GPIO_OUT_HIGH) GPIO(GATE_A20_H, PIN(B, 5), GPIO_OUT_HIGH) diff --git a/board/it8xxx2_evb/board.c b/board/it8xxx2_evb/board.c new file mode 100644 index 0000000000..082b8c0d9f --- /dev/null +++ b/board/it8xxx2_evb/board.c @@ -0,0 +1,79 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* IT8xxx2 development board configuration */ + +#include "adc_chip.h" +#include "pwm.h" +#include "pwm_chip.h" + +/* + * PWM channels. Must be in the exactly same order as in enum pwm_channel. + * There total three 16 bits clock prescaler registers for all pwm channels, + * so use the same frequency and prescaler register setting is required if + * number of pwm channel greater than three. + */ +const struct pwm_t pwm_channels[] = { + [PWM_CH_FAN] = { + .channel = PWM_HW_CH_DCR7, + .flags = 0, + .freq_hz = 30000, + .pcfsr_sel = PWM_PRESCALER_C4, + }, + [PWM_CH_WITH_DSLEEP_FLAG] = { + .channel = PWM_HW_CH_DCR0, + .flags = PWM_CONFIG_DSLEEP, + .freq_hz = 100, + .pcfsr_sel = PWM_PRESCALER_C6, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ +const struct adc_t adc_channels[] = { + /* Convert to mV (3000mV/1024). */ + [ADC_VBUSSA] = { + .name = "ADC_VBUSSA", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH0, /* GPI0, ADC0 */ + }, + [ADC_VBUSSB] = { + .name = "ADC_VBUSSB", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH1, /* GPI1, ADC1 */ + }, + [ADC_EVB_CH_13] = { + .name = "ADC_EVB_CH_13", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH13, /* GPL0, ADC13 */ + }, + [ADC_EVB_CH_14] = { + .name = "ADC_EVB_CH_14", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH14, /* GPL1, ADC14 */ + }, + [ADC_EVB_CH_15] = { + .name = "ADC_EVB_CH_15", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH15, /* GPL2, ADC15 */ + }, + [ADC_EVB_CH_16] = { + .name = "ADC_EVB_CH_16", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH16, /* GPL3, ADC16 */ + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); diff --git a/board/it8xxx2_evb/board.h b/board/it8xxx2_evb/board.h new file mode 100644 index 0000000000..1369e43496 --- /dev/null +++ b/board/it8xxx2_evb/board.h @@ -0,0 +1,38 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* IT8xxx2 development board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Select Baseboard features */ +#include "baseboard.h" + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum pwm_channel { + PWM_CH_FAN, + PWM_CH_WITH_DSLEEP_FLAG, + /* Number of PWM channels */ + PWM_CH_COUNT +}; + +enum adc_channel { + ADC_VBUSSA, + ADC_VBUSSB, + ADC_EVB_CH_13, + ADC_EVB_CH_14, + ADC_EVB_CH_15, + ADC_EVB_CH_16, + /* Number of ADC channels */ + ADC_CH_COUNT +}; + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/it8xxx2_evb/build.mk b/board/it8xxx2_evb/build.mk new file mode 100644 index 0000000000..2e5c1df6e0 --- /dev/null +++ b/board/it8xxx2_evb/build.mk @@ -0,0 +1,14 @@ +# -*- makefile -*- +# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build + +# the IC is ITE IT8xxx2 +CHIP:=it83xx +CHIP_FAMILY:=it8xxx2 +CHIP_VARIANT:=it83202bx +BASEBOARD:=ite_evb + +board-y=board.o diff --git a/board/it8xxx2_evb/ec.tasklist b/board/it8xxx2_evb/ec.tasklist new file mode 100644 index 0000000000..ff184489e3 --- /dev/null +++ b/board/it8xxx2_evb/ec.tasklist @@ -0,0 +1,14 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) diff --git a/board/it8xxx2_evb/gpio.inc b/board/it8xxx2_evb/gpio.inc new file mode 100644 index 0000000000..dd4b88e416 --- /dev/null +++ b/board/it8xxx2_evb/gpio.inc @@ -0,0 +1,73 @@ +/* -*- mode:c -*- + * + * Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) +#ifndef CONFIG_HOSTCMD_ESPI +GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) +#endif +GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) +GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH | GPIO_PULL_UP, switch_interrupt) /* Write protect input */ +#ifdef CONFIG_LOW_POWER_IDLE +GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING | GPIO_PULL_UP, uart_deepsleep_interrupt) /* UART1 RX input */ +#endif + +GPIO(PCH_SMI_L, PIN(D, 3), GPIO_OUT_HIGH) +GPIO(PCH_SCI_L, PIN(D, 4), GPIO_OUT_HIGH) +GPIO(GATE_A20_H, PIN(B, 5), GPIO_OUT_HIGH) +GPIO(SYS_RESET_L, PIN(B, 6), GPIO_OUT_HIGH) +GPIO(LPC_CLKRUN_L, PIN(H, 0), GPIO_OUT_LOW) +GPIO(PCH_WAKE_L, PIN(B, 7), GPIO_ODR_HIGH) /* Wake signal from EC to PCH */ + +GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) +GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) +GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT) +GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT) +#ifdef CONFIG_IT83XX_SMCLK2_ON_GPC7 +GPIO(I2C_C_SCL, PIN(C, 7), GPIO_INPUT) +#else +GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) +#endif +GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) + +GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) +GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) + +#ifdef CONFIG_UART_HOST +GPIO(UART2_SIN1, PIN(H, 1), GPIO_INPUT) +GPIO(UART2_SOUT1, PIN(H, 2), GPIO_INPUT) +#endif + +/* KSO/KSI pins can be used as GPIO input. */ +GPIO(BOARD_VERSION1, PIN(KSO_H, 5), GPIO_INPUT) +GPIO(BOARD_VERSION2, PIN(KSO_H, 6), GPIO_INPUT) +GPIO(BOARD_VERSION3, PIN(KSO_H, 7), GPIO_INPUT) + +/* Unimplemented signals which we need to emulate for now */ +UNIMPLEMENTED(ENTERING_RW) + +ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, GPIO_PULL_UP) /* UART1 */ +#ifdef CONFIG_UART_HOST +ALTERNATE(PIN_MASK(H, 0x06), 1, MODULE_UART, 0) /* UART2 */ +#endif +ALTERNATE(PIN_MASK(A, 0x40), 3, MODULE_SPI_MASTER, 0) /* SSCK of SPI */ +ALTERNATE(PIN_MASK(C, 0x28), 3, MODULE_SPI_MASTER, 0) /* SMOSI/SMISO of SPI */ +ALTERNATE(PIN_MASK(G, 0x01), 3, MODULE_SPI_MASTER, 0) /* SSCE1# of SPI */ +ALTERNATE(PIN_MASK(G, 0x04), 3, MODULE_SPI_MASTER, 0) /* SSCE0# of SPI */ +ALTERNATE(PIN_MASK(A, 0x80), 1, MODULE_PWM, 0) /* PWM7 for FAN1 */ +ALTERNATE(PIN_MASK(D, 0x40), 3, MODULE_PWM, 0) /* TACH0A for FAN1 */ +ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A SCL/SDA */ +#ifdef CONFIG_IT83XX_SMCLK2_ON_GPC7 +ALTERNATE(PIN_MASK(C, 0x86), 1, MODULE_I2C, 0) /* I2C B SCL/SDA, C SCL */ +ALTERNATE(PIN_MASK(F, 0x80), 1, MODULE_I2C, 0) /* I2C C SDA */ +#else +ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, 0) /* I2C B SCL/SDA */ +ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C SCL/SDA */ +#endif +ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E SCL/SDA E0/E7 */ diff --git a/board/it8xxx2_pdevb/board.c b/board/it8xxx2_pdevb/board.c new file mode 100644 index 0000000000..df242908b7 --- /dev/null +++ b/board/it8xxx2_pdevb/board.c @@ -0,0 +1,179 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* IT8xxx2 PD development board configuration */ + +#include "adc_chip.h" +#include "console.h" +#include "it83xx_pd.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "timer.h" +#include "usb_pd_tcpm.h" + +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define USB_PD_PORT_ITE_0 0 +#define USB_PD_PORT_ITE_1 1 +#define USB_PD_PORT_ITE_2 2 +#define RESISTIVE_DIVIDER 11 + +int board_get_battery_soc(void) +{ + CPRINTS("%s", __func__); + return 100; +} + +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + [USB_PD_PORT_ITE_0] = { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it83xx_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + [USB_PD_PORT_ITE_1] = { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it83xx_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + [USB_PD_PORT_ITE_2] = { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it83xx_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, +}; + +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + int cc1_enabled = 0, cc2_enabled = 0; + + if (cc_pin != USBPD_CC_PIN_1) + cc2_enabled = enabled; + else + cc1_enabled = enabled; + + if (port == USBPD_PORT_A) { + gpio_set_level(GPIO_USBPD_PORTA_CC2_VCONN, cc2_enabled); + gpio_set_level(GPIO_USBPD_PORTA_CC1_VCONN, cc1_enabled); + } else if (port == USBPD_PORT_B) { + gpio_set_level(GPIO_USBPD_PORTB_CC2_VCONN, cc2_enabled); + gpio_set_level(GPIO_USBPD_PORTB_CC1_VCONN, cc1_enabled); + } else if (port == USBPD_PORT_C) { + gpio_set_level(GPIO_USBPD_PORTC_CC2_VCONN, cc2_enabled); + gpio_set_level(GPIO_USBPD_PORTC_CC1_VCONN, cc1_enabled); + } + + CPRINTS("p%d Vconn cc1 %d, cc2 %d (On/Off)", port, cc1_enabled, + cc2_enabled); +} + +void board_pd_vbus_ctrl(int port, int enabled) +{ + CPRINTS("p%d Vbus %d(En/Dis)", port, enabled); + + if (port == USBPD_PORT_A) { + gpio_set_level(GPIO_USBPD_PORTA_VBUS_INPUT, !enabled); + gpio_set_level(GPIO_USBPD_PORTA_VBUS_OUTPUT, enabled); + if (!enabled) { + gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 1); + udelay(10*MSEC); /* 10ms is a try and error value */ + } + gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 0); + } else if (port == USBPD_PORT_B) { + gpio_set_level(GPIO_USBPD_PORTB_VBUS_INPUT, !enabled); + gpio_set_level(GPIO_USBPD_PORTB_VBUS_OUTPUT, enabled); + if (!enabled) { + gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 1); + udelay(10*MSEC); /* 10ms is a try and error value */ + } + gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 0); + } else if (port == USBPD_PORT_C) { + gpio_set_level(GPIO_USBPD_PORTC_VBUS_INPUT, !enabled); + gpio_set_level(GPIO_USBPD_PORTC_VBUS_OUTPUT, enabled); + if (!enabled) { + gpio_set_level(GPIO_USBPD_PORTC_VBUS_DROP, 1); + udelay(10*MSEC); /* 10ms is a try and error value */ + } + gpio_set_level(GPIO_USBPD_PORTC_VBUS_DROP, 0); + } + + if (enabled) + udelay(10*MSEC); /* 10ms is a try and error value */ +} + +void pd_set_input_current_limit(int port, uint32_t max_ma, + uint32_t supply_voltage) +{ + CPRINTS("p%d %s", port, __func__); +} + +/* + * PWM channels. Must be in the exactly same order as in enum pwm_channel. + * There total three 16 bits clock prescaler registers for all pwm channels, + * so use the same frequency and prescaler register setting is required if + * number of pwm channel greater than three. + */ +const struct pwm_t pwm_channels[] = { +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ +const struct adc_t adc_channels[] = { + /* + * The register value of ADC reading convert to mV (= register value * + * reading max mV / 10 bit solution 1024). + * NOTE: If the ADC channel measure VBUS: + * the max reading mv value is the result of resistive divider, + * so VBUS = reading max mv * resistive divider + * (check HW schematic). + */ + [ADC_VBUSSA] = { + .name = "ADC_VBUSSA", + .factor_mul = ADC_MAX_MVOLT * RESISTIVE_DIVIDER, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH7, /* GPI7, ADC7 */ + }, + [ADC_VBUSSB] = { + .name = "ADC_VBUSSB", + .factor_mul = ADC_MAX_MVOLT * RESISTIVE_DIVIDER, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH3, /* GPI3, ADC3 */ + }, + [ADC_VBUSSC] = { + .name = "ADC_VBUSSC", + .factor_mul = ADC_MAX_MVOLT * RESISTIVE_DIVIDER, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH16, /* GPL0, ADC16 */ + }, + [ADC_EVB_CH_13] = { + .name = "ADC_EVB_CH_13", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH13, /* GPL1, ADC13 */ + }, + [ADC_EVB_CH_14] = { + .name = "ADC_EVB_CH_14", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH14, /* GPL2, ADC14 */ + }, + [ADC_EVB_CH_15] = { + .name = "ADC_EVB_CH_15", + .factor_mul = ADC_MAX_MVOLT, + .factor_div = ADC_READ_MAX + 1, + .shift = 0, + .channel = CHIP_ADC_CH15, /* GPL3, ADC15 */ + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); diff --git a/board/it8xxx2_pdevb/board.h b/board/it8xxx2_pdevb/board.h new file mode 100644 index 0000000000..3131151980 --- /dev/null +++ b/board/it8xxx2_pdevb/board.h @@ -0,0 +1,91 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* IT8xxx2 PD development board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Select Baseboard features */ +#include "baseboard.h" + +/* EC configurations, unnecessarily for PD */ +#undef CONFIG_FANS +#undef CONFIG_IT83XX_ENABLE_MOUSE_DEVICE +#undef CONFIG_IT83XX_SMCLK2_ON_GPC7 +#undef CONFIG_KEYBOARD_BOARD_CONFIG +#undef CONFIG_KEYBOARD_PROTOCOL_8042 +#undef CONFIG_PECI +#undef CONFIG_PECI_COMMON +#undef CONFIG_PECI_TJMAX +#undef CONFIG_POWER_BUTTON +#undef CONFIG_PWM +#undef CONFIG_SPI_MASTER +#undef CONFIG_SPI_FLASH_PORT +#undef CONFIG_UART_HOST +#undef CONFIG_HOSTCMD_LPC +#undef CONFIG_CMD_MMAPINFO +#undef CONFIG_SWITCH + +/* PD */ +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED +#define CONFIG_USB_PD_CUSTOM_PDO +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_PORT_MAX_COUNT 3 +#define CONFIG_USB_PD_TCPMV1 +#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_PD_VBUS_DETECT_GPIO +#define CONFIG_USB_POWER_DELIVERY +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_DECODE_SOP +#define CONFIG_VBOOT_HASH + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum pwm_channel { + /* Number of PWM channels */ + PWM_CH_COUNT +}; + +enum adc_channel { + ADC_VBUSSA, + ADC_VBUSSB, + ADC_VBUSSC, + ADC_EVB_CH_13, + ADC_EVB_CH_14, + ADC_EVB_CH_15, + /* Number of ADC channels */ + ADC_CH_COUNT +}; + +/* Define typical operating power and max power */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_MAX_CURRENT_MA 3000 +/* Try to negotiate to 20V since i2c noise problems should be fixed. */ +#define PD_MAX_VOLTAGE_MV 20000 +/* TODO: determine the following board specific type-C power constants */ +/* + * delay to turn on the power supply max is ~16ms. + * delay to turn off the power supply max is about ~180ms. + */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* delay to turn on/off vconn */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +void board_pd_vbus_ctrl(int port, int enabled); + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/it8xxx2_pdevb/build.mk b/board/it8xxx2_pdevb/build.mk new file mode 100644 index 0000000000..2e5c1df6e0 --- /dev/null +++ b/board/it8xxx2_pdevb/build.mk @@ -0,0 +1,14 @@ +# -*- makefile -*- +# Copyright 2020 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build + +# the IC is ITE IT8xxx2 +CHIP:=it83xx +CHIP_FAMILY:=it8xxx2 +CHIP_VARIANT:=it83202bx +BASEBOARD:=ite_evb + +board-y=board.o diff --git a/board/it8xxx2_pdevb/ec.tasklist b/board/it8xxx2_pdevb/ec.tasklist new file mode 100644 index 0000000000..b87c2ca824 --- /dev/null +++ b/board/it8xxx2_pdevb/ec.tasklist @@ -0,0 +1,14 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C2, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/it8xxx2_pdevb/gpio.inc b/board/it8xxx2_pdevb/gpio.inc new file mode 100644 index 0000000000..43b645629d --- /dev/null +++ b/board/it8xxx2_pdevb/gpio.inc @@ -0,0 +1,72 @@ +/* -*- mode:c -*- + * + * Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +GPIO_INT(WP_L, PIN(I, 4), GPIO_INT_BOTH | GPIO_PULL_UP, switch_interrupt) /* Write protect input */ +#ifdef CONFIG_LOW_POWER_IDLE +GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING | GPIO_PULL_UP, uart_deepsleep_interrupt) /* UART1 RX input */ +#endif + +/* + * Because HW port0 and port1 cc pin order invert, FW invert it again. + * ex. FW portA pins are mapping to: HW port1 GPF4, GPF5, ADC7, Vbus, Vconn. + * FW portB pins are mapping to: HW port0 GPH1, GPH2, ADC3, Vbus, Vconn. + * FW portC pins are mapping to: HW port3 GPP0, GPP1, ADC16, Vbus, Vconn. + */ +GPIO(USBPD_PORTA_VBUS_SEN1P1, PIN(J, 0), GPIO_OUT_LOW) /* VBUSSEN1P1 */ +GPIO(USBPD_PORTA_VBUS_DROP, PIN(F, 3), GPIO_OUT_LOW) /* VBUSDISP1 */ +GPIO(USBPD_PORTA_VBUS_OUTPUT, PIN(F, 1), GPIO_OUT_LOW) /* VBUSOUTSWENP1 */ +GPIO(USBPD_PORTA_VBUS_INPUT, PIN(E, 3), GPIO_OUT_HIGH) /* VBUSINSWENP1 */ +GPIO(USBPD_PORTA_VBUS_OV_OC, PIN(C, 3), GPIO_INPUT) /* VSWFLTP1 1? */ +GPIO(USBPD_PORTA_CC1_VCONN, PIN(E, 1), GPIO_OUT_LOW) +GPIO(USBPD_PORTA_CC2_VCONN, PIN(J, 5), GPIO_OUT_LOW) +GPIO(USBPD_PORTA_VCONN_OV_OC, PIN(B, 5), GPIO_INPUT) /* VCONSWFLTP1 1? */ +GPIO(USBPD_PORTB_VBUS_SEN1P0, PIN(H, 0), GPIO_OUT_LOW) /* VBUSSEN1P0 */ +GPIO(USBPD_PORTB_VBUS_DROP, PIN(D, 5), GPIO_OUT_LOW) /* VBUSDISP0 */ +GPIO(USBPD_PORTB_VBUS_OUTPUT, PIN(A, 6), GPIO_OUT_LOW) /* VBUSOUTSWENP0 */ +GPIO(USBPD_PORTB_VBUS_INPUT, PIN(A, 7), GPIO_OUT_HIGH) /* VBUSINSWENP0 */ +GPIO(USBPD_PORTB_VBUS_OV_OC, PIN(D, 2), GPIO_INPUT) /* VSWFLTP0 */ +GPIO(USBPD_PORTB_CC1_VCONN, PIN(A, 5), GPIO_OUT_LOW) +GPIO(USBPD_PORTB_CC2_VCONN, PIN(A, 4), GPIO_OUT_LOW) +GPIO(USBPD_PORTB_VCONN_OV_OC, PIN(D, 4), GPIO_INPUT) /* VCONSWFLTP0 */ +GPIO(USBPD_PORTC_VBUS_SEN1P3, PIN(P, 2), GPIO_OUT_LOW) /* VBUSSEN1P3 */ +GPIO(USBPD_PORTC_VBUS_DROP, PIN(P, 3), GPIO_OUT_LOW) /* VBUSDISP3 */ +GPIO(USBPD_PORTC_VBUS_OUTPUT, PIN(P, 4), GPIO_OUT_LOW) /* VBUSOUTSWENP3 */ +GPIO(USBPD_PORTC_VBUS_INPUT, PIN(P, 5), GPIO_OUT_HIGH) /* VBUSINSWENP3 */ +GPIO(USBPD_PORTC_VBUS_OV_OC, PIN(P, 6), GPIO_INPUT) /* VSWFLTP3 */ +GPIO(USBPD_PORTC_CC1_VCONN, PIN(O, 0), GPIO_OUT_LOW) +GPIO(USBPD_PORTC_CC2_VCONN, PIN(O, 1), GPIO_OUT_LOW) +GPIO(USBPD_PORTC_VCONN_OV_OC, PIN(O, 2), GPIO_INPUT) /* VCONSWFLTP3 */ + +GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) +GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) +GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT) +GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT) +GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) +GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) +GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) +GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) + +/* KSO/KSI pins can be used as GPIO input. */ +GPIO(BOARD_VERSION1, PIN(KSO_H, 5), GPIO_INPUT) +GPIO(BOARD_VERSION2, PIN(KSO_H, 6), GPIO_INPUT) +GPIO(BOARD_VERSION3, PIN(KSO_H, 7), GPIO_INPUT) + +/* Unimplemented signals which we need to emulate for now */ +UNIMPLEMENTED(ENTERING_RW) +UNIMPLEMENTED(PCH_SCI_L) +UNIMPLEMENTED(PCH_WAKE_L) +UNIMPLEMENTED(POWER_BUTTON_L) +UNIMPLEMENTED(LID_OPEN) + +ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, GPIO_PULL_UP) /* UART1 */ +ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A SCL/SDA */ +ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, 0) /* I2C B SCL/SDA */ +ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C SCL/SDA */ +ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E SCL/SDA E0/E7 */ diff --git a/util/flash_ec b/util/flash_ec index 452aad2d19..13ddfb2f5c 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -51,12 +51,17 @@ die() { BOARDS_IT83XX=( glkrvp_ite it83xx_evb + it8xxx2_pdevb reef_it8320 tglrvpu_ite tglrvpy_ite jslrvp_ite ) +BOARDS_IT83XX_SPI_PROGRAMMING=( + it8xxx2_evb +) + BOARDS_STM32=( bloonchipper chell_pd @@ -281,6 +286,10 @@ if $(in_array "${BOARDS_IT83XX[@]}" "${BOARD}"); then SUPPORTED_CHIPS+=("it83xx") fi +if $(in_array "${BOARDS_IT83XX_SPI_PROGRAMMING[@]}" "${BOARD}"); then + SUPPORTED_CHIPS+=("ite_spi") +fi + if [[ ${#SUPPORTED_CHIPS[@]} -eq 0 && -n "${FLAGS_chip}" ]]; then SUPPORTED_CHIPS+="${FLAGS_chip}" fi @@ -337,7 +346,7 @@ case "${BOARD}" in esac case "${CHIP}" in - "stm32"|"npcx_spi"|"npcx_int_spi"|"it83xx"|"npcx_uut") ;; + "stm32"|"npcx_spi"|"npcx_int_spi"|"it83xx"|"npcx_uut"|"ite_spi") ;; *) if [[ -n "${FLAGS_read}" ]]; then die "The flag is not yet supported on ${CHIP}." @@ -863,6 +872,8 @@ function flash_flashrom() { if ! on_raiden || [[ "${SERVO_TYPE}" =~ "servo_micro" ]] ; then if $(in_array "${BOARDS_SPI_1800MV[@]}" "${BOARD}"); then SPI_VOLTAGE="pp1800" + elif [[ "${CHIP}" == "ite_spi" ]]; then + SPI_VOLTAGE="pp1800" else SPI_VOLTAGE="pp3300" fi @@ -879,6 +890,17 @@ function flash_flashrom() { dut_control cold_reset:off fi + # Enable SPI programming mode. + if [[ "${CHIP}" == "ite_spi" ]]; then + # Set hardware strap pin (GPG6) of SPI programming as low then start ec + dut_control fw_up:on + sleep 0.1 + dut_control cold_reset:off + sleep 0.1 + # We have to release the HW strap pin because it also SPI clock pin. + dut_control fw_up:off + fi + servo_save_add "spi1_vref" "off" servo_save_add "spi1_buf_en" "off" @@ -1262,6 +1284,10 @@ function flash_it83xx() { "${ITEFLASH_ARGS[@]}" || die "${ERROR_MSG}" } +function flash_ite_spi() { + flash_flashrom +} + function flash_lm4() { OCD_CHIP_CFG="lm4_chip.cfg" OCD_CMDS="init; flash_lm4 ${IMG} ${FLAGS_offset}; shutdown;" |