summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAseda Aboagye <aaboagye@google.com>2020-01-07 10:26:30 -0800
committerCommit Bot <commit-bot@chromium.org>2020-01-08 06:52:45 +0000
commit52524e690df2538c30b64b40b41874701ea529ee (patch)
treeb4d2496331093a281f00b8791b2c318862028ca4
parent544ee3c5461b6f00115887122f4ad5a29d0ed6bc (diff)
downloadchrome-ec-52524e690df2538c30b64b40b41874701ea529ee.tar.gz
waddledoo: Add JSL support
waddledoo is using the Intel Jasperlake chipset. This commit enables support for that chipset as well as adding the other related power sequencing signals. JSL uses the same chipset driver as ICL, but waddledoo doesn't have a couple of the power good pins that the driver assumes. Therefore, waddledoo overrides these power good signals using other logic. BUG=b:147257114,b:146172102 BRANCH=None TEST=`make -j BOARD=waddledoo` Change-Id: Ib4baa7ff38a4f59f751ecb16c22522eda71b6f4f Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1987837 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
-rw-r--r--baseboard/dedede/baseboard.c24
-rw-r--r--baseboard/dedede/baseboard.h27
-rw-r--r--board/waddledoo/board.c11
-rw-r--r--board/waddledoo/board.h13
-rw-r--r--board/waddledoo/ec.tasklist1
-rw-r--r--board/waddledoo/gpio.inc19
6 files changed, 81 insertions, 14 deletions
diff --git a/baseboard/dedede/baseboard.c b/baseboard/dedede/baseboard.c
index 740236d45f..4e7087f263 100644
--- a/baseboard/dedede/baseboard.c
+++ b/baseboard/dedede/baseboard.c
@@ -5,8 +5,10 @@
/* Dedede family-specific configuration */
+#include "adc.h"
#include "common.h"
#include "gpio.h"
+#include "intel_x86.h"
/*
* Dedede does not use hibernate wake pins, but the super low power "Z-state"
@@ -16,3 +18,25 @@
*/
const enum gpio_signal hibernate_wake_pins[] = {};
const int hibernate_wake_pins_used;
+
+__override int intel_x86_get_pg_ec_dsw_pwrok(void)
+{
+ /*
+ * The PP3300_A rail is an input to generate DPWROK. Assuming that
+ * power is good if voltage is at least 80% of nominal level.
+ */
+ return adc_read_channel(ADC_VSNS_PP3300_A) > 2640;
+}
+
+__override int intel_x86_get_pg_ec_all_sys_pwrgd(void)
+{
+ /*
+ * ALL_SYS_PWRGD is an AND of both DRAM PGOOD and VCCST PGOOD. Note
+ * that this is an inverted power good; a low value means that the power
+ * is good. Therefore, we are assuming that power is good if voltage is
+ * no more than 20% of nominal level.
+ */
+ int vccst = adc_read_channel(ADC_VSNS_PP1050_ST_S);
+
+ return (vccst < 210) && gpio_get_level(GPIO_PG_DRAM_OD);
+}
diff --git a/baseboard/dedede/baseboard.h b/baseboard/dedede/baseboard.h
index c3167898f2..e4b54b2860 100644
--- a/baseboard/dedede/baseboard.h
+++ b/baseboard/dedede/baseboard.h
@@ -36,6 +36,31 @@
#error "Must define a VARIANT_DEDEDE_EC!"
#endif
+/*
+ * Remapping of schematic GPIO names to common GPIO names expected (hardcoded)
+ * in the EC code base.
+ */
+#define GPIO_CPU_PROCHOT GPIO_EC_PROCHOT_ODL
+#define GPIO_EC_INT_L GPIO_EC_AP_MKBP_INT_L
+#define GPIO_EN_PP5000 GPIO_EN_PP5000_U
+#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
+#define GPIO_PCH_DSW_PWROK GPIO_EC_AP_DPWROK
+#define GPIO_PCH_PWRBTN_L GPIO_EC_AP_PWR_BTN_ODL
+#define GPIO_PCH_RSMRST_L GPIO_EC_AP_RSMRST_L
+#define GPIO_PCH_RTCRST GPIO_EC_AP_RTCRST
+#define GPIO_PCH_SLP_S0_L GPIO_SLP_S0_L
+#define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L
+#define GPIO_PCH_SLP_S4_L GPIO_SLP_S4_L
+#define GPIO_PCH_SYS_PWROK GPIO_EC_AP_SYS_PWROK
+#define GPIO_PCH_WAKE_L GPIO_EC_AP_WAKE_ODL
+#define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_PWRGD_L
+#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL
+#define GPIO_RSMRST_L_PGOOD GPIO_RSMRST_PWRGD_L
+#define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL
+#define GPIO_VOLUME_UP_L GPIO_VOLUP_BTN_ODL
+#define GPIO_VOLUME_DOWN_L GPIO_VOLDN_BTN_ODL
+#define GPIO_WP GPIO_EC_WP_OD
+
/* Common EC defines */
/* EC Modules */
@@ -61,9 +86,11 @@
/* SoC */
#define CONFIG_BOARD_HAS_RTC_RESET
+#define CONFIG_CHIPSET_JASPERLAKE
#define CONFIG_KEYBOARD_PROTOCOL_8042
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_X86
+#define CONFIG_POWER_COMMON
#ifndef __ASSEMBLER__
diff --git a/board/waddledoo/board.c b/board/waddledoo/board.c
index a302d4d529..8c5a865035 100644
--- a/board/waddledoo/board.c
+++ b/board/waddledoo/board.c
@@ -9,10 +9,21 @@
#include "button.h"
#include "common.h"
#include "compile_time_macros.h"
+#include "extpower.h"
#include "gpio.h"
#include "i2c.h"
#include "lid_switch.h"
+#include "power.h"
#include "power_button.h"
#include "switch.h"
#include "gpio_list.h"
+
+int extpower_is_present(void)
+{
+ /*
+ * TODO(b:146651593) We can likely use the charger IC to determine VBUS
+ * presence.
+ */
+ return 1;
+}
diff --git a/board/waddledoo/board.h b/board/waddledoo/board.h
index 328488ddb5..f7a595d545 100644
--- a/board/waddledoo/board.h
+++ b/board/waddledoo/board.h
@@ -11,19 +11,6 @@
#define VARIANT_DEDEDE_EC_NPCX796FC
#include "baseboard.h"
-/*
- * Remapping of schematic GPIO names to common GPIO names expected (hardcoded)
- * in the EC code base.
- */
-#define GPIO_EC_INT_L GPIO_EC_AP_MKBP_INT_L
-#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW
-#define GPIO_PCH_PWRBTN_L GPIO_EC_AP_PWR_BTN_ODL
-#define GPIO_PCH_WAKE_L GPIO_EC_AP_WAKE_ODL
-#define GPIO_POWER_BUTTON_L GPIO_H1_EC_PWR_BTN_ODL
-#define GPIO_VOLUME_UP_L GPIO_VOLUP_BTN_ODL
-#define GPIO_VOLUME_DOWN_L GPIO_VOLDN_BTN_ODL
-#define GPIO_WP GPIO_EC_WP_OD
-
/* I2C configuration */
#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0
#define I2C_PORT_BATTERY NPCX_I2C_PORT5_0
diff --git a/board/waddledoo/ec.tasklist b/board/waddledoo/ec.tasklist
index d2983d770d..57bcccc28f 100644
--- a/board/waddledoo/ec.tasklist
+++ b/board/waddledoo/ec.tasklist
@@ -9,6 +9,7 @@
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \
+ TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \
TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
TASK_ALWAYS(HOSTCMD, host_command_task, NULL, VENTI_TASK_STACK_SIZE) \
diff --git a/board/waddledoo/gpio.inc b/board/waddledoo/gpio.inc
index b4f8d994b8..68d27b4025 100644
--- a/board/waddledoo/gpio.inc
+++ b/board/waddledoo/gpio.inc
@@ -10,6 +10,17 @@
* Note: Those with interrupt handlers must be declared first.
*/
+GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(SLP_SUS_L, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(RSMRST_PWRGD_L, PIN(C, 6), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(VCCIN_AUX_VID1, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(CPU_C10_GATE_L, PIN(6, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(VCCIN_AUX_VID0, PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt)
+GPIO_INT(PG_VCCIO_EXT_OD, PIN(B, 0), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_PP5000_U_OD, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PG_DRAM_OD, PIN(E, 4), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
GPIO_INT(VOLDN_BTN_ODL, PIN(4, 0), GPIO_INT_BOTH | GPIO_PULL_UP | GPIO_SEL_1P8V, button_interrupt)
/* TODO(b:147257497) Fix this and EN_PP5000_U before board rev 0. */
@@ -59,7 +70,6 @@ GPIO(EC_PROCHOT_ODL, PIN(F, 1), GPIO_ODR_HIGH | GPIO_PULL_UP | GPIO_SEL_1P8
GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW)
GPIO(ALL_SYS_PWRGD, PIN(A, 0), GPIO_OUT_LOW)
GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH)
-GPIO(RSMRST_PWRGD_L, PIN(C, 6), GPIO_OUT_HIGH)
GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT)
GPIO(USB_C0_RST_ODL, PIN(9, 7), GPIO_OUT_HIGH) /* currently unused */
@@ -67,6 +77,13 @@ GPIO(EC_AP_USB_C1_HDMI_HPD, PIN(9, 6), GPIO_OUT_LOW)
GPIO(EC_AP_USB_C0_HPD, PIN(9, 3), GPIO_OUT_LOW)
GPIO(HDMI_SEL_L, PIN(7, 2), GPIO_OUT_HIGH)
+/*
+ * Waddledoo doesn't have these physical pins coming to the EC but uses other
+ * logic.
+ */
+UNIMPLEMENTED(PG_EC_DSW_PWROK)
+UNIMPLEMENTED(PG_EC_ALL_SYS_PWRGD)
+
/* Alternate Functions */
/* ADC */
ALTERNATE(PIN_MASK(F, BIT(0)), 0, MODULE_ADC, 0) /* ADC9 */