intelrvp: update usb_pd files to indicate MECC version compliance

Add new configuration for MECC-0.9 version and update JSL,TGL RVP boards
to use this config option. Support for new version of MECC-1.0 will
be required for ADL-RVP.

BRANCH=None
BUG=b:169551130
TEST=make buildall -j

Signed-off-by: pandeyan <anshuman.pandey@intel.com>
Change-Id: Ic1118c460a7052ffd0141a45c9153dbdac421d1b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435175
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: Poornima Tom <poornima.tom@intel.com>

10 files changed, 142 insertions, 108 deletions

diff --git a/baseboard/intelrvp/README.md b/baseboard/intelrvp/README.md
index b72d653d33..00a0662ddb 100644
--- a/baseboard/intelrvp/README.md
+++ b/baseboard/intelrvp/README.md
@@ -14,12 +14,14 @@ this baseboard code is applicable to Icelake and its successors only.
 
 Following hardware features are supported on MECC header by RVP and can be
 validated by software by MECC.
+
+MECC version 0.9 features
 1. Power to MECC is provide by RVP (battery + DC Jack + Type C)
 2. Power control pins for Intel SOC are added
 3. Servo V2 header need to be added by MECC
 4. Google H1 chip need to be added by MECC (optional for EC vendors)
-4. 2 Type-C port support (SRC/SNK/BC1.2/MUX/Rerimer)
-5. 6 Temperature sensors
-6. 4 ADC
-7. 4 I2C Channels
-8. 1 Fan control
+5. 2 Type-C port support (SRC/SNK/BC1.2/MUX/Rerimer)
+6. 6 Temperature sensors
+7. 4 ADC
+8. 4 I2C Channels
+9. 1 Fan control
diff --git a/baseboard/intelrvp/baseboard.h b/baseboard/intelrvp/baseboard.h
index 7e75878d9f..bb2c9c5cba 100644
--- a/baseboard/intelrvp/baseboard.h
+++ b/baseboard/intelrvp/baseboard.h
@@ -8,6 +8,8 @@
 #ifndef __CROS_EC_BASEBOARD_H
 #define __CROS_EC_BASEBOARD_H
 
+#include "stdbool.h"
+
 #ifdef VARIANT_INTELRVP_EC_IT8320
 	#include "ite_ec.h"
 #endif /* VARIANT_INTELRVP_EC_IT8320 */
@@ -254,6 +256,7 @@ void board_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp);
 int ioexpander_read_intelrvp_version(int *port0, int *port1);
 void board_dc_jack_interrupt(enum gpio_signal signal);
 void tcpc_alert_event(enum gpio_signal signal);
+bool is_typec_port(int port);
 
 #endif /* !__ASSEMBLER__ */
 
diff --git a/baseboard/intelrvp/build.mk b/baseboard/intelrvp/build.mk
index 896673c4a4..e8d5c17b4a 100644
--- a/baseboard/intelrvp/build.mk
+++ b/baseboard/intelrvp/build.mk
@@ -10,7 +10,12 @@
 baseboard-y=baseboard.o
 baseboard-$(CONFIG_LED_COMMON)+=led.o led_states.o
 baseboard-$(CONFIG_BATTERY_SMART)+=battery.o
-baseboard-$(CONFIG_USB_POWER_DELIVERY)+=chg_usb_pd.o usb_pd_policy.o
+
+ifneq ($(CONFIG_USB_POWER_DELIVERY),)
+baseboard-$(CONFIG_USB_POWER_DELIVERY)+=chg_usb_pd.o
+baseboard-$(CONFIG_INTEL_RVP_MECC_VERSION_0_9)+=chg_usb_pd_mecc_0_9.o
+baseboard-$(CONFIG_INTEL_RVP_MECC_VERSION_0_9)+=usb_pd_policy_mecc_0_9.o
+endif
 
 #EC specific files
 baseboard-$(VARIANT_INTELRVP_EC_IT8320)+=ite_ec.o
diff --git a/baseboard/intelrvp/chg_usb_pd.c b/baseboard/intelrvp/chg_usb_pd.c
index 8620268263..c7e0650d5d 100644
--- a/baseboard/intelrvp/chg_usb_pd.c
+++ b/baseboard/intelrvp/chg_usb_pd.c
@@ -3,109 +3,21 @@
  * found in the LICENSE file.
  */
 
-/* Intel-RVP family-specific configuration */
+/* Common USB PD charge configuration */
 
 #include "charge_manager.h"
 #include "charge_state_v2.h"
-#include "console.h"
 #include "hooks.h"
 #include "tcpci.h"
-#include "system.h"
 
 #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
 #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
 
-static inline int is_typec_port(int port)
+bool is_typec_port(int port)
 {
 	return !(port == DEDICATED_CHARGE_PORT || port == CHARGE_PORT_NONE);
 }
 
-
-int board_vbus_source_enabled(int port)
-{
-	int src_en = 0;
-
-	/* Only Type-C ports can source VBUS */
-	if (is_typec_port(port)) {
-		src_en = gpio_get_level(tcpc_gpios[port].src.pin);
-
-		src_en = tcpc_gpios[port].src.pin_pol ? src_en : !src_en;
-	}
-
-	return src_en;
-}
-
-void board_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp)
-{
-	int ilim_en;
-
-	/* Only Type-C ports can source VBUS */
-	if (is_typec_port(port)) {
-		/* Enable SRC ILIM if rp is MAX single source current */
-		ilim_en = (rp == CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT &&
-			board_vbus_source_enabled(port));
-
-		gpio_set_level(tcpc_gpios[port].src_ilim.pin,
-				tcpc_gpios[port].src_ilim.pin_pol ?
-				ilim_en : !ilim_en);
-	}
-}
-
-void board_charging_enable(int port, int enable)
-{
-	gpio_set_level(tcpc_gpios[port].snk.pin,
-		tcpc_gpios[port].snk.pin_pol ? enable : !enable);
-
-}
-
-void board_vbus_enable(int port, int enable)
-{
-	gpio_set_level(tcpc_gpios[port].src.pin,
-		tcpc_gpios[port].src.pin_pol ? enable : !enable);
-}
-
-int pd_snk_is_vbus_provided(int port)
-{
-	int vbus_intr;
-
-	if (port == DEDICATED_CHARGE_PORT)
-		return 1;
-
-	vbus_intr = gpio_get_level(tcpc_gpios[port].vbus.pin);
-
-	return tcpc_gpios[port].vbus.pin_pol ? vbus_intr : !vbus_intr;
-}
-
-void tcpc_alert_event(enum gpio_signal signal)
-{
-	int port = -1;
-	int i;
-
-	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
-		if (tcpc_gpios[i].vbus.pin == signal) {
-			port = i;
-			break;
-		}
-	}
-
-	if (port != -1)
-		schedule_deferred_pd_interrupt(port);
-}
-
-void board_tcpc_init(void)
-{
-	int i;
-
-	/* Only reset TCPC if not sysjump */
-	if (!system_jumped_late())
-		board_reset_pd_mcu();
-
-	/* Enable TCPCx interrupt */
-	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
-		gpio_enable_interrupt(tcpc_gpios[i].vbus.pin);
-}
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
-
 static inline int board_dc_jack_present(void)
 {
 	return gpio_get_level(GPIO_DC_JACK_PRESENT);
diff --git a/baseboard/intelrvp/chg_usb_pd_mecc_0_9.c b/baseboard/intelrvp/chg_usb_pd_mecc_0_9.c
new file mode 100644
index 0000000000..aafc6eeb44
--- /dev/null
+++ b/baseboard/intelrvp/chg_usb_pd_mecc_0_9.c
@@ -0,0 +1,112 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Intel-RVP family-specific configuration */
+
+#include "console.h"
+#include "hooks.h"
+#include "tcpci.h"
+#include "system.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+int board_vbus_source_enabled(int port)
+{
+	int src_en = 0;
+
+	/* Only Type-C ports can source VBUS */
+	if (is_typec_port(port)) {
+		src_en = gpio_get_level(tcpc_gpios[port].src.pin);
+
+		src_en = tcpc_gpios[port].src.pin_pol ? src_en : !src_en;
+	}
+
+	return src_en;
+}
+
+void board_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp)
+{
+	int ilim_en;
+
+	/* Only Type-C ports can source VBUS */
+	if (is_typec_port(port)) {
+		/* Enable SRC ILIM if rp is MAX single source current */
+		ilim_en = (rp == CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT &&
+			board_vbus_source_enabled(port));
+
+		gpio_set_level(tcpc_gpios[port].src_ilim.pin,
+				tcpc_gpios[port].src_ilim.pin_pol ?
+				ilim_en : !ilim_en);
+	}
+}
+
+void board_charging_enable(int port, int enable)
+{
+	gpio_set_level(tcpc_gpios[port].snk.pin,
+		tcpc_gpios[port].snk.pin_pol ? enable : !enable);
+
+}
+
+void board_vbus_enable(int port, int enable)
+{
+	gpio_set_level(tcpc_gpios[port].src.pin,
+		tcpc_gpios[port].src.pin_pol ? enable : !enable);
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+	int vbus_intr;
+
+	if (port == DEDICATED_CHARGE_PORT)
+		return 1;
+
+	vbus_intr = gpio_get_level(tcpc_gpios[port].vbus.pin);
+
+	return tcpc_gpios[port].vbus.pin_pol ? vbus_intr : !vbus_intr;
+}
+
+void tcpc_alert_event(enum gpio_signal signal)
+{
+	int i;
+
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
+		if (tcpc_gpios[i].vbus.pin == signal) {
+			schedule_deferred_pd_interrupt(i);
+			break;
+		}
+	}
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+	int i;
+
+	/* Check which port has the ALERT line set */
+	for (i = 0; i < CHARGE_PORT_COUNT; i++) {
+		/* No alerts for embdeded TCPC */
+		if (tcpc_config[i].bus_type == EC_BUS_TYPE_EMBEDDED)
+			continue;
+
+		/* Add TCPC alerts if present */
+	}
+
+	return status;
+}
+
+void board_tcpc_init(void)
+{
+	int i;
+
+	/* Only reset TCPC if not sysjump */
+	if (!system_jumped_late())
+		board_reset_pd_mcu();
+
+	/* Enable TCPCx interrupt */
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
+		gpio_enable_interrupt(tcpc_gpios[i].vbus.pin);
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
diff --git a/baseboard/intelrvp/ite_ec.c b/baseboard/intelrvp/ite_ec.c
index a575aab417..27a4138aa3 100644
--- a/baseboard/intelrvp/ite_ec.c
+++ b/baseboard/intelrvp/ite_ec.c
@@ -19,18 +19,6 @@ void board_reset_pd_mcu(void)
 	/* Not applicable for ITE TCPC */
 }
 
-uint16_t tcpc_get_alert_status(void)
-{
-	/*
-	 * Since C0/C1 TCPC are embedded within EC, we don't need the
-	 * PDCMD tasks. The (embedded) TCPC status since chip driver
-	 * code handles its own interrupts and forward the correct
-	 * events to the PD_C0 task. See it83xx/intc.c
-	 */
-
-	return 0;
-}
-
 /* Keyboard scan setting */
 struct keyboard_scan_config keyscan_config = {
 	.output_settle_us = 35,
diff --git a/baseboard/intelrvp/usb_pd_policy.c b/baseboard/intelrvp/usb_pd_policy_mecc_0_9.c
index d0ca3d6025..d0ca3d6025 100644
--- a/baseboard/intelrvp/usb_pd_policy.c
+++ b/baseboard/intelrvp/usb_pd_policy_mecc_0_9.c
diff --git a/board/jslrvp_ite/board.h b/board/jslrvp_ite/board.h
index 4f88cd5a52..264415a0ef 100644
--- a/board/jslrvp_ite/board.h
+++ b/board/jslrvp_ite/board.h
@@ -11,6 +11,9 @@
 /* ITE EC variant */
 #define VARIANT_INTELRVP_EC_IT8320
 
+/* MECC config */
+#define CONFIG_INTEL_RVP_MECC_VERSION_0_9
+
 #define CONFIG_CHIPSET_JASPERLAKE
 #define GPIO_PG_EC_RSMRST_ODL		GPIO_RSMRST_L_PGOOD
 #define GPIO_PCH_DSW_PWROK		GPIO_EC_PCH_DSW_PWROK
diff --git a/board/tglrvpu_ite/board.h b/board/tglrvpu_ite/board.h
index 0a0bd6e14f..0679c0287f 100644
--- a/board/tglrvpu_ite/board.h
+++ b/board/tglrvpu_ite/board.h
@@ -11,6 +11,9 @@
 /* ITE EC variant */
 #define VARIANT_INTELRVP_EC_IT8320
 
+/* MECC config */
+#define CONFIG_INTEL_RVP_MECC_VERSION_0_9
+
 /* USB MUX */
 #define CONFIG_USB_MUX_VIRTUAL
 
diff --git a/include/config.h b/include/config.h
index 612afacad7..33d4453cd0 100644
--- a/include/config.h
+++ b/include/config.h
@@ -4393,6 +4393,12 @@
 /* USB Device version of product */
 #undef CONFIG_USB_BCD_DEV
 
+/*
+ * Intel Reference Validation Platform's (RVP) Modular Embedded Control
+ * Card (MECC) version 0.9
+ */
+#undef CONFIG_INTEL_RVP_MECC_VERSION_0_9
+
 /*****************************************************************************/
 
 /* Compile chip support for the USB device controller */