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authorTzung-Bi Shih <tzungbi@chromium.org>2020-11-12 15:22:15 +0800
committerCommit Bot <commit-bot@chromium.org>2020-11-17 12:07:41 +0000
commit3ec81a13f83eb8f08166f6cbad3fe8471ef4537a (patch)
tree6548b589e2ca2318dbd9995bbd48b7112d70db3c
parentf898db15828f720c1911b70b8a2e9985a1d8ea52 (diff)
downloadchrome-ec-3ec81a13f83eb8f08166f6cbad3fe8471ef4537a.tar.gz
common: embed IPI shared buffer address in ELF
Embeds IPI shared buffer address in ELF. Creates a NOBITS segment for holding the address. E.g.: $ /opt/coreboot-sdk/bin/riscv64-elf-readelf -l build/asurada_scp/ec.obj Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x00000000 0x00000000 0x08180 0x08180 R E 0x1000 LOAD 0x009180 0x00008180 0x00057fff 0x00001 0x00001 RW 0x1000 LOAD 0x000db0 0x000ffdb0 0x000ffdb0 0x00000 0x00250 RW 0x1000 LOAD 0x00a000 0x50000000 0x50000000 0x00180 0x00180 R E 0x1000 Section to Segment mapping: Segment Sections... 00 .image.RW 01 .padding 02 .ipi_buffer 03 .image.RW.dram The .ipi_buffer is at 0x000ffdb0 and its size 0x00250. BRANCH=none BUG=b:156222508 BUG=b:156222459 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I574fafcfaa990da8c42388554945da6725e12264 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2534230 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
-rw-r--r--common/firmware_image.S5
-rw-r--r--common/firmware_image.lds.S10
2 files changed, 15 insertions, 0 deletions
diff --git a/common/firmware_image.S b/common/firmware_image.S
index b7d0c0d19a..5c70d29069 100644
--- a/common/firmware_image.S
+++ b/common/firmware_image.S
@@ -58,6 +58,11 @@
.incbin FW_IMAGE_SIGN(RW,)
#endif
+#ifdef CONFIG_IPI
+.section .ipi_buffer, "aw"
+.space (CONFIG_IPC_SHARED_OBJ_BUF_SIZE + 8) * 2, 0
+#endif
+
#ifdef CONFIG_DRAM_BASE
/* Read Write firmware in DRAM */
.section .image.RW.dram, "ax"
diff --git a/common/firmware_image.lds.S b/common/firmware_image.lds.S
index 7522cf792a..fc1b1f1d7d 100644
--- a/common/firmware_image.lds.S
+++ b/common/firmware_image.lds.S
@@ -44,6 +44,10 @@ MEMORY
{
FLASH (rx) : ORIGIN = CONFIG_PROGRAM_MEMORY_BASE,
LENGTH = CONFIG_FLASH_SIZE
+#ifdef CONFIG_IPI
+ IPI_BUFFER (rw) : ORIGIN = CONFIG_IPC_SHARED_OBJ_ADDR,
+ LENGTH = (CONFIG_IPC_SHARED_OBJ_BUF_SIZE + 8) * 2
+#endif
#ifdef CONFIG_DRAM_BASE
DRAM (rx) : ORIGIN = CONFIG_DRAM_BASE_LOAD, LENGTH = CONFIG_DRAM_SIZE
#endif
@@ -96,6 +100,12 @@ SECTIONS
BYTE(0xff);
} > FLASH =0xff
+#ifdef CONFIG_IPI
+ /* The section holds address of IPI buffer but no symbols. */
+ .ipi_buffer(NOLOAD) : {
+ } > IPI_BUFFER
+#endif
+
#ifdef CONFIG_DRAM_BASE
.image.RW.dram : AT(CONFIG_DRAM_BASE_LOAD) {
*(.image.RW.dram)