diff options
| author | Keith Short <keithshort@chromium.org> | 2020-11-04 12:55:01 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-11-05 01:07:00 +0000 |
| commit | 43ea8f37a3e628d524ec5ed5ffd1fe410cf4b329 (patch) | |
| tree | 2523cdcfcc06d6840e80223c14ebacad5ce3ca85 | |
| parent | 77a38c2a933d50942e7e533d51ddf2d5353bf195 (diff) | |
| download | chrome-ec-43ea8f37a3e628d524ec5ed5ffd1fe410cf4b329.tar.gz | |
drobit: remove board ID 0 checks
Board ID 0 checks were only used on the volteer reference board.
BUG=b:149858568
BRANCH=firmware-volteer-13521.B-master
TEST=make buildall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ib295f480b9645f9149f5ea1aad2fe06e45692219
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2519963
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
| -rw-r--r-- | board/drobit/board.c | 16 | ||||
| -rw-r--r-- | board/drobit/gpio.inc | 16 |
2 files changed, 6 insertions, 26 deletions
diff --git a/board/drobit/board.c b/board/drobit/board.c index df704b959d..fc3f4f2190 100644 --- a/board/drobit/board.c +++ b/board/drobit/board.c @@ -357,16 +357,14 @@ const int usb_port_enable[USB_PORT_COUNT] = { GPIO_EN_PP5000_USBA, }; -static enum gpio_signal ps8xxx_rst_odl = GPIO_USB_C1_RT_RST_ODL; - static void ps8815_reset(void) { int val; - gpio_set_level(ps8xxx_rst_odl, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0); msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS)); - gpio_set_level(ps8xxx_rst_odl, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1); msleep(PS8815_FW_INIT_DELAY_MS); /* @@ -457,16 +455,6 @@ __override void board_cbi_init(void) { enum ec_cfg_usb_db_type usb_db = ec_cfg_usb_db_type(); - /* Reconfigure Volteer GPIOs based on the board ID */ - if (get_board_id() == 0) { - CPRINTS("Configuring GPIOs for board ID 0"); - CPRINTS("VOLUME_UP button disabled"); - - /* Reassign USB_C1_RT_RST_ODL */ - bb_controls[USBC_PORT_C1].retimer_rst_gpio = - GPIO_USB_C1_RT_RST_ODL_BOARDID_0; - ps8xxx_rst_odl = GPIO_USB_C1_RT_RST_ODL_BOARDID_0; - } config_port_discrete_tcpc(0); switch (usb_db) { case DB_USB_ABSENT: diff --git a/board/drobit/gpio.inc b/board/drobit/gpio.inc index 529ad117fc..7699dddf85 100644 --- a/board/drobit/gpio.inc +++ b/board/drobit/gpio.inc @@ -83,19 +83,11 @@ GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) /* USB and USBC Signals */ GPIO(EN_PP5000_USBA, PIN(C, 6), GPIO_OUT_LOW) /* Enable USB-A charging - all ports */ GPIO(USB_A_LOW_PWR_OD, PIN(6, 6), GPIO_ODR_LOW) /* Don't limit USB-A charging by default - all ports */ - -/* - * USB_C1 moved from GPIO32 to GPIO83 on boards with board ID >=1. - * GPIO83/EN_PP1800_A is DNS on board ID 0 and GPIO32 is N/C on board ID >=1 - * so it's safe to define GPIOs compatible with both designs. - * TODO (b/149858568): remove board ID=0 support. - */ -GPIO(USB_C1_RT_RST_ODL_BOARDID_0, PIN(3, 2), GPIO_ODR_LOW) /* USB_C1 Reset on boards without board ID */ -GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) /* USB_C1 Reset on boards board ID >=1 */ -GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) +GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) +GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) +GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) /* There is currently no need to service this interrupt. */ -GPIO(USB_C1_RT_INT_ODL, PIN(F, 3), GPIO_INPUT) +GPIO(USB_C1_RT_INT_ODL, PIN(F, 3), GPIO_INPUT) /* Don't have a load switch for retimer */ UNIMPLEMENTED(USB_C1_LS_EN) |